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1 | #include <stdio.h> | |||
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2 | #include "lpp_apb_functions.h" | |||
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3 | #include "apb_fifo_Driver.h" | |||
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4 | #include "apb_uart_Driver.h" | |||
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5 | ||||
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6 | ||||
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7 | int main() | |||
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8 | { | |||
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9 | int i=0; | |||
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10 | int data; | |||
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11 | char temp[256]; | |||
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12 | ||||
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13 | int TblSinA[256] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255} ; | |||
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14 | int TblSinAB[256] = {255,254,253,252,251,250,249,248,247,246,245,244,243,242,241,240,239,238,237,236,235,234,233,232,231,230,229,228,227,226,225,224,223,222,221,220,219,218,217,216,215,214,213,212,211,210,209,208,207,206,205,204,203,202,201,200,199,198,197,196,195,194,193,192,191,190,189,188,187,186,185,184,183,182,181,180,179,178,177,176,175,174,173,172,171,170,169,168,167,166,165,164,163,162,161,160,159,158,157,156,155,154,153,152,151,150,149,148,147,146,145,144,143,142,141,140,139,138,137,136,135,134,133,132,131,130,129,128,127,126,125,124,123,122,121,120,119,118,117,116,115,114,113,112,111,110,109,108,107,106,105,104,103,102,101,100,99,98,97,96,95,94,93,92,91,90,89,88,87,86,85,84,83,82,81,80,79,78,77,76,75,74,73,72,71,70,69,68,67,66,65,64,63,62,61,60,59,58,57,56,55,54,53,52,51,50,49,48,47,46,45,44,43,42,41,40,39,38,37,36,35,34,33,32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0} ; | |||
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15 | int TblSinB[256] = {100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100} ; | |||
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16 | int TblSinBC[256] = {128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,256,255,254,253,252,251,250,249,248,247,246,245,244,243,242,241,240,239,238,237,236,235,234,233,232,231,230,229,228,227,226,225,224,223,222,221,220,219,218,217,216,215,214,213,212,211,210,209,208,207,206,205,204,203,202,201,200,199,198,197,196,195,194,193,192,191,190,189,188,187,186,185,184,183,182,181,180,179,178,177,176,175,174,173,172,171,170,169,168,167,166,165,164,163,162,161,160,159,158,157,156,155,154,153,152,151,150,149,148,147,146,145,144,143,142,141,140,139,138,137,136,135,134,133,132,131,130,129} ; | |||
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17 | int TblSinC[256] = {128,127,126,125,124,123,122,121,120,119,118,117,116,115,114,113,112,111,110,109,108,107,106,105,104,103,102,101,100,99,98,97,96,95,94,93,92,91,90,89,88,87,86,85,84,83,82,81,80,79,78,77,76,75,74,73,72,71,70,69,68,67,66,65,64,63,62,61,60,59,58,57,56,55,54,53,52,51,50,49,48,47,46,45,44,43,42,41,40,39,38,37,36,35,34,33,32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127} ; | |||
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18 | ||||
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19 | UART_Device* uart0 = openUART(0); | |||
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20 | FIFO_Device* fifotry = openFIFO(0); | |||
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21 | FIFO_Device* fifoIn = openFIFO(1); | |||
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22 | FIFO_Device* fifoOut = openFIFO(2); | |||
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23 | ||||
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24 | printf("\nDebut Main\n\n"); | |||
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25 | ||||
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26 | FillFifo(fifoIn,0,TblSinA,256); | |||
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27 | fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] | FIFO_ReUse); | |||
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28 | ||||
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29 | FillFifo(fifoIn,1,TblSinAB,256); | |||
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30 | fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] | FIFO_ReUse); | |||
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31 | ||||
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32 | FillFifo(fifoIn,2,TblSinB,256); | |||
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33 | fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] | FIFO_ReUse); | |||
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34 | ||||
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35 | FillFifo(fifoIn,3,TblSinBC,256); | |||
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36 | fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] | FIFO_ReUse); | |||
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37 | ||||
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38 | FillFifo(fifoIn,4,TblSinC,256); | |||
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39 | fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] | FIFO_ReUse); | |||
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40 | ||||
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41 | ||||
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42 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full); // TANT QUE full a 0 RIEN | |||
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43 | printf("\nFull 1\n"); | |||
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44 | while((fifoOut->FIFOreg[(2*1)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full); // TANT QUE full a 0 RIEN | |||
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45 | printf("\nFull 2\n"); | |||
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46 | ||||
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47 | while(1){ | |||
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48 | ||||
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49 | sprintf(temp,"PONG A\n\r"); | |||
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50 | uartputs(uart0,temp); | |||
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51 | ||||
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52 | while(i<257){ | |||
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53 | data = (fifoOut->FIFOreg[(2*0)+FIFO_RWdata]); | |||
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54 | i++; | |||
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55 | sprintf(temp,"%d\n\r",data); | |||
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56 | uartputs(uart0,temp); | |||
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57 | } | |||
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58 | ||||
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59 | i=0; | |||
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60 | sprintf(temp,"PONG B\n\r"); | |||
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61 | uartputs(uart0,temp); | |||
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62 | ||||
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63 | while(i<257){ | |||
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64 | data = (fifoOut->FIFOreg[(2*1)+FIFO_RWdata]); | |||
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65 | i++; | |||
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66 | sprintf(temp,"%d\n\r",data); | |||
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67 | uartputs(uart0,temp); | |||
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68 | } | |||
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69 | ||||
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70 | i=0; | |||
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71 | } | |||
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72 | printf("\nFin Main\n\n"); | |||
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73 | return 0; | |||
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74 | } |
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1 | ------------------------------------------------------------------------------ | |||
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2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
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3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
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4 | -- | |||
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5 | -- This program is free software; you can redistribute it and/or modify | |||
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6 | -- it under the terms of the GNU General Public License as published by | |||
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7 | -- the Free Software Foundation; either version 3 of the License, or | |||
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8 | -- (at your option) any later version. | |||
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9 | -- | |||
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10 | -- This program is distributed in the hope that it will be useful, | |||
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11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
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12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
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13 | -- GNU General Public License for more details. | |||
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14 | -- | |||
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15 | -- You should have received a copy of the GNU General Public License | |||
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16 | -- along with this program; if not, write to the Free Software | |||
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17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
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18 | ------------------------------------------------------------------------------- | |||
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19 | -- Author : Martin Morlot | |||
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20 | -- Mail : martin.morlot@lpp.polytechnique.fr | |||
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21 | ------------------------------------------------------------------------------- | |||
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22 | library IEEE; | |||
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23 | use IEEE.numeric_std.all; | |||
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24 | use IEEE.std_logic_1164.all; | |||
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25 | ||||
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26 | entity TopSpecMatrix is | |||
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27 | generic( | |||
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28 | Input_SZ : integer := 16); | |||
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29 | port( | |||
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30 | clk : in std_logic; | |||
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31 | rstn : in std_logic; | |||
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32 | Write : in std_logic; | |||
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33 | ReadIn : in std_logic_vector(1 downto 0); | |||
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34 | Full : in std_logic_vector(4 downto 0); | |||
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35 | Data : in std_logic_vector((5*Input_SZ)-1 downto 0); | |||
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36 | Start : out std_logic; | |||
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37 | ReadOut : out std_logic_vector(4 downto 0); | |||
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38 | Statu : out std_logic_vector(3 downto 0); | |||
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39 | DATA1 : out std_logic_vector(Input_SZ-1 downto 0); | |||
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40 | DATA2 : out std_logic_vector(Input_SZ-1 downto 0) | |||
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41 | ); | |||
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42 | end entity; | |||
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43 | ||||
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44 | architecture ar_TopSpecMatrix of TopSpecMatrix is | |||
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45 | ||||
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46 | type etat is (eX,e0,e1,e2); | |||
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47 | signal ect : etat; | |||
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48 | ||||
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49 | signal DataCount : integer range 0 to 256 := 0; | |||
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50 | signal StatuINT : integer range 1 to 15 := 1; | |||
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51 | ||||
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52 | signal Write_reg : std_logic; | |||
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53 | signal Full_int : std_logic_vector(1 downto 0); | |||
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54 | ||||
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55 | begin | |||
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56 | process(clk,rstn) | |||
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57 | begin | |||
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58 | ||||
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59 | if(rstn='0')then | |||
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60 | DataCount <= 0; | |||
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61 | StatuINT <= 1; | |||
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62 | Write_reg <= '0'; | |||
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63 | Start <= '0'; | |||
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64 | ect <= e0; | |||
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65 | ||||
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66 | elsif(clk'event and clk='1')then | |||
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67 | Write_reg <= Write; | |||
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68 | ||||
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69 | if(Write_reg='1' and Write='0')then | |||
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70 | if(DataCount=256)then | |||
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71 | DataCount <= 0; | |||
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72 | else | |||
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73 | DataCount <= DataCount + 1; | |||
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74 | end if; | |||
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75 | end if; | |||
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76 | ||||
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77 | ||||
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78 | case ect is | |||
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79 | ||||
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80 | when e0 => | |||
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81 | if(Full_int = "11")then | |||
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82 | Start <= '1'; | |||
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83 | if(StatuINT=1 or StatuINT=3 or StatuINT=6 or StatuINT=10 or StatuINT=15)then | |||
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84 | ect <= e1; | |||
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85 | else | |||
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86 | ect <= e2; | |||
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87 | end if; | |||
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88 | end if; | |||
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89 | ||||
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90 | when e1 => | |||
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91 | if(DataCount=128)then | |||
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92 | if(StatuINT=15)then | |||
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93 | StatuINT <= 1; | |||
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94 | else | |||
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95 | StatuINT <= StatuINT + 1; | |||
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96 | end if; | |||
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97 | DataCount <= 0; | |||
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98 | Start <= '0'; | |||
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99 | ect <= e0; | |||
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100 | end if; | |||
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101 | ||||
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102 | when e2 => | |||
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103 | if(DataCount=256)then | |||
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104 | DataCount <= 0; | |||
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105 | StatuINT <= StatuINT + 1; | |||
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106 | Start <= '0'; | |||
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107 | ect <= e0; | |||
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108 | end if; | |||
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109 | ||||
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110 | when others => | |||
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111 | null; | |||
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112 | ||||
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113 | end case; | |||
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114 | end if; | |||
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115 | end process; | |||
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116 | ||||
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117 | Statu <= std_logic_vector(to_unsigned(StatuINT,4)); | |||
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118 | ||||
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119 | with StatuINT select | |||
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120 | DATA1 <= Data(15 downto 0) when 1, | |||
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121 | Data(15 downto 0) when 2, | |||
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122 | Data(31 downto 16) when 3, | |||
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123 | Data(15 downto 0) when 4, | |||
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124 | Data(31 downto 16) when 5, | |||
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125 | Data(47 downto 32) when 6, | |||
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126 | Data(15 downto 0) when 7, | |||
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127 | Data(31 downto 16) when 8, | |||
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128 | Data(47 downto 32) when 9, | |||
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129 | Data(63 downto 48) when 10, | |||
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130 | Data(15 downto 0) when 11, | |||
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131 | Data(31 downto 16) when 12, | |||
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132 | Data(47 downto 32) when 13, | |||
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133 | Data(63 downto 48) when 14, | |||
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134 | Data(79 downto 64) when 15, | |||
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135 | X"0000" when others; | |||
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136 | ||||
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137 | ||||
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138 | with StatuINT select | |||
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139 | DATA2 <= (others => '0') when 1, | |||
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140 | Data(31 downto 16) when 2, | |||
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141 | (others => '0') when 3, | |||
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142 | Data(47 downto 32) when 4, | |||
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143 | Data(47 downto 32) when 5, | |||
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144 | (others => '0') when 6, | |||
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145 | Data(63 downto 48) when 7, | |||
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146 | Data(63 downto 48) when 8, | |||
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147 | Data(63 downto 48) when 9, | |||
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148 | (others => '0') when 10, | |||
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149 | Data(79 downto 64) when 11, | |||
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150 | Data(79 downto 64) when 12, | |||
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151 | Data(79 downto 64) when 13, | |||
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152 | Data(79 downto 64) when 14, | |||
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153 | (others => '0') when 15, | |||
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154 | X"0000" when others; | |||
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155 | ||||
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156 | with StatuINT select | |||
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157 | ReadOut <= "1111" & not READin(0) when 1, | |||
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158 | "111" & not READin(1) & not READin(0) when 2, | |||
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159 | "111" & not READin(0) & '1' when 3, | |||
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160 | "11" & not READin(1) & '1' & not READin(0) when 4, | |||
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161 | "11" & not READin(1) & not READin(0) & '1' when 5, | |||
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162 | "11" & not READin(0) & "11" when 6, | |||
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163 | "1" & not READin(1) & "11" & not READin(0) when 7, | |||
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164 | '1' & not READin(1) & '1' & not READin(0) & '1' when 8, | |||
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165 | '1' & not READin(1) & not READin(0) & "11" when 9, | |||
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166 | '1' & not READin(0) & "111" when 10, | |||
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167 | not READin(1) & "111" & not READin(0) when 11, | |||
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168 | not READin(1) & "11" & not READin(0) & '1' when 12, | |||
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169 | not READin(1) & '1' & not READin(0) & "11" when 13, | |||
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170 | not READin(1) & not READin(0) & "111" when 14, | |||
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171 | not READin(0) & "1111" when 15, | |||
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172 | "11111" when others; | |||
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173 | ||||
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174 | with StatuINT select | |||
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175 | Full_int <= Full(0) & Full(0) when 1, | |||
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176 | Full(1) & Full(0) when 2, | |||
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177 | Full(1) & Full(1) when 3, | |||
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178 | Full(2) & Full(0) when 4, | |||
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179 | Full(2) & Full(1) when 5, | |||
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180 | Full(2) & Full(2) when 6, | |||
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181 | Full(3) & Full(0) when 7, | |||
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182 | Full(3) & Full(1) when 8, | |||
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183 | Full(3) & Full(2) when 9, | |||
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184 | Full(3) & Full(3) when 10, | |||
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185 | Full(4) & Full(0) when 11, | |||
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186 | Full(4) & Full(1) when 12, | |||
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187 | Full(4) & Full(2) when 13, | |||
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188 | Full(4) & Full(3) when 14, | |||
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189 | Full(4) & Full(4) when 15, | |||
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190 | "00" when others; | |||
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191 | ||||
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192 | end architecture; | |||
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193 | ||||
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194 | ||||
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195 | ||||
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196 | ||||
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197 | ||||
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198 |
@@ -2,79 +2,72 | |||||
2 | #include "lpp_apb_functions.h" |
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2 | #include "lpp_apb_functions.h" | |
3 | #include "apb_fifo_Driver.h" |
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3 | #include "apb_fifo_Driver.h" | |
4 | #include "apb_uart_Driver.h" |
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4 | #include "apb_uart_Driver.h" | |
5 | #include "apb_delay_Driver.h" |
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6 | #include "apb_fft_Driver.h" |
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7 |
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8 |
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5 | |||
9 | int main() |
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6 | int main() | |
10 | { |
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7 | { | |
11 | int i; |
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8 | int i=0; | |
12 |
int data |
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9 | int data; | |
13 | char temp[256]; |
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10 | char temp[256]; | |
14 | int TblSinA[256] = {0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE,0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE}; |
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15 | int TblSinB[256] = {0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF}; |
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16 | int TblSinAB[256] = {0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD,0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD} ; |
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17 |
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11 | |||
18 | /* int TblSin5K[256] = {0x0000,0x080A,0x100B,0x17FC,0x1FD5,0x278E,0x2F1F,0x3680,0x3DAA,0x4496,0x4B3D,0x5197,0x579F,0x5D4F,0x62A0,0x678E,0x6C13,0x702B,0x73D1,0x7703,0x79BC,0x7BFB,0x7DBC,0x7EFE,0x7FBF,0x7FFF,0x7FBF,0x7EFE,0x7DBC,0x7BFB,0x79BC,0x7703,0x73D1,0x702B,0x6C13,0x678E,0x62A0,0x5D4F,0x579F,0x5197,0x4B3D,0x4496,0x3DAA,0x3680,0x2F1F,0x278E,0x1FD5,0x17FC,0x100B,0x080A,0x0000,0xF7F6,0xEFF5,0xE804,0xE02B,0xD872,0xD0E1,0xC980,0xC256,0xBB6A,0xB4C3,0xAE69,0xA861,0xA2B1,0x9D60,0x9872,0x93ED,0x8FD5,0x8C2F,0x88FD,0x8644,0x8405,0x8244,0x8102,0x8041,0x8000,0x8041,0x8102,0x8244,0x8405,0x8644,0x88FD,0x8C2F,0x8FD5,0x93ED,0x9872,0x9D60,0xA2B1,0xA861,0xAE69,0xB4C3,0xBB6A,0xC256,0xC980,0xD0E1,0xD872,0xE02B,0xE804,0xEFF5,0xF7F6,0x0000,0x080A,0x100B,0x17FC,0x1FD5,0x278E,0x2F1F,0x3680,0x3DAA,0x4496,0x4B3D,0x5197,0x579F,0x5D4F,0x62A0,0x678E,0x6C13,0x702B,0x73D1,0x7703,0x79BC,0x7BFB,0x7DBC,0x7EFE,0x7FBF,0x7FFF,0x7FBF,0x7EFE,0x7DBC,0x7BFB,0x79BC,0x7703,0x73D1,0x702B,0x6C13,0x678E,0x62A0,0x5D4F,0x579F,0x5197,0x4B3D,0x4496,0x3DAA,0x3680,0x2F1F,0x278E,0x1FD5,0x17FC,0x100B,0x080A,0x0000,0xF7F6,0xEFF5,0xE804,0xE02B,0xD872,0xD0E1,0xC980,0xC256,0xBB6A,0xB4C3,0xAE69,0xA861,0xA2B1,0x9D60,0x9872,0x93ED,0x8FD5,0x8C2F,0x88FD,0x8644,0x8405,0x8244,0x8102,0x8041,0x8000,0x8041,0x8102,0x8244,0x8405,0x8644,0x88FD,0x8C2F,0x8FD5,0x93ED,0x9872,0x9D60,0xA2B1,0xA861,0xAE69,0xB4C3,0xBB6A,0xC256,0xC980,0xD0E1,0xD872,0xE02B,0xE804,0xEFF5,0xF7F6,0x0000,0x080A,0x100B,0x17FC,0x1FD5,0x278E,0x2F1F,0x3680,0x3DAA,0x4496,0x4B3D,0x5197,0x579F,0x5D4F,0x62A0,0x678E,0x6C13,0x702B,0x73D1,0x7703,0x79BC,0x7BFB,0x7DBC,0x7EFE,0x7FBF,0x7FFF,0x7FBF,0x7EFE,0x7DBC,0x7BFB,0x79BC,0x7703,0x73D1,0x702B,0x6C13,0x678E,0x62A0,0x5D4F,0x579F,0x5197,0x4B3D,0x4496,0x3DAA,0x3680,0x2F1F,0x278E,0x1FD5,0x17FC,0x100B,0x080A,0x0000,0xF7F6,0xEFF5,0xE804,0xE02B,0xD872}; |
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12 | int TblSinA[256] = {0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE,0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE}; | |
19 | int TblSin8K[256] = {0x0000,0x0CD9,0x1990,0x2605,0x3219,0x3DAA,0x489C,0x52D3,0x5C33,0x64A5,0x6C13,0x7269,0x7798,0x7B92,0x7E4C,0x7FBF,0x7FE9,0x7EC7,0x7C5E,0x78B4,0x73D1,0x6DC3,0x669A,0x5E67,0x5540,0x4B3D,0x4077,0x350A,0x2915,0x1CB5,0x100B,0x0337,0xF65C,0xE999,0xDD10,0xD0E1,0xC52C,0xBA10,0xAFA8,0xA610,0x9D60,0x95AF,0x8F11,0x8997,0x854F,0x8244,0x807F,0x8003,0x80D1,0x82E9,0x8644,0x8AD9,0x909E,0x9782,0x9F75,0xA861,0xB22F,0xBCC7,0xC80D,0xD3E3,0xE02B,0xECC5,0xF992,0x066E,0x133B,0x1FD5,0x2C1D,0x37F3,0x4339,0x4DD1,0x579F,0x608B,0x687E,0x6F62,0x7527,0x79BC,0x7D17,0x7F2F,0x7FFD,0x7F81,0x7DBC,0x7AB1,0x7669,0x70EF,0x6A51,0x62A0,0x59F0,0x5058,0x45F0,0x3AD4,0x2F1F,0x22F0,0x1667,0x09A4,0xFCC9,0xEFF5,0xE34B,0xD6EB,0xCAF6,0xBF89,0xB4C3,0xAAC0,0xA199,0x9966,0x923D,0x8C2F,0x874C,0x83A2,0x8139,0x8017,0x8041,0x81B4,0x846E,0x8868,0x8D97,0x93ED,0x9B5B,0xA3CD,0xAD2D,0xB764,0xC256,0xCDE7,0xD9FB,0xE670,0xF327,0x0000,0x0CD9,0x1990,0x2605,0x3219,0x3DAA,0x489C,0x52D3,0x5C33,0x64A5,0x6C13,0x7269,0x7798,0x7B92,0x7E4C,0x7FBF,0x7FE9,0x7EC7,0x7C5E,0x78B4,0x73D1,0x6DC3,0x669A,0x5E67,0x5540,0x4B3D,0x4077,0x350A,0x2915,0x1CB5,0x100B,0x0337,0xF65C,0xE999,0xDD10,0xD0E1,0xC52C,0xBA10,0xAFA8,0xA610,0x9D60,0x95AF,0x8F11,0x8997,0x854F,0x8244,0x807F,0x8003,0x80D1,0x82E9,0x8644,0x8AD9,0x909E,0x9782,0x9F75,0xA861,0xB22F,0xBCC7,0xC80D,0xD3E3,0xE02B,0xECC5,0xF992,0x066E,0x133B,0x1FD5,0x2C1D,0x37F3,0x4339,0x4DD1,0x579F,0x608B,0x687E,0x6F62,0x7527,0x79BC,0x7D17,0x7F2F,0x7FFD,0x7F81,0x7DBC,0x7AB1,0x7669,0x70EF,0x6A51,0x62A0,0x59F0,0x5058,0x45F0,0x3AD4,0x2F1F,0x22F0,0x1667,0x09A4,0xFCC9,0xEFF5,0xE34B,0xD6EB,0xCAF6,0xBF89,0xB4C3,0xAAC0,0xA199,0x9966,0x923D,0x8C2F,0x874C,0x83A2,0x8139,0x8017,0x8041,0x81B4,0x846E,0x8868,0x8D97,0x93ED,0x9B5B,0xA3CD,0xAD2D,0xB764,0xC256,0xCDE7,0xD9FB,0xE670,0xF327,0x0000,0x0CD9,0x1990,0x2605,0x3219,0x3DAA}; |
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13 | int TblSinAB[256] = {0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD,0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD}; | |
20 | int TblSin11K[256] = {0x0000,0x11A3,0x22F0,0x3392,0x4339,0x5197,0x5E67,0x696A,0x7269,0x793B,0x7DBC,0x7FD7,0x7F81,0x7CBD,0x7798,0x702B,0x669A,0x5B14,0x4DD1,0x3F12,0x2F1F,0x1E46,0x0CD9,0xFB2D,0xE999,0xD872,0xC80D,0xB8B8,0xAAC0,0x9E68,0x93ED,0x8B82,0x854F,0x8174,0x8003,0x8102,0x846E,0x8A36,0x923D,0x9C5B,0xA861,0xB612,0xC52C,0xD566,0xE670,0xF7F6,0x09A4,0x1B23,0x2C1D,0x3C40,0x4B3D,0x58CA,0x64A5,0x6E95,0x7669,0x7BFB,0x7F2F,0x7FF6,0x7E4C,0x7A39,0x73D1,0x6B34,0x608B,0x540B,0x45F0,0x3680,0x2605,0x14D1,0x0337,0xF18E,0xE02B,0xCF63,0xBF89,0xB0EA,0xA3CD,0x9872,0x8F11,0x87D8,0x82E9,0x805D,0x8041,0x8294,0x874C,0x8E52,0x9782,0xA2B1,0xAFA8,0xBE27,0xCDE7,0xDE9D,0xEFF5,0x019C,0x133B,0x247C,0x350A,0x4496,0x52D3,0x5F7B,0x6A51,0x7320,0x79BC,0x7E06,0x7FE9,0x7F5B,0x7C5E,0x7703,0x6F62,0x65A1,0x59F0,0x4C88,0x3DAA,0x2D9F,0x1CB5,0x0B3F,0xF992,0xE804,0xD6EB,0xC69B,0xB764,0xA98F,0x9D60,0x9313,0x8AD9,0x84DC,0x8139,0x8000,0x8139,0x84DC,0x8AD9,0x9313,0x9D60,0xA98F,0xB764,0xC69B,0xD6EB,0xE804,0xF992,0x0B3F,0x1CB5,0x2D9F,0x3DAA,0x4C88,0x59F0,0x65A1,0x6F62,0x7703,0x7C5E,0x7F5B,0x7FE9,0x7E06,0x79BC,0x7320,0x6A51,0x5F7B,0x52D3,0x4496,0x350A,0x247C,0x133B,0x019C,0xEFF5,0xDE9D,0xCDE7,0xBE27,0xAFA8,0xA2B1,0x9782,0x8E52,0x874C,0x8294,0x8041,0x805D,0x82E9,0x87D8,0x8F11,0x9872,0xA3CD,0xB0EA,0xBF89,0xCF63,0xE02B,0xF18E,0x0337,0x14D1,0x2605,0x3680,0x45F0,0x540B,0x608B,0x6B34,0x73D1,0x7A39,0x7E4C,0x7FF6,0x7F2F,0x7BFB,0x7669,0x6E95,0x64A5,0x58CA,0x4B3D,0x3C40,0x2C1D,0x1B23,0x09A4,0xF7F6,0xE670,0xD566,0xC52C,0xB612,0xA861,0x9C5B,0x923D,0x8A36,0x846E,0x8102,0x8003,0x8174,0x854F,0x8B82,0x93ED,0x9E68,0xAAC0,0xB8B8,0xC80D,0xD872,0xE999,0xFB2D,0x0CD9,0x1E46,0x2F1F,0x3F12,0x4DD1,0x5B14,0x669A,0x702B,0x7798,0x7CBD,0x7F81,0x7FD7,0x7DBC,0x793B,0x7269,0x696A,0x5E67,0x5197,0x4339,0x3392,0x22F0,0x11A3,0x0000,0xEE5D,0xDD10,0xCC6E,0xBCC7,0xAE69}; |
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14 | int TblSinB[256] = {0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF}; | |
21 | */ int TblSin15K[256] = {0x0000,0x17FC,0x2F1F,0x4496,0x579F,0x678E,0x73D1,0x7BFB,0x7FBF,0x7EFE,0x79BC,0x702B,0x62A0,0x5197,0x3DAA,0x278E,0x100B,0xF7F6,0xE02B,0xC980,0xB4C3,0xA2B1,0x93ED,0x88FD,0x8244,0x8000,0x8244,0x88FD,0x93ED,0xA2B1,0xB4C3,0xC980,0xE02B,0xF7F6,0x100B,0x278E,0x3DAA,0x5197,0x62A0,0x702B,0x79BC,0x7EFE,0x7FBF,0x7BFB,0x73D1,0x678E,0x579F,0x4496,0x2F1F,0x17FC,0x0000,0xE804,0xD0E1,0xBB6A,0xA861,0x9872,0x8C2F,0x8405,0x8041,0x8102,0x8644,0x8FD5,0x9D60,0xAE69,0xC256,0xD872,0xEFF5,0x080A,0x1FD5,0x3680,0x4B3D,0x5D4F,0x6C13,0x7703,0x7DBC,0x8000,0x7DBC,0x7703,0x6C13,0x5D4F,0x4B3D,0x3680,0x1FD5,0x080A,0xEFF5,0xD872,0xC256,0xAE69,0x9D60,0x8FD5,0x8644,0x8102,0x8041,0x8405,0x8C2F,0x9872,0xA861,0xBB6A,0xD0E1,0xE804,0x0000,0x17FC,0x2F1F,0x4496,0x579F,0x678E,0x73D1,0x7BFB,0x7FBF,0x7EFE,0x79BC,0x702B,0x62A0,0x5197,0x3DAA,0x278E,0x100B,0xF7F6,0xE02B,0xC980,0xB4C3,0xA2B1,0x93ED,0x88FD,0x8244,0x8000,0x8244,0x88FD,0x93ED,0xA2B1,0xB4C3,0xC980,0xE02B,0xF7F6,0x100B,0x278E,0x3DAA,0x5197,0x62A0,0x702B,0x79BC,0x7EFE,0x7FBF,0x7BFB,0x73D1,0x678E,0x579F,0x4496,0x2F1F,0x17FC,0x0000,0xE804,0xD0E1,0xBB6A,0xA861,0x9872,0x8C2F,0x8405,0x8041,0x8102,0x8644,0x8FD5,0x9D60,0xAE69,0xC256,0xD872,0xEFF5,0x080A,0x1FD5,0x3680,0x4B3D,0x5D4F,0x6C13,0x7703,0x7DBC,0x8000,0x7DBC,0x7703,0x6C13,0x5D4F,0x4B3D,0x3680,0x1FD5,0x080A,0xEFF5,0xD872,0xC256,0xAE69,0x9D60,0x8FD5,0x8644,0x8102,0x8041,0x8405,0x8C2F,0x9872,0xA861,0xBB6A,0xD0E1,0xE804,0x0000,0x17FC,0x2F1F,0x4496,0x579F,0x678E,0x73D1,0x7BFB,0x7FBF,0x7EFE,0x79BC,0x702B,0x62A0,0x5197,0x3DAA,0x278E,0x100B,0xF7F6,0xE02B,0xC980,0xB4C3,0xA2B1,0x93ED,0x88FD,0x8244,0x8000,0x8244,0x88FD,0x93ED,0xA2B1,0xB4C3,0xC980,0xE02B,0xF7F6,0x100B,0x278E,0x3DAA,0x5197,0x62A0,0x702B,0x79BC,0x7EFE,0x7FBF,0x7BFB,0x73D1,0x678E,0x579F,0x4496,0x2F1F,0x17FC,0x0000,0xE804,0xD0E1,0xBB6A,0xA861,0x9872}; |
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15 | int TblSinBC[256] = {0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C}; | |
22 | int TblSin19K[256] = {0x0000,0x1E46,0x3AD4,0x540B,0x687E,0x7703,0x7EC7,0x7F5B,0x78B4,0x6B34,0x579F,0x3F12,0x22F0,0x04D3,0xE670,0xC980,0xAFA8,0x9A5F,0x8AD9,0x81FA,0x8041,0x85C7,0x923D,0xA4EC,0xBCC7,0xD872,0xF65C,0x14D1,0x3219,0x4C88,0x62A0,0x7320,0x7D17,0x7FF6,0x7B92,0x702B,0x5E67,0x4748,0x2C1D,0x0E72,0xEFF5,0xD261,0xB764,0xA085,0x8F11,0x8405,0x8003,0x8343,0x8D97,0x9E68,0xB4C3,0xCF63,0xECC5,0x0B3F,0x2915,0x4496,0x5C33,0x6E95,0x7AB1,0x7FD7,0x7DBC,0x747E,0x64A5,0x4F16,0x350A,0x17FC,0xF992,0xDB84,0xBF89,0xA736,0x93ED,0x86C5,0x807F,0x8174,0x8997,0x9872,0xAD2D,0xC69B,0xE34B,0x019C,0x1FD5,0x3C40,0x5540,0x696A,0x7798,0x7EFE,0x7F2F,0x7828,0x6A51,0x5671,0x3DAA,0x2163,0x0337,0xE4DD,0xC80D,0xAE69,0x9966,0x8A36,0x81B4,0x805D,0x8644,0x9313,0xA610,0xBE27,0xD9FB,0xF7F6,0x1667,0x3392,0x4DD1,0x63A5,0x73D1,0x7D6C,0x7FE9,0x7B24,0x6F62,0x5D4F,0x45F0,0x2A9A,0x0CD9,0xEE5D,0xD0E1,0xB612,0x9F75,0x8E52,0x83A2,0x8000,0x83A2,0x8E52,0x9F75,0xB612,0xD0E1,0xEE5D,0x0CD9,0x2A9A,0x45F0,0x5D4F,0x6F62,0x7B24,0x7FE9,0x7D6C,0x73D1,0x63A5,0x4DD1,0x3392,0x1667,0xF7F6,0xD9FB,0xBE27,0xA610,0x9313,0x8644,0x805D,0x81B4,0x8A36,0x9966,0xAE69,0xC80D,0xE4DD,0x0337,0x2163,0x3DAA,0x5671,0x6A51,0x7828,0x7F2F,0x7EFE,0x7798,0x696A,0x5540,0x3C40,0x1FD5,0x019C,0xE34B,0xC69B,0xAD2D,0x9872,0x8997,0x8174,0x807F,0x86C5,0x93ED,0xA736,0xBF89,0xDB84,0xF992,0x17FC,0x350A,0x4F16,0x64A5,0x747E,0x7DBC,0x7FD7,0x7AB1,0x6E95,0x5C33,0x4496,0x2915,0x0B3F,0xECC5,0xCF63,0xB4C3,0x9E68,0x8D97,0x8343,0x8003,0x8405,0x8F11,0xA085,0xB764,0xD261,0xEFF5,0x0E72,0x2C1D,0x4748,0x5E67,0x702B,0x7B92,0x7FF6,0x7D17,0x7320,0x62A0,0x4C88,0x3219,0x14D1,0xF65C,0xD872,0xBCC7,0xA4EC,0x923D,0x85C7,0x8041,0x81FA,0x8AD9,0x9A5F,0xAFA8,0xC980,0xE670,0x04D3,0x22F0,0x3F12,0x579F,0x6B34,0x78B4,0x7F5B,0x7EC7,0x7703,0x687E,0x540B,0x3AD4,0x1E46,0x0000,0xE1BA,0xC52C,0xABF5,0x9782,0x88FD}; |
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16 | int TblSinC[256] = {0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E}; | |
23 | int Table[256]; |
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24 |
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17 | |||
25 |
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18 | UART_Device* uart0 = openUART(0); | |
26 |
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19 | FIFO_Device* fifotry = openFIFO(0); | |
27 |
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20 | FIFO_Device* fifoIn = openFIFO(1); | |
28 |
FIFO_Device* fifo |
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21 | FIFO_Device* fifoOut = openFIFO(2); | |
29 | FIFO_Device* fifoOut = openFIFO(1); |
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30 |
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22 | |||
31 | printf("\nDebut Main\n\n"); |
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23 | printf("\nDebut Main\n\n"); | |
32 |
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24 | |||
33 | Setup(delay,30000000); |
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25 | FillFifo(fifoIn,0,TblSinA,256); | |
34 |
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35 | FftInput(TblSinA,fft0,delay); |
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36 | FftOutput(Table,fft0); |
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37 | /*for (i = 0 ; i < 256 ; i=i+2) |
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38 | { |
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39 | sprintf(temp,"%x\t%x\n\r",Table[i],Table[i+1]); |
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40 | uartputs(uart0,temp); |
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41 | }*/ |
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42 | FillFifo(fifoIn,0,Table); |
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43 | fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] | FIFO_ReUse); |
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26 | fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] | FIFO_ReUse); | |
44 |
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27 | |||
45 | FftInput(TblSinAB,fft0,delay); |
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28 | FillFifo(fifoIn,1,TblSinAB,256); | |
46 | FftOutput(Table,fft0); |
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47 | FillFifo(fifoIn,1,Table); |
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48 | fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] | FIFO_ReUse); |
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29 | fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] | FIFO_ReUse); | |
49 |
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30 | |||
50 | FftInput(TblSinB,fft0,delay); |
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31 | FillFifo(fifoIn,2,TblSinB,256); | |
51 | FftOutput(Table,fft0); |
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52 | FillFifo(fifoIn,2,Table); |
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53 | fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] | FIFO_ReUse); |
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32 | fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] | FIFO_ReUse); | |
54 |
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33 | |||
55 | FftInput(TblSin15K,fft0,delay); |
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34 | FillFifo(fifoIn,3,TblSinBC,256); | |
56 | FftOutput(Table,fft0); |
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57 | FillFifo(fifoIn,3,Table); |
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58 | fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] | FIFO_ReUse); |
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35 | fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] | FIFO_ReUse); | |
59 |
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36 | |||
60 | FftInput(TblSin19K,fft0,delay); |
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37 | FillFifo(fifoIn,4,TblSinC,256); | |
61 | FftOutput(Table,fft0); |
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62 | FillFifo(fifoIn,4,Table); |
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63 | fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] | FIFO_ReUse); |
|
38 | fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] | FIFO_ReUse); | |
64 | printf("ok"); |
|
39 | ||
65 | while(1){ |
|
40 | ||
|
41 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full); // TANT QUE full a 0 RIEN | |||
|
42 | printf("\nFull 1\n"); | |||
|
43 | while((fifoOut->FIFOreg[(2*1)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full); // TANT QUE full a 0 RIEN | |||
|
44 | printf("\nFull 2\n"); | |||
|
45 | ||||
|
46 | while(1){ | |||
|
47 | ||||
|
48 | sprintf(temp,"PONG A\n\r"); | |||
|
49 | uartputs(uart0,temp); | |||
66 |
|
50 | |||
67 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) == FIFO_Empty); // TANT QUE empty a 1 RIEN |
|
51 | while(i<257){ | |
|
52 | data = (fifoOut->FIFOreg[(2*0)+FIFO_RWdata]); | |||
|
53 | i++; | |||
|
54 | sprintf(temp,"%d\n\r",data); | |||
|
55 | uartputs(uart0,temp); | |||
|
56 | } | |||
68 |
|
57 | |||
69 | data1 = fifoOut->FIFOreg[(2*0)+FIFO_RWdata]; |
|
58 | i=0; | |
70 | data2 = fifoOut->FIFOreg[(2*0)+FIFO_RWdata]; |
|
59 | sprintf(temp,"PONG B\n\r"); | |
|
60 | uartputs(uart0,temp); | |||
71 |
|
61 | |||
72 | sprintf(temp,"%d\t%d\n\r",data1,data2); |
|
62 | while(i<257){ | |
|
63 | data = (fifoOut->FIFOreg[(2*1)+FIFO_RWdata]); | |||
|
64 | i++; | |||
|
65 | sprintf(temp,"%d\n\r",data); | |||
73 | uartputs(uart0,temp); |
|
66 | uartputs(uart0,temp); | |
|
67 | } | |||
|
68 | ||||
|
69 | i=0; | |||
74 | } |
|
70 | } | |
75 | printf("\nFin Main\n\n"); |
|
71 | printf("\nFin Main\n\n"); | |
76 | return 0; |
|
72 | return 0; | |
77 | } |
|
73 | } | |
78 |
|
||||
79 |
|
||||
80 |
|
@@ -21,7 +21,7 include ../../rules.mk | |||||
21 | LIBDIR = ../../lib |
|
21 | LIBDIR = ../../lib | |
22 | INCPATH = ../../includes |
|
22 | INCPATH = ../../includes | |
23 | SCRIPTDIR=../../scripts/ |
|
23 | SCRIPTDIR=../../scripts/ | |
24 |
LIBS=-lapb_fft_Driver -llpp_apb_functions |
|
24 | LIBS=-lapb_fifo_Driver -lapb_uart_Driver -llpp_apb_functions | |
25 | INPUTFILE=main.c |
|
25 | INPUTFILE=main.c | |
26 | EXEC=BenchFFT.bin |
|
26 | EXEC=BenchFFT.bin | |
27 | OUTBINDIR=bin/ |
|
27 | OUTBINDIR=bin/ |
@@ -2,7 +2,7 | |||||
2 | #include "lpp_apb_functions.h" |
|
2 | #include "lpp_apb_functions.h" | |
3 | #include "apb_fifo_Driver.h" |
|
3 | #include "apb_fifo_Driver.h" | |
4 | #include "apb_uart_Driver.h" |
|
4 | #include "apb_uart_Driver.h" | |
5 | #include "TableTest.h" |
|
5 | //#include "TableTest.h" | |
6 |
|
6 | |||
7 |
|
7 | |||
8 | int main() |
|
8 | int main() |
@@ -32,8 +32,8 int main() | |||||
32 |
|
32 | |||
33 | /////////////////////////////////////////////////////////////////////////// |
|
33 | /////////////////////////////////////////////////////////////////////////// | |
34 | mspec->Statu = 2; |
|
34 | mspec->Statu = 2; | |
35 | FillFifo(fifoIn,0,TblB1); |
|
35 | FillFifo(fifoIn,0,TblB1,256); | |
36 | FillFifo(fifoIn,1,TblB2); |
|
36 | FillFifo(fifoIn,1,TblB2,256); | |
37 | gpio0->Dout = 0x1; |
|
37 | gpio0->Dout = 0x1; | |
38 |
|
38 | |||
39 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty) // TANT QUE empty a 0 ALORS |
|
39 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty) // TANT QUE empty a 0 ALORS | |
@@ -56,7 +56,7 int main() | |||||
56 |
|
56 | |||
57 | /////////////////////////////////////////////////////////////////////////// |
|
57 | /////////////////////////////////////////////////////////////////////////// | |
58 | mspec->Statu = 1; |
|
58 | mspec->Statu = 1; | |
59 | FillFifo(fifoIn,0,TblB1); |
|
59 | FillFifo(fifoIn,0,TblB1,256); | |
60 | gpio0->Dout = 0x1; |
|
60 | gpio0->Dout = 0x1; | |
61 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty) // TANT QUE empty a 0 ALORS |
|
61 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty) // TANT QUE empty a 0 ALORS | |
62 | { |
|
62 | { | |
@@ -78,8 +78,8 int main() | |||||
78 |
|
78 | |||
79 | /////////////////////////////////////////////////////////////////////////// |
|
79 | /////////////////////////////////////////////////////////////////////////// | |
80 | mspec->Statu = 4; |
|
80 | mspec->Statu = 4; | |
81 | FillFifo(fifoIn,0,TblB1); |
|
81 | FillFifo(fifoIn,0,TblB1,256); | |
82 | FillFifo(fifoIn,1,TblB3); |
|
82 | FillFifo(fifoIn,1,TblB3,256); | |
83 | gpio0->Dout = 0x1; |
|
83 | gpio0->Dout = 0x1; | |
84 |
|
84 | |||
85 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty) // TANT QUE empty a 0 ALORS |
|
85 | while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty) // TANT QUE empty a 0 ALORS | |
@@ -123,19 +123,19 int main2() | |||||
123 |
|
123 | |||
124 | printf("\nDebut Main\n\n"); |
|
124 | printf("\nDebut Main\n\n"); | |
125 |
|
125 | |||
126 | FillFifo(fifoIn,0,TblB1); |
|
126 | FillFifo(fifoIn,0,TblB1,256); | |
127 | fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] | FIFO_ReUse); |
|
127 | fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*0)+FIFO_Ctrl] | FIFO_ReUse); | |
128 |
|
128 | |||
129 | FillFifo(fifoIn,1,TblB2); |
|
129 | FillFifo(fifoIn,1,TblB2,256); | |
130 | fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] | FIFO_ReUse); |
|
130 | fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*1)+FIFO_Ctrl] | FIFO_ReUse); | |
131 |
|
131 | |||
132 | FillFifo(fifoIn,2,TblB3); |
|
132 | FillFifo(fifoIn,2,TblB3,256); | |
133 | fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] | FIFO_ReUse); |
|
133 | fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*2)+FIFO_Ctrl] | FIFO_ReUse); | |
134 |
|
134 | |||
135 | FillFifo(fifoIn,3,TblE1); |
|
135 | FillFifo(fifoIn,3,TblE1,256); | |
136 | fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] | FIFO_ReUse); |
|
136 | fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*3)+FIFO_Ctrl] | FIFO_ReUse); | |
137 |
|
137 | |||
138 | FillFifo(fifoIn,4,TblE2); |
|
138 | FillFifo(fifoIn,4,TblE2,256); | |
139 |
|
139 | |||
140 | fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] | FIFO_ReUse); |
|
140 | fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] = (fifoIn->FIFOreg[(2*4)+FIFO_Ctrl] | FIFO_ReUse); | |
141 |
|
141 |
@@ -51,8 +51,8 | |||||
51 | */ |
|
51 | */ | |
52 | struct APB_FIFO_REG |
|
52 | struct APB_FIFO_REG | |
53 | { |
|
53 | { | |
54 | int IDreg; |
|
54 | volatile int IDreg; | |
55 | int FIFOreg[2*8]; |
|
55 | volatile int FIFOreg[2*8]; | |
56 | }; |
|
56 | }; | |
57 |
|
57 | |||
58 | typedef volatile struct APB_FIFO_REG FIFO_Device; |
|
58 | typedef volatile struct APB_FIFO_REG FIFO_Device; | |
@@ -71,6 +71,6 typedef volatile struct APB_FIFO_REG FIF | |||||
71 | \return The pointer to the device. |
|
71 | \return The pointer to the device. | |
72 | */ |
|
72 | */ | |
73 | FIFO_Device* openFIFO(int count); |
|
73 | FIFO_Device* openFIFO(int count); | |
74 | int FillFifo(FIFO_Device* dev,int ID,int Tbl[]); |
|
74 | int FillFifo(FIFO_Device* dev,int ID,int Tbl[],int count); | |
75 |
|
75 | |||
76 | #endif |
|
76 | #endif |
@@ -32,13 +32,22 FIFO_Device* openFIFO(int count) | |||||
32 | } |
|
32 | } | |
33 |
|
33 | |||
34 |
|
34 | |||
35 | int FillFifo(FIFO_Device* dev,int ID,int Tbl[]) |
|
35 | int FillFifo(FIFO_Device* dev,int ID,int Tbl[],int count) | |
36 | { |
|
36 | { | |
37 | int i=0; |
|
37 | int i=0; | |
38 | while((dev->FIFOreg[(2*ID)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full) // TANT QUE full a 0 ALORS |
|
38 | //int poub; | |
|
39 | //printf("%x\n",dev->FIFOreg[(2*0)+FIFO_Ctrl]); | |||
|
40 | while(i<count) | |||
|
41 | //while((dev->FIFOreg[(2*ID)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full)// TANT QUE full a 0 ALORS | |||
39 | { |
|
42 | { | |
|
43 | //printf("%x\n",dev->FIFOreg[(2*ID)+FIFO_Ctrl]); | |||
|
44 | //printf("%d\n",i); | |||
40 | dev->FIFOreg[(2*ID)+FIFO_RWdata] = Tbl[i]; |
|
45 | dev->FIFOreg[(2*ID)+FIFO_RWdata] = Tbl[i]; | |
41 | i++; |
|
46 | i++; | |
42 | } |
|
47 | } | |
|
48 | //poub = dev->FIFOreg[(2*ID)+FIFO_RWdata]; | |||
|
49 | //dev->FIFOreg[(2*ID)+FIFO_RWdata] = Tbl[0]; | |||
|
50 | //printf("END:%x\n",dev->FIFOreg[(2*ID)+FIFO_Ctrl]); | |||
|
51 | //while((dev->FIFOreg[(2*ID)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full); // TANT QUE full a 0 RIEN | |||
43 | return 0; |
|
52 | return 0; | |
44 | } |
|
53 | } |
@@ -51,8 +51,8 | |||||
51 | */ |
|
51 | */ | |
52 | struct APB_FIFO_REG |
|
52 | struct APB_FIFO_REG | |
53 | { |
|
53 | { | |
54 | int IDreg; |
|
54 | volatile int IDreg; | |
55 | int FIFOreg[2*8]; |
|
55 | volatile int FIFOreg[2*8]; | |
56 | }; |
|
56 | }; | |
57 |
|
57 | |||
58 | typedef volatile struct APB_FIFO_REG FIFO_Device; |
|
58 | typedef volatile struct APB_FIFO_REG FIFO_Device; | |
@@ -71,6 +71,6 typedef volatile struct APB_FIFO_REG FIF | |||||
71 | \return The pointer to the device. |
|
71 | \return The pointer to the device. | |
72 | */ |
|
72 | */ | |
73 | FIFO_Device* openFIFO(int count); |
|
73 | FIFO_Device* openFIFO(int count); | |
74 | int FillFifo(FIFO_Device* dev,int ID,int Tbl[]); |
|
74 | int FillFifo(FIFO_Device* dev,int ID,int Tbl[],int count); | |
75 |
|
75 | |||
76 | #endif |
|
76 | #endif |
@@ -170,15 +170,15 signal dsuo : dsu_out_type; | |||||
170 | --- AJOUT TEST ------------------------Signaux---------------------- |
|
170 | --- AJOUT TEST ------------------------Signaux---------------------- | |
171 | --------------------------------------------------------------------- |
|
171 | --------------------------------------------------------------------- | |
172 | -- FIFOs |
|
172 | -- FIFOs | |
173 |
signal FifoIN_Full : std_logic_vector(4 downto 0); |
|
173 | signal FifoIN_Full : std_logic_vector(4 downto 0); | |
174 |
signal FifoIN_Empty : std_logic_vector(4 downto 0); |
|
174 | signal FifoIN_Empty : std_logic_vector(4 downto 0); | |
175 |
signal FifoIN_Data : std_logic_vector(79 downto 0); |
|
175 | signal FifoIN_Data : std_logic_vector(79 downto 0); | |
176 |
|
176 | |||
177 | signal FifoINT_Full : std_logic_vector(4 downto 0); |
|
177 | signal FifoINT_Full : std_logic_vector(4 downto 0); | |
178 | signal FifoINT_Data : std_logic_vector(79 downto 0); |
|
178 | signal FifoINT_Data : std_logic_vector(79 downto 0); | |
179 |
|
179 | |||
180 | signal FifoOUT_FullV : std_logic; |
|
180 | signal FifoOUT_FullV : std_logic; | |
181 |
signal FifoOUT_Full : std_logic_vector( |
|
181 | signal FifoOUT_Full : std_logic_vector(1 downto 0); | |
182 | signal Matrix_WriteV : std_logic_vector(0 downto 0); |
|
182 | signal Matrix_WriteV : std_logic_vector(0 downto 0); | |
183 |
|
183 | |||
184 | -- MATRICE SPECTRALE |
|
184 | -- MATRICE SPECTRALE | |
@@ -194,13 +194,13 signal TopSM_Data2 : std_logic_vect | |||||
194 |
|
194 | |||
195 | signal Disp_FlagError : std_logic; |
|
195 | signal Disp_FlagError : std_logic; | |
196 | signal Disp_Pong : std_logic; |
|
196 | signal Disp_Pong : std_logic; | |
197 | signal Disp_Write : std_logic_vector(1 downto 0); |
|
197 | signal Disp_Write : std_logic_vector(1 downto 0);-- | |
198 | signal Disp_Data : std_logic_vector(63 downto 0); |
|
198 | signal Disp_Data : std_logic_vector(63 downto 0);-- | |
199 | signal Dma_acq : std_logic; |
|
199 | signal Dma_acq : std_logic; | |
200 |
|
200 | |||
201 | -- FFT |
|
201 | -- FFT | |
202 | signal Drive_Write : std_logic; |
|
202 | signal Drive_Write : std_logic; | |
203 |
signal Drive_Read : std_logic_vector(4 downto 0); |
|
203 | signal Drive_Read : std_logic_vector(4 downto 0); | |
204 | signal Drive_DataRE : std_logic_vector(15 downto 0); |
|
204 | signal Drive_DataRE : std_logic_vector(15 downto 0); | |
205 | signal Drive_DataIM : std_logic_vector(15 downto 0); |
|
205 | signal Drive_DataIM : std_logic_vector(15 downto 0); | |
206 |
|
206 | |||
@@ -213,9 +213,9 signal FFT_DataRE : std_logic_vect | |||||
213 | signal FFT_DataIM : std_logic_vector(15 downto 0); |
|
213 | signal FFT_DataIM : std_logic_vector(15 downto 0); | |
214 |
|
214 | |||
215 | signal Link_Read : std_logic; |
|
215 | signal Link_Read : std_logic; | |
216 |
signal Link_Write : std_logic_vector(4 downto 0); |
|
216 | signal Link_Write : std_logic_vector(4 downto 0); | |
217 |
signal Link_ReUse : std_logic_vector(4 downto 0); |
|
217 | signal Link_ReUse : std_logic_vector(4 downto 0); | |
218 |
signal Link_Data : std_logic_vector(79 downto 0); |
|
218 | signal Link_Data : std_logic_vector(79 downto 0); | |
219 |
|
219 | |||
220 | -- ADC |
|
220 | -- ADC | |
221 | signal SmplClk : std_logic; |
|
221 | signal SmplClk : std_logic; | |
@@ -236,8 +236,8 signal TXDint : std_logic; | |||||
236 | -- IIR Filter |
|
236 | -- IIR Filter | |
237 | signal sample_clk_out : std_logic; |
|
237 | signal sample_clk_out : std_logic; | |
238 |
|
238 | |||
239 |
signal Rd : std_logic_vector(0 downto 0); |
|
239 | signal Rd : std_logic_vector(0 downto 0); | |
240 |
signal Ept : std_logic_vector(4 downto 0); |
|
240 | signal Ept : std_logic_vector(4 downto 0); | |
241 |
|
241 | |||
242 | signal Bwr : std_logic_vector(0 downto 0); |
|
242 | signal Bwr : std_logic_vector(0 downto 0); | |
243 | signal Bre : std_logic_vector(0 downto 0); |
|
243 | signal Bre : std_logic_vector(0 downto 0); | |
@@ -285,8 +285,8 led(1 downto 0) <= gpio(1 downto 0); | |||||
285 | --TEST(3) <= s_out(s_out'length-1); |
|
285 | --TEST(3) <= s_out(s_out'length-1); | |
286 |
|
286 | |||
287 |
|
287 | |||
288 | SPW1_EN <= '1'; |
|
288 | --SPW1_EN <= '1'; | |
289 | SPW2_EN <= '0'; |
|
289 | --SPW2_EN <= '0'; | |
290 |
|
290 | |||
291 | --- CAN ------------------------------------------------------------- |
|
291 | --- CAN ------------------------------------------------------------- | |
292 |
|
292 | |||
@@ -315,20 +315,13 SPW2_EN <= '0'; | |||||
315 | MemIn : APB_FIFO |
|
315 | MemIn : APB_FIFO | |
316 | generic map (pindex => 8, paddr => 8, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 0, W => 1) |
|
316 | generic map (pindex => 8, paddr => 8, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 0, W => 1) | |
317 | port map (clkm,rstn,clkm,clkm,(others => '0'),Drive_Read,(others => '1'),FifoIN_Empty,FifoIN_Full,FifoIN_Data,(others => '0'),open,open,apbi,apbo(8)); |
|
317 | port map (clkm,rstn,clkm,clkm,(others => '0'),Drive_Read,(others => '1'),FifoIN_Empty,FifoIN_Full,FifoIN_Data,(others => '0'),open,open,apbi,apbo(8)); | |
318 | -- MemIn : APB_FIFO |
|
|||
319 | -- generic map (pindex => 8, paddr => 8, FifoCnt => 1, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 0, W => 1) |
|
|||
320 | -- port map (clkm,rstn,clkm,clkm,(others => '0'),Drive_Read,(others =>'1'),FifoIN_Empty,FifoIN_Full,FifoIN_Data,(others => '0'),open,open,apbi,apbo(8)); |
|
|||
321 | -- |
|
|||
322 |
|
318 | |||
323 | Start <= '0'; |
|
|||
324 |
|
||||
325 | -- DRIVE : FFTamont |
|
|||
326 | -- generic map(Data_sz => 16,NbData => 256) |
|
|||
327 | -- port map(clkm,rstn,FFT_Load,FifoIN_Empty(0),FifoIN_Data,Drive_Write,Drive_Read(0),Drive_DataRE,Drive_DataIM); |
|
|||
328 | DRIVE : Driver_FFT |
|
319 | DRIVE : Driver_FFT | |
329 | generic map(Data_sz => 16) |
|
320 | generic map(Data_sz => 16) | |
330 | port map(clkm,rstn,FFT_Load,FifoIN_Empty,FifoIN_Data,Drive_Write,Drive_Read,Drive_DataRE,Drive_DataIM); |
|
321 | port map(clkm,rstn,FFT_Load,FifoIN_Empty,FifoIN_Data,Drive_Write,Drive_Read,Drive_DataRE,Drive_DataIM); | |
331 | -- |
|
322 | ||
|
323 | Start <= '0'; | |||
|
324 | ||||
332 |
|
|
325 | FFT : CoreFFT | |
333 | generic map( |
|
326 | generic map( | |
334 | LOGPTS => gLOGPTS, |
|
327 | LOGPTS => gLOGPTS, | |
@@ -343,43 +336,50 Start <= '0'; | |||||
343 | HALFPTS => gHALFPTS, |
|
336 | HALFPTS => gHALFPTS, | |
344 | inBuf_RWDLY => gInBuf_RWDLY) |
|
337 | inBuf_RWDLY => gInBuf_RWDLY) | |
345 | port map(clkm,start,rstn,Drive_Write,Link_Read,Drive_DataIM,Drive_DataRE,FFT_Load,open,FFT_DataIM,FFT_DataRE,FFT_Valid,FFT_Ready); |
|
338 | port map(clkm,start,rstn,Drive_Write,Link_Read,Drive_DataIM,Drive_DataRE,FFT_Load,open,FFT_DataIM,FFT_DataRE,FFT_Valid,FFT_Ready); | |
346 | -- |
|
339 | ||
347 |
|
|
340 | LINK : Linker_FFT | |
348 | generic map(Data_sz => 16) |
|
341 | generic map(Data_sz => 16) | |
349 |
port map(clkm,rstn,FFT_Ready,FFT_Valid,Fifo |
|
342 | port map(clkm,rstn,FFT_Ready,FFT_Valid,FifoINT_Full,FFT_DataRE,FFT_DataIM,Link_Read,Link_Write,Link_ReUse,Link_Data); | |
350 | -- LINK : FFTaval |
|
343 | ||
351 | -- generic map(Data_sz => 16,NbData => 256) |
|
344 | ----- LINK MEMORY ------------------------------------------------------- | |
352 | -- port map(clkm,rstn,FFT_Ready,FFT_Valid,FifoOUT_Full(0),FFT_DataRE,FFT_DataIM,Link_Read,Link_Write(0),Link_ReUse(0),Link_Data); |
|
345 | ||
353 | -- |
|
346 | -- MemOut : APB_FIFO | |
|
347 | -- generic map (pindex => 9, paddr => 9, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 1, W => 0) | |||
|
348 | -- port map (clkm,rstn,clkm,clkm,Link_ReUse,(others =>'1'),Link_Write,Ept,FifoOUT_Full,open,Link_Data,open,open,apbi,apbo(9)); | |||
|
349 | ||||
|
350 | MemInt : lppFIFOxN | |||
|
351 | generic map(Data_sz => 16, FifoCnt => 5, Enable_ReUse => '1') | |||
|
352 | port map(rstn,clkm,clkm,Link_ReUse,Link_Write,TopSM_Read,Link_Data,FifoINT_Data,FifoINT_Full,open); | |||
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353 | ||||
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354 | -- MemIn : APB_FIFO | |||
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355 | -- generic map (pindex => 8, paddr => 8, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 0, W => 1) | |||
|
356 | -- port map (clkm,rstn,clkm,clkm,(others => '0'),TopSM_Read,(others => '1'),open,FifoINT_Full,FifoINT_Data,(others => '0'),open,open,apbi,apbo(8)); | |||
|
357 | ||||
354 | ----- MATRICE SPECTRALE ---------------------5 FIFO Input--------------- |
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358 | ----- MATRICE SPECTRALE ---------------------5 FIFO Input--------------- | |
355 | -- |
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356 | MemOut : APB_FIFO |
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357 | generic map (pindex => 9, paddr => 9, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 1, W => 0) |
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358 | port map (clkm,rstn,clkm,clkm,Link_ReUse,(others =>'1'),Link_Write,Ept,FifoOUT_Full,open,Link_Data,open,open,apbi,apbo(9)); |
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359 |
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360 |
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361 | --TEST(0) <= FifoOUT_Full(0); |
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362 | --TEST(1) <= Link_Write(0); |
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363 |
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359 | |||
364 | -- MemInt : lppFIFOx5 |
|
360 | TopSM : TopSpecMatrix | |
365 |
|
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361 | generic map (Input_SZ => 16) | |
366 | -- port map(rstn,clkm,clkm,Link_ReUse,Link_Write,TopSM_Read,Link_Data,FifoINT_Data,FifoINT_Full,open); |
|
362 | port map(clkm,rstn,Matrix_Write,Matrix_Read,FifoINT_Full,FifoINT_Data,TopSM_Start,TopSM_Read,TopSM_Statu,TopSM_Data1,TopSM_Data2); | |
367 | -- |
|
363 | ||
368 | --Matrix_WriteV(0) <= not Matrix_Write; |
|
364 | SM : SpectralMatrix | |
369 | --FifoOUT_FullV <= FifoOUT_Full(0); |
|
365 | generic map (Input_SZ => 16, Result_SZ => 32) | |
370 | -- |
|
366 | port map(clkm,rstn,TopSM_Start,TopSM_Data1,TopSM_Data2,TopSM_Statu,Matrix_Read,Matrix_Write,Matrix_Result); | |
371 | ---- MemInt : lppFIFOxN |
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372 | ---- generic map(Data_sz => 16, FifoCnt => 5, Enable_ReUse => '1') |
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373 | ---- port map(rstn,clkm,clkm,Link_ReUse,Link_Write,TopSM_Read,Link_Data,FifoINT_Data,FifoINT_Full,open); |
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374 | -- |
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375 | -- TopSM : TopMatrix_PDR |
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376 | -- generic map (Input_SZ => 16) |
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377 | -- port map (clkm,rstn,FifoINT_Data,FifoINT_Full,Matrix_Read,Matrix_Write,TopSM_Data1,TopSM_Data2,TopSM_Start,TopSM_Read,TopSM_Statu); |
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378 | -- |
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379 | -- SM : SpectralMatrix |
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380 | -- generic map (Input_SZ => 16, Result_SZ => 32) |
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381 | -- port map(clkm,rstn,TopSM_Start,TopSM_Data1,TopSM_Data2,TopSM_Statu,Matrix_Read,Matrix_Write,Matrix_Result); |
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382 |
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367 | |||
|
368 | Dma_acq <= '1'; | |||
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369 | ||||
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370 | DISP : Dispatch | |||
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371 | generic map(Data_SZ => 32) | |||
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372 | port map(clkm,rstn,Dma_acq,Matrix_Result,Matrix_Write,FifoOUT_Full,Disp_Data,Disp_Write,Disp_Pong,Disp_FlagError); | |||
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373 | ||||
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374 | MemOut : APB_FIFO | |||
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375 | generic map (pindex => 9, paddr => 9, FifoCnt => 2, Data_sz => 32, Addr_sz => 8, Enable_ReUse => '0', R => 1, W => 0) | |||
|
376 | port map (clkm,rstn,clkm,clkm,(others => '0'),(others => '1'),Disp_Write,open,FifoOUT_Full,open,Disp_Data,open,open,apbi,apbo(9)); | |||
|
377 | ||||
|
378 | ----- FIFO ------------------------------------------------------------- | |||
|
379 | ||||
|
380 | Memtest : APB_FIFO | |||
|
381 | generic map (pindex => 5, paddr => 5, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 1, W => 1) | |||
|
382 | port map (clkm,rstn,clkm,clkm,(others => '0'),(others => '1'),(others => '1'),open,open,open,(others => '0'),open,open,apbi,apbo(5)); | |||
383 |
|
383 | |||
384 | --***************************************TEST DEMI-FIFO******************************************************************************** |
|
384 | --***************************************TEST DEMI-FIFO******************************************************************************** | |
385 | -- MemIn : APB_FIFO |
|
385 | -- MemIn : APB_FIFO | |
@@ -394,32 +394,6 Start <= '0'; | |||||
394 | -- port map (clkm,rstn,clkm,clkm,(others => '0'),(others => '1'),Bwr,EmptyDown,FullDown,open,DataTMP,open,open,apbi,apbo(9)); |
|
394 | -- port map (clkm,rstn,clkm,clkm,(others => '0'),(others => '1'),Bwr,EmptyDown,FullDown,open,DataTMP,open,open,apbi,apbo(9)); | |
395 | --************************************************************************************************************************************* |
|
395 | --************************************************************************************************************************************* | |
396 |
|
396 | |||
397 |
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398 |
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399 |
|
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400 |
|
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401 |
|
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402 |
|
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403 |
|
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404 |
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405 |
|
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406 |
|
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407 | --Dma_acq <= '1'; |
|
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408 | -- |
|
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409 | -- DISP : Dispatch |
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410 | -- generic map(Data_SZ => 32) |
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411 | -- port map(clkm,reset,Dma_acq,Matrix_Result,Matrix_Write,FifoOUT_Full,Disp_Data,Disp_Write,Disp_Pong,Disp_FlagError); |
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412 | -- |
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413 | ----- FIFO ------------------------------------------------------------- |
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414 | -- |
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415 | -- MemOut : APB_FIFO |
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416 | -- generic map (pindex => 15, paddr => 15, FifoCnt => 2, Data_sz => 32, Addr_sz => 8, Enable_ReUse => '0', R => 1, W => 0) |
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417 | -- port map (clkm,rstn,clkm,clkm,(others => '0'),(others => '1'),Disp_Write,open,FifoOUT_Full,open,Disp_Data,open,open,apbi,apbo(15)); |
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418 | -- |
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419 | Memtest : APB_FIFO |
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420 | generic map (pindex => 5, paddr => 5, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 1, W => 1) |
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421 | port map (clkm,rstn,clkm,clkm,(others => '0'),(others => '1'),(others => '1'),open,open,open,(others => '0'),open,open,apbi,apbo(5)); |
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422 |
|
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423 | --- UART ------------------------------------------------------------- |
|
397 | --- UART ------------------------------------------------------------- | |
424 |
|
398 | |||
425 | COM0 : APB_UART |
|
399 | COM0 : APB_UART |
@@ -22,7 +22,6 | |||||
22 | library IEEE; |
|
22 | library IEEE; | |
23 | use IEEE.numeric_std.all; |
|
23 | use IEEE.numeric_std.all; | |
24 | use IEEE.std_logic_1164.all; |
|
24 | use IEEE.std_logic_1164.all; | |
25 | use lpp.lpp_matrix.all; |
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26 |
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25 | |||
27 | entity Dispatch is |
|
26 | entity Dispatch is | |
28 | generic( |
|
27 | generic( | |
@@ -34,65 +33,52 port( | |||||
34 | Data : in std_logic_vector(Data_SZ-1 downto 0); |
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33 | Data : in std_logic_vector(Data_SZ-1 downto 0); | |
35 | Write : in std_logic; |
|
34 | Write : in std_logic; | |
36 | Full : in std_logic_vector(1 downto 0); |
|
35 | Full : in std_logic_vector(1 downto 0); | |
37 | -- Empty : in std_logic_vector(1 downto 0); |
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38 | FifoData : out std_logic_vector(2*Data_SZ-1 downto 0); |
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36 | FifoData : out std_logic_vector(2*Data_SZ-1 downto 0); | |
39 | FifoWrite : out std_logic_vector(1 downto 0); |
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37 | FifoWrite : out std_logic_vector(1 downto 0); | |
40 | -- FifoFull : out std_logic; |
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41 | Pong : out std_logic; |
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38 | Pong : out std_logic; | |
42 | Error : out std_logic |
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39 | Error : out std_logic | |
43 |
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||||
44 | ); |
|
40 | ); | |
45 | end entity; |
|
41 | end entity; | |
46 |
|
42 | |||
47 |
|
43 | |||
48 | architecture ar_Dispatch of Dispatch is |
|
44 | architecture ar_Dispatch of Dispatch is | |
49 |
|
45 | |||
50 |
type etat is (e0,e1,e2 |
|
46 | type etat is (eX,e0,e1,e2); | |
51 | signal ect : etat; |
|
47 | signal ect : etat; | |
52 |
|
48 | |||
|
49 | signal Pong_int : std_logic; | |||
|
50 | signal FifoCpt : integer range 0 to 1 := 0; | |||
|
51 | ||||
53 | begin |
|
52 | begin | |
54 |
|
53 | |||
55 | process (clk,reset) |
|
54 | process (clk,reset) | |
56 | begin |
|
55 | begin | |
57 | if(reset='0')then |
|
56 | if(reset='0')then | |
58 | Pong <= '0'; |
|
57 | Pong_int <= '0'; | |
59 |
Error <= '0'; |
|
58 | Error <= '0'; | |
|
59 | ect <= e0; | |||
60 |
|
60 | |||
61 | elsif(clk' event and clk='1')then |
|
61 | elsif(clk' event and clk='1')then | |
62 |
|
62 | |||
63 | case ect is |
|
63 | case ect is | |
64 |
|
64 | |||
65 | when e0 => |
|
65 | when e0 => | |
66 |
if(Full( |
|
66 | if(Full(FifoCpt) = '1')then | |
67 | pong <= '1'; |
|
67 | Pong_int <= not Pong_int; | |
68 | ect <= e1; |
|
68 | ect <= e1; | |
69 | end if; |
|
69 | end if; | |
70 |
|
70 | |||
71 | when e1 => |
|
71 | when e1 => | |
72 |
if(Acq |
|
72 | if(Acq = '0')then | |
73 | Error <= '0'; |
|
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74 | pong <= '0'; |
|
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75 | ect <= e2; |
|
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76 | else |
|
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77 | Error <= '1'; |
|
73 | Error <= '1'; | |
78 | ect <= e1; |
|
74 | ect <= e1; | |
79 |
e |
|
75 | else | |
80 |
|
||||
81 | when e2 => |
|
|||
82 | if(Full(1) = '1')then |
|
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83 | pong <= '1'; |
|
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84 | ect <= e3; |
|
|||
85 | end if; |
|
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86 |
|
||||
87 | when e3 => |
|
|||
88 | if(Acq <= '1')then |
|
|||
89 | Error <= '0'; |
|
76 | Error <= '0'; | |
90 | pong <= '0'; |
|
|||
91 | ect <= e0; |
|
77 | ect <= e0; | |
92 |
e |
|
78 | end if; | |
93 |
|
|
79 | ||
94 | ect <= e3; |
|
80 | when others => | |
95 |
|
|
81 | null; | |
96 |
|
|
82 | ||
97 |
|
|
83 | end case; | |
98 |
|
84 | |||
@@ -100,10 +86,10 begin | |||||
100 | end process; |
|
86 | end process; | |
101 |
|
87 | |||
102 | FifoData <= Data & Data; |
|
88 | FifoData <= Data & Data; | |
|
89 | Pong <= Pong_int; | |||
103 |
|
90 | |||
104 | with ect select |
|
91 | FifoCpt <= 0 when Pong_int='0' else 1; | |
105 | FifoWrite <= '1' & not Write when e0, |
|
92 | ||
106 | not Write & '1' when e2, |
|
93 | FifoWrite <= '1' & not Write when Pong_int='0' else not Write & '1'; | |
107 | "11" when others; |
|
|||
108 |
|
94 | |||
109 | end architecture; No newline at end of file |
|
95 | end architecture; |
@@ -56,6 +56,25 component APB_Matrix is | |||||
56 | ); |
|
56 | ); | |
57 | end component; |
|
57 | end component; | |
58 |
|
58 | |||
|
59 | component TopSpecMatrix is | |||
|
60 | generic( | |||
|
61 | Input_SZ : integer := 16); | |||
|
62 | port( | |||
|
63 | clk : in std_logic; | |||
|
64 | rstn : in std_logic; | |||
|
65 | Write : in std_logic; | |||
|
66 | ReadIn : in std_logic_vector(1 downto 0); | |||
|
67 | Full : in std_logic_vector(4 downto 0); | |||
|
68 | Data : in std_logic_vector((5*Input_SZ)-1 downto 0); | |||
|
69 | Start : out std_logic; | |||
|
70 | ReadOut : out std_logic_vector(4 downto 0); | |||
|
71 | Statu : out std_logic_vector(3 downto 0); | |||
|
72 | DATA1 : out std_logic_vector(Input_SZ-1 downto 0); | |||
|
73 | DATA2 : out std_logic_vector(Input_SZ-1 downto 0) | |||
|
74 | ); | |||
|
75 | end component; | |||
|
76 | ||||
|
77 | ||||
59 | component Top_MatrixSpec is |
|
78 | component Top_MatrixSpec is | |
60 | generic( |
|
79 | generic( | |
61 | Input_SZ : integer := 16; |
|
80 | Input_SZ : integer := 16; |
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