HG_REPOSITORIES/LPP/INSTRUMENTATION/VHD_Lib Files · designs/ProjetBlanc-LeonLPP-M7A3P1k/Makefile

Fusion

Alexis Jeandet - - Load All Authors

File last commit:

r245:0fbfdf431a95 alexis


                r636:a3dd504c9783

simu_with_Leon3

Download file

             Makefile
        
                    35 lines
            
             | 1.1 KiB
            
                | text/x-makefile
            
             |
                MakefileLexer
            
             / designs / ProjetBlanc-LeonLPP-M7A3P1k / Makefile
          
                    History
                
                 |
                  Source
                 | Raw
                 |Copy content
                 |Copy permalink

        jeandet
    
Added ICI4 designs....

              r129
            
      #GRLIB=../..

        Alexis Jeandet
    
MINI-LFR board added

              r245
            
      VHDLIB=../..

      SCRIPTSDIR=$(VHDLIB)/scripts/

      GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)

        martin
    
Mise a jour Projets blanc

              r100
            
      TOP=top

      BOARD=LeonLPP-M7A3P1k

      include $(GRLIB)/boards/$(BOARD)/Makefile.inc

      DEVICE=$(PART)-$(PACKAGE)$(SPEED)

      UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf

      QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf

      EFFORT=high

      XSTOPT=

      SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"

      VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd

      VHDLSIMFILES=testbench.vhd

      SIMTOP=testbench

      SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc

      SDC=$(GRLIB)/boards/$(BOARD)/leon3mp.sdc

      PDC=$(GRLIB)/boards/$(BOARD)/Projet-Blanc-M7A3P1k.pdc

      BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut

      CLEAN=soft-clean

      TECHLIBS = proasic3

      LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \

      	tmtc openchip hynix ihp gleichmann micron usbhc

      DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \

      	pci grusbhc haps  slink ascs pwm spi ac97

      FILESKIP = i2cmst.vhd

      include $(GRLIB)/bin/Makefile

      include $(GRLIB)/software/leon3/Makefile

      ##################  project specific targets ##########################

	Site-wide shortcuts
/	Use quick search box
g h	Goto home page
g g	Goto my private gists page
g G	Goto my public gists page
g 0-9	Goto bookmarked items from 0-9
n r	New repository page
n g	New gist page

	Repositories
g s	Goto summary page
g c	Goto changelog page
g f	Goto files page
g F	Goto files page with file search activated
g p	Goto pull requests page
g o	Goto repository settings
g O	Goto repository access permissions settings
t s	Toggle sidebar on some pages

jeandet Added ICI4 designs....	r129	#GRLIB=../..
Alexis Jeandet MINI-LFR board added	r245	VHDLIB=../..
		SCRIPTSDIR=$(VHDLIB)/scripts/
		GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
martin Mise a jour Projets blanc	r100	TOP=top
		BOARD=LeonLPP-M7A3P1k
		include $(GRLIB)/boards/$(BOARD)/Makefile.inc
		DEVICE=$(PART)-$(PACKAGE)$(SPEED)
		UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
		QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
		EFFORT=high
		XSTOPT=
		SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
		VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd
		VHDLSIMFILES=testbench.vhd
		SIMTOP=testbench
		SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc
		SDC=$(GRLIB)/boards/$(BOARD)/leon3mp.sdc
		PDC=$(GRLIB)/boards/$(BOARD)/Projet-Blanc-M7A3P1k.pdc
		BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
		CLEAN=soft-clean

		TECHLIBS = proasic3
		LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
		tmtc openchip hynix ihp gleichmann micron usbhc
		DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
		pci grusbhc haps slink ascs pwm spi ac97

		FILESKIP = i2cmst.vhd

		include $(GRLIB)/bin/Makefile
		include $(GRLIB)/software/leon3/Makefile

		################## project specific targets ##########################