HG_REPOSITORIES/LPP/INSTRUMENTATION/VHD_Lib Files · designs/ProjetBlanc-LeonLPP-A3PE3kL/simulation/modelsim.ini.sav

MINI-LFR board added

Alexis Jeandet - - Load All Authors

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/ designs / ProjetBlanc-LeonLPP-A3PE3kL / simulation / modelsim.ini.sav

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martin Mise a jour Projets blanc	r100	[Library]
		others = $MODEL_TECH/../modelsim.ini

Alexis Jeandet Sync	r181	proasic3l = C:/Actel/Libero_v9.1/Designer/lib/modelsim/precompiled/vhdl/proasic3l
martin Mise a jour Projets blanc	r100
Alexis Jeandet Sync	r181	syncad_vhdl_lib = C:\Actel\Libero_v9.1\Designer/lib/actel/syncad_vhdl_lib
martin Mise a jour Projets blanc	r100
		[vcom]
		VHDL93 = 1

		[vsim]
		IterationLimit = 5000

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