/*------------------------------------------------------------------------------
--  This file is a part of the VHDL Tools Software
--  Copyright (C) 2014, Plasma Physics Laboratory - CNRS
--
--  This program is free software; you can redistribute it and/or modify
--  it under the terms of the GNU General Public License as published by
--  the Free Software Foundation; either version 2 of the License, or
--  (at your option) any later version.
--
--  This program is distributed in the hope that it will be useful,
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--  GNU General Public License for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with this program; if not, write to the Free Software
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-------------------------------------------------------------------------------*/
/*--                  Author : Alexis Jeandet
--                     Mail : alexis.jeandet@member.fsf.org
----------------------------------------------------------------------------*/
#ifndef VHDL_AST_NODE_H
#define VHDL_AST_NODE_H
#include <QString>
#include <QList>

namespace VHDL_Tools{

#define closedByEnd 0x100
#define closedBySemicolon 0x200
#define closedByRightParen 0x300

#define IS_CLOSED_BY_END(type) (((type)&0xF00)==closedByEnd)
#define IS_CLOSED_BY_SEMICOLON(type) (((type)&0xF00)==closedBySemicolon)
#define IS_CLOSED_BY_RIGHTPAREN(type) (((type)&0xF00)==closedByRightParen)

#define IS_CLOSED_BY(openType,type) ((type)==ExpectedCloseTypeLookUp[((openType)&0xF00)>>8])

enum VHDL_AST_Node_type {
    none=0,
    separator=1,
    keyword=2,
    leftParen=3|closedByRightParen,
    rightParen=4,
    block=5|closedByEnd,
    units=6|closedByEnd,
    entity=7|closedByEnd,
    clause=8|closedBySemicolon,
    semicolon=9,
    colon=10,
    generic=11,
    port=12,
    map=13,
    endKw=14,
    virtualGroup=15,
    identifier=16,
    literal=17,
    rootNode=18,
    comment=19
};

const VHDL_AST_Node_type ExpectedCloseTypeLookUp[]={none,endKw,semicolon,rightParen,none,none,none,none,none,none,none,none,none,none,none,none};

class VHDL_AST_Node
{
public:
    VHDL_AST_Node(const QString& value,VHDL_Tools::VHDL_AST_Node_type type,int line=0, int column=0);
    QString a_value;
    VHDL_Tools::VHDL_AST_Node_type type;
    int line;
    int column;
    VHDL_Tools::VHDL_AST_Node* parent;
    QList<VHDL_Tools::VHDL_AST_Node*> childs;
    void move(VHDL_Tools::VHDL_AST_Node* parentNode);
};
}

#endif // VHDL_AST_NODE_H