/*------------------------------------------------------------------------------
--  This file is a part of the VHDL Tools Software
--  Copyright (C) 2014, Plasma Physics Laboratory - CNRS
--
--  This program is free software; you can redistribute it and/or modify
--  it under the terms of the GNU General Public License as published by
--  the Free Software Foundation; either version 2 of the License, or
--  (at your option) any later version.
--
--  This program is distributed in the hope that it will be useful,
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--  GNU General Public License for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with this program; if not, write to the Free Software
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-------------------------------------------------------------------------------*/
/*--                  Author : Alexis Jeandet
--                     Mail : alexis.jeandet@member.fsf.org
----------------------------------------------------------------------------*/
#ifndef vhdl_SCANNER_H
#define vhdl_SCANNER_H
#if ! defined(yyFlexLexerOnce)
#include <FlexLexer.h>
#endif
#include <iostream>
#include <cstdlib>
#include <fstream>
#include <QString>
#include <QList>

#undef  YY_DECL
#define YY_DECL int  VHDL_Tools::vhdl_Scanner::yylex()

namespace VHDL_Tools{

enum VHDL_AST_Node_type {separator,keyword,identifier,literal,rootNode,comment};
class VHDL_AST_Node
{
public:
    VHDL_AST_Node(const QString& value,VHDL_Tools::VHDL_AST_Node_type type):value(value),type(type) {}
    QString value;
    VHDL_Tools::VHDL_AST_Node_type type;
    VHDL_Tools::VHDL_AST_Node* parent;
    QList<VHDL_Tools::VHDL_AST_Node*> childs;
};

class vhdl_Scanner : public yyFlexLexer
{
public:
    vhdl_Scanner(std::istream *in);
    int scan();

private:
   /* hide this one from public view */
   int yylex();
   void stackData(QString data);
   void appendNode(VHDL_Tools::VHDL_AST_Node* node);
   VHDL_Tools::VHDL_AST_Node* rootNode;
};
}

#endif // vhdl_SCANNER_H