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1 #-------------------------------------------------
2 #
3 # Project created by QtCreator 2014-08-23T00:04:05
4 #
5 #-------------------------------------------------
6
7 QT += core gui
8 greaterThan(QT_MAJOR_VERSION, 4): QT += widgets
9
10 TARGET = VHDL_TreeWidget
11
12 DESTDIR = ../../bin
13
14 TEMPLATE = app
15
16 INCLUDEPATH += \
17 $$DESTDIR/../vhdlparser \
18 ../../vhdlparser
19
20
21 LIBS += -lfl -L${DESTDIR} -lvhdlparser
22
23 SOURCES += main.cpp\
24 mainwindow.cpp
25
26 HEADERS += mainwindow.h
27
28 FORMS += mainwindow.ui
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1 #include "mainwindow.h"
2 #include <QApplication>
3
4 int main(int argc, char *argv[])
5 {
6 QApplication a(argc, argv);
7 MainWindow w;
8 w.show();
9
10 return a.exec();
11 }
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1 #include "mainwindow.h"
2 #include "ui_mainwindow.h"
3 #include <QFileDialog>
4 #include <QTreeWidget>
5 #include <QTreeWidgetItem>
6
7 MainWindow::MainWindow(QWidget *parent) :
8 QMainWindow(parent),
9 ui(new Ui::MainWindow)
10 {
11 ui->setupUi(this);
12 connect(this->ui->actionOpen,SIGNAL(triggered()),this,SLOT(openFile()));
13 connect(this->ui->actionScan_Folder,SIGNAL(triggered()),this,SLOT(openFolder()));
14 this->file = new VHDL_Tools::VHDL_File;
15 this->rootNode = NULL;
16 }
17
18 MainWindow::~MainWindow()
19 {
20 delete ui;
21 }
22
23 void MainWindow::openFile()
24 {
25 QString fileName = QFileDialog::getOpenFileName(this,
26 tr("Open VHDL file"), NULL, tr("VHDL Files (*.vhd)"));
27 if(fileName!="")
28 {
29 parseFile(fileName,true);
30 this->rootNode=file->getParseTree();
31 updateTree(rootNode);
32 }
33 }
34
35 void MainWindow::openFolder()
36 {
37 QString dir = QFileDialog::getExistingDirectory(this, tr("Open Directory"),
38 NULL,
39 QFileDialog::ShowDirsOnly
40 | QFileDialog::DontResolveSymlinks);
41 if(dir!="")
42 {
43 this->rootNode=new VHDL_Tools::VHDL_AST_Node(dir,VHDL_Tools::virtualGroup);
44 parseDirectory(dir);
45 updateTree(this->rootNode);
46 }
47 }
48
49
50 void MainWindow::updateTree(VHDL_Tools::VHDL_AST_Node *rootNode)
51 {
52 this->ui->VHDLtreeWidget->clear();
53 if(rootNode)
54 {
55 QTreeWidgetItem* item = new QTreeWidgetItem(QStringList()<<rootNode->a_value);
56 for(int i=0;i<rootNode->childs.count();i++)
57 {
58 printNode(rootNode->childs.at(i),item);
59 }
60 this->ui->VHDLtreeWidget->addTopLevelItem(item);
61 }
62 }
63
64 void MainWindow::printNode(VHDL_Tools::VHDL_AST_Node *rootNode, QTreeWidgetItem *parent)
65 {
66 if(rootNode)
67 {
68 QTreeWidgetItem* item = new QTreeWidgetItem(parent,QStringList()<<rootNode->a_value);
69 for(int i=0;i<rootNode->childs.count();i++)
70 {
71 printNode(rootNode->childs.at(i),item);
72 }
73 }
74 }
75
76 void MainWindow::parseFile(const QString &fileName, bool trashPreviousTree)
77 {
78 if(fileName!="")
79 this->file->parseFile(fileName,trashPreviousTree);
80 }
81
82 void MainWindow::parseDirectory(const QString &dirName)
83 {
84 QDir dir(dirName);
85 dir.setFilter(QDir::Files | QDir::Hidden | QDir::NoSymLinks);
86 QFileInfoList list = dir.entryInfoList();
87 for (int i = 0; i < list.size(); ++i)
88 {
89 if(list.at(i).isDir())
90 {
91 parseDirectory(list.at(i).fileName());
92 }
93 else
94 {
95 if(list.at(i).isFile() && (!list.at(i).completeSuffix().compare("vhd")))
96 {
97 parseFile(list.at(i).absoluteFilePath(),false);
98 VHDL_Tools::VHDL_AST_Node* parseTree = file->getParseTree();
99 this->rootNode->childs.append(parseTree);
100 parseTree->parent = this->rootNode;
101 }
102 }
103 }
104 }
105
106
107
108
109
110
111
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1 #ifndef MAINWINDOW_H
2 #define MAINWINDOW_H
3
4 #include <QMainWindow>
5 #include <vhdl_file.h>
6 #include <QTreeWidgetItem>
7
8 namespace Ui {
9 class MainWindow;
10 }
11
12 class MainWindow : public QMainWindow
13 {
14 Q_OBJECT
15
16 public:
17 explicit MainWindow(QWidget *parent = 0);
18 ~MainWindow();
19
20 private slots:
21 void openFile();
22 void openFolder();
23 private:
24 void updateTree(VHDL_Tools::VHDL_AST_Node* rootNode);
25 void printNode(VHDL_Tools::VHDL_AST_Node* rootNode,QTreeWidgetItem* parent);
26 void parseFile(const QString& fileName, bool trashPreviousTree=false);
27 void parseDirectory(const QString& dirName);
28 VHDL_Tools::VHDL_AST_Node* rootNode;
29 Ui::MainWindow *ui;
30 VHDL_Tools::VHDL_File* file;
31 };
32
33 #endif // MAINWINDOW_H
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1 <?xml version="1.0" encoding="UTF-8"?>
2 <ui version="4.0">
3 <class>MainWindow</class>
4 <widget class="QMainWindow" name="MainWindow">
5 <property name="geometry">
6 <rect>
7 <x>0</x>
8 <y>0</y>
9 <width>400</width>
10 <height>300</height>
11 </rect>
12 </property>
13 <property name="windowTitle">
14 <string>MainWindow</string>
15 </property>
16 <widget class="QWidget" name="centralWidget">
17 <layout class="QVBoxLayout" name="verticalLayout">
18 <item>
19 <widget class="QTreeWidget" name="VHDLtreeWidget">
20 <column>
21 <property name="text">
22 <string notr="true">1</string>
23 </property>
24 </column>
25 </widget>
26 </item>
27 </layout>
28 </widget>
29 <widget class="QMenuBar" name="menuBar">
30 <property name="geometry">
31 <rect>
32 <x>0</x>
33 <y>0</y>
34 <width>400</width>
35 <height>27</height>
36 </rect>
37 </property>
38 <widget class="QMenu" name="menuFile">
39 <property name="title">
40 <string>File</string>
41 </property>
42 <addaction name="actionOpen"/>
43 <addaction name="actionScan_Folder"/>
44 </widget>
45 <addaction name="menuFile"/>
46 </widget>
47 <widget class="QToolBar" name="mainToolBar">
48 <attribute name="toolBarArea">
49 <enum>TopToolBarArea</enum>
50 </attribute>
51 <attribute name="toolBarBreak">
52 <bool>false</bool>
53 </attribute>
54 </widget>
55 <widget class="QStatusBar" name="statusBar"/>
56 <action name="actionOpen">
57 <property name="text">
58 <string>Open</string>
59 </property>
60 </action>
61 <action name="actionScan_Folder">
62 <property name="text">
63 <string>Scan Folder</string>
64 </property>
65 </action>
66 </widget>
67 <layoutdefault spacing="6" margin="11"/>
68 <resources/>
69 <connections/>
70 </ui>
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1 LIBRARY IEEE;
2 USE IEEE.numeric_std.ALL;
3 USE IEEE.std_logic_1164.ALL;
4 LIBRARY grlib;
5 USE grlib.amba.ALL;
6 USE grlib.stdlib.ALL;
7 LIBRARY techmap;
8 USE techmap.gencomp.ALL;
9 LIBRARY gaisler;
10 USE gaisler.memctrl.ALL;
11 USE gaisler.leon3.ALL;
12 USE gaisler.uart.ALL;
13 USE gaisler.misc.ALL;
14 USE gaisler.spacewire.ALL; -- PLE
15 LIBRARY esa;
16 USE esa.memoryctrl.ALL;
17
18 LIBRARY staging;
19 USE staging.SOC_LPP_JCP.ALL;
20
21 ENTITY MINI_LFR_top IS
22
23 PORT (
24 clk_50 : IN STD_LOGIC;
25 clk_49 : IN STD_LOGIC;
26 reset : IN STD_LOGIC;
27 --BPs
28 BP0 : IN STD_LOGIC;
29 BP1 : IN STD_LOGIC;
30 --LEDs
31 LED0 : OUT STD_LOGIC;
32 LED1 : OUT STD_LOGIC;
33 LED2 : OUT STD_LOGIC;
34 --UARTs
35 TXD1 : IN STD_LOGIC;
36 RXD1 : OUT STD_LOGIC;
37 nCTS1 : OUT STD_LOGIC;
38 nRTS1 : IN STD_LOGIC;
39
40 TXD2 : IN STD_LOGIC;
41 RXD2 : OUT STD_LOGIC;
42 nCTS2 : OUT STD_LOGIC;
43 nDTR2 : IN STD_LOGIC;
44 nRTS2 : IN STD_LOGIC;
45 nDCD2 : OUT STD_LOGIC;
46
47 --EXT CONNECTOR
48 IO0 : INOUT STD_LOGIC;
49 IO1 : INOUT STD_LOGIC;
50 IO2 : INOUT STD_LOGIC;
51 IO3 : INOUT STD_LOGIC;
52 IO4 : INOUT STD_LOGIC;
53 IO5 : INOUT STD_LOGIC;
54 IO6 : INOUT STD_LOGIC;
55 IO7 : INOUT STD_LOGIC;
56 IO8 : INOUT STD_LOGIC;
57 IO9 : INOUT STD_LOGIC;
58 IO10 : INOUT STD_LOGIC;
59 IO11 : INOUT STD_LOGIC;
60
61 --SPACE WIRE
62 SPW_EN : OUT STD_LOGIC; -- 0 => off
63 SPW_NOM_DIN : IN STD_LOGIC; -- NOMINAL LINK
64 SPW_NOM_SIN : IN STD_LOGIC;
65 SPW_NOM_DOUT : OUT STD_LOGIC;
66 SPW_NOM_SOUT : OUT STD_LOGIC;
67 SPW_RED_DIN : IN STD_LOGIC; -- REDUNDANT LINK
68 SPW_RED_SIN : IN STD_LOGIC;
69 SPW_RED_DOUT : OUT STD_LOGIC;
70 SPW_RED_SOUT : OUT STD_LOGIC;
71 -- MINI LFR ADC INPUTS
72 ADC_nCS : OUT STD_LOGIC;
73 ADC_CLK : OUT STD_LOGIC;
74 ADC_SDO : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
75
76 -- SRAM
77 SRAM_nWE : OUT STD_LOGIC;
78 SRAM_CE : OUT STD_LOGIC;
79 SRAM_nOE : OUT STD_LOGIC;
80 SRAM_nBE : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
81 SRAM_A : OUT STD_LOGIC_VECTOR(19 DOWNTO 0);
82 SRAM_DQ : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0)
83 );
84
85 END MINI_LFR_top;
86
87
88 ARCHITECTURE beh OF MINI_LFR_top IS
89
90 type DURATION is range -1E18 to 1E18
91 units
92 fs;
93 ps = 1000 fs;
94 ns = 1000 ps;
95 us = 1000 ns;
96 ms = 1000 us;
97 sec = 1000 ms;
98 min = 60 sec;
99 end units;
100
101 SIGNAL clk_50_s : STD_LOGIC := '0';
102 SIGNAL clk_25 : STD_LOGIC := '0';
103 -----------------------------------------------------------------------------
104 SIGNAL coarse_time : STD_LOGIC_VECTOR(31 DOWNTO 0);
105 SIGNAL fine_time : STD_LOGIC_VECTOR(15 DOWNTO 0);
106 --
107 SIGNAL errorn : STD_LOGIC;
108 -- UART AHB ---------------------------------------------------------------
109 SIGNAL ahbrxd : STD_ULOGIC; -- DSU rx data
110 SIGNAL ahbtxd : STD_ULOGIC; -- DSU tx data
111
112 -- UART APB ---------------------------------------------------------------
113 SIGNAL urxd1 : STD_ULOGIC; -- UART1 rx data
114 SIGNAL utxd1 : STD_ULOGIC; -- UART1 tx data
115 --
116 SIGNAL I00_s : STD_LOGIC;
117 --
118 CONSTANT NB_APB_SLAVE : INTEGER := 1;
119 CONSTANT NB_AHB_SLAVE : INTEGER := 1;
120 CONSTANT NB_AHB_MASTER : INTEGER := 1;
121
122 SIGNAL apbi_ext : apb_slv_in_type;
123 SIGNAL apbo_ext : soc_apb_slv_out_vector(NB_APB_SLAVE-1+5 DOWNTO 5):= (OTHERS => apb_none);
124 SIGNAL ahbi_s_ext : ahb_slv_in_type;
125 SIGNAL ahbo_s_ext : soc_ahb_slv_out_vector(NB_AHB_SLAVE-1+3 DOWNTO 3):= (OTHERS => ahbs_none);
126 SIGNAL ahbi_m_ext : AHB_Mst_In_Type;
127 SIGNAL ahbo_m_ext : soc_ahb_mst_out_vector(NB_AHB_MASTER-1+1 DOWNTO 1):= (OTHERS => ahbm_none);
128
129 BEGIN -- beh
130
131 -----------------------------------------------------------------------------
132 -- CLK
133 -----------------------------------------------------------------------------
134
135 PROCESS(clk_50)
136 BEGIN
137 IF clk_50'EVENT AND clk_50 = '1' THEN
138 clk_50_s <= NOT clk_50_s;
139 END IF;
140 END PROCESS;
141
142 PROCESS(clk_50_s)
143 BEGIN
144 IF clk_50_s'EVENT AND clk_50_s = '1' THEN
145 clk_25 <= NOT clk_25;
146 END IF;
147 END PROCESS;
148
149 -----------------------------------------------------------------------------
150
151 PROCESS (clk_25, reset)
152 BEGIN -- PROCESS
153 IF reset = '0' THEN -- asynchronous reset (active low)
154 LED0 <= '0';
155 LED1 <= '0';
156 LED2 <= '0';
157 IO1 <= '0';
158 IO2 <= '1';
159 IO3 <= '0';
160 IO4 <= '0';
161 IO5 <= '0';
162 IO6 <= '0';
163 IO7 <= '0';
164 IO8 <= '0';
165 IO9 <= '0';
166 IO10 <= '0';
167 IO11 <= '0';
168 ELSIF clk_25'event AND clk_25 = '1' THEN -- rising clock edge
169 LED0 <= '0';
170 LED1 <= '1';
171 LED2 <= BP0;
172 IO1 <= '1';
173 IO2 <= SPW_NOM_DIN OR SPW_NOM_SIN OR SPW_RED_DIN OR SPW_RED_SIN;
174 IO3 <= ADC_SDO(0);
175 IO4 <= ADC_SDO(1);
176 IO5 <= ADC_SDO(2);
177 IO6 <= ADC_SDO(3);
178 IO7 <= ADC_SDO(4);
179 IO8 <= ADC_SDO(5);
180 IO9 <= ADC_SDO(6);
181 IO10 <= ADC_SDO(7);
182 IO11 <= BP1 OR nDTR2 OR nRTS2 OR nRTS1;
183 END IF;
184 END PROCESS;
185
186 PROCESS (clk_49, reset)
187 BEGIN -- PROCESS
188 IF reset = '0' THEN -- asynchronous reset (active low)
189 I00_s <= '0';
190 ELSIF clk_49'event AND clk_49 = '1' THEN -- rising clock edge
191 I00_s <= NOT I00_s;
192 END IF;
193 END PROCESS;
194 IO0 <= I00_s;
195
196 --UARTs
197 nCTS1 <= '1';
198 nCTS2 <= '1';
199 nDCD2 <= '1';
200
201 --EXT CONNECTOR
202
203 --SPACE WIRE
204 SPW_EN <= '0'; -- 0 => off
205
206 SPW_NOM_DOUT <= '0';
207 SPW_NOM_SOUT <= '0';
208 SPW_RED_DOUT <= '0';
209 SPW_RED_SOUT <= '0';
210
211 ADC_nCS <= '0';
212 ADC_CLK <= '0';
213
214
215 leon3_soc_1: leon3_soc_LPP_JCP
216 GENERIC MAP (
217 fabtech => apa3e,
218 memtech => apa3e,
219 padtech => inferred,
220 clktech => inferred,
221 disas => 0,
222 dbguart => 0,
223 pclow => 2,
224 clk_freq => 25000,
225 NB_CPU => 1,
226 ENABLE_FPU => 0,
227 FPU_NETLIST => 0,
228 ENABLE_DSU => 1,
229 ENABLE_AHB_UART => 1,
230 ENABLE_APB_UART => 1,
231 ENABLE_IRQMP => 1,
232 ENABLE_GPT => 1,
233 NB_AHB_MASTER => NB_AHB_MASTER,
234 NB_AHB_SLAVE => NB_AHB_SLAVE,
235 NB_APB_SLAVE => NB_APB_SLAVE)
236 PORT MAP (
237 clk => clk_25,
238 rstn => reset,
239 errorn => errorn,
240 ahbrxd => TXD1,
241 ahbtxd => RXD1,
242 urxd1 => TXD2,
243 utxd1 => RXD2,
244 address => SRAM_A,
245 data => SRAM_DQ,
246 nSRAM_BE0 => SRAM_nBE(0),
247 nSRAM_BE1 => SRAM_nBE(1),
248 nSRAM_BE2 => SRAM_nBE(2),
249 nSRAM_BE3 => SRAM_nBE(3),
250 nSRAM_WE => SRAM_nWE,
251 nSRAM_CE => SRAM_CE,
252 nSRAM_OE => SRAM_nOE,
253
254 apbi_ext => apbi_ext,
255 apbo_ext => apbo_ext,
256 ahbi_s_ext => ahbi_s_ext,
257 ahbo_s_ext => ahbo_s_ext,
258 ahbi_m_ext => ahbi_m_ext,
259 ahbo_m_ext => ahbo_m_ext);
260
261 END beh;
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the VHDL Tools Software
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 /*-- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 ----------------------------------------------------------------------------*/
22 #include "vhdl_ast_node.h"
23
24
25
26 VHDL_Tools::VHDL_AST_Node::VHDL_AST_Node(const QString &value, VHDL_Tools::VHDL_AST_Node_type type, int line, int column)
27 :a_value(value),type(type),line(line),column(column)
28 {
29
30 }
31
32 void VHDL_Tools::VHDL_AST_Node::move(VHDL_Tools::VHDL_AST_Node *parentNode)
33 {
34 if(parentNode!=NULL)
35 {
36 this->parent->childs.removeOne(this);
37 parentNode->childs.append(this);
38 this->parent=parentNode;
39 }
40 }
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the VHDL Tools Software
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 /*-- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 ----------------------------------------------------------------------------*/
22 #ifndef VHDL_AST_NODE_H
23 #define VHDL_AST_NODE_H
24 #include <QString>
25 #include <QList>
26
27 namespace VHDL_Tools{
28
29 #define closedByEnd 0x100
30 #define closedBySemicolon 0x200
31 #define closedByRightParen 0x300
32
33 #define IS_CLOSED_BY_END(type) (((type)&0xF00)==closedByEnd)
34 #define IS_CLOSED_BY_SEMICOLON(type) (((type)&0xF00)==closedBySemicolon)
35 #define IS_CLOSED_BY_RIGHTPAREN(type) (((type)&0xF00)==closedByRightParen)
36
37 #define IS_CLOSED_BY(openType,type) ((type)==ExpectedCloseTypeLookUp[((openType)&0xF00)>>8])
38
39 enum VHDL_AST_Node_type {
40 none=0,
41 separator=1,
42 keyword=2,
43 leftParen=3|closedByRightParen,
44 rightParen=4,
45 block=5|closedByEnd,
46 units=6|closedByEnd,
47 entity=7|closedByEnd,
48 clause=8|closedBySemicolon,
49 semicolon=9,
50 colon=10,
51 generic=11,
52 port=12,
53 map=13,
54 endKw=14,
55 virtualGroup=15,
56 identifier=16,
57 literal=17,
58 rootNode=18,
59 comment=19
60 };
61
62 const VHDL_AST_Node_type ExpectedCloseTypeLookUp[]={none,endKw,semicolon,rightParen,none,none,none,none,none,none,none,none,none,none,none,none};
63
64 class VHDL_AST_Node
65 {
66 public:
67 VHDL_AST_Node(const QString& value,VHDL_Tools::VHDL_AST_Node_type type,int line=0, int column=0);
68 QString a_value;
69 VHDL_Tools::VHDL_AST_Node_type type;
70 int line;
71 int column;
72 VHDL_Tools::VHDL_AST_Node* parent;
73 QList<VHDL_Tools::VHDL_AST_Node*> childs;
74 void move(VHDL_Tools::VHDL_AST_Node* parentNode);
75 };
76 }
77
78 #endif // VHDL_AST_NODE_H
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the VHDL Tools Software
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 /*-- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 ----------------------------------------------------------------------------*/
22 #include "vhdl_fragment.h"
23
24 VHDL_Tools::VHDL_Fragment::VHDL_Fragment()
25 {
26 }
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the VHDL Tools Software
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 /*-- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 ----------------------------------------------------------------------------*/
22 #ifndef VHDL_FRAGMENT_H
23 #define VHDL_FRAGMENT_H
24 #include "vhdl_ast_node.h"
25 namespace VHDL_Tools {
26 class VHDL_Fragment
27 {
28 public:
29 VHDL_Fragment();
30 virtual void pushNode(VHDL_Tools::VHDL_AST_Node* node)=0;
31 VHDL_Tools::VHDL_AST_Node* node;
32 };
33
34 class VHDL_packaget: public VHDL_Tools::VHDL_Fragment
35 {
36 public:
37 VHDL_packaget() {}
38 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
39 QString name;
40 };
41
42 class VHDL_entity: public VHDL_Tools::VHDL_Fragment
43 {
44 public:
45 VHDL_entity() {}
46 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
47 QString name;
48 };
49
50 class VHDL_architecture: public VHDL_Tools::VHDL_Fragment
51 {
52 public:
53 VHDL_architecture() {}
54 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
55 QString name;
56 };
57
58 class VHDL_component: public VHDL_Tools::VHDL_Fragment
59 {
60 public:
61 VHDL_component() {}
62 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
63 QString name;
64 };
65
66 class VHDL_Library: public VHDL_Tools::VHDL_Fragment
67 {
68 public:
69 VHDL_Library() {}
70 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
71 QString name;
72 };
73
74 class VHDL_useClose: public VHDL_Tools::VHDL_Fragment
75 {
76 public:
77 VHDL_useClose() {}
78 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
79 QString name;
80 };
81
82 class VHDL_generic: public VHDL_Tools::VHDL_Fragment
83 {
84 public:
85 VHDL_generic() {}
86 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
87 QString name;
88 };
89
90 class VHDL_port: public VHDL_Tools::VHDL_Fragment
91 {
92 public:
93 VHDL_port() {}
94 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
95 QString name;
96 };
97
98 class VHDL_type: public VHDL_Tools::VHDL_Fragment
99 {
100 public:
101 VHDL_type() {}
102 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
103 QString name;
104 };
105
106 class VHDL_subtype: public VHDL_Tools::VHDL_Fragment
107 {
108 public:
109 VHDL_subtype() {}
110 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
111 QString name;
112 };
113
114 class VHDL_constant: public VHDL_Tools::VHDL_Fragment
115 {
116 public:
117 VHDL_constant() {}
118 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
119 QString name;
120 };
121
122 class VHDL_signal: public VHDL_Tools::VHDL_Fragment
123 {
124 public:
125 VHDL_signal() {}
126 void pushNode(VHDL_Tools::VHDL_AST_Node* node);
127 QString name;
128 };
129
130 }
131 #endif // VHDL_FRAGMENT_H
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@@ -1,32 +1,29
1 #-------------------------------------------------
1 #-------------------------------------------------
2 #
2 #
3 # Project created by QtCreator 2014-07-20T22:29:15
3 # Project created by QtCreator 2014-07-20T22:29:15
4 #
4 #
5 #-------------------------------------------------
5 #-------------------------------------------------
6
6
7 QT += core
7 QT += core
8
8
9 QT -= gui
9 QT -= gui
10
10
11 TARGET = basic_VHDL_parser
11 TARGET = basic_VHDL_parser
12 CONFIG += console
12 CONFIG += console
13
13
14 DESTDIR = ../../bin
14 DESTDIR = ../../bin
15
15
16 TEMPLATE = app
16 TEMPLATE = app
17
17
18 INCLUDEPATH += \
18 INCLUDEPATH += \
19 $$DESTDIR/../vhdlparser \
19 $$DESTDIR/../vhdlparser \
20 ../../vhdlparser
20 ../../vhdlparser
21 # ../../../vhdlparser \
22 # /opt/build-vhdl_tools-Qt_5_2_1_Syst_me-Debug/vhdlparser
23
24 message($$DESTDIR)
25
21
26
22
27 LIBS += -lfl -L${DESTDIR} -lvhdlparser
23 LIBS += -lfl -L${DESTDIR} -lvhdlparser
28
24
29 SOURCES += main.cpp
25 SOURCES += main.cpp
30
26
31 OTHER_FILES += \
27 OTHER_FILES += \
32 test1.vhd
28 test1.vhd\
29 test2.vhd
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@@ -1,3814 +1,3843
1 package test is
2 component ramb4_s16
3 port (
4 do : out std_logic_vector (15 downto 0)
5 );
6 end component;
7
8 component ramb4_s16
9 port (
10 do : out std_logic_vector (15 downto 0)
11 );
12 end component;
13
14 end package;
15
16 package test is
17 component cmp1
18 port (
19 do : out std_logic_vector (15 downto 0)
20 );
21 end component;
22
23 component cmp2
24 port (
25 do : out std_logic_vector (15 downto 0)
26 );
27 end component;
28
29 end package;
1
30
2 ------------------------------------------------------------------------------
31 ------------------------------------------------------------------------------
3 -- This file is a part of the GRLIB VHDL IP LIBRARY
32 -- This file is a part of the GRLIB VHDL IP LIBRARY
4 -- Copyright (C) 2003 - 2008, Gaisler Research
33 -- Copyright (C) 2003 - 2008, Gaisler Research
5 -- Copyright (C) 2008 - 2014, Aeroflex Gaisler
34 -- Copyright (C) 2008 - 2014, Aeroflex Gaisler
6 --
35 --
7 -- This program is free software; you can redistribute it and/or modify
36 -- This program is free software; you can redistribute it and/or modify
8 -- it under the terms of the GNU General Public License as published by
37 -- it under the terms of the GNU General Public License as published by
9 -- the Free Software Foundation; either version 2 of the License, or
38 -- the Free Software Foundation; either version 2 of the License, or
10 -- (at your option) any later version.
39 -- (at your option) any later version.
11 --
40 --
12 -- This program is distributed in the hope that it will be useful,
41 -- This program is distributed in the hope that it will be useful,
13 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
42 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
14 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
43 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 -- GNU General Public License for more details.
44 -- GNU General Public License for more details.
16 --
45 --
17 -- You should have received a copy of the GNU General Public License
46 -- You should have received a copy of the GNU General Public License
18 -- along with this program; if not, write to the Free Software
47 -- along with this program; if not, write to the Free Software
19 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
48 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 -----------------------------------------------------------------------------
49 -----------------------------------------------------------------------------
21 -- Package: vcomponents
50 -- Package: vcomponents
22 -- File: vcomponents.vhd
51 -- File: vcomponents.vhd
23 -- Author: Jiri Gaisler, Gaisler Research
52 -- Author: Jiri Gaisler, Gaisler Research
24 -- Description: Component declartions of some XILINX primitives
53 -- Description: Component declartions of some XILINX primitives
25 -----------------------------------------------------------------------------
54 -----------------------------------------------------------------------------
26
55
27 library ieee;
56 library ieee;
28 use ieee.std_logic_1164.all;
57 use ieee.std_logic_1164.all;
29
58
30 package vcomponents is
59 package vcomponents is
31
60
32 -- synopsys translate_off
61 -- synopsys translate_off
33
62
34 -----------------------------------------
63 -----------------------------------------
35 ----------- FPGA Globals --------------
64 ----------- FPGA Globals --------------
36 -----------------------------------------
65 -----------------------------------------
37 signal GSR : std_logic := '0';
66 signal GSR : std_logic := '0';
38 signal GTS : std_logic := '0';
67 signal GTS : std_logic := '0';
39 signal GWE : std_logic := '0';
68 signal GWE : std_logic := '0';
40 signal PLL_LOCKG : std_logic := 'H';
69 signal PLL_LOCKG : std_logic := 'H';
41 signal PROGB_GLBL : std_logic := '0';
70 signal PROGB_GLBL : std_logic := '0';
42 signal CCLKO_GLBL : std_logic := 'H';
71 signal CCLKO_GLBL : std_logic := 'H';
43
72
44 -----------------------------------------
73 -----------------------------------------
45 ----------- CPLD Globals --------------
74 ----------- CPLD Globals --------------
46 -----------------------------------------
75 -----------------------------------------
47 signal PRLD : std_logic := '0';
76 signal PRLD : std_logic := '0';
48
77
49 -----------------------------------------
78 -----------------------------------------
50 ----------- JTAG Globals --------------
79 ----------- JTAG Globals --------------
51 -----------------------------------------
80 -----------------------------------------
52 signal JTAG_TDO_GLBL : std_logic;
81 signal JTAG_TDO_GLBL : std_logic;
53 signal JTAG_TDI_GLBL : std_logic := '0';
82 signal JTAG_TDI_GLBL : std_logic := '0';
54 signal JTAG_TMS_GLBL : std_logic := '0';
83 signal JTAG_TMS_GLBL : std_logic := '0';
55 signal JTAG_TCK_GLBL : std_logic := '0';
84 signal JTAG_TCK_GLBL : std_logic := '0';
56 signal JTAG_TRST_GLBL : std_logic := '0';
85 signal JTAG_TRST_GLBL : std_logic := '0';
57
86
58 signal JTAG_CAPTURE_GLBL : std_logic := '0';
87 signal JTAG_CAPTURE_GLBL : std_logic := '0';
59 signal JTAG_RESET_GLBL : std_logic := '1';
88 signal JTAG_RESET_GLBL : std_logic := '1';
60 signal JTAG_SHIFT_GLBL : std_logic := '1';
89 signal JTAG_SHIFT_GLBL : std_logic := '1';
61 signal JTAG_UPDATE_GLBL : std_logic := '0';
90 signal JTAG_UPDATE_GLBL : std_logic := '0';
62 signal JTAG_RUNTEST_GLBL : std_logic := '0';
91 signal JTAG_RUNTEST_GLBL : std_logic := '0';
63
92
64 signal JTAG_SEL1_GLBL : std_logic := '0';
93 signal JTAG_SEL1_GLBL : std_logic := '0';
65 signal JTAG_SEL2_GLBL : std_logic := '0';
94 signal JTAG_SEL2_GLBL : std_logic := '0';
66 signal JTAG_SEL3_GLBL : std_logic := '0';
95 signal JTAG_SEL3_GLBL : std_logic := '0';
67 signal JTAG_SEL4_GLBL : std_logic := '0';
96 signal JTAG_SEL4_GLBL : std_logic := '0';
68
97
69 signal JTAG_USER_TDO1_GLBL : std_logic := 'Z';
98 signal JTAG_USER_TDO1_GLBL : std_logic := 'Z';
70 signal JTAG_USER_TDO2_GLBL : std_logic := 'Z';
99 signal JTAG_USER_TDO2_GLBL : std_logic := 'Z';
71 signal JTAG_USER_TDO3_GLBL : std_logic := 'Z';
100 signal JTAG_USER_TDO3_GLBL : std_logic := 'Z';
72 signal JTAG_USER_TDO4_GLBL : std_logic := 'Z';
101 signal JTAG_USER_TDO4_GLBL : std_logic := 'Z';
73
102
74 -- synopsys translate_on
103 -- synopsys translate_on
75
104
76 component ramb4_s16 port (
105 component ramb4_s16 port (
77 do : out std_logic_vector (15 downto 0);
106 do : out std_logic_vector (15 downto 0);
78 addr : in std_logic_vector (7 downto 0);
107 addr : in std_logic_vector (7 downto 0);
79 clk : in std_ulogic;
108 clk : in std_ulogic;
80 di : in std_logic_vector (15 downto 0);
109 di : in std_logic_vector (15 downto 0);
81 en, rst, we : in std_ulogic);
110 en, rst, we : in std_ulogic);
82 end component;
111 end component;
83 component RAMB4_S8
112 component RAMB4_S8
84 port (do : out std_logic_vector (7 downto 0);
113 port (do : out std_logic_vector (7 downto 0);
85 addr : in std_logic_vector (8 downto 0);
114 addr : in std_logic_vector (8 downto 0);
86 clk : in std_ulogic;
115 clk : in std_ulogic;
87 di : in std_logic_vector (7 downto 0);
116 di : in std_logic_vector (7 downto 0);
88 en, rst, we : in std_ulogic);
117 en, rst, we : in std_ulogic);
89 end component;
118 end component;
90 component RAMB4_S4
119 component RAMB4_S4
91 port (do : out std_logic_vector (3 downto 0);
120 port (do : out std_logic_vector (3 downto 0);
92 addr : in std_logic_vector (9 downto 0);
121 addr : in std_logic_vector (9 downto 0);
93 clk : in std_ulogic;
122 clk : in std_ulogic;
94 di : in std_logic_vector (3 downto 0);
123 di : in std_logic_vector (3 downto 0);
95 en, rst, we : in std_ulogic);
124 en, rst, we : in std_ulogic);
96 end component;
125 end component;
97 component RAMB4_S2
126 component RAMB4_S2
98 port (do : out std_logic_vector (1 downto 0);
127 port (do : out std_logic_vector (1 downto 0);
99 addr : in std_logic_vector (10 downto 0);
128 addr : in std_logic_vector (10 downto 0);
100 clk : in std_ulogic;
129 clk : in std_ulogic;
101 di : in std_logic_vector (1 downto 0);
130 di : in std_logic_vector (1 downto 0);
102 en, rst, we : in std_ulogic);
131 en, rst, we : in std_ulogic);
103 end component;
132 end component;
104 component RAMB4_S1
133 component RAMB4_S1
105 port (do : out std_logic_vector (0 downto 0);
134 port (do : out std_logic_vector (0 downto 0);
106 addr : in std_logic_vector (11 downto 0);
135 addr : in std_logic_vector (11 downto 0);
107 clk : in std_ulogic;
136 clk : in std_ulogic;
108 di : in std_logic_vector (0 downto 0);
137 di : in std_logic_vector (0 downto 0);
109 en, rst, we : in std_ulogic);
138 en, rst, we : in std_ulogic);
110 end component;
139 end component;
111 component RAMB4_S1_S1
140 component RAMB4_S1_S1
112 port (
141 port (
113 doa : out std_logic_vector (0 downto 0);
142 doa : out std_logic_vector (0 downto 0);
114 dob : out std_logic_vector (0 downto 0);
143 dob : out std_logic_vector (0 downto 0);
115 addra : in std_logic_vector (11 downto 0);
144 addra : in std_logic_vector (11 downto 0);
116 addrb : in std_logic_vector (11 downto 0);
145 addrb : in std_logic_vector (11 downto 0);
117 clka : in std_ulogic;
146 clka : in std_ulogic;
118 clkb : in std_ulogic;
147 clkb : in std_ulogic;
119 dia : in std_logic_vector (0 downto 0);
148 dia : in std_logic_vector (0 downto 0);
120 dib : in std_logic_vector (0 downto 0);
149 dib : in std_logic_vector (0 downto 0);
121 ena : in std_ulogic;
150 ena : in std_ulogic;
122 enb : in std_ulogic;
151 enb : in std_ulogic;
123 rsta : in std_ulogic;
152 rsta : in std_ulogic;
124 rstb : in std_ulogic;
153 rstb : in std_ulogic;
125 wea : in std_ulogic;
154 wea : in std_ulogic;
126 web : in std_ulogic
155 web : in std_ulogic
127 );
156 );
128 end component;
157 end component;
129 component RAMB4_S2_S2
158 component RAMB4_S2_S2
130 port (
159 port (
131 doa : out std_logic_vector (1 downto 0);
160 doa : out std_logic_vector (1 downto 0);
132 dob : out std_logic_vector (1 downto 0);
161 dob : out std_logic_vector (1 downto 0);
133 addra : in std_logic_vector (10 downto 0);
162 addra : in std_logic_vector (10 downto 0);
134 addrb : in std_logic_vector (10 downto 0);
163 addrb : in std_logic_vector (10 downto 0);
135 clka : in std_ulogic;
164 clka : in std_ulogic;
136 clkb : in std_ulogic;
165 clkb : in std_ulogic;
137 dia : in std_logic_vector (1 downto 0);
166 dia : in std_logic_vector (1 downto 0);
138 dib : in std_logic_vector (1 downto 0);
167 dib : in std_logic_vector (1 downto 0);
139 ena : in std_ulogic;
168 ena : in std_ulogic;
140 enb : in std_ulogic;
169 enb : in std_ulogic;
141 rsta : in std_ulogic;
170 rsta : in std_ulogic;
142 rstb : in std_ulogic;
171 rstb : in std_ulogic;
143 wea : in std_ulogic;
172 wea : in std_ulogic;
144 web : in std_ulogic
173 web : in std_ulogic
145 );
174 );
146 end component;
175 end component;
147 component RAMB4_S4_S4
176 component RAMB4_S4_S4
148 port (
177 port (
149 doa : out std_logic_vector (3 downto 0);
178 doa : out std_logic_vector (3 downto 0);
150 dob : out std_logic_vector (3 downto 0);
179 dob : out std_logic_vector (3 downto 0);
151 addra : in std_logic_vector (9 downto 0);
180 addra : in std_logic_vector (9 downto 0);
152 addrb : in std_logic_vector (9 downto 0);
181 addrb : in std_logic_vector (9 downto 0);
153 clka : in std_ulogic;
182 clka : in std_ulogic;
154 clkb : in std_ulogic;
183 clkb : in std_ulogic;
155 dia : in std_logic_vector (3 downto 0);
184 dia : in std_logic_vector (3 downto 0);
156 dib : in std_logic_vector (3 downto 0);
185 dib : in std_logic_vector (3 downto 0);
157 ena : in std_ulogic;
186 ena : in std_ulogic;
158 enb : in std_ulogic;
187 enb : in std_ulogic;
159 rsta : in std_ulogic;
188 rsta : in std_ulogic;
160 rstb : in std_ulogic;
189 rstb : in std_ulogic;
161 wea : in std_ulogic;
190 wea : in std_ulogic;
162 web : in std_ulogic
191 web : in std_ulogic
163 );
192 );
164 end component;
193 end component;
165 component RAMB4_S8_S8
194 component RAMB4_S8_S8
166 port (
195 port (
167 doa : out std_logic_vector (7 downto 0);
196 doa : out std_logic_vector (7 downto 0);
168 dob : out std_logic_vector (7 downto 0);
197 dob : out std_logic_vector (7 downto 0);
169 addra : in std_logic_vector (8 downto 0);
198 addra : in std_logic_vector (8 downto 0);
170 addrb : in std_logic_vector (8 downto 0);
199 addrb : in std_logic_vector (8 downto 0);
171 clka : in std_ulogic;
200 clka : in std_ulogic;
172 clkb : in std_ulogic;
201 clkb : in std_ulogic;
173 dia : in std_logic_vector (7 downto 0);
202 dia : in std_logic_vector (7 downto 0);
174 dib : in std_logic_vector (7 downto 0);
203 dib : in std_logic_vector (7 downto 0);
175 ena : in std_ulogic;
204 ena : in std_ulogic;
176 enb : in std_ulogic;
205 enb : in std_ulogic;
177 rsta : in std_ulogic;
206 rsta : in std_ulogic;
178 rstb : in std_ulogic;
207 rstb : in std_ulogic;
179 wea : in std_ulogic;
208 wea : in std_ulogic;
180 web : in std_ulogic
209 web : in std_ulogic
181 );
210 );
182 end component;
211 end component;
183 component RAMB4_S16_S16
212 component RAMB4_S16_S16
184 port (
213 port (
185 doa : out std_logic_vector (15 downto 0);
214 doa : out std_logic_vector (15 downto 0);
186 dob : out std_logic_vector (15 downto 0);
215 dob : out std_logic_vector (15 downto 0);
187 addra : in std_logic_vector (7 downto 0);
216 addra : in std_logic_vector (7 downto 0);
188 addrb : in std_logic_vector (7 downto 0);
217 addrb : in std_logic_vector (7 downto 0);
189 clka : in std_ulogic;
218 clka : in std_ulogic;
190 clkb : in std_ulogic;
219 clkb : in std_ulogic;
191 dia : in std_logic_vector (15 downto 0);
220 dia : in std_logic_vector (15 downto 0);
192 dib : in std_logic_vector (15 downto 0);
221 dib : in std_logic_vector (15 downto 0);
193 ena : in std_ulogic;
222 ena : in std_ulogic;
194 enb : in std_ulogic;
223 enb : in std_ulogic;
195 rsta : in std_ulogic;
224 rsta : in std_ulogic;
196 rstb : in std_ulogic;
225 rstb : in std_ulogic;
197 wea : in std_ulogic;
226 wea : in std_ulogic;
198 web : in std_ulogic
227 web : in std_ulogic
199 );
228 );
200 end component;
229 end component;
201
230
202 component RAMB16_S1
231 component RAMB16_S1
203 -- pragma translate_off
232 -- pragma translate_off
204 generic
233 generic
205 (
234 (
206 INIT : bit_vector := X"0";
235 INIT : bit_vector := X"0";
207 SRVAL : bit_vector := X"0";
236 SRVAL : bit_vector := X"0";
208 WRITE_MODE : string := "WRITE_FIRST";
237 WRITE_MODE : string := "WRITE_FIRST";
209 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
238 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
210 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
239 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
211 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
240 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
212 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
241 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
213 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
242 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
214 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
243 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
215 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
244 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
216 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
245 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
217 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
246 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
218 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
247 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
219 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
248 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
220 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
249 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
221 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
250 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
222 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
251 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
223 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
252 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
224 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
253 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
225 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
254 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
226 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
255 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
227 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
256 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
228 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
257 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
229 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
258 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
230 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
259 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
231 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
260 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
232 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
261 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
233 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
262 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
234 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
263 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
235 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
264 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
236 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
265 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
237 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
266 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
238 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
267 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
239 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
268 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
240 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
269 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
241 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
270 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
242 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
271 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
243 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
272 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
244 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
273 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
245 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
274 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
246 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
275 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
247 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
276 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
248 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
277 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
249 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
278 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
250 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
279 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
251 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
280 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
252 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
281 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
253 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
282 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
254 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
283 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
255 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
284 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
256 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
285 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
257 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
286 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
258 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
287 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
259 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
288 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
260 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
289 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
261 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
290 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
262 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
291 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
263 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
292 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
264 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
293 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
265 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
294 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
266 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
295 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
267 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
296 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
268 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
297 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
269 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
298 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
270 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
299 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
271 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
300 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
272 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
301 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
273 );
302 );
274 -- pragma translate_on
303 -- pragma translate_on
275 port (
304 port (
276 DO : out std_logic_vector (0 downto 0);
305 DO : out std_logic_vector (0 downto 0);
277 ADDR : in std_logic_vector (13 downto 0);
306 ADDR : in std_logic_vector (13 downto 0);
278 CLK : in std_ulogic;
307 CLK : in std_ulogic;
279 DI : in std_logic_vector (0 downto 0);
308 DI : in std_logic_vector (0 downto 0);
280 EN : in std_ulogic;
309 EN : in std_ulogic;
281 SSR : in std_ulogic;
310 SSR : in std_ulogic;
282 WE : in std_ulogic
311 WE : in std_ulogic
283 );
312 );
284 end component;
313 end component;
285
314
286 component RAMB16_S2
315 component RAMB16_S2
287 -- pragma translate_off
316 -- pragma translate_off
288 generic
317 generic
289 (
318 (
290 INIT : bit_vector := X"0";
319 INIT : bit_vector := X"0";
291 SRVAL : bit_vector := X"0";
320 SRVAL : bit_vector := X"0";
292 WRITE_MODE : string := "WRITE_FIRST";
321 WRITE_MODE : string := "WRITE_FIRST";
293 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
322 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
294 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
323 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
295 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
324 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
296 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
325 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
297 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
326 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
298 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
327 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
299 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
328 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
300 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
329 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
301 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
330 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
302 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
331 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
303 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
332 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
304 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
333 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
305 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
334 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
306 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
335 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
307 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
336 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
308 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
337 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
309 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
338 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
310 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
339 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
311 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
340 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
312 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
341 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
313 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
342 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
314 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
343 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
315 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
344 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
316 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
345 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
317 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
346 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
318 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
347 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
319 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
348 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
320 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
349 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
321 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
350 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
322 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
351 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
323 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
352 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
324 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
353 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
325 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
354 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
326 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
355 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
327 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
356 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
328 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
357 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
329 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
358 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
330 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
359 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
331 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
360 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
332 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
361 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
333 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
362 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
334 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
363 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
335 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
364 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
336 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
365 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
337 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
366 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
338 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
367 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
339 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
368 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
340 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
369 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
341 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
370 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
342 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
371 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
343 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
372 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
344 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
373 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
345 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
374 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
346 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
375 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
347 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
376 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
348 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
377 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
349 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
378 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
350 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
379 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
351 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
380 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
352 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
381 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
353 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
382 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
354 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
383 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
355 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
384 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
356 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
385 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
357 );
386 );
358 -- pragma translate_on
387 -- pragma translate_on
359 port (
388 port (
360 DO : out std_logic_vector (1 downto 0);
389 DO : out std_logic_vector (1 downto 0);
361 ADDR : in std_logic_vector (12 downto 0);
390 ADDR : in std_logic_vector (12 downto 0);
362 CLK : in std_ulogic;
391 CLK : in std_ulogic;
363 DI : in std_logic_vector (1 downto 0);
392 DI : in std_logic_vector (1 downto 0);
364 EN : in std_ulogic;
393 EN : in std_ulogic;
365 SSR : in std_ulogic;
394 SSR : in std_ulogic;
366 WE : in std_ulogic
395 WE : in std_ulogic
367 );
396 );
368 end component;
397 end component;
369
398
370 component RAMB16_S4
399 component RAMB16_S4
371 -- pragma translate_off
400 -- pragma translate_off
372 generic
401 generic
373 (
402 (
374 INIT : bit_vector := X"0";
403 INIT : bit_vector := X"0";
375 SRVAL : bit_vector := X"0";
404 SRVAL : bit_vector := X"0";
376 WRITE_MODE : string := "WRITE_FIRST";
405 WRITE_MODE : string := "WRITE_FIRST";
377 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
406 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
378 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
407 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
379 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
408 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
380 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
409 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
381 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
410 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
382 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
411 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
383 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
412 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
384 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
413 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
385 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
414 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
386 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
415 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
387 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
416 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
388 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
417 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
389 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
418 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
390 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
419 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
391 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
420 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
392 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
421 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
393 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
422 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
394 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
423 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
395 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
424 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
396 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
425 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
397 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
426 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
398 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
427 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
399 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
428 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
400 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
429 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
401 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
430 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
402 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
431 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
403 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
432 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
404 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
433 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
405 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
434 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
406 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
435 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
407 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
436 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
408 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
437 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
409 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
438 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
410 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
439 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
411 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
440 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
412 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
441 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
413 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
442 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
414 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
443 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
415 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
444 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
416 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
445 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
417 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
446 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
418 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
447 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
419 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
448 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
420 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
449 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
421 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
450 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
422 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
451 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
423 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
452 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
424 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
453 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
425 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
454 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
426 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
455 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
427 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
456 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
428 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
457 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
429 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
458 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
430 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
459 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
431 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
460 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
432 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
461 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
433 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
462 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
434 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
463 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
435 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
464 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
436 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
465 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
437 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
466 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
438 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
467 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
439 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
468 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
440 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
469 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
441 );
470 );
442 -- pragma translate_on
471 -- pragma translate_on
443 port (
472 port (
444 DO : out std_logic_vector (3 downto 0);
473 DO : out std_logic_vector (3 downto 0);
445 ADDR : in std_logic_vector (11 downto 0);
474 ADDR : in std_logic_vector (11 downto 0);
446 CLK : in std_ulogic;
475 CLK : in std_ulogic;
447 DI : in std_logic_vector (3 downto 0);
476 DI : in std_logic_vector (3 downto 0);
448 EN : in std_ulogic;
477 EN : in std_ulogic;
449 SSR : in std_ulogic;
478 SSR : in std_ulogic;
450 WE : in std_ulogic
479 WE : in std_ulogic
451 );
480 );
452 end component;
481 end component;
453
482
454 component RAMB16_S9
483 component RAMB16_S9
455 -- pragma translate_off
484 -- pragma translate_off
456 generic
485 generic
457 (
486 (
458 INIT : bit_vector := X"000";
487 INIT : bit_vector := X"000";
459 SRVAL : bit_vector := X"000";
488 SRVAL : bit_vector := X"000";
460 WRITE_MODE : string := "WRITE_FIRST";
489 WRITE_MODE : string := "WRITE_FIRST";
461 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
490 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
462 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
491 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
463 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
492 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
464 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
493 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
465 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
494 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
466 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
495 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
467 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
496 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
468 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
497 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
469 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
498 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
470 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
499 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
471 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
500 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
472 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
501 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
473 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
502 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
474 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
503 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
475 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
504 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
476 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
505 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
477 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
506 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
478 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
507 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
479 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
508 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
480 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
509 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
481 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
510 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
482 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
511 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
483 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
512 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
484 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
513 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
485 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
514 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
486 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
515 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
487 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
516 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
488 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
517 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
489 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
518 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
490 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
519 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
491 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
520 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
492 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
521 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
493 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
522 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
494 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
523 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
495 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
524 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
496 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
525 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
497 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
526 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
498 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
527 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
499 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
528 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
500 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
529 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
501 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
530 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
502 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
531 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
503 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
532 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
504 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
533 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
505 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
534 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
506 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
535 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
507 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
536 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
508 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
537 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
509 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
538 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
510 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
539 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
511 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
540 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
512 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
541 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
513 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
542 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
514 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
543 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
515 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
544 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
516 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
545 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
517 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
546 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
518 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
547 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
519 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
548 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
520 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
549 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
521 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
550 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
522 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
551 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
523 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
552 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
524 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
553 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
525 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
554 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
526 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
555 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
527 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
556 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
528 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
557 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
529 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
558 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
530 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
559 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
531 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
560 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
532 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
561 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
533 );
562 );
534 -- pragma translate_on
563 -- pragma translate_on
535 port (
564 port (
536 DO : out std_logic_vector (7 downto 0);
565 DO : out std_logic_vector (7 downto 0);
537 DOP : out std_logic_vector (0 downto 0);
566 DOP : out std_logic_vector (0 downto 0);
538 ADDR : in std_logic_vector (10 downto 0);
567 ADDR : in std_logic_vector (10 downto 0);
539 CLK : in std_ulogic;
568 CLK : in std_ulogic;
540 DI : in std_logic_vector (7 downto 0);
569 DI : in std_logic_vector (7 downto 0);
541 DIP : in std_logic_vector (0 downto 0);
570 DIP : in std_logic_vector (0 downto 0);
542 EN : in std_ulogic;
571 EN : in std_ulogic;
543 SSR : in std_ulogic;
572 SSR : in std_ulogic;
544 WE : in std_ulogic
573 WE : in std_ulogic
545 );
574 );
546 end component;
575 end component;
547
576
548 component RAMB16_S18
577 component RAMB16_S18
549 -- pragma translate_off
578 -- pragma translate_off
550 generic
579 generic
551 (
580 (
552 INIT : bit_vector := X"00000";
581 INIT : bit_vector := X"00000";
553 SRVAL : bit_vector := X"00000";
582 SRVAL : bit_vector := X"00000";
554 write_mode : string := "WRITE_FIRST";
583 write_mode : string := "WRITE_FIRST";
555 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
584 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
556 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
585 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
557 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
586 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
558 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
587 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
559 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
588 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
560 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
589 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
561 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
590 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
562 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
591 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
563 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
592 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
564 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
593 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
565 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
594 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
566 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
595 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
567 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
596 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
568 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
597 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
569 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
598 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
570 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
599 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
571 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
600 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
572 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
601 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
573 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
602 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
574 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
603 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
575 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
604 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
576 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
605 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
577 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
606 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
578 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
607 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
579 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
608 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
580 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
609 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
581 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
610 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
582 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
611 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
583 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
612 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
584 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
613 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
585 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
614 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
586 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
615 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
587 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
616 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
588 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
617 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
589 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
618 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
590 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
619 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
591 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
620 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
592 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
621 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
593 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
622 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
594 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
623 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
595 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
624 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
596 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
625 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
597 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
626 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
598 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
627 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
599 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
628 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
600 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
629 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
601 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
630 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
602 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
631 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
603 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
632 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
604 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
633 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
605 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
634 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
606 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
635 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
607 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
636 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
608 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
637 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
609 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
638 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
610 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
639 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
611 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
640 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
612 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
641 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
613 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
642 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
614 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
643 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
615 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
644 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
616 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
645 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
617 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
646 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
618 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
647 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
619 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
648 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
620 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
649 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
621 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
650 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
622 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
651 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
623 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
652 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
624 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
653 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
625 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
654 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
626 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
655 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
627 );
656 );
628 -- pragma translate_on
657 -- pragma translate_on
629 port (
658 port (
630 DO : out std_logic_vector (15 downto 0);
659 DO : out std_logic_vector (15 downto 0);
631 DOP : out std_logic_vector (1 downto 0);
660 DOP : out std_logic_vector (1 downto 0);
632 ADDR : in std_logic_vector (9 downto 0);
661 ADDR : in std_logic_vector (9 downto 0);
633 CLK : in std_ulogic;
662 CLK : in std_ulogic;
634 DI : in std_logic_vector (15 downto 0);
663 DI : in std_logic_vector (15 downto 0);
635 DIP : in std_logic_vector (1 downto 0);
664 DIP : in std_logic_vector (1 downto 0);
636 EN : in std_ulogic;
665 EN : in std_ulogic;
637 SSR : in std_ulogic;
666 SSR : in std_ulogic;
638 WE : in std_ulogic
667 WE : in std_ulogic
639 );
668 );
640 end component;
669 end component;
641
670
642 component RAMB16_S36
671 component RAMB16_S36
643 -- pragma translate_off
672 -- pragma translate_off
644 generic
673 generic
645 (
674 (
646 INIT : bit_vector := X"000000000";
675 INIT : bit_vector := X"000000000";
647 SRVAL : bit_vector := X"000000000";
676 SRVAL : bit_vector := X"000000000";
648 WRITE_MODE : string := "WRITE_FIRST";
677 WRITE_MODE : string := "WRITE_FIRST";
649 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
678 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
650 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
679 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
651 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
680 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
652 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
681 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
653 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
682 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
654 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
683 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
655 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
684 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
656 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
685 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
657 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
686 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
658 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
687 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
659 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
688 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
660 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
689 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
661 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
690 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
662 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
691 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
663 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
692 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
664 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
693 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
665 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
694 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
666 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
695 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
667 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
696 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
668 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
697 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
669 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
698 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
670 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
699 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
671 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
700 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
672 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
701 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
673 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
702 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
674 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
703 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
675 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
704 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
676 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
705 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
677 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
706 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
678 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
707 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
679 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
708 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
680 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
709 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
681 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
710 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
682 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
711 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
683 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
712 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
684 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
713 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
685 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
714 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
686 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
715 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
687 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
716 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
688 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
717 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
689 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
718 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
690 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
719 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
691 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
720 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
692 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
721 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
693 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
722 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
694 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
723 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
695 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
724 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
696 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
725 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
697 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
726 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
698 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
727 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
699 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
728 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
700 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
729 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
701 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
730 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
702 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
731 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
703 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
732 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
704 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
733 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
705 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
734 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
706 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
735 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
707 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
736 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
708 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
737 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
709 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
738 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
710 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
739 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
711 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
740 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
712 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
741 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
713 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
742 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
714 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
743 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
715 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
744 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
716 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
745 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
717 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
746 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
718 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
747 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
719 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
748 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
720 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
749 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
721 );
750 );
722 -- pragma translate_on
751 -- pragma translate_on
723 port (
752 port (
724 DO : out std_logic_vector (31 downto 0);
753 DO : out std_logic_vector (31 downto 0);
725 DOP : out std_logic_vector (3 downto 0);
754 DOP : out std_logic_vector (3 downto 0);
726 ADDR : in std_logic_vector (8 downto 0);
755 ADDR : in std_logic_vector (8 downto 0);
727 CLK : in std_ulogic;
756 CLK : in std_ulogic;
728 DI : in std_logic_vector (31 downto 0);
757 DI : in std_logic_vector (31 downto 0);
729 DIP : in std_logic_vector (3 downto 0);
758 DIP : in std_logic_vector (3 downto 0);
730 EN : in std_ulogic;
759 EN : in std_ulogic;
731 SSR : in std_ulogic;
760 SSR : in std_ulogic;
732 WE : in std_ulogic
761 WE : in std_ulogic
733 );
762 );
734 end component;
763 end component;
735
764
736 component RAMB16_S4_S4
765 component RAMB16_S4_S4
737 -- pragma translate_off
766 -- pragma translate_off
738 generic
767 generic
739 (
768 (
740 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
769 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
741 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
770 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
742 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
771 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
743 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
772 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
744 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
773 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
745 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
774 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
746 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
775 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
747 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
776 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
748 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
777 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
749 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
778 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
750 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
779 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
751 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
780 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
752 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
781 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
753 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
782 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
754 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
783 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
755 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
784 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
756 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
785 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
757 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
786 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
758 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
787 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
759 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
788 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
760 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
789 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
761 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
790 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
762 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
791 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
763 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
792 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
764 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
793 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
765 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
794 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
766 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
795 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
767 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
796 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
768 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
797 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
769 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
798 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
770 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
799 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
771 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
800 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
772 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
801 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
773 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
802 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
774 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
803 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
775 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
804 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
776 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
805 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
777 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
806 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
778 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
807 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
779 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
808 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
780 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
809 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
781 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
810 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
782 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
811 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
783 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
812 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
784 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
813 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
785 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
814 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
786 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
815 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
787 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
816 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
788 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
817 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
789 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
818 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
790 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
819 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
791 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
820 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
792 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
821 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
793 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
822 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
794 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
823 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
795 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
824 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
796 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
825 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
797 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
826 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
798 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
827 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
799 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
828 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
800 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
829 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
801 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
830 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
802 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
831 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
803 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
832 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
804 INIT_A : bit_vector := X"0";
833 INIT_A : bit_vector := X"0";
805 INIT_B : bit_vector := X"0";
834 INIT_B : bit_vector := X"0";
806 SIM_COLLISION_CHECK : string := "ALL";
835 SIM_COLLISION_CHECK : string := "ALL";
807 SRVAL_A : bit_vector := X"0";
836 SRVAL_A : bit_vector := X"0";
808 SRVAL_B : bit_vector := X"0";
837 SRVAL_B : bit_vector := X"0";
809 WRITE_MODE_A : string := "WRITE_FIRST";
838 WRITE_MODE_A : string := "WRITE_FIRST";
810 WRITE_MODE_B : string := "WRITE_FIRST"
839 WRITE_MODE_B : string := "WRITE_FIRST"
811 );
840 );
812 -- pragma translate_on
841 -- pragma translate_on
813 port (
842 port (
814 DOA : out std_logic_vector (3 downto 0);
843 DOA : out std_logic_vector (3 downto 0);
815 DOB : out std_logic_vector (3 downto 0);
844 DOB : out std_logic_vector (3 downto 0);
816 ADDRA : in std_logic_vector (11 downto 0);
845 ADDRA : in std_logic_vector (11 downto 0);
817 ADDRB : in std_logic_vector (11 downto 0);
846 ADDRB : in std_logic_vector (11 downto 0);
818 CLKA : in std_ulogic;
847 CLKA : in std_ulogic;
819 CLKB : in std_ulogic;
848 CLKB : in std_ulogic;
820 DIA : in std_logic_vector (3 downto 0);
849 DIA : in std_logic_vector (3 downto 0);
821 DIB : in std_logic_vector (3 downto 0);
850 DIB : in std_logic_vector (3 downto 0);
822 ENA : in std_ulogic;
851 ENA : in std_ulogic;
823 ENB : in std_ulogic;
852 ENB : in std_ulogic;
824 SSRA : in std_ulogic;
853 SSRA : in std_ulogic;
825 SSRB : in std_ulogic;
854 SSRB : in std_ulogic;
826 WEA : in std_ulogic;
855 WEA : in std_ulogic;
827 WEB : in std_ulogic
856 WEB : in std_ulogic
828 );
857 );
829 end component;
858 end component;
830
859
831 component RAMB16_S1_S1
860 component RAMB16_S1_S1
832 -- pragma translate_off
861 -- pragma translate_off
833 generic
862 generic
834 (
863 (
835 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
864 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
836 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
865 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
837 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
866 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
838 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
867 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
839 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
868 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
840 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
869 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
841 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
870 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
842 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
871 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
843 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
872 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
844 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
873 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
845 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
874 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
846 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
875 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
847 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
876 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
848 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
877 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
849 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
878 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
850 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
879 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
851 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
880 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
852 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
881 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
853 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
882 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
854 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
883 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
855 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
884 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
856 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
885 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
857 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
886 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
858 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
887 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
859 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
888 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
860 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
889 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
861 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
890 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
862 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
891 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
863 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
892 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
864 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
893 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
865 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
894 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
866 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
895 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
867 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
896 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
868 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
897 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
869 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
898 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
870 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
899 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
871 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
900 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
872 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
901 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
873 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
902 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
874 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
903 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
875 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
904 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
876 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
905 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
877 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
906 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
878 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
907 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
879 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
908 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
880 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
909 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
881 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
910 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
882 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
911 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
883 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
912 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
884 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
913 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
885 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
914 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
886 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
915 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
887 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
916 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
888 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
917 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
889 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
918 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
890 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
919 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
891 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
920 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
892 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
921 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
893 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
922 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
894 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
923 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
895 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
924 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
896 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
925 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
897 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
926 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
898 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
927 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
899 INIT_A : bit_vector := X"0";
928 INIT_A : bit_vector := X"0";
900 INIT_B : bit_vector := X"0";
929 INIT_B : bit_vector := X"0";
901 SIM_COLLISION_CHECK : string := "ALL";
930 SIM_COLLISION_CHECK : string := "ALL";
902 SRVAL_A : bit_vector := X"0";
931 SRVAL_A : bit_vector := X"0";
903 SRVAL_B : bit_vector := X"0";
932 SRVAL_B : bit_vector := X"0";
904 WRITE_MODE_A : string := "WRITE_FIRST";
933 WRITE_MODE_A : string := "WRITE_FIRST";
905 WRITE_MODE_B : string := "WRITE_FIRST"
934 WRITE_MODE_B : string := "WRITE_FIRST"
906 );
935 );
907 -- pragma translate_on
936 -- pragma translate_on
908 port (
937 port (
909 DOA : out std_logic_vector (0 downto 0);
938 DOA : out std_logic_vector (0 downto 0);
910 DOB : out std_logic_vector (0 downto 0);
939 DOB : out std_logic_vector (0 downto 0);
911 ADDRA : in std_logic_vector (13 downto 0);
940 ADDRA : in std_logic_vector (13 downto 0);
912 ADDRB : in std_logic_vector (13 downto 0);
941 ADDRB : in std_logic_vector (13 downto 0);
913 CLKA : in std_ulogic;
942 CLKA : in std_ulogic;
914 CLKB : in std_ulogic;
943 CLKB : in std_ulogic;
915 DIA : in std_logic_vector (0 downto 0);
944 DIA : in std_logic_vector (0 downto 0);
916 DIB : in std_logic_vector (0 downto 0);
945 DIB : in std_logic_vector (0 downto 0);
917 ENA : in std_ulogic;
946 ENA : in std_ulogic;
918 ENB : in std_ulogic;
947 ENB : in std_ulogic;
919 SSRA : in std_ulogic;
948 SSRA : in std_ulogic;
920 SSRB : in std_ulogic;
949 SSRB : in std_ulogic;
921 WEA : in std_ulogic;
950 WEA : in std_ulogic;
922 WEB : in std_ulogic
951 WEB : in std_ulogic
923 );
952 );
924 end component;
953 end component;
925
954
926 component RAMB16_S2_S2
955 component RAMB16_S2_S2
927 -- pragma translate_off
956 -- pragma translate_off
928 generic
957 generic
929 (
958 (
930 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
959 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
931 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
960 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
932 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
961 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
933 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
962 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
934 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
963 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
935 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
964 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
936 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
965 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
937 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
966 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
938 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
967 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
939 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
968 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
940 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
969 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
941 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
970 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
942 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
971 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
943 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
972 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
944 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
973 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
945 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
974 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
946 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
975 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
947 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
976 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
948 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
977 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
949 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
978 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
950 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
979 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
951 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
980 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
952 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
981 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
953 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
982 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
954 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
983 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
955 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
984 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
956 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
985 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
957 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
986 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
958 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
987 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
959 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
988 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
960 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
989 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
961 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
990 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
962 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
991 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
963 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
992 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
964 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
993 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
965 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
994 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
966 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
995 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
967 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
996 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
968 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
997 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
969 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
998 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
970 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
999 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
971 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1000 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
972 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1001 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
973 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1002 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
974 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1003 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
975 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1004 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
976 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1005 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
977 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1006 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
978 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1007 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
979 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1008 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
980 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1009 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
981 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1010 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
982 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1011 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
983 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1012 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
984 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1013 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
985 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1014 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
986 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1015 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
987 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1016 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
988 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1017 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
989 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1018 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
990 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1019 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
991 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1020 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
992 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1021 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
993 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1022 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
994 INIT_A : bit_vector := X"0";
1023 INIT_A : bit_vector := X"0";
995 INIT_B : bit_vector := X"0";
1024 INIT_B : bit_vector := X"0";
996 SIM_COLLISION_CHECK : string := "ALL";
1025 SIM_COLLISION_CHECK : string := "ALL";
997 SRVAL_A : bit_vector := X"0";
1026 SRVAL_A : bit_vector := X"0";
998 SRVAL_B : bit_vector := X"0";
1027 SRVAL_B : bit_vector := X"0";
999 WRITE_MODE_A : string := "WRITE_FIRST";
1028 WRITE_MODE_A : string := "WRITE_FIRST";
1000 WRITE_MODE_B : string := "WRITE_FIRST"
1029 WRITE_MODE_B : string := "WRITE_FIRST"
1001 );
1030 );
1002 -- pragma translate_on
1031 -- pragma translate_on
1003 port (
1032 port (
1004 DOA : out std_logic_vector (1 downto 0);
1033 DOA : out std_logic_vector (1 downto 0);
1005 DOB : out std_logic_vector (1 downto 0);
1034 DOB : out std_logic_vector (1 downto 0);
1006 ADDRA : in std_logic_vector (12 downto 0);
1035 ADDRA : in std_logic_vector (12 downto 0);
1007 ADDRB : in std_logic_vector (12 downto 0);
1036 ADDRB : in std_logic_vector (12 downto 0);
1008 CLKA : in std_ulogic;
1037 CLKA : in std_ulogic;
1009 CLKB : in std_ulogic;
1038 CLKB : in std_ulogic;
1010 DIA : in std_logic_vector (1 downto 0);
1039 DIA : in std_logic_vector (1 downto 0);
1011 DIB : in std_logic_vector (1 downto 0);
1040 DIB : in std_logic_vector (1 downto 0);
1012 ENA : in std_ulogic;
1041 ENA : in std_ulogic;
1013 ENB : in std_ulogic;
1042 ENB : in std_ulogic;
1014 SSRA : in std_ulogic;
1043 SSRA : in std_ulogic;
1015 SSRB : in std_ulogic;
1044 SSRB : in std_ulogic;
1016 WEA : in std_ulogic;
1045 WEA : in std_ulogic;
1017 WEB : in std_ulogic
1046 WEB : in std_ulogic
1018 );
1047 );
1019 end component;
1048 end component;
1020
1049
1021 component RAMB16_S9_S9
1050 component RAMB16_S9_S9
1022 -- pragma translate_off
1051 -- pragma translate_off
1023 generic
1052 generic
1024 (
1053 (
1025 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1054 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1026 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1055 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1027 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1056 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1028 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1057 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1029 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1058 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1030 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1059 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1031 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1060 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1032 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1061 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1033 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1062 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1034 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1063 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1035 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1064 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1036 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1065 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1037 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1066 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1038 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1067 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1039 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1068 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1040 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1069 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1041 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1070 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1042 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1071 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1043 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1072 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1044 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1073 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1045 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1074 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1046 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1075 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1047 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1076 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1048 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1077 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1049 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1078 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1050 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1079 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1051 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1080 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1052 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1081 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1053 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1082 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1054 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1083 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1055 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1084 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1056 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1085 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1057 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1086 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1058 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1087 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1059 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1088 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1060 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1089 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1061 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1090 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1062 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1091 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1063 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1092 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1064 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1093 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1065 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1094 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1066 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1095 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1067 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1096 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1068 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1097 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1069 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1098 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1070 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1099 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1071 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1100 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1072 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1101 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1073 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1102 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1074 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1103 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1075 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1104 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1076 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1105 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1077 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1106 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1078 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1107 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1079 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1108 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1080 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1109 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1081 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1110 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1082 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1111 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1083 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1112 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1084 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1113 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1085 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1114 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1086 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1115 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1087 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1116 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1088 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1117 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1089 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1118 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1090 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1119 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1091 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1120 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1092 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1121 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1093 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1122 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1094 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1123 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1095 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1124 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1096 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1125 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1097 INIT_A : bit_vector := X"000";
1126 INIT_A : bit_vector := X"000";
1098 INIT_B : bit_vector := X"000";
1127 INIT_B : bit_vector := X"000";
1099 SIM_COLLISION_CHECK : string := "ALL";
1128 SIM_COLLISION_CHECK : string := "ALL";
1100 SRVAL_A : bit_vector := X"000";
1129 SRVAL_A : bit_vector := X"000";
1101 SRVAL_B : bit_vector := X"000";
1130 SRVAL_B : bit_vector := X"000";
1102 WRITE_MODE_A : string := "WRITE_FIRST";
1131 WRITE_MODE_A : string := "WRITE_FIRST";
1103 WRITE_MODE_B : string := "WRITE_FIRST"
1132 WRITE_MODE_B : string := "WRITE_FIRST"
1104 );
1133 );
1105 -- pragma translate_on
1134 -- pragma translate_on
1106 port (
1135 port (
1107 DOA : out std_logic_vector (7 downto 0);
1136 DOA : out std_logic_vector (7 downto 0);
1108 DOB : out std_logic_vector (7 downto 0);
1137 DOB : out std_logic_vector (7 downto 0);
1109 DOPA : out std_logic_vector (0 downto 0);
1138 DOPA : out std_logic_vector (0 downto 0);
1110 DOPB : out std_logic_vector (0 downto 0);
1139 DOPB : out std_logic_vector (0 downto 0);
1111 ADDRA : in std_logic_vector (10 downto 0);
1140 ADDRA : in std_logic_vector (10 downto 0);
1112 ADDRB : in std_logic_vector (10 downto 0);
1141 ADDRB : in std_logic_vector (10 downto 0);
1113 CLKA : in std_ulogic;
1142 CLKA : in std_ulogic;
1114 CLKB : in std_ulogic;
1143 CLKB : in std_ulogic;
1115 DIA : in std_logic_vector (7 downto 0);
1144 DIA : in std_logic_vector (7 downto 0);
1116 DIB : in std_logic_vector (7 downto 0);
1145 DIB : in std_logic_vector (7 downto 0);
1117 DIPA : in std_logic_vector (0 downto 0);
1146 DIPA : in std_logic_vector (0 downto 0);
1118 DIPB : in std_logic_vector (0 downto 0);
1147 DIPB : in std_logic_vector (0 downto 0);
1119 ENA : in std_ulogic;
1148 ENA : in std_ulogic;
1120 ENB : in std_ulogic;
1149 ENB : in std_ulogic;
1121 SSRA : in std_ulogic;
1150 SSRA : in std_ulogic;
1122 SSRB : in std_ulogic;
1151 SSRB : in std_ulogic;
1123 WEA : in std_ulogic;
1152 WEA : in std_ulogic;
1124 WEB : in std_ulogic
1153 WEB : in std_ulogic
1125 );
1154 );
1126 end component;
1155 end component;
1127
1156
1128 component RAMB16_S18_S18
1157 component RAMB16_S18_S18
1129 -- pragma translate_off
1158 -- pragma translate_off
1130 generic
1159 generic
1131 (
1160 (
1132 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1161 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1133 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1162 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1134 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1163 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1135 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1164 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1136 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1165 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1137 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1166 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1138 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1167 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1139 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1168 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1140 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1169 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1141 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1170 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1142 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1171 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1143 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1172 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1144 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1173 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1145 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1174 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1146 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1175 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1147 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1176 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1148 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1177 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1149 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1178 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1150 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1179 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1151 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1180 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1152 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1181 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1153 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1182 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1154 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1183 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1155 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1184 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1156 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1185 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1157 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1186 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1158 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1187 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1159 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1188 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1160 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1189 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1161 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1190 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1162 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1191 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1163 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1192 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1164 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1193 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1165 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1194 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1166 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1195 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1167 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1196 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1168 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1197 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1169 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1198 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1170 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1199 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1171 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1200 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1172 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1201 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1173 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1202 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1174 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1203 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1175 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1204 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1176 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1205 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1177 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1206 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1178 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1207 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1179 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1208 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1180 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1209 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1181 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1210 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1182 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1211 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1183 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1212 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1184 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1213 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1185 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1214 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1186 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1215 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1187 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1216 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1188 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1217 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1189 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1218 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1190 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1219 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1191 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1220 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1192 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1221 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1193 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1222 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1194 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1223 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1195 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1224 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1196 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1225 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1197 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1226 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1198 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1227 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1199 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1228 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1200 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1229 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1201 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1230 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1202 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1231 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1203 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1232 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1204 INIT_A : bit_vector := X"00000";
1233 INIT_A : bit_vector := X"00000";
1205 INIT_B : bit_vector := X"00000";
1234 INIT_B : bit_vector := X"00000";
1206 SIM_COLLISION_CHECK : string := "ALL";
1235 SIM_COLLISION_CHECK : string := "ALL";
1207 SRVAL_A : bit_vector := X"00000";
1236 SRVAL_A : bit_vector := X"00000";
1208 SRVAL_B : bit_vector := X"00000";
1237 SRVAL_B : bit_vector := X"00000";
1209 WRITE_MODE_A : string := "WRITE_FIRST";
1238 WRITE_MODE_A : string := "WRITE_FIRST";
1210 WRITE_MODE_B : string := "WRITE_FIRST"
1239 WRITE_MODE_B : string := "WRITE_FIRST"
1211 );
1240 );
1212 -- pragma translate_on
1241 -- pragma translate_on
1213 port (
1242 port (
1214 DOA : out std_logic_vector (15 downto 0);
1243 DOA : out std_logic_vector (15 downto 0);
1215 DOB : out std_logic_vector (15 downto 0);
1244 DOB : out std_logic_vector (15 downto 0);
1216 DOPA : out std_logic_vector (1 downto 0);
1245 DOPA : out std_logic_vector (1 downto 0);
1217 DOPB : out std_logic_vector (1 downto 0);
1246 DOPB : out std_logic_vector (1 downto 0);
1218 ADDRA : in std_logic_vector (9 downto 0);
1247 ADDRA : in std_logic_vector (9 downto 0);
1219 ADDRB : in std_logic_vector (9 downto 0);
1248 ADDRB : in std_logic_vector (9 downto 0);
1220 CLKA : in std_ulogic;
1249 CLKA : in std_ulogic;
1221 CLKB : in std_ulogic;
1250 CLKB : in std_ulogic;
1222 DIA : in std_logic_vector (15 downto 0);
1251 DIA : in std_logic_vector (15 downto 0);
1223 DIB : in std_logic_vector (15 downto 0);
1252 DIB : in std_logic_vector (15 downto 0);
1224 DIPA : in std_logic_vector (1 downto 0);
1253 DIPA : in std_logic_vector (1 downto 0);
1225 DIPB : in std_logic_vector (1 downto 0);
1254 DIPB : in std_logic_vector (1 downto 0);
1226 ENA : in std_ulogic;
1255 ENA : in std_ulogic;
1227 ENB : in std_ulogic;
1256 ENB : in std_ulogic;
1228 SSRA : in std_ulogic;
1257 SSRA : in std_ulogic;
1229 SSRB : in std_ulogic;
1258 SSRB : in std_ulogic;
1230 WEA : in std_ulogic;
1259 WEA : in std_ulogic;
1231 WEB : in std_ulogic);
1260 WEB : in std_ulogic);
1232 end component;
1261 end component;
1233
1262
1234 component RAMB16_S36_S36
1263 component RAMB16_S36_S36
1235 -- pragma translate_off
1264 -- pragma translate_off
1236 generic
1265 generic
1237 (
1266 (
1238 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1267 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1239 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1268 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1240 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1269 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1241 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1270 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1242 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1271 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1243 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1272 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1244 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1273 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1245 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1274 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1246 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1275 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1247 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1276 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1248 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1277 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1249 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1278 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1250 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1279 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1251 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1280 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1252 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1281 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1253 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1282 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1254 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1283 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1255 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1284 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1256 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1285 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1257 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1286 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1258 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1287 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1259 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1288 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1260 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1289 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1261 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1290 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1262 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1291 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1263 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1292 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1264 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1293 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1265 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1294 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1266 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1295 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1267 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1296 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1268 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1297 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1269 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1298 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1270 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1299 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1271 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1300 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1272 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1301 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1273 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1302 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1274 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1303 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1275 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1304 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1276 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1305 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1277 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1306 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1278 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1307 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1279 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1308 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1280 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1309 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1281 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1310 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1282 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1311 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1283 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1312 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1284 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1313 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1285 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1314 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1286 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1315 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1287 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1316 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1288 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1317 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1289 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1318 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1290 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1319 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1291 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1320 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1292 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1321 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1293 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1322 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1294 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1323 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1295 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1324 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1296 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1325 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1297 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1326 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1298 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1327 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1299 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1328 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1300 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1329 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1301 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1330 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1302 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1331 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1303 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1332 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1304 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1333 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1305 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1334 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1306 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1335 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1307 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1336 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1308 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1337 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1309 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1338 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1310 INIT_A : bit_vector := X"000000000";
1339 INIT_A : bit_vector := X"000000000";
1311 INIT_B : bit_vector := X"000000000";
1340 INIT_B : bit_vector := X"000000000";
1312 SIM_COLLISION_CHECK : string := "ALL";
1341 SIM_COLLISION_CHECK : string := "ALL";
1313 SRVAL_A : bit_vector := X"000000000";
1342 SRVAL_A : bit_vector := X"000000000";
1314 SRVAL_B : bit_vector := X"000000000";
1343 SRVAL_B : bit_vector := X"000000000";
1315 WRITE_MODE_A : string := "WRITE_FIRST";
1344 WRITE_MODE_A : string := "WRITE_FIRST";
1316 WRITE_MODE_B : string := "WRITE_FIRST"
1345 WRITE_MODE_B : string := "WRITE_FIRST"
1317 );
1346 );
1318 -- pragma translate_on
1347 -- pragma translate_on
1319 port (
1348 port (
1320 DOA : out std_logic_vector (31 downto 0);
1349 DOA : out std_logic_vector (31 downto 0);
1321 DOB : out std_logic_vector (31 downto 0);
1350 DOB : out std_logic_vector (31 downto 0);
1322 DOPA : out std_logic_vector (3 downto 0);
1351 DOPA : out std_logic_vector (3 downto 0);
1323 DOPB : out std_logic_vector (3 downto 0);
1352 DOPB : out std_logic_vector (3 downto 0);
1324 ADDRA : in std_logic_vector (8 downto 0);
1353 ADDRA : in std_logic_vector (8 downto 0);
1325 ADDRB : in std_logic_vector (8 downto 0);
1354 ADDRB : in std_logic_vector (8 downto 0);
1326 CLKA : in std_ulogic;
1355 CLKA : in std_ulogic;
1327 CLKB : in std_ulogic;
1356 CLKB : in std_ulogic;
1328 DIA : in std_logic_vector (31 downto 0);
1357 DIA : in std_logic_vector (31 downto 0);
1329 DIB : in std_logic_vector (31 downto 0);
1358 DIB : in std_logic_vector (31 downto 0);
1330 DIPA : in std_logic_vector (3 downto 0);
1359 DIPA : in std_logic_vector (3 downto 0);
1331 DIPB : in std_logic_vector (3 downto 0);
1360 DIPB : in std_logic_vector (3 downto 0);
1332 ENA : in std_ulogic;
1361 ENA : in std_ulogic;
1333 ENB : in std_ulogic;
1362 ENB : in std_ulogic;
1334 SSRA : in std_ulogic;
1363 SSRA : in std_ulogic;
1335 SSRB : in std_ulogic;
1364 SSRB : in std_ulogic;
1336 WEA : in std_ulogic;
1365 WEA : in std_ulogic;
1337 WEB : in std_ulogic);
1366 WEB : in std_ulogic);
1338 end component;
1367 end component;
1339
1368
1340 component DCM
1369 component DCM
1341 generic (
1370 generic (
1342 CLKDV_DIVIDE : real := 2.0;
1371 CLKDV_DIVIDE : real := 2.0;
1343 CLKFX_DIVIDE : integer := 1;
1372 CLKFX_DIVIDE : integer := 1;
1344 CLKFX_MULTIPLY : integer := 4;
1373 CLKFX_MULTIPLY : integer := 4;
1345 CLKIN_DIVIDE_BY_2 : boolean := false;
1374 CLKIN_DIVIDE_BY_2 : boolean := false;
1346 CLKIN_PERIOD : real := 10.0;
1375 CLKIN_PERIOD : real := 10.0;
1347 CLKOUT_PHASE_SHIFT : string := "NONE";
1376 CLKOUT_PHASE_SHIFT : string := "NONE";
1348 CLK_FEEDBACK : string := "1X";
1377 CLK_FEEDBACK : string := "1X";
1349 DESKEW_ADJUST : string := "SYSTEM_SYNCHRONOUS";
1378 DESKEW_ADJUST : string := "SYSTEM_SYNCHRONOUS";
1350 DFS_FREQUENCY_MODE : string := "LOW";
1379 DFS_FREQUENCY_MODE : string := "LOW";
1351 DLL_FREQUENCY_MODE : string := "LOW";
1380 DLL_FREQUENCY_MODE : string := "LOW";
1352 DSS_MODE : string := "NONE";
1381 DSS_MODE : string := "NONE";
1353 DUTY_CYCLE_CORRECTION : boolean := true;
1382 DUTY_CYCLE_CORRECTION : boolean := true;
1354 FACTORY_JF : bit_vector := X"C080";
1383 FACTORY_JF : bit_vector := X"C080";
1355 PHASE_SHIFT : integer := 0;
1384 PHASE_SHIFT : integer := 0;
1356 STARTUP_WAIT : boolean := false
1385 STARTUP_WAIT : boolean := false
1357 );
1386 );
1358 port (
1387 port (
1359 CLKFB : in std_logic;
1388 CLKFB : in std_logic;
1360 CLKIN : in std_logic;
1389 CLKIN : in std_logic;
1361 DSSEN : in std_logic;
1390 DSSEN : in std_logic;
1362 PSCLK : in std_logic;
1391 PSCLK : in std_logic;
1363 PSEN : in std_logic;
1392 PSEN : in std_logic;
1364 PSINCDEC : in std_logic;
1393 PSINCDEC : in std_logic;
1365 RST : in std_logic;
1394 RST : in std_logic;
1366 CLK0 : out std_logic;
1395 CLK0 : out std_logic;
1367 CLK90 : out std_logic;
1396 CLK90 : out std_logic;
1368 CLK180 : out std_logic;
1397 CLK180 : out std_logic;
1369 CLK270 : out std_logic;
1398 CLK270 : out std_logic;
1370 CLK2X : out std_logic;
1399 CLK2X : out std_logic;
1371 CLK2X180 : out std_logic;
1400 CLK2X180 : out std_logic;
1372 CLKDV : out std_logic;
1401 CLKDV : out std_logic;
1373 CLKFX : out std_logic;
1402 CLKFX : out std_logic;
1374 CLKFX180 : out std_logic;
1403 CLKFX180 : out std_logic;
1375 LOCKED : out std_logic;
1404 LOCKED : out std_logic;
1376 PSDONE : out std_logic;
1405 PSDONE : out std_logic;
1377 STATUS : out std_logic_vector (7 downto 0));
1406 STATUS : out std_logic_vector (7 downto 0));
1378 end component;
1407 end component;
1379
1408
1380 component DCM_SP
1409 component DCM_SP
1381 generic (
1410 generic (
1382 TimingChecksOn : boolean := true;
1411 TimingChecksOn : boolean := true;
1383 InstancePath : string := "*";
1412 InstancePath : string := "*";
1384 Xon : boolean := true;
1413 Xon : boolean := true;
1385 MsgOn : boolean := false;
1414 MsgOn : boolean := false;
1386 CLKDV_DIVIDE : real := 2.0;
1415 CLKDV_DIVIDE : real := 2.0;
1387 CLKFX_DIVIDE : integer := 1;
1416 CLKFX_DIVIDE : integer := 1;
1388 CLKFX_MULTIPLY : integer := 4;
1417 CLKFX_MULTIPLY : integer := 4;
1389 CLKIN_DIVIDE_BY_2 : boolean := false;
1418 CLKIN_DIVIDE_BY_2 : boolean := false;
1390 CLKIN_PERIOD : real := 10.0; --non-simulatable
1419 CLKIN_PERIOD : real := 10.0; --non-simulatable
1391 CLKOUT_PHASE_SHIFT : string := "NONE";
1420 CLKOUT_PHASE_SHIFT : string := "NONE";
1392 CLK_FEEDBACK : string := "1X";
1421 CLK_FEEDBACK : string := "1X";
1393 DESKEW_ADJUST : string := "SYSTEM_SYNCHRONOUS"; --non-simulatable
1422 DESKEW_ADJUST : string := "SYSTEM_SYNCHRONOUS"; --non-simulatable
1394 DFS_FREQUENCY_MODE : string := "LOW";
1423 DFS_FREQUENCY_MODE : string := "LOW";
1395 DLL_FREQUENCY_MODE : string := "LOW";
1424 DLL_FREQUENCY_MODE : string := "LOW";
1396 DSS_MODE : string := "NONE"; --non-simulatable
1425 DSS_MODE : string := "NONE"; --non-simulatable
1397 DUTY_CYCLE_CORRECTION : boolean := true;
1426 DUTY_CYCLE_CORRECTION : boolean := true;
1398 FACTORY_JF : bit_vector := X"C080"; --non-simulatable
1427 FACTORY_JF : bit_vector := X"C080"; --non-simulatable
1399 PHASE_SHIFT : integer := 0;
1428 PHASE_SHIFT : integer := 0;
1400 STARTUP_WAIT : boolean := false --non-simulatable
1429 STARTUP_WAIT : boolean := false --non-simulatable
1401 );
1430 );
1402
1431
1403 port (
1432 port (
1404 CLK0 : out std_ulogic := '0';
1433 CLK0 : out std_ulogic := '0';
1405 CLK180 : out std_ulogic := '0';
1434 CLK180 : out std_ulogic := '0';
1406 CLK270 : out std_ulogic := '0';
1435 CLK270 : out std_ulogic := '0';
1407 CLK2X : out std_ulogic := '0';
1436 CLK2X : out std_ulogic := '0';
1408 CLK2X180 : out std_ulogic := '0';
1437 CLK2X180 : out std_ulogic := '0';
1409 CLK90 : out std_ulogic := '0';
1438 CLK90 : out std_ulogic := '0';
1410 CLKDV : out std_ulogic := '0';
1439 CLKDV : out std_ulogic := '0';
1411 CLKFX : out std_ulogic := '0';
1440 CLKFX : out std_ulogic := '0';
1412 CLKFX180 : out std_ulogic := '0';
1441 CLKFX180 : out std_ulogic := '0';
1413 LOCKED : out std_ulogic := '0';
1442 LOCKED : out std_ulogic := '0';
1414 PSDONE : out std_ulogic := '0';
1443 PSDONE : out std_ulogic := '0';
1415 STATUS : out std_logic_vector(7 downto 0) := "00000000";
1444 STATUS : out std_logic_vector(7 downto 0) := "00000000";
1416
1445
1417 CLKFB : in std_ulogic := '0';
1446 CLKFB : in std_ulogic := '0';
1418 CLKIN : in std_ulogic := '0';
1447 CLKIN : in std_ulogic := '0';
1419 DSSEN : in std_ulogic := '0';
1448 DSSEN : in std_ulogic := '0';
1420 PSCLK : in std_ulogic := '0';
1449 PSCLK : in std_ulogic := '0';
1421 PSEN : in std_ulogic := '0';
1450 PSEN : in std_ulogic := '0';
1422 PSINCDEC : in std_ulogic := '0';
1451 PSINCDEC : in std_ulogic := '0';
1423 RST : in std_ulogic := '0'
1452 RST : in std_ulogic := '0'
1424 );
1453 );
1425 end component;
1454 end component;
1426
1455
1427 ----- component PLLE2_ADV -----
1456 ----- component PLLE2_ADV -----
1428 component PLLE2_ADV
1457 component PLLE2_ADV
1429 generic (
1458 generic (
1430 BANDWIDTH : string := "OPTIMIZED";
1459 BANDWIDTH : string := "OPTIMIZED";
1431 CLKFBOUT_MULT : integer := 5;
1460 CLKFBOUT_MULT : integer := 5;
1432 CLKFBOUT_PHASE : real := 0.0;
1461 CLKFBOUT_PHASE : real := 0.0;
1433 CLKIN1_PERIOD : real := 0.0;
1462 CLKIN1_PERIOD : real := 0.0;
1434 CLKIN2_PERIOD : real := 0.0;
1463 CLKIN2_PERIOD : real := 0.0;
1435 CLKOUT0_DIVIDE : integer := 1;
1464 CLKOUT0_DIVIDE : integer := 1;
1436 CLKOUT0_DUTY_CYCLE : real := 0.5;
1465 CLKOUT0_DUTY_CYCLE : real := 0.5;
1437 CLKOUT0_PHASE : real := 0.0;
1466 CLKOUT0_PHASE : real := 0.0;
1438 CLKOUT1_DIVIDE : integer := 1;
1467 CLKOUT1_DIVIDE : integer := 1;
1439 CLKOUT1_DUTY_CYCLE : real := 0.5;
1468 CLKOUT1_DUTY_CYCLE : real := 0.5;
1440 CLKOUT1_PHASE : real := 0.0;
1469 CLKOUT1_PHASE : real := 0.0;
1441 CLKOUT2_DIVIDE : integer := 1;
1470 CLKOUT2_DIVIDE : integer := 1;
1442 CLKOUT2_DUTY_CYCLE : real := 0.5;
1471 CLKOUT2_DUTY_CYCLE : real := 0.5;
1443 CLKOUT2_PHASE : real := 0.0;
1472 CLKOUT2_PHASE : real := 0.0;
1444 CLKOUT3_DIVIDE : integer := 1;
1473 CLKOUT3_DIVIDE : integer := 1;
1445 CLKOUT3_DUTY_CYCLE : real := 0.5;
1474 CLKOUT3_DUTY_CYCLE : real := 0.5;
1446 CLKOUT3_PHASE : real := 0.0;
1475 CLKOUT3_PHASE : real := 0.0;
1447 CLKOUT4_DIVIDE : integer := 1;
1476 CLKOUT4_DIVIDE : integer := 1;
1448 CLKOUT4_DUTY_CYCLE : real := 0.5;
1477 CLKOUT4_DUTY_CYCLE : real := 0.5;
1449 CLKOUT4_PHASE : real := 0.0;
1478 CLKOUT4_PHASE : real := 0.0;
1450 CLKOUT5_DIVIDE : integer := 1;
1479 CLKOUT5_DIVIDE : integer := 1;
1451 CLKOUT5_DUTY_CYCLE : real := 0.5;
1480 CLKOUT5_DUTY_CYCLE : real := 0.5;
1452 CLKOUT5_PHASE : real := 0.0;
1481 CLKOUT5_PHASE : real := 0.0;
1453 COMPENSATION : string := "ZHOLD";
1482 COMPENSATION : string := "ZHOLD";
1454 DIVCLK_DIVIDE : integer := 1;
1483 DIVCLK_DIVIDE : integer := 1;
1455 REF_JITTER1 : real := 0.0;
1484 REF_JITTER1 : real := 0.0;
1456 REF_JITTER2 : real := 0.0;
1485 REF_JITTER2 : real := 0.0;
1457 STARTUP_WAIT : string := "FALSE"
1486 STARTUP_WAIT : string := "FALSE"
1458 );
1487 );
1459 port (
1488 port (
1460 CLKFBOUT : out std_ulogic := '0';
1489 CLKFBOUT : out std_ulogic := '0';
1461 CLKOUT0 : out std_ulogic := '0';
1490 CLKOUT0 : out std_ulogic := '0';
1462 CLKOUT1 : out std_ulogic := '0';
1491 CLKOUT1 : out std_ulogic := '0';
1463 CLKOUT2 : out std_ulogic := '0';
1492 CLKOUT2 : out std_ulogic := '0';
1464 CLKOUT3 : out std_ulogic := '0';
1493 CLKOUT3 : out std_ulogic := '0';
1465 CLKOUT4 : out std_ulogic := '0';
1494 CLKOUT4 : out std_ulogic := '0';
1466 CLKOUT5 : out std_ulogic := '0';
1495 CLKOUT5 : out std_ulogic := '0';
1467 DO : out std_logic_vector (15 downto 0);
1496 DO : out std_logic_vector (15 downto 0);
1468 DRDY : out std_ulogic := '0';
1497 DRDY : out std_ulogic := '0';
1469 LOCKED : out std_ulogic := '0';
1498 LOCKED : out std_ulogic := '0';
1470 CLKFBIN : in std_ulogic;
1499 CLKFBIN : in std_ulogic;
1471 CLKIN1 : in std_ulogic;
1500 CLKIN1 : in std_ulogic;
1472 CLKIN2 : in std_ulogic;
1501 CLKIN2 : in std_ulogic;
1473 CLKINSEL : in std_ulogic;
1502 CLKINSEL : in std_ulogic;
1474 DADDR : in std_logic_vector(6 downto 0);
1503 DADDR : in std_logic_vector(6 downto 0);
1475 DCLK : in std_ulogic;
1504 DCLK : in std_ulogic;
1476 DEN : in std_ulogic;
1505 DEN : in std_ulogic;
1477 DI : in std_logic_vector(15 downto 0);
1506 DI : in std_logic_vector(15 downto 0);
1478 DWE : in std_ulogic;
1507 DWE : in std_ulogic;
1479 PWRDWN : in std_ulogic;
1508 PWRDWN : in std_ulogic;
1480 RST : in std_ulogic
1509 RST : in std_ulogic
1481 );
1510 );
1482 end component;
1511 end component;
1483
1512
1484 component PLL_ADV
1513 component PLL_ADV
1485 generic (
1514 generic (
1486 BANDWIDTH : string := "OPTIMIZED";
1515 BANDWIDTH : string := "OPTIMIZED";
1487 CLKFBOUT_DESKEW_ADJUST : string := "NONE";
1516 CLKFBOUT_DESKEW_ADJUST : string := "NONE";
1488 CLKFBOUT_MULT : integer := 1;
1517 CLKFBOUT_MULT : integer := 1;
1489 CLKFBOUT_PHASE : real := 0.0;
1518 CLKFBOUT_PHASE : real := 0.0;
1490 CLKIN1_PERIOD : real := 0.000;
1519 CLKIN1_PERIOD : real := 0.000;
1491 CLKIN2_PERIOD : real := 0.000;
1520 CLKIN2_PERIOD : real := 0.000;
1492 CLKOUT0_DESKEW_ADJUST : string := "NONE";
1521 CLKOUT0_DESKEW_ADJUST : string := "NONE";
1493 CLKOUT0_DIVIDE : integer := 1;
1522 CLKOUT0_DIVIDE : integer := 1;
1494 CLKOUT0_DUTY_CYCLE : real := 0.5;
1523 CLKOUT0_DUTY_CYCLE : real := 0.5;
1495 CLKOUT0_PHASE : real := 0.0;
1524 CLKOUT0_PHASE : real := 0.0;
1496 CLKOUT1_DESKEW_ADJUST : string := "NONE";
1525 CLKOUT1_DESKEW_ADJUST : string := "NONE";
1497 CLKOUT1_DIVIDE : integer := 1;
1526 CLKOUT1_DIVIDE : integer := 1;
1498 CLKOUT1_DUTY_CYCLE : real := 0.5;
1527 CLKOUT1_DUTY_CYCLE : real := 0.5;
1499 CLKOUT1_PHASE : real := 0.0;
1528 CLKOUT1_PHASE : real := 0.0;
1500 CLKOUT2_DESKEW_ADJUST : string := "NONE";
1529 CLKOUT2_DESKEW_ADJUST : string := "NONE";
1501 CLKOUT2_DIVIDE : integer := 1;
1530 CLKOUT2_DIVIDE : integer := 1;
1502 CLKOUT2_DUTY_CYCLE : real := 0.5;
1531 CLKOUT2_DUTY_CYCLE : real := 0.5;
1503 CLKOUT2_PHASE : real := 0.0;
1532 CLKOUT2_PHASE : real := 0.0;
1504 CLKOUT3_DESKEW_ADJUST : string := "NONE";
1533 CLKOUT3_DESKEW_ADJUST : string := "NONE";
1505 CLKOUT3_DIVIDE : integer := 1;
1534 CLKOUT3_DIVIDE : integer := 1;
1506 CLKOUT3_DUTY_CYCLE : real := 0.5;
1535 CLKOUT3_DUTY_CYCLE : real := 0.5;
1507 CLKOUT3_PHASE : real := 0.0;
1536 CLKOUT3_PHASE : real := 0.0;
1508 CLKOUT4_DESKEW_ADJUST : string := "NONE";
1537 CLKOUT4_DESKEW_ADJUST : string := "NONE";
1509 CLKOUT4_DIVIDE : integer := 1;
1538 CLKOUT4_DIVIDE : integer := 1;
1510 CLKOUT4_DUTY_CYCLE : real := 0.5;
1539 CLKOUT4_DUTY_CYCLE : real := 0.5;
1511 CLKOUT4_PHASE : real := 0.0;
1540 CLKOUT4_PHASE : real := 0.0;
1512 CLKOUT5_DESKEW_ADJUST : string := "NONE";
1541 CLKOUT5_DESKEW_ADJUST : string := "NONE";
1513 CLKOUT5_DIVIDE : integer := 1;
1542 CLKOUT5_DIVIDE : integer := 1;
1514 CLKOUT5_DUTY_CYCLE : real := 0.5;
1543 CLKOUT5_DUTY_CYCLE : real := 0.5;
1515 CLKOUT5_PHASE : real := 0.0;
1544 CLKOUT5_PHASE : real := 0.0;
1516 CLK_FEEDBACK : string := "CLKFBOUT";
1545 CLK_FEEDBACK : string := "CLKFBOUT";
1517 COMPENSATION : string := "SYSTEM_SYNCHRONOUS";
1546 COMPENSATION : string := "SYSTEM_SYNCHRONOUS";
1518 DIVCLK_DIVIDE : integer := 1;
1547 DIVCLK_DIVIDE : integer := 1;
1519 EN_REL : boolean := FALSE;
1548 EN_REL : boolean := FALSE;
1520 PLL_PMCD_MODE : boolean := FALSE;
1549 PLL_PMCD_MODE : boolean := FALSE;
1521 REF_JITTER : real := 0.100;
1550 REF_JITTER : real := 0.100;
1522 RESET_ON_LOSS_OF_LOCK : boolean := FALSE;
1551 RESET_ON_LOSS_OF_LOCK : boolean := FALSE;
1523 RST_DEASSERT_CLK : string := "CLKIN1";
1552 RST_DEASSERT_CLK : string := "CLKIN1";
1524 SIM_DEVICE : string := "VIRTEX5"
1553 SIM_DEVICE : string := "VIRTEX5"
1525 );
1554 );
1526 port (
1555 port (
1527 CLKFBDCM : out std_ulogic := '0';
1556 CLKFBDCM : out std_ulogic := '0';
1528 CLKFBOUT : out std_ulogic := '0';
1557 CLKFBOUT : out std_ulogic := '0';
1529 CLKOUT0 : out std_ulogic := '0';
1558 CLKOUT0 : out std_ulogic := '0';
1530 CLKOUT1 : out std_ulogic := '0';
1559 CLKOUT1 : out std_ulogic := '0';
1531 CLKOUT2 : out std_ulogic := '0';
1560 CLKOUT2 : out std_ulogic := '0';
1532 CLKOUT3 : out std_ulogic := '0';
1561 CLKOUT3 : out std_ulogic := '0';
1533 CLKOUT4 : out std_ulogic := '0';
1562 CLKOUT4 : out std_ulogic := '0';
1534 CLKOUT5 : out std_ulogic := '0';
1563 CLKOUT5 : out std_ulogic := '0';
1535 CLKOUTDCM0 : out std_ulogic := '0';
1564 CLKOUTDCM0 : out std_ulogic := '0';
1536 CLKOUTDCM1 : out std_ulogic := '0';
1565 CLKOUTDCM1 : out std_ulogic := '0';
1537 CLKOUTDCM2 : out std_ulogic := '0';
1566 CLKOUTDCM2 : out std_ulogic := '0';
1538 CLKOUTDCM3 : out std_ulogic := '0';
1567 CLKOUTDCM3 : out std_ulogic := '0';
1539 CLKOUTDCM4 : out std_ulogic := '0';
1568 CLKOUTDCM4 : out std_ulogic := '0';
1540 CLKOUTDCM5 : out std_ulogic := '0';
1569 CLKOUTDCM5 : out std_ulogic := '0';
1541 DO : out std_logic_vector(15 downto 0);
1570 DO : out std_logic_vector(15 downto 0);
1542 DRDY : out std_ulogic := '0';
1571 DRDY : out std_ulogic := '0';
1543 LOCKED : out std_ulogic := '0';
1572 LOCKED : out std_ulogic := '0';
1544 CLKFBIN : in std_ulogic;
1573 CLKFBIN : in std_ulogic;
1545 CLKIN1 : in std_ulogic;
1574 CLKIN1 : in std_ulogic;
1546 CLKIN2 : in std_ulogic;
1575 CLKIN2 : in std_ulogic;
1547 CLKINSEL : in std_ulogic;
1576 CLKINSEL : in std_ulogic;
1548 DADDR : in std_logic_vector(4 downto 0);
1577 DADDR : in std_logic_vector(4 downto 0);
1549 DCLK : in std_ulogic;
1578 DCLK : in std_ulogic;
1550 DEN : in std_ulogic;
1579 DEN : in std_ulogic;
1551 DI : in std_logic_vector(15 downto 0);
1580 DI : in std_logic_vector(15 downto 0);
1552 DWE : in std_ulogic;
1581 DWE : in std_ulogic;
1553 REL : in std_ulogic;
1582 REL : in std_ulogic;
1554 RST : in std_ulogic
1583 RST : in std_ulogic
1555 );
1584 );
1556 end component;
1585 end component;
1557
1586
1558 component PLL_BASE
1587 component PLL_BASE
1559 generic (
1588 generic (
1560 BANDWIDTH : string := "OPTIMIZED";
1589 BANDWIDTH : string := "OPTIMIZED";
1561 CLKFBOUT_MULT : integer := 1;
1590 CLKFBOUT_MULT : integer := 1;
1562 CLKFBOUT_PHASE : real := 0.0;
1591 CLKFBOUT_PHASE : real := 0.0;
1563 CLKIN_PERIOD : real := 0.000;
1592 CLKIN_PERIOD : real := 0.000;
1564 CLKOUT0_DIVIDE : integer := 1;
1593 CLKOUT0_DIVIDE : integer := 1;
1565 CLKOUT0_DUTY_CYCLE : real := 0.5;
1594 CLKOUT0_DUTY_CYCLE : real := 0.5;
1566 CLKOUT0_PHASE : real := 0.0;
1595 CLKOUT0_PHASE : real := 0.0;
1567 CLKOUT1_DIVIDE : integer := 1;
1596 CLKOUT1_DIVIDE : integer := 1;
1568 CLKOUT1_DUTY_CYCLE : real := 0.5;
1597 CLKOUT1_DUTY_CYCLE : real := 0.5;
1569 CLKOUT1_PHASE : real := 0.0;
1598 CLKOUT1_PHASE : real := 0.0;
1570 CLKOUT2_DIVIDE : integer := 1;
1599 CLKOUT2_DIVIDE : integer := 1;
1571 CLKOUT2_DUTY_CYCLE : real := 0.5;
1600 CLKOUT2_DUTY_CYCLE : real := 0.5;
1572 CLKOUT2_PHASE : real := 0.0;
1601 CLKOUT2_PHASE : real := 0.0;
1573 CLKOUT3_DIVIDE : integer := 1;
1602 CLKOUT3_DIVIDE : integer := 1;
1574 CLKOUT3_DUTY_CYCLE : real := 0.5;
1603 CLKOUT3_DUTY_CYCLE : real := 0.5;
1575 CLKOUT3_PHASE : real := 0.0;
1604 CLKOUT3_PHASE : real := 0.0;
1576 CLKOUT4_DIVIDE : integer := 1;
1605 CLKOUT4_DIVIDE : integer := 1;
1577 CLKOUT4_DUTY_CYCLE : real := 0.5;
1606 CLKOUT4_DUTY_CYCLE : real := 0.5;
1578 CLKOUT4_PHASE : real := 0.0;
1607 CLKOUT4_PHASE : real := 0.0;
1579 CLKOUT5_DIVIDE : integer := 1;
1608 CLKOUT5_DIVIDE : integer := 1;
1580 CLKOUT5_DUTY_CYCLE : real := 0.5;
1609 CLKOUT5_DUTY_CYCLE : real := 0.5;
1581 CLKOUT5_PHASE : real := 0.0;
1610 CLKOUT5_PHASE : real := 0.0;
1582 CLK_FEEDBACK : string := "CLKFBOUT";
1611 CLK_FEEDBACK : string := "CLKFBOUT";
1583 COMPENSATION : string := "SYSTEM_SYNCHRONOUS";
1612 COMPENSATION : string := "SYSTEM_SYNCHRONOUS";
1584 DIVCLK_DIVIDE : integer := 1;
1613 DIVCLK_DIVIDE : integer := 1;
1585 REF_JITTER : real := 0.100;
1614 REF_JITTER : real := 0.100;
1586 RESET_ON_LOSS_OF_LOCK : boolean := FALSE
1615 RESET_ON_LOSS_OF_LOCK : boolean := FALSE
1587 );
1616 );
1588 port (
1617 port (
1589 CLKFBOUT : out std_ulogic;
1618 CLKFBOUT : out std_ulogic;
1590 CLKOUT0 : out std_ulogic;
1619 CLKOUT0 : out std_ulogic;
1591 CLKOUT1 : out std_ulogic;
1620 CLKOUT1 : out std_ulogic;
1592 CLKOUT2 : out std_ulogic;
1621 CLKOUT2 : out std_ulogic;
1593 CLKOUT3 : out std_ulogic;
1622 CLKOUT3 : out std_ulogic;
1594 CLKOUT4 : out std_ulogic;
1623 CLKOUT4 : out std_ulogic;
1595 CLKOUT5 : out std_ulogic;
1624 CLKOUT5 : out std_ulogic;
1596 LOCKED : out std_ulogic;
1625 LOCKED : out std_ulogic;
1597 CLKFBIN : in std_ulogic;
1626 CLKFBIN : in std_ulogic;
1598 CLKIN : in std_ulogic;
1627 CLKIN : in std_ulogic;
1599 RST : in std_ulogic
1628 RST : in std_ulogic
1600 );
1629 );
1601 end component;
1630 end component;
1602
1631
1603 component BUFGMUX port (O : out std_logic; I0, I1, S : in std_logic); end component;
1632 component BUFGMUX port (O : out std_logic; I0, I1, S : in std_logic); end component;
1604 component BUFG port (O : out std_logic; I : in std_logic); end component;
1633 component BUFG port (O : out std_logic; I : in std_logic); end component;
1605 component BUFGP port (O : out std_logic; I : in std_logic); end component;
1634 component BUFGP port (O : out std_logic; I : in std_logic); end component;
1606 component BUFGDLL port (O : out std_logic; I : in std_logic); end component;
1635 component BUFGDLL port (O : out std_logic; I : in std_logic); end component;
1607
1636
1608 component IBUFG generic(
1637 component IBUFG generic(
1609 CAPACITANCE : string := "DONT_CARE";
1638 CAPACITANCE : string := "DONT_CARE";
1610 IBUF_LOW_PWR : boolean := TRUE;
1639 IBUF_LOW_PWR : boolean := TRUE;
1611 IOSTANDARD : string := "LVCMOS25");
1640 IOSTANDARD : string := "LVCMOS25");
1612 port (O : out std_logic; I : in std_logic); end component;
1641 port (O : out std_logic; I : in std_logic); end component;
1613 component IBUF generic(
1642 component IBUF generic(
1614 CAPACITANCE : string := "DONT_CARE"; IOSTANDARD : string := "LVCMOS25");
1643 CAPACITANCE : string := "DONT_CARE"; IOSTANDARD : string := "LVCMOS25");
1615 port (O : out std_ulogic; I : in std_ulogic); end component;
1644 port (O : out std_ulogic; I : in std_ulogic); end component;
1616 component IOBUF generic (
1645 component IOBUF generic (
1617 CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1646 CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1618 IBUF_DELAY_VALUE : string := "0"; IBUF_LOW_PWR : boolean := TRUE;
1647 IBUF_DELAY_VALUE : string := "0"; IBUF_LOW_PWR : boolean := TRUE;
1619 IFD_DELAY_VALUE : string := "AUTO";
1648 IFD_DELAY_VALUE : string := "AUTO";
1620 IOSTANDARD : string := "LVCMOS25"; SLEW : string := "SLOW");
1649 IOSTANDARD : string := "LVCMOS25"; SLEW : string := "SLOW");
1621 port (O : out std_ulogic; IO : inout std_logic; I, T : in std_ulogic); end component;
1650 port (O : out std_ulogic; IO : inout std_logic; I, T : in std_ulogic); end component;
1622 component OBUF generic (
1651 component OBUF generic (
1623 CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1652 CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1624 IOSTANDARD : string := "LVCMOS25"; SLEW : string := "SLOW");
1653 IOSTANDARD : string := "LVCMOS25"; SLEW : string := "SLOW");
1625 port (O : out std_ulogic; I : in std_ulogic); end component;
1654 port (O : out std_ulogic; I : in std_ulogic); end component;
1626 component OBUFT generic (
1655 component OBUFT generic (
1627 CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1656 CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1628 IOSTANDARD : string := "LVCMOS25"; SLEW : string := "SLOW");
1657 IOSTANDARD : string := "LVCMOS25"; SLEW : string := "SLOW");
1629 port (O : out std_ulogic; I, T : in std_ulogic); end component;
1658 port (O : out std_ulogic; I, T : in std_ulogic); end component;
1630
1659
1631 component CLKDLL
1660 component CLKDLL
1632 port (
1661 port (
1633 CLK0 : out std_ulogic;
1662 CLK0 : out std_ulogic;
1634 CLK180 : out std_ulogic;
1663 CLK180 : out std_ulogic;
1635 CLK270 : out std_ulogic;
1664 CLK270 : out std_ulogic;
1636 CLK2X : out std_ulogic;
1665 CLK2X : out std_ulogic;
1637 CLK90 : out std_ulogic;
1666 CLK90 : out std_ulogic;
1638 CLKDV : out std_ulogic;
1667 CLKDV : out std_ulogic;
1639 LOCKED : out std_ulogic;
1668 LOCKED : out std_ulogic;
1640 CLKFB : in std_ulogic;
1669 CLKFB : in std_ulogic;
1641 CLKIN : in std_ulogic;
1670 CLKIN : in std_ulogic;
1642 RST : in std_ulogic);
1671 RST : in std_ulogic);
1643 end component;
1672 end component;
1644
1673
1645 component CLKDLLHF
1674 component CLKDLLHF
1646 port (
1675 port (
1647 CLK0 : out std_ulogic := '0';
1676 CLK0 : out std_ulogic := '0';
1648 CLK180 : out std_ulogic := '0';
1677 CLK180 : out std_ulogic := '0';
1649 CLKDV : out std_ulogic := '0';
1678 CLKDV : out std_ulogic := '0';
1650 LOCKED : out std_ulogic := '0';
1679 LOCKED : out std_ulogic := '0';
1651 CLKFB : in std_ulogic := '0';
1680 CLKFB : in std_ulogic := '0';
1652 CLKIN : in std_ulogic := '0';
1681 CLKIN : in std_ulogic := '0';
1653 RST : in std_ulogic := '0');
1682 RST : in std_ulogic := '0');
1654 end component;
1683 end component;
1655
1684
1656 component BSCAN_VIRTEX
1685 component BSCAN_VIRTEX
1657 port (CAPTURE : out STD_ULOGIC;
1686 port (CAPTURE : out STD_ULOGIC;
1658 DRCK1 : out STD_ULOGIC;
1687 DRCK1 : out STD_ULOGIC;
1659 DRCK2 : out STD_ULOGIC;
1688 DRCK2 : out STD_ULOGIC;
1660 RESET : out STD_ULOGIC;
1689 RESET : out STD_ULOGIC;
1661 SEL1 : out STD_ULOGIC;
1690 SEL1 : out STD_ULOGIC;
1662 SEL2 : out STD_ULOGIC;
1691 SEL2 : out STD_ULOGIC;
1663 SHIFT : out STD_ULOGIC;
1692 SHIFT : out STD_ULOGIC;
1664 TDI : out STD_ULOGIC;
1693 TDI : out STD_ULOGIC;
1665 UPDATE : out STD_ULOGIC;
1694 UPDATE : out STD_ULOGIC;
1666 TDO1 : in STD_ULOGIC;
1695 TDO1 : in STD_ULOGIC;
1667 TDO2 : in STD_ULOGIC);
1696 TDO2 : in STD_ULOGIC);
1668 end component;
1697 end component;
1669
1698
1670 component BSCAN_VIRTEX2
1699 component BSCAN_VIRTEX2
1671 port (CAPTURE : out STD_ULOGIC;
1700 port (CAPTURE : out STD_ULOGIC;
1672 DRCK1 : out STD_ULOGIC;
1701 DRCK1 : out STD_ULOGIC;
1673 DRCK2 : out STD_ULOGIC;
1702 DRCK2 : out STD_ULOGIC;
1674 RESET : out STD_ULOGIC;
1703 RESET : out STD_ULOGIC;
1675 SEL1 : out STD_ULOGIC;
1704 SEL1 : out STD_ULOGIC;
1676 SEL2 : out STD_ULOGIC;
1705 SEL2 : out STD_ULOGIC;
1677 SHIFT : out STD_ULOGIC;
1706 SHIFT : out STD_ULOGIC;
1678 TDI : out STD_ULOGIC;
1707 TDI : out STD_ULOGIC;
1679 UPDATE : out STD_ULOGIC;
1708 UPDATE : out STD_ULOGIC;
1680 TDO1 : in STD_ULOGIC;
1709 TDO1 : in STD_ULOGIC;
1681 TDO2 : in STD_ULOGIC);
1710 TDO2 : in STD_ULOGIC);
1682 end component;
1711 end component;
1683
1712
1684 component BSCAN_SPARTAN3
1713 component BSCAN_SPARTAN3
1685 port (CAPTURE : out STD_ULOGIC;
1714 port (CAPTURE : out STD_ULOGIC;
1686 DRCK1 : out STD_ULOGIC;
1715 DRCK1 : out STD_ULOGIC;
1687 DRCK2 : out STD_ULOGIC;
1716 DRCK2 : out STD_ULOGIC;
1688 RESET : out STD_ULOGIC;
1717 RESET : out STD_ULOGIC;
1689 SEL1 : out STD_ULOGIC;
1718 SEL1 : out STD_ULOGIC;
1690 SEL2 : out STD_ULOGIC;
1719 SEL2 : out STD_ULOGIC;
1691 SHIFT : out STD_ULOGIC;
1720 SHIFT : out STD_ULOGIC;
1692 TDI : out STD_ULOGIC;
1721 TDI : out STD_ULOGIC;
1693 UPDATE : out STD_ULOGIC;
1722 UPDATE : out STD_ULOGIC;
1694 TDO1 : in STD_ULOGIC;
1723 TDO1 : in STD_ULOGIC;
1695 TDO2 : in STD_ULOGIC);
1724 TDO2 : in STD_ULOGIC);
1696 end component;
1725 end component;
1697
1726
1698 component BSCAN_VIRTEX4 generic ( JTAG_CHAIN : integer := 1);
1727 component BSCAN_VIRTEX4 generic ( JTAG_CHAIN : integer := 1);
1699 port ( CAPTURE : out std_ulogic;
1728 port ( CAPTURE : out std_ulogic;
1700 DRCK : out std_ulogic;
1729 DRCK : out std_ulogic;
1701 RESET : out std_ulogic;
1730 RESET : out std_ulogic;
1702 SEL : out std_ulogic;
1731 SEL : out std_ulogic;
1703 SHIFT : out std_ulogic;
1732 SHIFT : out std_ulogic;
1704 TDI : out std_ulogic;
1733 TDI : out std_ulogic;
1705 UPDATE : out std_ulogic;
1734 UPDATE : out std_ulogic;
1706 TDO : in std_ulogic);
1735 TDO : in std_ulogic);
1707 end component;
1736 end component;
1708
1737
1709 component BSCAN_VIRTEX5 generic ( JTAG_CHAIN : integer := 1);
1738 component BSCAN_VIRTEX5 generic ( JTAG_CHAIN : integer := 1);
1710 port ( CAPTURE : out std_ulogic;
1739 port ( CAPTURE : out std_ulogic;
1711 DRCK : out std_ulogic;
1740 DRCK : out std_ulogic;
1712 RESET : out std_ulogic;
1741 RESET : out std_ulogic;
1713 SEL : out std_ulogic;
1742 SEL : out std_ulogic;
1714 SHIFT : out std_ulogic;
1743 SHIFT : out std_ulogic;
1715 TDI : out std_ulogic;
1744 TDI : out std_ulogic;
1716 UPDATE : out std_ulogic;
1745 UPDATE : out std_ulogic;
1717 TDO : in std_ulogic);
1746 TDO : in std_ulogic);
1718 end component;
1747 end component;
1719
1748
1720 component IBUFDS
1749 component IBUFDS
1721 generic (
1750 generic (
1722 CAPACITANCE : string := "DONT_CARE";
1751 CAPACITANCE : string := "DONT_CARE";
1723 DIFF_TERM : boolean := FALSE;
1752 DIFF_TERM : boolean := FALSE;
1724 IBUF_DELAY_VALUE : string := "0";
1753 IBUF_DELAY_VALUE : string := "0";
1725 IFD_DELAY_VALUE : string := "AUTO";
1754 IFD_DELAY_VALUE : string := "AUTO";
1726 IOSTANDARD : string := "DEFAULT");
1755 IOSTANDARD : string := "DEFAULT");
1727 port (
1756 port (
1728 O : out std_ulogic;
1757 O : out std_ulogic;
1729 I : in std_ulogic;
1758 I : in std_ulogic;
1730 IB : in std_ulogic
1759 IB : in std_ulogic
1731 );
1760 );
1732 end component;
1761 end component;
1733
1762
1734
1763
1735 component IBUFDS_LVDS_25
1764 component IBUFDS_LVDS_25
1736 port ( O : out std_ulogic;
1765 port ( O : out std_ulogic;
1737 I : in std_ulogic;
1766 I : in std_ulogic;
1738 IB : in std_ulogic);
1767 IB : in std_ulogic);
1739 end component;
1768 end component;
1740
1769
1741 component IBUFGDS_LVDS_25
1770 component IBUFGDS_LVDS_25
1742 port ( O : out std_ulogic;
1771 port ( O : out std_ulogic;
1743 I : in std_ulogic;
1772 I : in std_ulogic;
1744 IB : in std_ulogic);
1773 IB : in std_ulogic);
1745 end component;
1774 end component;
1746
1775
1747 component IOBUFDS
1776 component IOBUFDS
1748 generic(
1777 generic(
1749 CAPACITANCE : string := "DONT_CARE";
1778 CAPACITANCE : string := "DONT_CARE";
1750 IBUF_DELAY_VALUE : string := "0";
1779 IBUF_DELAY_VALUE : string := "0";
1751 IFD_DELAY_VALUE : string := "AUTO";
1780 IFD_DELAY_VALUE : string := "AUTO";
1752 IOSTANDARD : string := "DEFAULT");
1781 IOSTANDARD : string := "DEFAULT");
1753 port (
1782 port (
1754 O : out std_ulogic;
1783 O : out std_ulogic;
1755 IO : inout std_ulogic;
1784 IO : inout std_ulogic;
1756 IOB : inout std_ulogic;
1785 IOB : inout std_ulogic;
1757 I : in std_ulogic;
1786 I : in std_ulogic;
1758 T : in std_ulogic
1787 T : in std_ulogic
1759 );
1788 );
1760 end component;
1789 end component;
1761
1790
1762 component OBUFDS
1791 component OBUFDS
1763 generic(
1792 generic(
1764 CAPACITANCE : string := "DONT_CARE";
1793 CAPACITANCE : string := "DONT_CARE";
1765 IOSTANDARD : string := "DEFAULT";
1794 IOSTANDARD : string := "DEFAULT";
1766 SLEW : string := "SLOW"
1795 SLEW : string := "SLOW"
1767 );
1796 );
1768 port(
1797 port(
1769 O : out std_ulogic;
1798 O : out std_ulogic;
1770 OB : out std_ulogic;
1799 OB : out std_ulogic;
1771 I : in std_ulogic
1800 I : in std_ulogic
1772 );
1801 );
1773 end component;
1802 end component;
1774
1803
1775 component OBUFDS_LVDS_25
1804 component OBUFDS_LVDS_25
1776 port ( O : out std_ulogic;
1805 port ( O : out std_ulogic;
1777 OB : out std_ulogic;
1806 OB : out std_ulogic;
1778 I : in std_ulogic);
1807 I : in std_ulogic);
1779 end component;
1808 end component;
1780
1809
1781 component OBUFTDS_LVDS_25
1810 component OBUFTDS_LVDS_25
1782 port ( O : out std_ulogic;
1811 port ( O : out std_ulogic;
1783 OB : out std_ulogic;
1812 OB : out std_ulogic;
1784 I : in std_ulogic;
1813 I : in std_ulogic;
1785 T : in std_ulogic);
1814 T : in std_ulogic);
1786 end component;
1815 end component;
1787
1816
1788 component IBUFGDS is
1817 component IBUFGDS is
1789 generic( CAPACITANCE : string := "DONT_CARE";
1818 generic( CAPACITANCE : string := "DONT_CARE";
1790 DIFF_TERM : boolean := FALSE; IBUF_DELAY_VALUE : string := "0";
1819 DIFF_TERM : boolean := FALSE; IBUF_DELAY_VALUE : string := "0";
1791 IBUF_LOW_PWR : boolean := TRUE;
1820 IBUF_LOW_PWR : boolean := TRUE;
1792 IOSTANDARD : string := "DEFAULT");
1821 IOSTANDARD : string := "DEFAULT");
1793 port (O : out std_logic; I, IB : in std_logic);
1822 port (O : out std_logic; I, IB : in std_logic);
1794 end component;
1823 end component;
1795
1824
1796 component IBUFDS_LVDS_33
1825 component IBUFDS_LVDS_33
1797 port ( O : out std_ulogic;
1826 port ( O : out std_ulogic;
1798 I : in std_ulogic;
1827 I : in std_ulogic;
1799 IB : in std_ulogic);
1828 IB : in std_ulogic);
1800 end component;
1829 end component;
1801
1830
1802 component IBUFGDS_LVDS_33
1831 component IBUFGDS_LVDS_33
1803 port ( O : out std_ulogic;
1832 port ( O : out std_ulogic;
1804 I : in std_ulogic;
1833 I : in std_ulogic;
1805 IB : in std_ulogic);
1834 IB : in std_ulogic);
1806 end component;
1835 end component;
1807
1836
1808 component OBUFDS_LVDS_33
1837 component OBUFDS_LVDS_33
1809 port ( O : out std_ulogic;
1838 port ( O : out std_ulogic;
1810 OB : out std_ulogic;
1839 OB : out std_ulogic;
1811 I : in std_ulogic);
1840 I : in std_ulogic);
1812 end component;
1841 end component;
1813
1842
1814 component OBUFTDS_LVDS_33
1843 component OBUFTDS_LVDS_33
1815 port ( O : out std_ulogic;
1844 port ( O : out std_ulogic;
1816 OB : out std_ulogic;
1845 OB : out std_ulogic;
1817 I : in std_ulogic;
1846 I : in std_ulogic;
1818 T : in std_ulogic);
1847 T : in std_ulogic);
1819 end component;
1848 end component;
1820
1849
1821 component FDCPE
1850 component FDCPE
1822 generic ( INIT : bit := '0');
1851 generic ( INIT : bit := '0');
1823 port (
1852 port (
1824 Q : out std_ulogic;
1853 Q : out std_ulogic;
1825 C : in std_ulogic;
1854 C : in std_ulogic;
1826 CE : in std_ulogic;
1855 CE : in std_ulogic;
1827 CLR : in std_ulogic;
1856 CLR : in std_ulogic;
1828 D : in std_ulogic;
1857 D : in std_ulogic;
1829 PRE : in std_ulogic);
1858 PRE : in std_ulogic);
1830 end component;
1859 end component;
1831
1860
1832 component IDDR
1861 component IDDR
1833 generic (
1862 generic (
1834 DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
1863 DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
1835 INIT_Q1 : bit := '0';
1864 INIT_Q1 : bit := '0';
1836 INIT_Q2 : bit := '0';
1865 INIT_Q2 : bit := '0';
1837 SRTYPE : string := "SYNC");
1866 SRTYPE : string := "SYNC");
1838 port
1867 port
1839 (
1868 (
1840 Q1 : out std_ulogic;
1869 Q1 : out std_ulogic;
1841 Q2 : out std_ulogic;
1870 Q2 : out std_ulogic;
1842 C : in std_ulogic;
1871 C : in std_ulogic;
1843 CE : in std_ulogic;
1872 CE : in std_ulogic;
1844 D : in std_ulogic;
1873 D : in std_ulogic;
1845 R : in std_ulogic;
1874 R : in std_ulogic;
1846 S : in std_ulogic);
1875 S : in std_ulogic);
1847 end component;
1876 end component;
1848
1877
1849 component ODDR
1878 component ODDR
1850 generic (
1879 generic (
1851 DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
1880 DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
1852 INIT : bit := '0';
1881 INIT : bit := '0';
1853 SRTYPE : string := "SYNC");
1882 SRTYPE : string := "SYNC");
1854 port (
1883 port (
1855 Q : out std_ulogic;
1884 Q : out std_ulogic;
1856 C : in std_ulogic;
1885 C : in std_ulogic;
1857 CE : in std_ulogic;
1886 CE : in std_ulogic;
1858 D1 : in std_ulogic;
1887 D1 : in std_ulogic;
1859 D2 : in std_ulogic;
1888 D2 : in std_ulogic;
1860 R : in std_ulogic;
1889 R : in std_ulogic;
1861 S : in std_ulogic);
1890 S : in std_ulogic);
1862 end component;
1891 end component;
1863
1892
1864 component IFDDRRSE
1893 component IFDDRRSE
1865 port (
1894 port (
1866 Q0 : out std_ulogic;
1895 Q0 : out std_ulogic;
1867 Q1 : out std_ulogic;
1896 Q1 : out std_ulogic;
1868 C0 : in std_ulogic;
1897 C0 : in std_ulogic;
1869 C1 : in std_ulogic;
1898 C1 : in std_ulogic;
1870 CE : in std_ulogic;
1899 CE : in std_ulogic;
1871 D : in std_ulogic;
1900 D : in std_ulogic;
1872 R : in std_ulogic;
1901 R : in std_ulogic;
1873 S : in std_ulogic);
1902 S : in std_ulogic);
1874 end component;
1903 end component;
1875
1904
1876 component OFDDRRSE
1905 component OFDDRRSE
1877 port (
1906 port (
1878 Q : out std_ulogic;
1907 Q : out std_ulogic;
1879 C0 : in std_ulogic;
1908 C0 : in std_ulogic;
1880 C1 : in std_ulogic;
1909 C1 : in std_ulogic;
1881 CE : in std_ulogic;
1910 CE : in std_ulogic;
1882 D0 : in std_ulogic;
1911 D0 : in std_ulogic;
1883 D1 : in std_ulogic;
1912 D1 : in std_ulogic;
1884 R : in std_ulogic;
1913 R : in std_ulogic;
1885 S : in std_ulogic);
1914 S : in std_ulogic);
1886 end component;
1915 end component;
1887
1916
1888 component FDDRRSE
1917 component FDDRRSE
1889 generic ( INIT : bit := '0');
1918 generic ( INIT : bit := '0');
1890 port ( Q : out std_ulogic;
1919 port ( Q : out std_ulogic;
1891 C0 : in std_ulogic;
1920 C0 : in std_ulogic;
1892 C1 : in std_ulogic;
1921 C1 : in std_ulogic;
1893 CE : in std_ulogic;
1922 CE : in std_ulogic;
1894 D0 : in std_ulogic;
1923 D0 : in std_ulogic;
1895 D1 : in std_ulogic;
1924 D1 : in std_ulogic;
1896 R : in std_ulogic;
1925 R : in std_ulogic;
1897 S : in std_ulogic);
1926 S : in std_ulogic);
1898 end component;
1927 end component;
1899
1928
1900
1929
1901 component IDELAY
1930 component IDELAY
1902 generic ( IOBDELAY_TYPE : string := "DEFAULT";
1931 generic ( IOBDELAY_TYPE : string := "DEFAULT";
1903 IOBDELAY_VALUE : integer := 0);
1932 IOBDELAY_VALUE : integer := 0);
1904 port ( O : out std_ulogic;
1933 port ( O : out std_ulogic;
1905 C : in std_ulogic;
1934 C : in std_ulogic;
1906 CE : in std_ulogic;
1935 CE : in std_ulogic;
1907 I : in std_ulogic;
1936 I : in std_ulogic;
1908 INC : in std_ulogic;
1937 INC : in std_ulogic;
1909 RST : in std_ulogic);
1938 RST : in std_ulogic);
1910 end component;
1939 end component;
1911
1940
1912 component IDELAYCTRL
1941 component IDELAYCTRL
1913 port ( RDY : out std_ulogic;
1942 port ( RDY : out std_ulogic;
1914 REFCLK : in std_ulogic;
1943 REFCLK : in std_ulogic;
1915 RST : in std_ulogic);
1944 RST : in std_ulogic);
1916 end component;
1945 end component;
1917
1946
1918 component BUFIO
1947 component BUFIO
1919 port ( O : out std_ulogic;
1948 port ( O : out std_ulogic;
1920 I : in std_ulogic);
1949 I : in std_ulogic);
1921 end component;
1950 end component;
1922
1951
1923 component BUFR
1952 component BUFR
1924 generic ( BUFR_DIVIDE : string := "BYPASS";
1953 generic ( BUFR_DIVIDE : string := "BYPASS";
1925 SIM_DEVICE : string := "VIRTEX4");
1954 SIM_DEVICE : string := "VIRTEX4");
1926 port ( O : out std_ulogic;
1955 port ( O : out std_ulogic;
1927 CE : in std_ulogic;
1956 CE : in std_ulogic;
1928 CLR : in std_ulogic;
1957 CLR : in std_ulogic;
1929 I : in std_ulogic);
1958 I : in std_ulogic);
1930 end component;
1959 end component;
1931
1960
1932 component ODDR2
1961 component ODDR2
1933 generic
1962 generic
1934 (
1963 (
1935 DDR_ALIGNMENT : string := "NONE";
1964 DDR_ALIGNMENT : string := "NONE";
1936 INIT : bit := '0';
1965 INIT : bit := '0';
1937 SRTYPE : string := "SYNC"
1966 SRTYPE : string := "SYNC"
1938 );
1967 );
1939 port
1968 port
1940 (
1969 (
1941 Q : out std_ulogic;
1970 Q : out std_ulogic;
1942 C0 : in std_ulogic;
1971 C0 : in std_ulogic;
1943 C1 : in std_ulogic;
1972 C1 : in std_ulogic;
1944 CE : in std_ulogic;
1973 CE : in std_ulogic;
1945 D0 : in std_ulogic;
1974 D0 : in std_ulogic;
1946 D1 : in std_ulogic;
1975 D1 : in std_ulogic;
1947 R : in std_ulogic;
1976 R : in std_ulogic;
1948 S : in std_ulogic
1977 S : in std_ulogic
1949 );
1978 );
1950 end component;
1979 end component;
1951
1980
1952 component IDDR2
1981 component IDDR2
1953 generic
1982 generic
1954 (
1983 (
1955 DDR_ALIGNMENT : string := "NONE";
1984 DDR_ALIGNMENT : string := "NONE";
1956 INIT_Q0 : bit := '0';
1985 INIT_Q0 : bit := '0';
1957 INIT_Q1 : bit := '0';
1986 INIT_Q1 : bit := '0';
1958 SRTYPE : string := "SYNC"
1987 SRTYPE : string := "SYNC"
1959 );
1988 );
1960 port
1989 port
1961 (
1990 (
1962 Q0 : out std_ulogic;
1991 Q0 : out std_ulogic;
1963 Q1 : out std_ulogic;
1992 Q1 : out std_ulogic;
1964 C0 : in std_ulogic;
1993 C0 : in std_ulogic;
1965 C1 : in std_ulogic;
1994 C1 : in std_ulogic;
1966 CE : in std_ulogic;
1995 CE : in std_ulogic;
1967 D : in std_ulogic;
1996 D : in std_ulogic;
1968 R : in std_ulogic;
1997 R : in std_ulogic;
1969 S : in std_ulogic
1998 S : in std_ulogic
1970 );
1999 );
1971 end component;
2000 end component;
1972
2001
1973 component SYSMON
2002 component SYSMON
1974 generic
2003 generic
1975 (
2004 (
1976 INIT_40 : bit_vector := X"0000";
2005 INIT_40 : bit_vector := X"0000";
1977 INIT_41 : bit_vector := X"0000";
2006 INIT_41 : bit_vector := X"0000";
1978 INIT_42 : bit_vector := X"0800";
2007 INIT_42 : bit_vector := X"0800";
1979 INIT_43 : bit_vector := X"0000";
2008 INIT_43 : bit_vector := X"0000";
1980 INIT_44 : bit_vector := X"0000";
2009 INIT_44 : bit_vector := X"0000";
1981 INIT_45 : bit_vector := X"0000";
2010 INIT_45 : bit_vector := X"0000";
1982 INIT_46 : bit_vector := X"0000";
2011 INIT_46 : bit_vector := X"0000";
1983 INIT_47 : bit_vector := X"0000";
2012 INIT_47 : bit_vector := X"0000";
1984 INIT_48 : bit_vector := X"0000";
2013 INIT_48 : bit_vector := X"0000";
1985 INIT_49 : bit_vector := X"0000";
2014 INIT_49 : bit_vector := X"0000";
1986 INIT_4A : bit_vector := X"0000";
2015 INIT_4A : bit_vector := X"0000";
1987 INIT_4B : bit_vector := X"0000";
2016 INIT_4B : bit_vector := X"0000";
1988 INIT_4C : bit_vector := X"0000";
2017 INIT_4C : bit_vector := X"0000";
1989 INIT_4D : bit_vector := X"0000";
2018 INIT_4D : bit_vector := X"0000";
1990 INIT_4E : bit_vector := X"0000";
2019 INIT_4E : bit_vector := X"0000";
1991 INIT_4F : bit_vector := X"0000";
2020 INIT_4F : bit_vector := X"0000";
1992 INIT_50 : bit_vector := X"0000";
2021 INIT_50 : bit_vector := X"0000";
1993 INIT_51 : bit_vector := X"0000";
2022 INIT_51 : bit_vector := X"0000";
1994 INIT_52 : bit_vector := X"0000";
2023 INIT_52 : bit_vector := X"0000";
1995 INIT_53 : bit_vector := X"0000";
2024 INIT_53 : bit_vector := X"0000";
1996 INIT_54 : bit_vector := X"0000";
2025 INIT_54 : bit_vector := X"0000";
1997 INIT_55 : bit_vector := X"0000";
2026 INIT_55 : bit_vector := X"0000";
1998 INIT_56 : bit_vector := X"0000";
2027 INIT_56 : bit_vector := X"0000";
1999 INIT_57 : bit_vector := X"0000";
2028 INIT_57 : bit_vector := X"0000";
2000 SIM_MONITOR_FILE : string := "design.txt"
2029 SIM_MONITOR_FILE : string := "design.txt"
2001 );
2030 );
2002 port
2031 port
2003 (
2032 (
2004 ALM : out std_logic_vector(2 downto 0);
2033 ALM : out std_logic_vector(2 downto 0);
2005 BUSY : out std_ulogic;
2034 BUSY : out std_ulogic;
2006 CHANNEL : out std_logic_vector(4 downto 0);
2035 CHANNEL : out std_logic_vector(4 downto 0);
2007 DO : out std_logic_vector(15 downto 0);
2036 DO : out std_logic_vector(15 downto 0);
2008 DRDY : out std_ulogic;
2037 DRDY : out std_ulogic;
2009 EOC : out std_ulogic;
2038 EOC : out std_ulogic;
2010 EOS : out std_ulogic;
2039 EOS : out std_ulogic;
2011 JTAGBUSY : out std_ulogic;
2040 JTAGBUSY : out std_ulogic;
2012 JTAGLOCKED : out std_ulogic;
2041 JTAGLOCKED : out std_ulogic;
2013 JTAGMODIFIED : out std_ulogic;
2042 JTAGMODIFIED : out std_ulogic;
2014 OT : out std_ulogic;
2043 OT : out std_ulogic;
2015 CONVST : in std_ulogic;
2044 CONVST : in std_ulogic;
2016 CONVSTCLK : in std_ulogic;
2045 CONVSTCLK : in std_ulogic;
2017 DADDR : in std_logic_vector(6 downto 0);
2046 DADDR : in std_logic_vector(6 downto 0);
2018 DCLK : in std_ulogic;
2047 DCLK : in std_ulogic;
2019 DEN : in std_ulogic;
2048 DEN : in std_ulogic;
2020 DI : in std_logic_vector(15 downto 0);
2049 DI : in std_logic_vector(15 downto 0);
2021 DWE : in std_ulogic;
2050 DWE : in std_ulogic;
2022 RESET : in std_ulogic;
2051 RESET : in std_ulogic;
2023 VAUXN : in std_logic_vector(15 downto 0);
2052 VAUXN : in std_logic_vector(15 downto 0);
2024 VAUXP : in std_logic_vector(15 downto 0);
2053 VAUXP : in std_logic_vector(15 downto 0);
2025 VN : in std_ulogic;
2054 VN : in std_ulogic;
2026 VP : in std_ulogic
2055 VP : in std_ulogic
2027 );
2056 );
2028 end component;
2057 end component;
2029
2058
2030 component FDRSE
2059 component FDRSE
2031 generic ( INIT : bit := '0');
2060 generic ( INIT : bit := '0');
2032 port ( Q : out std_ulogic;
2061 port ( Q : out std_ulogic;
2033 C : in std_ulogic;
2062 C : in std_ulogic;
2034 CE : in std_ulogic;
2063 CE : in std_ulogic;
2035 D : in std_ulogic;
2064 D : in std_ulogic;
2036 R : in std_ulogic;
2065 R : in std_ulogic;
2037 S : in std_ulogic);
2066 S : in std_ulogic);
2038 end component;
2067 end component;
2039
2068
2040 component FDR
2069 component FDR
2041 generic ( INIT : bit := '0');
2070 generic ( INIT : bit := '0');
2042 port ( Q : out std_ulogic;
2071 port ( Q : out std_ulogic;
2043 C : in std_ulogic;
2072 C : in std_ulogic;
2044 D : in std_ulogic;
2073 D : in std_ulogic;
2045 R : in std_ulogic);
2074 R : in std_ulogic);
2046 end component;
2075 end component;
2047
2076
2048 component FDRE
2077 component FDRE
2049 generic ( INIT : bit := '0');
2078 generic ( INIT : bit := '0');
2050 port ( Q : out std_ulogic;
2079 port ( Q : out std_ulogic;
2051 C : in std_ulogic;
2080 C : in std_ulogic;
2052 CE : in std_ulogic;
2081 CE : in std_ulogic;
2053 D : in std_ulogic;
2082 D : in std_ulogic;
2054 R : in std_ulogic);
2083 R : in std_ulogic);
2055 end component;
2084 end component;
2056
2085
2057 component FD
2086 component FD
2058 generic ( INIT : bit := '0');
2087 generic ( INIT : bit := '0');
2059 port ( Q : out std_ulogic;
2088 port ( Q : out std_ulogic;
2060 C : in std_ulogic;
2089 C : in std_ulogic;
2061 D : in std_ulogic);
2090 D : in std_ulogic);
2062 end component;
2091 end component;
2063
2092
2064 component FDRS
2093 component FDRS
2065 generic ( INIT : bit := '0');
2094 generic ( INIT : bit := '0');
2066 port ( Q : out std_ulogic;
2095 port ( Q : out std_ulogic;
2067 C : in std_ulogic;
2096 C : in std_ulogic;
2068 D : in std_ulogic;
2097 D : in std_ulogic;
2069 R : in std_ulogic;
2098 R : in std_ulogic;
2070 S : in std_ulogic);
2099 S : in std_ulogic);
2071 end component;
2100 end component;
2072
2101
2073 component FDE
2102 component FDE
2074 generic ( INIT : bit := '0');
2103 generic ( INIT : bit := '0');
2075 port ( Q : out std_ulogic;
2104 port ( Q : out std_ulogic;
2076 C : in std_ulogic;
2105 C : in std_ulogic;
2077 CE : in std_ulogic;
2106 CE : in std_ulogic;
2078 D : in std_ulogic);
2107 D : in std_ulogic);
2079 end component;
2108 end component;
2080
2109
2081 component MUXF5
2110 component MUXF5
2082 port ( O : out std_ulogic;
2111 port ( O : out std_ulogic;
2083 I0 : in std_ulogic;
2112 I0 : in std_ulogic;
2084 I1 : in std_ulogic;
2113 I1 : in std_ulogic;
2085 S : in std_ulogic);
2114 S : in std_ulogic);
2086 end component;
2115 end component;
2087
2116
2088 component VCC
2117 component VCC
2089 port ( P : out std_ulogic := '1');
2118 port ( P : out std_ulogic := '1');
2090 end component;
2119 end component;
2091
2120
2092 component GND
2121 component GND
2093 port ( G : out std_ulogic := '0');
2122 port ( G : out std_ulogic := '0');
2094 end component;
2123 end component;
2095
2124
2096 component INV
2125 component INV
2097 port
2126 port
2098 (
2127 (
2099 O : out std_ulogic;
2128 O : out std_ulogic;
2100 I : in std_ulogic
2129 I : in std_ulogic
2101 );
2130 );
2102 end component;
2131 end component;
2103 component LUT2_L
2132 component LUT2_L
2104 generic
2133 generic
2105 (
2134 (
2106 INIT : bit_vector := X"0"
2135 INIT : bit_vector := X"0"
2107 );
2136 );
2108 port
2137 port
2109 (
2138 (
2110 LO : out std_ulogic;
2139 LO : out std_ulogic;
2111 I0 : in std_ulogic;
2140 I0 : in std_ulogic;
2112 I1 : in std_ulogic
2141 I1 : in std_ulogic
2113 );
2142 );
2114 end component;
2143 end component;
2115 component LUT4
2144 component LUT4
2116 generic
2145 generic
2117 (
2146 (
2118 INIT : bit_vector := X"0000"
2147 INIT : bit_vector := X"0000"
2119 );
2148 );
2120 port
2149 port
2121 (
2150 (
2122 O : out std_ulogic;
2151 O : out std_ulogic;
2123 I0 : in std_ulogic;
2152 I0 : in std_ulogic;
2124 I1 : in std_ulogic;
2153 I1 : in std_ulogic;
2125 I2 : in std_ulogic;
2154 I2 : in std_ulogic;
2126 I3 : in std_ulogic
2155 I3 : in std_ulogic
2127 );
2156 );
2128 end component;
2157 end component;
2129 component LUT3
2158 component LUT3
2130 generic
2159 generic
2131 (
2160 (
2132 INIT : bit_vector := X"00"
2161 INIT : bit_vector := X"00"
2133 );
2162 );
2134 port
2163 port
2135 (
2164 (
2136 O : out std_ulogic;
2165 O : out std_ulogic;
2137 I0 : in std_ulogic;
2166 I0 : in std_ulogic;
2138 I1 : in std_ulogic;
2167 I1 : in std_ulogic;
2139 I2 : in std_ulogic
2168 I2 : in std_ulogic
2140 );
2169 );
2141 end component;
2170 end component;
2142 component LUT2
2171 component LUT2
2143 generic
2172 generic
2144 (
2173 (
2145 INIT : bit_vector := X"0"
2174 INIT : bit_vector := X"0"
2146 );
2175 );
2147 port
2176 port
2148 (
2177 (
2149 O : out std_ulogic;
2178 O : out std_ulogic;
2150 I0 : in std_ulogic;
2179 I0 : in std_ulogic;
2151 I1 : in std_ulogic
2180 I1 : in std_ulogic
2152 );
2181 );
2153 end component;
2182 end component;
2154 component FDC
2183 component FDC
2155 generic
2184 generic
2156 (
2185 (
2157 INIT : bit := '0'
2186 INIT : bit := '0'
2158 );
2187 );
2159 port
2188 port
2160 (
2189 (
2161 Q : out std_ulogic;
2190 Q : out std_ulogic;
2162 C : in std_ulogic;
2191 C : in std_ulogic;
2163 CLR : in std_ulogic;
2192 CLR : in std_ulogic;
2164 D : in std_ulogic
2193 D : in std_ulogic
2165 );
2194 );
2166 end component;
2195 end component;
2167 component LUT3_L
2196 component LUT3_L
2168 generic
2197 generic
2169 (
2198 (
2170 INIT : bit_vector := X"00"
2199 INIT : bit_vector := X"00"
2171 );
2200 );
2172 port
2201 port
2173 (
2202 (
2174 LO : out std_ulogic;
2203 LO : out std_ulogic;
2175 I0 : in std_ulogic;
2204 I0 : in std_ulogic;
2176 I1 : in std_ulogic;
2205 I1 : in std_ulogic;
2177 I2 : in std_ulogic
2206 I2 : in std_ulogic
2178 );
2207 );
2179 end component;
2208 end component;
2180 component LUT1
2209 component LUT1
2181 generic
2210 generic
2182 (
2211 (
2183 INIT : bit_vector := X"0"
2212 INIT : bit_vector := X"0"
2184 );
2213 );
2185 port
2214 port
2186 (
2215 (
2187 O : out std_ulogic;
2216 O : out std_ulogic;
2188 I0 : in std_ulogic
2217 I0 : in std_ulogic
2189 );
2218 );
2190 end component;
2219 end component;
2191 component LUT4_L
2220 component LUT4_L
2192 generic
2221 generic
2193 (
2222 (
2194 INIT : bit_vector := X"0000"
2223 INIT : bit_vector := X"0000"
2195 );
2224 );
2196 port
2225 port
2197 (
2226 (
2198 LO : out std_ulogic;
2227 LO : out std_ulogic;
2199 I0 : in std_ulogic;
2228 I0 : in std_ulogic;
2200 I1 : in std_ulogic;
2229 I1 : in std_ulogic;
2201 I2 : in std_ulogic;
2230 I2 : in std_ulogic;
2202 I3 : in std_ulogic
2231 I3 : in std_ulogic
2203 );
2232 );
2204 end component;
2233 end component;
2205 component FDCE
2234 component FDCE
2206 generic
2235 generic
2207 (
2236 (
2208 INIT : bit := '0'
2237 INIT : bit := '0'
2209 );
2238 );
2210 port
2239 port
2211 (
2240 (
2212 Q : out std_ulogic;
2241 Q : out std_ulogic;
2213 C : in std_ulogic;
2242 C : in std_ulogic;
2214 CE : in std_ulogic;
2243 CE : in std_ulogic;
2215 CLR : in std_ulogic;
2244 CLR : in std_ulogic;
2216 D : in std_ulogic
2245 D : in std_ulogic
2217 );
2246 );
2218 end component;
2247 end component;
2219 component FDC_1
2248 component FDC_1
2220 generic
2249 generic
2221 (
2250 (
2222 INIT : bit := '0'
2251 INIT : bit := '0'
2223 );
2252 );
2224 port
2253 port
2225 (
2254 (
2226 Q : out std_ulogic;
2255 Q : out std_ulogic;
2227 C : in std_ulogic;
2256 C : in std_ulogic;
2228 CLR : in std_ulogic;
2257 CLR : in std_ulogic;
2229 D : in std_ulogic
2258 D : in std_ulogic
2230 );
2259 );
2231 end component;
2260 end component;
2232 component FDP
2261 component FDP
2233 generic
2262 generic
2234 (
2263 (
2235 INIT : bit := '1'
2264 INIT : bit := '1'
2236 );
2265 );
2237 port
2266 port
2238 (
2267 (
2239 Q : out std_ulogic;
2268 Q : out std_ulogic;
2240 C : in std_ulogic;
2269 C : in std_ulogic;
2241 D : in std_ulogic;
2270 D : in std_ulogic;
2242 PRE : in std_ulogic
2271 PRE : in std_ulogic
2243 );
2272 );
2244 end component;
2273 end component;
2245 component FDS
2274 component FDS
2246 generic
2275 generic
2247 (
2276 (
2248 INIT : bit := '1'
2277 INIT : bit := '1'
2249 );
2278 );
2250 port
2279 port
2251 (
2280 (
2252 Q : out std_ulogic;
2281 Q : out std_ulogic;
2253 C : in std_ulogic;
2282 C : in std_ulogic;
2254 D : in std_ulogic;
2283 D : in std_ulogic;
2255 S : in std_ulogic
2284 S : in std_ulogic
2256 );
2285 );
2257 end component;
2286 end component;
2258 component MUXCY
2287 component MUXCY
2259 port
2288 port
2260 (
2289 (
2261 O : out std_ulogic;
2290 O : out std_ulogic;
2262 CI : in std_ulogic;
2291 CI : in std_ulogic;
2263 DI : in std_ulogic;
2292 DI : in std_ulogic;
2264 S : in std_ulogic
2293 S : in std_ulogic
2265 );
2294 );
2266 end component;
2295 end component;
2267 component LUT1_L
2296 component LUT1_L
2268 generic
2297 generic
2269 (
2298 (
2270 INIT : bit_vector := X"0"
2299 INIT : bit_vector := X"0"
2271 );
2300 );
2272 port
2301 port
2273 (
2302 (
2274 LO : out std_ulogic;
2303 LO : out std_ulogic;
2275 I0 : in std_ulogic
2304 I0 : in std_ulogic
2276 );
2305 );
2277 end component;
2306 end component;
2278 component MUXF6
2307 component MUXF6
2279 port
2308 port
2280 (
2309 (
2281 O : out std_ulogic;
2310 O : out std_ulogic;
2282 I0 : in std_ulogic;
2311 I0 : in std_ulogic;
2283 I1 : in std_ulogic;
2312 I1 : in std_ulogic;
2284 S : in std_ulogic
2313 S : in std_ulogic
2285 );
2314 );
2286 end component;
2315 end component;
2287 component MUXF5_D
2316 component MUXF5_D
2288 port
2317 port
2289 (
2318 (
2290 LO : out std_ulogic;
2319 LO : out std_ulogic;
2291 O : out std_ulogic;
2320 O : out std_ulogic;
2292 I0 : in std_ulogic;
2321 I0 : in std_ulogic;
2293 I1 : in std_ulogic;
2322 I1 : in std_ulogic;
2294 S : in std_ulogic
2323 S : in std_ulogic
2295 );
2324 );
2296 end component;
2325 end component;
2297 component XORCY
2326 component XORCY
2298 port
2327 port
2299 (
2328 (
2300 O : out std_ulogic;
2329 O : out std_ulogic;
2301 CI : in std_ulogic;
2330 CI : in std_ulogic;
2302 LI : in std_ulogic
2331 LI : in std_ulogic
2303 );
2332 );
2304 end component;
2333 end component;
2305 component MUXCY_L
2334 component MUXCY_L
2306 port
2335 port
2307 (
2336 (
2308 LO : out std_ulogic;
2337 LO : out std_ulogic;
2309 CI : in std_ulogic;
2338 CI : in std_ulogic;
2310 DI : in std_ulogic;
2339 DI : in std_ulogic;
2311 S : in std_ulogic
2340 S : in std_ulogic
2312 );
2341 );
2313 end component;
2342 end component;
2314 component FDSE
2343 component FDSE
2315 generic
2344 generic
2316 (
2345 (
2317 INIT : bit := '1'
2346 INIT : bit := '1'
2318 );
2347 );
2319 port
2348 port
2320 (
2349 (
2321 Q : out std_ulogic;
2350 Q : out std_ulogic;
2322 C : in std_ulogic;
2351 C : in std_ulogic;
2323 CE : in std_ulogic;
2352 CE : in std_ulogic;
2324 D : in std_ulogic;
2353 D : in std_ulogic;
2325 S : in std_ulogic
2354 S : in std_ulogic
2326 );
2355 );
2327 end component;
2356 end component;
2328 component MULT_AND
2357 component MULT_AND
2329 port
2358 port
2330 (
2359 (
2331 LO : out std_ulogic;
2360 LO : out std_ulogic;
2332 I0 : in std_ulogic;
2361 I0 : in std_ulogic;
2333 I1 : in std_ulogic
2362 I1 : in std_ulogic
2334 );
2363 );
2335 end component;
2364 end component;
2336
2365
2337 component SRL16E
2366 component SRL16E
2338 generic
2367 generic
2339 (
2368 (
2340 INIT : bit_vector := X"0000"
2369 INIT : bit_vector := X"0000"
2341 );
2370 );
2342 port
2371 port
2343 (
2372 (
2344 Q : out STD_ULOGIC;
2373 Q : out STD_ULOGIC;
2345 A0 : in STD_ULOGIC;
2374 A0 : in STD_ULOGIC;
2346 A1 : in STD_ULOGIC;
2375 A1 : in STD_ULOGIC;
2347 A2 : in STD_ULOGIC;
2376 A2 : in STD_ULOGIC;
2348 A3 : in STD_ULOGIC;
2377 A3 : in STD_ULOGIC;
2349 CE : in STD_ULOGIC;
2378 CE : in STD_ULOGIC;
2350 CLK : in STD_ULOGIC;
2379 CLK : in STD_ULOGIC;
2351 D : in STD_ULOGIC
2380 D : in STD_ULOGIC
2352 );
2381 );
2353 end component;
2382 end component;
2354
2383
2355 component ROM256X1
2384 component ROM256X1
2356 generic
2385 generic
2357 (
2386 (
2358 INIT : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
2387 INIT : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
2359 );
2388 );
2360 port
2389 port
2361 (
2390 (
2362 O : out std_ulogic;
2391 O : out std_ulogic;
2363 A0 : in std_ulogic;
2392 A0 : in std_ulogic;
2364 A1 : in std_ulogic;
2393 A1 : in std_ulogic;
2365 A2 : in std_ulogic;
2394 A2 : in std_ulogic;
2366 A3 : in std_ulogic;
2395 A3 : in std_ulogic;
2367 A4 : in std_ulogic;
2396 A4 : in std_ulogic;
2368 A5 : in std_ulogic;
2397 A5 : in std_ulogic;
2369 A6 : in std_ulogic;
2398 A6 : in std_ulogic;
2370 A7 : in std_ulogic
2399 A7 : in std_ulogic
2371 );
2400 );
2372 end component;
2401 end component;
2373
2402
2374 component FDPE
2403 component FDPE
2375 generic
2404 generic
2376 (
2405 (
2377 INIT : bit := '1'
2406 INIT : bit := '1'
2378 );
2407 );
2379 port
2408 port
2380 (
2409 (
2381 Q : out std_ulogic;
2410 Q : out std_ulogic;
2382 C : in std_ulogic;
2411 C : in std_ulogic;
2383 CE : in std_ulogic;
2412 CE : in std_ulogic;
2384 D : in std_ulogic;
2413 D : in std_ulogic;
2385 PRE : in std_ulogic
2414 PRE : in std_ulogic
2386 );
2415 );
2387 end component;
2416 end component;
2388
2417
2389 component MULT18X18
2418 component MULT18X18
2390 port
2419 port
2391 (
2420 (
2392 P : out std_logic_vector (35 downto 0);
2421 P : out std_logic_vector (35 downto 0);
2393 A : in std_logic_vector (17 downto 0);
2422 A : in std_logic_vector (17 downto 0);
2394 B : in std_logic_vector (17 downto 0)
2423 B : in std_logic_vector (17 downto 0)
2395 );
2424 );
2396 end component;
2425 end component;
2397
2426
2398 component MULT18X18S
2427 component MULT18X18S
2399 port
2428 port
2400 (
2429 (
2401 P : out std_logic_vector (35 downto 0);
2430 P : out std_logic_vector (35 downto 0);
2402 A : in std_logic_vector (17 downto 0);
2431 A : in std_logic_vector (17 downto 0);
2403 B : in std_logic_vector (17 downto 0);
2432 B : in std_logic_vector (17 downto 0);
2404 C : in std_ulogic;
2433 C : in std_ulogic;
2405 CE : in std_ulogic;
2434 CE : in std_ulogic;
2406 R : in std_ulogic
2435 R : in std_ulogic
2407 );
2436 );
2408 end component;
2437 end component;
2409
2438
2410 component MUXF7
2439 component MUXF7
2411 port
2440 port
2412 (
2441 (
2413 O : out std_ulogic;
2442 O : out std_ulogic;
2414 I0 : in std_ulogic;
2443 I0 : in std_ulogic;
2415 I1 : in std_ulogic;
2444 I1 : in std_ulogic;
2416 S : in std_ulogic
2445 S : in std_ulogic
2417 );
2446 );
2418 end component;
2447 end component;
2419
2448
2420 component IODELAY
2449 component IODELAY
2421 generic
2450 generic
2422 (
2451 (
2423 DELAY_SRC : string := "I";
2452 DELAY_SRC : string := "I";
2424 HIGH_PERFORMANCE_MODE : boolean := true;
2453 HIGH_PERFORMANCE_MODE : boolean := true;
2425 IDELAY_TYPE : string := "DEFAULT";
2454 IDELAY_TYPE : string := "DEFAULT";
2426 IDELAY_VALUE : integer := 0;
2455 IDELAY_VALUE : integer := 0;
2427 ODELAY_VALUE : integer := 0;
2456 ODELAY_VALUE : integer := 0;
2428 REFCLK_FREQUENCY : real := 200.0;
2457 REFCLK_FREQUENCY : real := 200.0;
2429 SIGNAL_PATTERN : string := "DATA"
2458 SIGNAL_PATTERN : string := "DATA"
2430 );
2459 );
2431 port
2460 port
2432 (
2461 (
2433 DATAOUT : out std_ulogic;
2462 DATAOUT : out std_ulogic;
2434 C : in std_ulogic;
2463 C : in std_ulogic;
2435 CE : in std_ulogic;
2464 CE : in std_ulogic;
2436 DATAIN : in std_ulogic;
2465 DATAIN : in std_ulogic;
2437 IDATAIN : in std_ulogic;
2466 IDATAIN : in std_ulogic;
2438 INC : in std_ulogic;
2467 INC : in std_ulogic;
2439 ODATAIN : in std_ulogic;
2468 ODATAIN : in std_ulogic;
2440 RST : in std_ulogic;
2469 RST : in std_ulogic;
2441 T : in std_ulogic
2470 T : in std_ulogic
2442 );
2471 );
2443 end component;
2472 end component;
2444
2473
2445 component IODELAY2
2474 component IODELAY2
2446 generic (
2475 generic (
2447 COUNTER_WRAPAROUND : string := "WRAPAROUND";
2476 COUNTER_WRAPAROUND : string := "WRAPAROUND";
2448 DATA_RATE : string := "SDR";
2477 DATA_RATE : string := "SDR";
2449 DELAY_SRC : string := "IO";
2478 DELAY_SRC : string := "IO";
2450 IDELAY2_VALUE : integer := 0;
2479 IDELAY2_VALUE : integer := 0;
2451 IDELAY_MODE : string := "NORMAL";
2480 IDELAY_MODE : string := "NORMAL";
2452 IDELAY_TYPE : string := "DEFAULT";
2481 IDELAY_TYPE : string := "DEFAULT";
2453 IDELAY_VALUE : integer := 0;
2482 IDELAY_VALUE : integer := 0;
2454 ODELAY_VALUE : integer := 0;
2483 ODELAY_VALUE : integer := 0;
2455 SERDES_MODE : string := "NONE";
2484 SERDES_MODE : string := "NONE";
2456 SIM_TAPDELAY_VALUE : integer := 75
2485 SIM_TAPDELAY_VALUE : integer := 75
2457 );
2486 );
2458 port (
2487 port (
2459 BUSY : out std_ulogic;
2488 BUSY : out std_ulogic;
2460 DATAOUT : out std_ulogic;
2489 DATAOUT : out std_ulogic;
2461 DATAOUT2 : out std_ulogic;
2490 DATAOUT2 : out std_ulogic;
2462 DOUT : out std_ulogic;
2491 DOUT : out std_ulogic;
2463 TOUT : out std_ulogic;
2492 TOUT : out std_ulogic;
2464 CAL : in std_ulogic;
2493 CAL : in std_ulogic;
2465 CE : in std_ulogic;
2494 CE : in std_ulogic;
2466 CLK : in std_ulogic;
2495 CLK : in std_ulogic;
2467 IDATAIN : in std_ulogic;
2496 IDATAIN : in std_ulogic;
2468 INC : in std_ulogic;
2497 INC : in std_ulogic;
2469 IOCLK0 : in std_ulogic;
2498 IOCLK0 : in std_ulogic;
2470 IOCLK1 : in std_ulogic;
2499 IOCLK1 : in std_ulogic;
2471 ODATAIN : in std_ulogic;
2500 ODATAIN : in std_ulogic;
2472 RST : in std_ulogic;
2501 RST : in std_ulogic;
2473 T : in std_ulogic
2502 T : in std_ulogic
2474 );
2503 );
2475 end component;
2504 end component;
2476
2505
2477 component ISERDES
2506 component ISERDES
2478 generic
2507 generic
2479 (
2508 (
2480 BITSLIP_ENABLE : boolean := false;
2509 BITSLIP_ENABLE : boolean := false;
2481 DATA_RATE : string := "DDR";
2510 DATA_RATE : string := "DDR";
2482 DATA_WIDTH : integer := 4;
2511 DATA_WIDTH : integer := 4;
2483 INIT_Q1 : bit := '0';
2512 INIT_Q1 : bit := '0';
2484 INIT_Q2 : bit := '0';
2513 INIT_Q2 : bit := '0';
2485 INIT_Q3 : bit := '0';
2514 INIT_Q3 : bit := '0';
2486 INIT_Q4 : bit := '0';
2515 INIT_Q4 : bit := '0';
2487 INTERFACE_TYPE : string := "MEMORY";
2516 INTERFACE_TYPE : string := "MEMORY";
2488 IOBDELAY : string := "NONE";
2517 IOBDELAY : string := "NONE";
2489 IOBDELAY_TYPE : string := "DEFAULT";
2518 IOBDELAY_TYPE : string := "DEFAULT";
2490 IOBDELAY_VALUE : integer := 0;
2519 IOBDELAY_VALUE : integer := 0;
2491 NUM_CE : integer := 2;
2520 NUM_CE : integer := 2;
2492 SERDES_MODE : string := "MASTER";
2521 SERDES_MODE : string := "MASTER";
2493 SRVAL_Q1 : bit := '0';
2522 SRVAL_Q1 : bit := '0';
2494 SRVAL_Q2 : bit := '0';
2523 SRVAL_Q2 : bit := '0';
2495 SRVAL_Q3 : bit := '0';
2524 SRVAL_Q3 : bit := '0';
2496 SRVAL_Q4 : bit := '0'
2525 SRVAL_Q4 : bit := '0'
2497 );
2526 );
2498 port
2527 port
2499 (
2528 (
2500 O : out std_ulogic;
2529 O : out std_ulogic;
2501 Q1 : out std_ulogic;
2530 Q1 : out std_ulogic;
2502 Q2 : out std_ulogic;
2531 Q2 : out std_ulogic;
2503 Q3 : out std_ulogic;
2532 Q3 : out std_ulogic;
2504 Q4 : out std_ulogic;
2533 Q4 : out std_ulogic;
2505 Q5 : out std_ulogic;
2534 Q5 : out std_ulogic;
2506 Q6 : out std_ulogic;
2535 Q6 : out std_ulogic;
2507 SHIFTOUT1 : out std_ulogic;
2536 SHIFTOUT1 : out std_ulogic;
2508 SHIFTOUT2 : out std_ulogic;
2537 SHIFTOUT2 : out std_ulogic;
2509 BITSLIP : in std_ulogic;
2538 BITSLIP : in std_ulogic;
2510 CE1 : in std_ulogic;
2539 CE1 : in std_ulogic;
2511 CE2 : in std_ulogic;
2540 CE2 : in std_ulogic;
2512 CLK : in std_ulogic;
2541 CLK : in std_ulogic;
2513 CLKDIV : in std_ulogic;
2542 CLKDIV : in std_ulogic;
2514 D : in std_ulogic;
2543 D : in std_ulogic;
2515 DLYCE : in std_ulogic;
2544 DLYCE : in std_ulogic;
2516 DLYINC : in std_ulogic;
2545 DLYINC : in std_ulogic;
2517 DLYRST : in std_ulogic;
2546 DLYRST : in std_ulogic;
2518 OCLK : in std_ulogic;
2547 OCLK : in std_ulogic;
2519 REV : in std_ulogic;
2548 REV : in std_ulogic;
2520 SHIFTIN1 : in std_ulogic;
2549 SHIFTIN1 : in std_ulogic;
2521 SHIFTIN2 : in std_ulogic;
2550 SHIFTIN2 : in std_ulogic;
2522 SR : in std_ulogic
2551 SR : in std_ulogic
2523 );
2552 );
2524 end component;
2553 end component;
2525
2554
2526 component RAM16X1S
2555 component RAM16X1S
2527 generic
2556 generic
2528 (
2557 (
2529 INIT : bit_vector(15 downto 0) := X"0000"
2558 INIT : bit_vector(15 downto 0) := X"0000"
2530 );
2559 );
2531 port
2560 port
2532 (
2561 (
2533 O : out std_ulogic;
2562 O : out std_ulogic;
2534 A0 : in std_ulogic;
2563 A0 : in std_ulogic;
2535 A1 : in std_ulogic;
2564 A1 : in std_ulogic;
2536 A2 : in std_ulogic;
2565 A2 : in std_ulogic;
2537 A3 : in std_ulogic;
2566 A3 : in std_ulogic;
2538 D : in std_ulogic;
2567 D : in std_ulogic;
2539 WCLK : in std_ulogic;
2568 WCLK : in std_ulogic;
2540 WE : in std_ulogic
2569 WE : in std_ulogic
2541 );
2570 );
2542 end component;
2571 end component;
2543
2572
2544 component RAM16X1D
2573 component RAM16X1D
2545 generic
2574 generic
2546 (
2575 (
2547 INIT : bit_vector(15 downto 0) := X"0000"
2576 INIT : bit_vector(15 downto 0) := X"0000"
2548 );
2577 );
2549 port
2578 port
2550 (
2579 (
2551 DPO : out std_ulogic;
2580 DPO : out std_ulogic;
2552 SPO : out std_ulogic;
2581 SPO : out std_ulogic;
2553 A0 : in std_ulogic;
2582 A0 : in std_ulogic;
2554 A1 : in std_ulogic;
2583 A1 : in std_ulogic;
2555 A2 : in std_ulogic;
2584 A2 : in std_ulogic;
2556 A3 : in std_ulogic;
2585 A3 : in std_ulogic;
2557 D : in std_ulogic;
2586 D : in std_ulogic;
2558 DPRA0 : in std_ulogic;
2587 DPRA0 : in std_ulogic;
2559 DPRA1 : in std_ulogic;
2588 DPRA1 : in std_ulogic;
2560 DPRA2 : in std_ulogic;
2589 DPRA2 : in std_ulogic;
2561 DPRA3 : in std_ulogic;
2590 DPRA3 : in std_ulogic;
2562 WCLK : in std_ulogic;
2591 WCLK : in std_ulogic;
2563 WE : in std_ulogic
2592 WE : in std_ulogic
2564 );
2593 );
2565 end component;
2594 end component;
2566
2595
2567 component ROM32X1
2596 component ROM32X1
2568 generic
2597 generic
2569 (
2598 (
2570 INIT : bit_vector := X"00000000"
2599 INIT : bit_vector := X"00000000"
2571 );
2600 );
2572 port
2601 port
2573 (
2602 (
2574 O : out std_ulogic;
2603 O : out std_ulogic;
2575 A0 : in std_ulogic;
2604 A0 : in std_ulogic;
2576 A1 : in std_ulogic;
2605 A1 : in std_ulogic;
2577 A2 : in std_ulogic;
2606 A2 : in std_ulogic;
2578 A3 : in std_ulogic;
2607 A3 : in std_ulogic;
2579 A4 : in std_ulogic
2608 A4 : in std_ulogic
2580 );
2609 );
2581 end component;
2610 end component;
2582
2611
2583 component DSP48
2612 component DSP48
2584 generic
2613 generic
2585 (
2614 (
2586 AREG : integer := 1;
2615 AREG : integer := 1;
2587 B_INPUT : string := "DIRECT";
2616 B_INPUT : string := "DIRECT";
2588 BREG : integer := 1;
2617 BREG : integer := 1;
2589 CARRYINREG : integer := 1;
2618 CARRYINREG : integer := 1;
2590 CARRYINSELREG : integer := 1;
2619 CARRYINSELREG : integer := 1;
2591 CREG : integer := 1;
2620 CREG : integer := 1;
2592 LEGACY_MODE : string := "MULT18X18S";
2621 LEGACY_MODE : string := "MULT18X18S";
2593 MREG : integer := 1;
2622 MREG : integer := 1;
2594 OPMODEREG : integer := 1;
2623 OPMODEREG : integer := 1;
2595 PREG : integer := 1;
2624 PREG : integer := 1;
2596 SUBTRACTREG : integer := 1
2625 SUBTRACTREG : integer := 1
2597 );
2626 );
2598 port
2627 port
2599 (
2628 (
2600 BCOUT : out std_logic_vector(17 downto 0);
2629 BCOUT : out std_logic_vector(17 downto 0);
2601 P : out std_logic_vector(47 downto 0);
2630 P : out std_logic_vector(47 downto 0);
2602 PCOUT : out std_logic_vector(47 downto 0);
2631 PCOUT : out std_logic_vector(47 downto 0);
2603 A : in std_logic_vector(17 downto 0);
2632 A : in std_logic_vector(17 downto 0);
2604 B : in std_logic_vector(17 downto 0);
2633 B : in std_logic_vector(17 downto 0);
2605 BCIN : in std_logic_vector(17 downto 0);
2634 BCIN : in std_logic_vector(17 downto 0);
2606 C : in std_logic_vector(47 downto 0);
2635 C : in std_logic_vector(47 downto 0);
2607 CARRYIN : in std_ulogic;
2636 CARRYIN : in std_ulogic;
2608 CARRYINSEL : in std_logic_vector(1 downto 0);
2637 CARRYINSEL : in std_logic_vector(1 downto 0);
2609 CEA : in std_ulogic;
2638 CEA : in std_ulogic;
2610 CEB : in std_ulogic;
2639 CEB : in std_ulogic;
2611 CEC : in std_ulogic;
2640 CEC : in std_ulogic;
2612 CECARRYIN : in std_ulogic;
2641 CECARRYIN : in std_ulogic;
2613 CECINSUB : in std_ulogic;
2642 CECINSUB : in std_ulogic;
2614 CECTRL : in std_ulogic;
2643 CECTRL : in std_ulogic;
2615 CEM : in std_ulogic;
2644 CEM : in std_ulogic;
2616 CEP : in std_ulogic;
2645 CEP : in std_ulogic;
2617 CLK : in std_ulogic;
2646 CLK : in std_ulogic;
2618 OPMODE : in std_logic_vector(6 downto 0);
2647 OPMODE : in std_logic_vector(6 downto 0);
2619 PCIN : in std_logic_vector(47 downto 0);
2648 PCIN : in std_logic_vector(47 downto 0);
2620 RSTA : in std_ulogic;
2649 RSTA : in std_ulogic;
2621 RSTB : in std_ulogic;
2650 RSTB : in std_ulogic;
2622 RSTC : in std_ulogic;
2651 RSTC : in std_ulogic;
2623 RSTCARRYIN : in std_ulogic;
2652 RSTCARRYIN : in std_ulogic;
2624 RSTCTRL : in std_ulogic;
2653 RSTCTRL : in std_ulogic;
2625 RSTM : in std_ulogic;
2654 RSTM : in std_ulogic;
2626 RSTP : in std_ulogic;
2655 RSTP : in std_ulogic;
2627 SUBTRACT : in std_ulogic
2656 SUBTRACT : in std_ulogic
2628 );
2657 );
2629 end component;
2658 end component;
2630
2659
2631 component RAMB16
2660 component RAMB16
2632 generic
2661 generic
2633 (
2662 (
2634 DOA_REG : integer := 0;
2663 DOA_REG : integer := 0;
2635 DOB_REG : integer := 0;
2664 DOB_REG : integer := 0;
2636 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2665 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2637 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2666 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2638 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2667 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2639 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2668 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2640 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2669 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2641 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2670 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2642 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2671 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2643 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2672 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2644 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2673 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2645 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2674 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2646 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2675 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2647 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2676 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2648 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2677 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2649 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2678 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2650 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2679 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2651 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2680 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2652 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2681 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2653 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2682 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2654 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2683 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2655 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2684 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2656 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2685 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2657 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2686 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2658 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2687 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2659 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2688 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2660 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2689 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2661 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2690 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2662 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2691 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2663 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2692 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2664 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2693 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2665 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2694 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2666 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2695 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2667 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2696 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2668 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2697 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2669 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2698 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2670 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2699 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2671 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2700 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2672 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2701 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2673 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2702 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2674 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2703 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2675 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2704 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2676 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2705 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2677 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2706 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2678 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2707 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2679 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2708 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2680 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2709 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2681 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2710 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2682 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2711 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2683 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2712 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2684 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2713 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2685 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2714 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2686 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2715 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2687 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2716 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2688 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2717 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2689 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2718 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2690 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2719 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2691 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2720 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2692 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2721 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2693 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2722 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2694 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2723 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2695 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2724 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2696 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2725 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2697 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2726 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2698 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2727 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2699 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2728 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2700 INIT_A : bit_vector := X"000000000";
2729 INIT_A : bit_vector := X"000000000";
2701 INIT_B : bit_vector := X"000000000";
2730 INIT_B : bit_vector := X"000000000";
2702 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2731 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2703 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2732 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2704 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2733 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2705 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2734 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2706 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2735 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2707 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2736 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2708 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2737 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2709 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2738 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2710 INVERT_CLK_DOA_REG : boolean := false;
2739 INVERT_CLK_DOA_REG : boolean := false;
2711 INVERT_CLK_DOB_REG : boolean := false;
2740 INVERT_CLK_DOB_REG : boolean := false;
2712 RAM_EXTENSION_A : string := "NONE";
2741 RAM_EXTENSION_A : string := "NONE";
2713 RAM_EXTENSION_B : string := "NONE";
2742 RAM_EXTENSION_B : string := "NONE";
2714 READ_WIDTH_A : integer := 0;
2743 READ_WIDTH_A : integer := 0;
2715 READ_WIDTH_B : integer := 0;
2744 READ_WIDTH_B : integer := 0;
2716 SIM_COLLISION_CHECK : string := "ALL";
2745 SIM_COLLISION_CHECK : string := "ALL";
2717 SRVAL_A : bit_vector := X"000000000";
2746 SRVAL_A : bit_vector := X"000000000";
2718 SRVAL_B : bit_vector := X"000000000";
2747 SRVAL_B : bit_vector := X"000000000";
2719 WRITE_MODE_A : string := "WRITE_FIRST";
2748 WRITE_MODE_A : string := "WRITE_FIRST";
2720 WRITE_MODE_B : string := "WRITE_FIRST";
2749 WRITE_MODE_B : string := "WRITE_FIRST";
2721 WRITE_WIDTH_A : integer := 0;
2750 WRITE_WIDTH_A : integer := 0;
2722 WRITE_WIDTH_B : integer := 0
2751 WRITE_WIDTH_B : integer := 0
2723 );
2752 );
2724 port
2753 port
2725 (
2754 (
2726 CASCADEOUTA : out std_ulogic;
2755 CASCADEOUTA : out std_ulogic;
2727 CASCADEOUTB : out std_ulogic;
2756 CASCADEOUTB : out std_ulogic;
2728 DOA : out std_logic_vector (31 downto 0);
2757 DOA : out std_logic_vector (31 downto 0);
2729 DOB : out std_logic_vector (31 downto 0);
2758 DOB : out std_logic_vector (31 downto 0);
2730 DOPA : out std_logic_vector (3 downto 0);
2759 DOPA : out std_logic_vector (3 downto 0);
2731 DOPB : out std_logic_vector (3 downto 0);
2760 DOPB : out std_logic_vector (3 downto 0);
2732 ADDRA : in std_logic_vector (14 downto 0);
2761 ADDRA : in std_logic_vector (14 downto 0);
2733 ADDRB : in std_logic_vector (14 downto 0);
2762 ADDRB : in std_logic_vector (14 downto 0);
2734 CASCADEINA : in std_ulogic;
2763 CASCADEINA : in std_ulogic;
2735 CASCADEINB : in std_ulogic;
2764 CASCADEINB : in std_ulogic;
2736 CLKA : in std_ulogic;
2765 CLKA : in std_ulogic;
2737 CLKB : in std_ulogic;
2766 CLKB : in std_ulogic;
2738 DIA : in std_logic_vector (31 downto 0);
2767 DIA : in std_logic_vector (31 downto 0);
2739 DIB : in std_logic_vector (31 downto 0);
2768 DIB : in std_logic_vector (31 downto 0);
2740 DIPA : in std_logic_vector (3 downto 0);
2769 DIPA : in std_logic_vector (3 downto 0);
2741 DIPB : in std_logic_vector (3 downto 0);
2770 DIPB : in std_logic_vector (3 downto 0);
2742 ENA : in std_ulogic;
2771 ENA : in std_ulogic;
2743 ENB : in std_ulogic;
2772 ENB : in std_ulogic;
2744 REGCEA : in std_ulogic;
2773 REGCEA : in std_ulogic;
2745 REGCEB : in std_ulogic;
2774 REGCEB : in std_ulogic;
2746 SSRA : in std_ulogic;
2775 SSRA : in std_ulogic;
2747 SSRB : in std_ulogic;
2776 SSRB : in std_ulogic;
2748 WEA : in std_logic_vector (3 downto 0);
2777 WEA : in std_logic_vector (3 downto 0);
2749 WEB : in std_logic_vector (3 downto 0)
2778 WEB : in std_logic_vector (3 downto 0)
2750 );
2779 );
2751 end component;
2780 end component;
2752
2781
2753 component MUXF8
2782 component MUXF8
2754 port
2783 port
2755 (
2784 (
2756 O : out std_ulogic;
2785 O : out std_ulogic;
2757 I0 : in std_ulogic;
2786 I0 : in std_ulogic;
2758 I1 : in std_ulogic;
2787 I1 : in std_ulogic;
2759 S : in std_ulogic
2788 S : in std_ulogic
2760 );
2789 );
2761 end component;
2790 end component;
2762
2791
2763 component RAM64X1D
2792 component RAM64X1D
2764 generic ( INIT : bit_vector(63 downto 0) := X"0000000000000000");
2793 generic ( INIT : bit_vector(63 downto 0) := X"0000000000000000");
2765 port
2794 port
2766 (
2795 (
2767 DPO : out std_ulogic;
2796 DPO : out std_ulogic;
2768 SPO : out std_ulogic;
2797 SPO : out std_ulogic;
2769 A0 : in std_ulogic;
2798 A0 : in std_ulogic;
2770 A1 : in std_ulogic;
2799 A1 : in std_ulogic;
2771 A2 : in std_ulogic;
2800 A2 : in std_ulogic;
2772 A3 : in std_ulogic;
2801 A3 : in std_ulogic;
2773 A4 : in std_ulogic;
2802 A4 : in std_ulogic;
2774 A5 : in std_ulogic;
2803 A5 : in std_ulogic;
2775 D : in std_ulogic;
2804 D : in std_ulogic;
2776 DPRA0 : in std_ulogic;
2805 DPRA0 : in std_ulogic;
2777 DPRA1 : in std_ulogic;
2806 DPRA1 : in std_ulogic;
2778 DPRA2 : in std_ulogic;
2807 DPRA2 : in std_ulogic;
2779 DPRA3 : in std_ulogic;
2808 DPRA3 : in std_ulogic;
2780 DPRA4 : in std_ulogic;
2809 DPRA4 : in std_ulogic;
2781 DPRA5 : in std_ulogic;
2810 DPRA5 : in std_ulogic;
2782 WCLK : in std_ulogic;
2811 WCLK : in std_ulogic;
2783 WE : in std_ulogic
2812 WE : in std_ulogic
2784 );
2813 );
2785 end component;
2814 end component;
2786
2815
2787
2816
2788 component BUF
2817 component BUF
2789 port
2818 port
2790 (
2819 (
2791 O : out std_ulogic;
2820 O : out std_ulogic;
2792 I : in std_ulogic
2821 I : in std_ulogic
2793 );
2822 );
2794 end component;
2823 end component;
2795 component LUT5
2824 component LUT5
2796 generic
2825 generic
2797 (
2826 (
2798 INIT : bit_vector := X"00000000"
2827 INIT : bit_vector := X"00000000"
2799 );
2828 );
2800 port
2829 port
2801 (
2830 (
2802 O : out std_ulogic;
2831 O : out std_ulogic;
2803 I0 : in std_ulogic;
2832 I0 : in std_ulogic;
2804 I1 : in std_ulogic;
2833 I1 : in std_ulogic;
2805 I2 : in std_ulogic;
2834 I2 : in std_ulogic;
2806 I3 : in std_ulogic;
2835 I3 : in std_ulogic;
2807 I4 : in std_ulogic
2836 I4 : in std_ulogic
2808 );
2837 );
2809 end component;
2838 end component;
2810 component LUT5_L
2839 component LUT5_L
2811 generic
2840 generic
2812 (
2841 (
2813 INIT : bit_vector := X"00000000"
2842 INIT : bit_vector := X"00000000"
2814 );
2843 );
2815 port
2844 port
2816 (
2845 (
2817 LO : out std_ulogic;
2846 LO : out std_ulogic;
2818 I0 : in std_ulogic;
2847 I0 : in std_ulogic;
2819 I1 : in std_ulogic;
2848 I1 : in std_ulogic;
2820 I2 : in std_ulogic;
2849 I2 : in std_ulogic;
2821 I3 : in std_ulogic;
2850 I3 : in std_ulogic;
2822 I4 : in std_ulogic
2851 I4 : in std_ulogic
2823 );
2852 );
2824 end component;
2853 end component;
2825 component LUT6
2854 component LUT6
2826 generic
2855 generic
2827 (
2856 (
2828 INIT : bit_vector := X"0000000000000000"
2857 INIT : bit_vector := X"0000000000000000"
2829 );
2858 );
2830 port
2859 port
2831 (
2860 (
2832 O : out std_ulogic;
2861 O : out std_ulogic;
2833 I0 : in std_ulogic;
2862 I0 : in std_ulogic;
2834 I1 : in std_ulogic;
2863 I1 : in std_ulogic;
2835 I2 : in std_ulogic;
2864 I2 : in std_ulogic;
2836 I3 : in std_ulogic;
2865 I3 : in std_ulogic;
2837 I4 : in std_ulogic;
2866 I4 : in std_ulogic;
2838 I5 : in std_ulogic
2867 I5 : in std_ulogic
2839 );
2868 );
2840 end component;
2869 end component;
2841 component LUT6_L
2870 component LUT6_L
2842 generic
2871 generic
2843 (
2872 (
2844 INIT : bit_vector := X"0000000000000000"
2873 INIT : bit_vector := X"0000000000000000"
2845 );
2874 );
2846 port
2875 port
2847 (
2876 (
2848 LO : out std_ulogic;
2877 LO : out std_ulogic;
2849 I0 : in std_ulogic;
2878 I0 : in std_ulogic;
2850 I1 : in std_ulogic;
2879 I1 : in std_ulogic;
2851 I2 : in std_ulogic;
2880 I2 : in std_ulogic;
2852 I3 : in std_ulogic;
2881 I3 : in std_ulogic;
2853 I4 : in std_ulogic;
2882 I4 : in std_ulogic;
2854 I5 : in std_ulogic
2883 I5 : in std_ulogic
2855 );
2884 );
2856 end component;
2885 end component;
2857
2886
2858 component RAM128X1S
2887 component RAM128X1S
2859
2888
2860 generic (
2889 generic (
2861 INIT : bit_vector(127 downto 0) := X"00000000000000000000000000000000"
2890 INIT : bit_vector(127 downto 0) := X"00000000000000000000000000000000"
2862 );
2891 );
2863
2892
2864 port (
2893 port (
2865 O : out std_ulogic;
2894 O : out std_ulogic;
2866
2895
2867 A0 : in std_ulogic;
2896 A0 : in std_ulogic;
2868 A1 : in std_ulogic;
2897 A1 : in std_ulogic;
2869 A2 : in std_ulogic;
2898 A2 : in std_ulogic;
2870 A3 : in std_ulogic;
2899 A3 : in std_ulogic;
2871 A4 : in std_ulogic;
2900 A4 : in std_ulogic;
2872 A5 : in std_ulogic;
2901 A5 : in std_ulogic;
2873 A6 : in std_ulogic;
2902 A6 : in std_ulogic;
2874 D : in std_ulogic;
2903 D : in std_ulogic;
2875 WCLK : in std_ulogic;
2904 WCLK : in std_ulogic;
2876 WE : in std_ulogic
2905 WE : in std_ulogic
2877 );
2906 );
2878 end component;
2907 end component;
2879
2908
2880 component SRLC16E
2909 component SRLC16E
2881
2910
2882 generic (
2911 generic (
2883 INIT : bit_vector := X"0000"
2912 INIT : bit_vector := X"0000"
2884 );
2913 );
2885
2914
2886 port (
2915 port (
2887 Q : out STD_ULOGIC;
2916 Q : out STD_ULOGIC;
2888 Q15 : out STD_ULOGIC;
2917 Q15 : out STD_ULOGIC;
2889
2918
2890 A0 : in STD_ULOGIC;
2919 A0 : in STD_ULOGIC;
2891 A1 : in STD_ULOGIC;
2920 A1 : in STD_ULOGIC;
2892 A2 : in STD_ULOGIC;
2921 A2 : in STD_ULOGIC;
2893 A3 : in STD_ULOGIC;
2922 A3 : in STD_ULOGIC;
2894 CE : in STD_ULOGIC;
2923 CE : in STD_ULOGIC;
2895 CLK : in STD_ULOGIC;
2924 CLK : in STD_ULOGIC;
2896 D : in STD_ULOGIC
2925 D : in STD_ULOGIC
2897 );
2926 );
2898 end component;
2927 end component;
2899
2928
2900 component LD_1
2929 component LD_1
2901 generic(
2930 generic(
2902 INIT : bit := '0'
2931 INIT : bit := '0'
2903 );
2932 );
2904
2933
2905 port(
2934 port(
2906 Q : out std_ulogic := '0';
2935 Q : out std_ulogic := '0';
2907
2936
2908 D : in std_ulogic;
2937 D : in std_ulogic;
2909 G : in std_ulogic
2938 G : in std_ulogic
2910 );
2939 );
2911 end component;
2940 end component;
2912
2941
2913 component RAM32X1D
2942 component RAM32X1D
2914
2943
2915 generic (
2944 generic (
2916 INIT : bit_vector(31 downto 0) := X"00000000"
2945 INIT : bit_vector(31 downto 0) := X"00000000"
2917 );
2946 );
2918
2947
2919 port (
2948 port (
2920 DPO : out std_ulogic;
2949 DPO : out std_ulogic;
2921 SPO : out std_ulogic;
2950 SPO : out std_ulogic;
2922
2951
2923 A0 : in std_ulogic;
2952 A0 : in std_ulogic;
2924 A1 : in std_ulogic;
2953 A1 : in std_ulogic;
2925 A2 : in std_ulogic;
2954 A2 : in std_ulogic;
2926 A3 : in std_ulogic;
2955 A3 : in std_ulogic;
2927 A4 : in std_ulogic;
2956 A4 : in std_ulogic;
2928 D : in std_ulogic;
2957 D : in std_ulogic;
2929 DPRA0 : in std_ulogic;
2958 DPRA0 : in std_ulogic;
2930 DPRA1 : in std_ulogic;
2959 DPRA1 : in std_ulogic;
2931 DPRA2 : in std_ulogic;
2960 DPRA2 : in std_ulogic;
2932 DPRA3 : in std_ulogic;
2961 DPRA3 : in std_ulogic;
2933 DPRA4 : in std_ulogic;
2962 DPRA4 : in std_ulogic;
2934 WCLK : in std_ulogic;
2963 WCLK : in std_ulogic;
2935 WE : in std_ulogic
2964 WE : in std_ulogic
2936 );
2965 );
2937 end component;
2966 end component;
2938
2967
2939 component FD_1
2968 component FD_1
2940 generic(
2969 generic(
2941 INIT : bit := '0'
2970 INIT : bit := '0'
2942 );
2971 );
2943
2972
2944 port(
2973 port(
2945 Q : out std_ulogic;
2974 Q : out std_ulogic;
2946
2975
2947 C : in std_ulogic;
2976 C : in std_ulogic;
2948 D : in std_ulogic
2977 D : in std_ulogic
2949 );
2978 );
2950 end component;
2979 end component;
2951
2980
2952 component XORCY_L
2981 component XORCY_L
2953 port(
2982 port(
2954 LO : out std_ulogic;
2983 LO : out std_ulogic;
2955
2984
2956 CI : in std_ulogic;
2985 CI : in std_ulogic;
2957 LI : in std_ulogic
2986 LI : in std_ulogic
2958 );
2987 );
2959 end component;
2988 end component;
2960
2989
2961 component RAM32M
2990 component RAM32M
2962 generic (
2991 generic (
2963 INIT_A : bit_vector(63 downto 0) := X"0000000000000000";
2992 INIT_A : bit_vector(63 downto 0) := X"0000000000000000";
2964 INIT_B : bit_vector(63 downto 0) := X"0000000000000000";
2993 INIT_B : bit_vector(63 downto 0) := X"0000000000000000";
2965 INIT_C : bit_vector(63 downto 0) := X"0000000000000000";
2994 INIT_C : bit_vector(63 downto 0) := X"0000000000000000";
2966 INIT_D : bit_vector(63 downto 0) := X"0000000000000000"
2995 INIT_D : bit_vector(63 downto 0) := X"0000000000000000"
2967 );
2996 );
2968
2997
2969 port (
2998 port (
2970 DOA : out std_logic_vector (1 downto 0);
2999 DOA : out std_logic_vector (1 downto 0);
2971 DOB : out std_logic_vector (1 downto 0);
3000 DOB : out std_logic_vector (1 downto 0);
2972 DOC : out std_logic_vector (1 downto 0);
3001 DOC : out std_logic_vector (1 downto 0);
2973 DOD : out std_logic_vector (1 downto 0);
3002 DOD : out std_logic_vector (1 downto 0);
2974
3003
2975 ADDRA : in std_logic_vector(4 downto 0);
3004 ADDRA : in std_logic_vector(4 downto 0);
2976 ADDRB : in std_logic_vector(4 downto 0);
3005 ADDRB : in std_logic_vector(4 downto 0);
2977 ADDRC : in std_logic_vector(4 downto 0);
3006 ADDRC : in std_logic_vector(4 downto 0);
2978 ADDRD : in std_logic_vector(4 downto 0);
3007 ADDRD : in std_logic_vector(4 downto 0);
2979 DIA : in std_logic_vector (1 downto 0);
3008 DIA : in std_logic_vector (1 downto 0);
2980 DIB : in std_logic_vector (1 downto 0);
3009 DIB : in std_logic_vector (1 downto 0);
2981 DIC : in std_logic_vector (1 downto 0);
3010 DIC : in std_logic_vector (1 downto 0);
2982 DID : in std_logic_vector (1 downto 0);
3011 DID : in std_logic_vector (1 downto 0);
2983 WCLK : in std_ulogic;
3012 WCLK : in std_ulogic;
2984 WE : in std_ulogic
3013 WE : in std_ulogic
2985 );
3014 );
2986 end component;
3015 end component;
2987
3016
2988 component RAM128X1D
3017 component RAM128X1D
2989 generic
3018 generic
2990 (
3019 (
2991 INIT : bit_vector(127 downto 0) := X"00000000000000000000000000000000"
3020 INIT : bit_vector(127 downto 0) := X"00000000000000000000000000000000"
2992 );
3021 );
2993 port
3022 port
2994 (
3023 (
2995 DPO : out std_ulogic;
3024 DPO : out std_ulogic;
2996 SPO : out std_ulogic;
3025 SPO : out std_ulogic;
2997 A : in std_logic_vector(6 downto 0);
3026 A : in std_logic_vector(6 downto 0);
2998 D : in std_ulogic;
3027 D : in std_ulogic;
2999 DPRA : in std_logic_vector(6 downto 0);
3028 DPRA : in std_logic_vector(6 downto 0);
3000 WCLK : in std_ulogic;
3029 WCLK : in std_ulogic;
3001 WE : in std_ulogic
3030 WE : in std_ulogic
3002 );
3031 );
3003 end component;
3032 end component;
3004
3033
3005 component RAM64M
3034 component RAM64M
3006 generic (
3035 generic (
3007 INIT_A : bit_vector(63 downto 0) := X"0000000000000000";
3036 INIT_A : bit_vector(63 downto 0) := X"0000000000000000";
3008 INIT_B : bit_vector(63 downto 0) := X"0000000000000000";
3037 INIT_B : bit_vector(63 downto 0) := X"0000000000000000";
3009 INIT_C : bit_vector(63 downto 0) := X"0000000000000000";
3038 INIT_C : bit_vector(63 downto 0) := X"0000000000000000";
3010 INIT_D : bit_vector(63 downto 0) := X"0000000000000000"
3039 INIT_D : bit_vector(63 downto 0) := X"0000000000000000"
3011 );
3040 );
3012
3041
3013 port (
3042 port (
3014 DOA : out std_ulogic;
3043 DOA : out std_ulogic;
3015 DOB : out std_ulogic;
3044 DOB : out std_ulogic;
3016 DOC : out std_ulogic;
3045 DOC : out std_ulogic;
3017 DOD : out std_ulogic;
3046 DOD : out std_ulogic;
3018
3047
3019 ADDRA : in std_logic_vector(5 downto 0);
3048 ADDRA : in std_logic_vector(5 downto 0);
3020 ADDRB : in std_logic_vector(5 downto 0);
3049 ADDRB : in std_logic_vector(5 downto 0);
3021 ADDRC : in std_logic_vector(5 downto 0);
3050 ADDRC : in std_logic_vector(5 downto 0);
3022 ADDRD : in std_logic_vector(5 downto 0);
3051 ADDRD : in std_logic_vector(5 downto 0);
3023 DIA : in std_ulogic;
3052 DIA : in std_ulogic;
3024 DIB : in std_ulogic;
3053 DIB : in std_ulogic;
3025 DIC : in std_ulogic;
3054 DIC : in std_ulogic;
3026 DID : in std_ulogic;
3055 DID : in std_ulogic;
3027 WCLK : in std_ulogic;
3056 WCLK : in std_ulogic;
3028 WE : in std_ulogic
3057 WE : in std_ulogic
3029 );
3058 );
3030 end component;
3059 end component;
3031
3060
3032 component XOR2
3061 component XOR2
3033 port(
3062 port(
3034 O : out std_ulogic;
3063 O : out std_ulogic;
3035
3064
3036 I0 : in std_ulogic;
3065 I0 : in std_ulogic;
3037 I1 : in std_ulogic
3066 I1 : in std_ulogic
3038 );
3067 );
3039 end component;
3068 end component;
3040
3069
3041 component BSCANE2
3070 component BSCANE2
3042 generic (
3071 generic (
3043 DISABLE_JTAG : string := "FALSE";
3072 DISABLE_JTAG : string := "FALSE";
3044 JTAG_CHAIN : integer := 1
3073 JTAG_CHAIN : integer := 1
3045 );
3074 );
3046 port (
3075 port (
3047 CAPTURE : out std_ulogic := 'H';
3076 CAPTURE : out std_ulogic := 'H';
3048 DRCK : out std_ulogic := 'H';
3077 DRCK : out std_ulogic := 'H';
3049 RESET : out std_ulogic := 'H';
3078 RESET : out std_ulogic := 'H';
3050 RUNTEST : out std_ulogic := 'L';
3079 RUNTEST : out std_ulogic := 'L';
3051 SEL : out std_ulogic := 'L';
3080 SEL : out std_ulogic := 'L';
3052 SHIFT : out std_ulogic := 'L';
3081 SHIFT : out std_ulogic := 'L';
3053 TCK : out std_ulogic := 'L';
3082 TCK : out std_ulogic := 'L';
3054 TDI : out std_ulogic := 'L';
3083 TDI : out std_ulogic := 'L';
3055 TMS : out std_ulogic := 'L';
3084 TMS : out std_ulogic := 'L';
3056 UPDATE : out std_ulogic := 'L';
3085 UPDATE : out std_ulogic := 'L';
3057 TDO : in std_ulogic := 'X'
3086 TDO : in std_ulogic := 'X'
3058 );
3087 );
3059 end component;
3088 end component;
3060
3089
3061 component BSCAN_SPARTAN6
3090 component BSCAN_SPARTAN6
3062 generic (
3091 generic (
3063 JTAG_CHAIN : integer := 1
3092 JTAG_CHAIN : integer := 1
3064 );
3093 );
3065 port (
3094 port (
3066 CAPTURE : out std_ulogic := 'H';
3095 CAPTURE : out std_ulogic := 'H';
3067 DRCK : out std_ulogic := 'H';
3096 DRCK : out std_ulogic := 'H';
3068 RESET : out std_ulogic := 'H';
3097 RESET : out std_ulogic := 'H';
3069 RUNTEST : out std_ulogic := 'L';
3098 RUNTEST : out std_ulogic := 'L';
3070 SEL : out std_ulogic := 'L';
3099 SEL : out std_ulogic := 'L';
3071 SHIFT : out std_ulogic := 'L';
3100 SHIFT : out std_ulogic := 'L';
3072 TCK : out std_ulogic := 'L';
3101 TCK : out std_ulogic := 'L';
3073 TDI : out std_ulogic := 'L';
3102 TDI : out std_ulogic := 'L';
3074 TMS : out std_ulogic := 'L';
3103 TMS : out std_ulogic := 'L';
3075 UPDATE : out std_ulogic := 'L';
3104 UPDATE : out std_ulogic := 'L';
3076 TDO : in std_ulogic := 'X'
3105 TDO : in std_ulogic := 'X'
3077 );
3106 );
3078 end component;
3107 end component;
3079
3108
3080 component BSCAN_VIRTEX6
3109 component BSCAN_VIRTEX6
3081 generic (
3110 generic (
3082 DISABLE_JTAG : boolean := FALSE;
3111 DISABLE_JTAG : boolean := FALSE;
3083 JTAG_CHAIN : integer := 1
3112 JTAG_CHAIN : integer := 1
3084 );
3113 );
3085 port (
3114 port (
3086 CAPTURE : out std_ulogic := 'H';
3115 CAPTURE : out std_ulogic := 'H';
3087 DRCK : out std_ulogic := 'H';
3116 DRCK : out std_ulogic := 'H';
3088 RESET : out std_ulogic := 'H';
3117 RESET : out std_ulogic := 'H';
3089 RUNTEST : out std_ulogic := 'L';
3118 RUNTEST : out std_ulogic := 'L';
3090 SEL : out std_ulogic := 'L';
3119 SEL : out std_ulogic := 'L';
3091 SHIFT : out std_ulogic := 'L';
3120 SHIFT : out std_ulogic := 'L';
3092 TCK : out std_ulogic := 'L';
3121 TCK : out std_ulogic := 'L';
3093 TDI : out std_ulogic := 'L';
3122 TDI : out std_ulogic := 'L';
3094 TMS : out std_ulogic := 'L';
3123 TMS : out std_ulogic := 'L';
3095 UPDATE : out std_ulogic := 'L';
3124 UPDATE : out std_ulogic := 'L';
3096 TDO : in std_ulogic := 'X'
3125 TDO : in std_ulogic := 'X'
3097 );
3126 );
3098 end component;
3127 end component;
3099
3128
3100 component SRL16
3129 component SRL16
3101 generic ( INIT : bit_vector := X"0000");
3130 generic ( INIT : bit_vector := X"0000");
3102 port (
3131 port (
3103 Q : out STD_ULOGIC;
3132 Q : out STD_ULOGIC;
3104 A0 : in STD_ULOGIC;
3133 A0 : in STD_ULOGIC;
3105 A1 : in STD_ULOGIC;
3134 A1 : in STD_ULOGIC;
3106 A2 : in STD_ULOGIC;
3135 A2 : in STD_ULOGIC;
3107 A3 : in STD_ULOGIC;
3136 A3 : in STD_ULOGIC;
3108 CLK : in STD_ULOGIC;
3137 CLK : in STD_ULOGIC;
3109 D : in STD_ULOGIC);
3138 D : in STD_ULOGIC);
3110 end component;
3139 end component;
3111
3140
3112 component LUT6_2
3141 component LUT6_2
3113 generic(
3142 generic(
3114 INIT : bit_vector := X"0000000000000000"
3143 INIT : bit_vector := X"0000000000000000"
3115 );
3144 );
3116
3145
3117 port(
3146 port(
3118 O5 : out std_ulogic;
3147 O5 : out std_ulogic;
3119 O6 : out std_ulogic;
3148 O6 : out std_ulogic;
3120
3149
3121 I0 : in std_ulogic;
3150 I0 : in std_ulogic;
3122 I1 : in std_ulogic;
3151 I1 : in std_ulogic;
3123 I2 : in std_ulogic;
3152 I2 : in std_ulogic;
3124 I3 : in std_ulogic;
3153 I3 : in std_ulogic;
3125 I4 : in std_ulogic;
3154 I4 : in std_ulogic;
3126 I5 : in std_ulogic
3155 I5 : in std_ulogic
3127 );
3156 );
3128 end component;
3157 end component;
3129
3158
3130 component DSP48E
3159 component DSP48E
3131
3160
3132 generic(
3161 generic(
3133
3162
3134 SIM_MODE : string := "SAFE";
3163 SIM_MODE : string := "SAFE";
3135
3164
3136 ACASCREG : integer := 1;
3165 ACASCREG : integer := 1;
3137 ALUMODEREG : integer := 1;
3166 ALUMODEREG : integer := 1;
3138 AREG : integer := 1;
3167 AREG : integer := 1;
3139 AUTORESET_PATTERN_DETECT : boolean := FALSE;
3168 AUTORESET_PATTERN_DETECT : boolean := FALSE;
3140 AUTORESET_PATTERN_DETECT_OPTINV : string := "MATCH";
3169 AUTORESET_PATTERN_DETECT_OPTINV : string := "MATCH";
3141 A_INPUT : string := "DIRECT";
3170 A_INPUT : string := "DIRECT";
3142 BCASCREG : integer := 1;
3171 BCASCREG : integer := 1;
3143 BREG : integer := 1;
3172 BREG : integer := 1;
3144 B_INPUT : string := "DIRECT";
3173 B_INPUT : string := "DIRECT";
3145 CARRYINREG : integer := 1;
3174 CARRYINREG : integer := 1;
3146 CARRYINSELREG : integer := 1;
3175 CARRYINSELREG : integer := 1;
3147 CREG : integer := 1;
3176 CREG : integer := 1;
3148 MASK : bit_vector := X"3FFFFFFFFFFF";
3177 MASK : bit_vector := X"3FFFFFFFFFFF";
3149 MREG : integer := 1;
3178 MREG : integer := 1;
3150 MULTCARRYINREG : integer := 1;
3179 MULTCARRYINREG : integer := 1;
3151 OPMODEREG : integer := 1;
3180 OPMODEREG : integer := 1;
3152 PATTERN : bit_vector := X"000000000000";
3181 PATTERN : bit_vector := X"000000000000";
3153 PREG : integer := 1;
3182 PREG : integer := 1;
3154 SEL_MASK : string := "MASK";
3183 SEL_MASK : string := "MASK";
3155 SEL_PATTERN : string := "PATTERN";
3184 SEL_PATTERN : string := "PATTERN";
3156 SEL_ROUNDING_MASK : string := "SEL_MASK";
3185 SEL_ROUNDING_MASK : string := "SEL_MASK";
3157 USE_MULT : string := "MULT_S";
3186 USE_MULT : string := "MULT_S";
3158 USE_PATTERN_DETECT : string := "NO_PATDET";
3187 USE_PATTERN_DETECT : string := "NO_PATDET";
3159 USE_SIMD : string := "ONE48"
3188 USE_SIMD : string := "ONE48"
3160 );
3189 );
3161
3190
3162 port(
3191 port(
3163 ACOUT : out std_logic_vector(29 downto 0);
3192 ACOUT : out std_logic_vector(29 downto 0);
3164 BCOUT : out std_logic_vector(17 downto 0);
3193 BCOUT : out std_logic_vector(17 downto 0);
3165 CARRYCASCOUT : out std_ulogic;
3194 CARRYCASCOUT : out std_ulogic;
3166 CARRYOUT : out std_logic_vector(3 downto 0);
3195 CARRYOUT : out std_logic_vector(3 downto 0);
3167 MULTSIGNOUT : out std_ulogic;
3196 MULTSIGNOUT : out std_ulogic;
3168 OVERFLOW : out std_ulogic;
3197 OVERFLOW : out std_ulogic;
3169 P : out std_logic_vector(47 downto 0);
3198 P : out std_logic_vector(47 downto 0);
3170 PATTERNBDETECT : out std_ulogic;
3199 PATTERNBDETECT : out std_ulogic;
3171 PATTERNDETECT : out std_ulogic;
3200 PATTERNDETECT : out std_ulogic;
3172 PCOUT : out std_logic_vector(47 downto 0);
3201 PCOUT : out std_logic_vector(47 downto 0);
3173 UNDERFLOW : out std_ulogic;
3202 UNDERFLOW : out std_ulogic;
3174
3203
3175 A : in std_logic_vector(29 downto 0);
3204 A : in std_logic_vector(29 downto 0);
3176 ACIN : in std_logic_vector(29 downto 0);
3205 ACIN : in std_logic_vector(29 downto 0);
3177 ALUMODE : in std_logic_vector(3 downto 0);
3206 ALUMODE : in std_logic_vector(3 downto 0);
3178 B : in std_logic_vector(17 downto 0);
3207 B : in std_logic_vector(17 downto 0);
3179 BCIN : in std_logic_vector(17 downto 0);
3208 BCIN : in std_logic_vector(17 downto 0);
3180 C : in std_logic_vector(47 downto 0);
3209 C : in std_logic_vector(47 downto 0);
3181 CARRYCASCIN : in std_ulogic;
3210 CARRYCASCIN : in std_ulogic;
3182 CARRYIN : in std_ulogic;
3211 CARRYIN : in std_ulogic;
3183 CARRYINSEL : in std_logic_vector(2 downto 0);
3212 CARRYINSEL : in std_logic_vector(2 downto 0);
3184 CEA1 : in std_ulogic;
3213 CEA1 : in std_ulogic;
3185 CEA2 : in std_ulogic;
3214 CEA2 : in std_ulogic;
3186 CEALUMODE : in std_ulogic;
3215 CEALUMODE : in std_ulogic;
3187 CEB1 : in std_ulogic;
3216 CEB1 : in std_ulogic;
3188 CEB2 : in std_ulogic;
3217 CEB2 : in std_ulogic;
3189 CEC : in std_ulogic;
3218 CEC : in std_ulogic;
3190 CECARRYIN : in std_ulogic;
3219 CECARRYIN : in std_ulogic;
3191 CECTRL : in std_ulogic;
3220 CECTRL : in std_ulogic;
3192 CEM : in std_ulogic;
3221 CEM : in std_ulogic;
3193 CEMULTCARRYIN : in std_ulogic;
3222 CEMULTCARRYIN : in std_ulogic;
3194 CEP : in std_ulogic;
3223 CEP : in std_ulogic;
3195 CLK : in std_ulogic;
3224 CLK : in std_ulogic;
3196 MULTSIGNIN : in std_ulogic;
3225 MULTSIGNIN : in std_ulogic;
3197 OPMODE : in std_logic_vector(6 downto 0);
3226 OPMODE : in std_logic_vector(6 downto 0);
3198 PCIN : in std_logic_vector(47 downto 0);
3227 PCIN : in std_logic_vector(47 downto 0);
3199 RSTA : in std_ulogic;
3228 RSTA : in std_ulogic;
3200 RSTALLCARRYIN : in std_ulogic;
3229 RSTALLCARRYIN : in std_ulogic;
3201 RSTALUMODE : in std_ulogic;
3230 RSTALUMODE : in std_ulogic;
3202 RSTB : in std_ulogic;
3231 RSTB : in std_ulogic;
3203 RSTC : in std_ulogic;
3232 RSTC : in std_ulogic;
3204 RSTCTRL : in std_ulogic;
3233 RSTCTRL : in std_ulogic;
3205 RSTM : in std_ulogic;
3234 RSTM : in std_ulogic;
3206 RSTP : in std_ulogic
3235 RSTP : in std_ulogic
3207 );
3236 );
3208
3237
3209 end component;
3238 end component;
3210
3239
3211 component RAMB18
3240 component RAMB18
3212 generic (
3241 generic (
3213
3242
3214 DOA_REG : integer := 0;
3243 DOA_REG : integer := 0;
3215 DOB_REG : integer := 0;
3244 DOB_REG : integer := 0;
3216 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3245 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3217 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3246 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3218 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3247 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3219 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3248 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3220 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3249 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3221 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3250 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3222 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3251 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3223 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3252 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3224 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3253 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3225 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3254 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3226 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3255 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3227 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3256 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3228 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3257 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3229 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3258 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3230 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3259 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3231 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3260 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3232 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3261 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3233 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3262 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3234 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3263 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3235 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3264 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3236 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3265 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3237 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3266 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3238 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3267 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3239 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3268 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3240 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3269 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3241 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3270 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3242 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3271 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3243 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3272 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3244 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3273 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3245 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3274 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3246 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3275 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3247 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3276 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3248 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3277 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3249 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3278 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3250 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3279 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3251 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3280 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3252 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3281 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3253 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3282 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3254 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3283 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3255 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3284 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3256 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3285 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3257 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3286 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3258 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3287 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3259 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3288 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3260 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3289 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3261 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3290 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3262 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3291 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3263 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3292 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3264 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3293 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3265 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3294 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3266 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3295 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3267 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3296 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3268 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3297 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3269 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3298 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3270 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3299 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3271 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3300 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3272 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3301 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3273 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3302 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3274 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3303 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3275 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3304 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3276 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3305 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3277 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3306 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3278 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3307 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3279 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3308 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3280 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3309 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3281 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3310 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3282 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3311 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3283 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3312 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3284 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3313 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3285 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3314 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3286 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3315 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3287 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3316 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3288 INIT_A : bit_vector := X"00000";
3317 INIT_A : bit_vector := X"00000";
3289 INIT_B : bit_vector := X"00000";
3318 INIT_B : bit_vector := X"00000";
3290 INIT_FILE : string := "NONE";
3319 INIT_FILE : string := "NONE";
3291 READ_WIDTH_A : integer := 0;
3320 READ_WIDTH_A : integer := 0;
3292 READ_WIDTH_B : integer := 0;
3321 READ_WIDTH_B : integer := 0;
3293 SIM_COLLISION_CHECK : string := "ALL";
3322 SIM_COLLISION_CHECK : string := "ALL";
3294 SIM_MODE : string := "SAFE";
3323 SIM_MODE : string := "SAFE";
3295 SRVAL_A : bit_vector := X"00000";
3324 SRVAL_A : bit_vector := X"00000";
3296 SRVAL_B : bit_vector := X"00000";
3325 SRVAL_B : bit_vector := X"00000";
3297 WRITE_MODE_A : string := "WRITE_FIRST";
3326 WRITE_MODE_A : string := "WRITE_FIRST";
3298 WRITE_MODE_B : string := "WRITE_FIRST";
3327 WRITE_MODE_B : string := "WRITE_FIRST";
3299 WRITE_WIDTH_A : integer := 0;
3328 WRITE_WIDTH_A : integer := 0;
3300 WRITE_WIDTH_B : integer := 0
3329 WRITE_WIDTH_B : integer := 0
3301
3330
3302 );
3331 );
3303
3332
3304 port (
3333 port (
3305
3334
3306 DOA : out std_logic_vector(15 downto 0);
3335 DOA : out std_logic_vector(15 downto 0);
3307 DOB : out std_logic_vector(15 downto 0);
3336 DOB : out std_logic_vector(15 downto 0);
3308 DOPA : out std_logic_vector(1 downto 0);
3337 DOPA : out std_logic_vector(1 downto 0);
3309 DOPB : out std_logic_vector(1 downto 0);
3338 DOPB : out std_logic_vector(1 downto 0);
3310
3339
3311 ADDRA : in std_logic_vector(13 downto 0);
3340 ADDRA : in std_logic_vector(13 downto 0);
3312 ADDRB : in std_logic_vector(13 downto 0);
3341 ADDRB : in std_logic_vector(13 downto 0);
3313 CLKA : in std_ulogic;
3342 CLKA : in std_ulogic;
3314 CLKB : in std_ulogic;
3343 CLKB : in std_ulogic;
3315 DIA : in std_logic_vector(15 downto 0);
3344 DIA : in std_logic_vector(15 downto 0);
3316 DIB : in std_logic_vector(15 downto 0);
3345 DIB : in std_logic_vector(15 downto 0);
3317 DIPA : in std_logic_vector(1 downto 0);
3346 DIPA : in std_logic_vector(1 downto 0);
3318 DIPB : in std_logic_vector(1 downto 0);
3347 DIPB : in std_logic_vector(1 downto 0);
3319 ENA : in std_ulogic;
3348 ENA : in std_ulogic;
3320 ENB : in std_ulogic;
3349 ENB : in std_ulogic;
3321 REGCEA : in std_ulogic;
3350 REGCEA : in std_ulogic;
3322 REGCEB : in std_ulogic;
3351 REGCEB : in std_ulogic;
3323 SSRA : in std_ulogic;
3352 SSRA : in std_ulogic;
3324 SSRB : in std_ulogic;
3353 SSRB : in std_ulogic;
3325 WEA : in std_logic_vector(1 downto 0);
3354 WEA : in std_logic_vector(1 downto 0);
3326 WEB : in std_logic_vector(1 downto 0)
3355 WEB : in std_logic_vector(1 downto 0)
3327
3356
3328 );
3357 );
3329 end component;
3358 end component;
3330
3359
3331 component RAMB36
3360 component RAMB36
3332 generic (
3361 generic (
3333
3362
3334 DOA_REG : integer := 0;
3363 DOA_REG : integer := 0;
3335 DOB_REG : integer := 0;
3364 DOB_REG : integer := 0;
3336 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3365 INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3337 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3366 INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3338 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3367 INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3339 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3368 INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3340 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3369 INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3341 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3370 INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3342 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3371 INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3343 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3372 INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3344 INITP_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3373 INITP_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3345 INITP_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3374 INITP_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3346 INITP_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3375 INITP_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3347 INITP_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3376 INITP_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3348 INITP_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3377 INITP_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3349 INITP_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3378 INITP_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3350 INITP_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3379 INITP_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3351 INITP_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3380 INITP_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3352 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3381 INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3353 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3382 INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3354 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3383 INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3355 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3384 INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3356 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3385 INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3357 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3386 INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3358 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3387 INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3359 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3388 INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3360 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3389 INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3361 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3390 INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3362 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3391 INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3363 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3392 INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3364 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3393 INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3365 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3394 INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3366 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3395 INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3367 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3396 INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3368 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3397 INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3369 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3398 INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3370 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3399 INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3371 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3400 INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3372 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3401 INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3373 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3402 INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3374 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3403 INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3375 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3404 INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3376 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3405 INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3377 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3406 INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3378 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3407 INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3379 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3408 INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3380 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3409 INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3381 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3410 INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3382 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3411 INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3383 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3412 INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3384 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3413 INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3385 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3414 INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3386 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3415 INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3387 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3416 INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3388 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3417 INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3389 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3418 INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3390 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3419 INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3391 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3420 INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3392 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3421 INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3393 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3422 INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3394 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3423 INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3395 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3424 INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3396 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3425 INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3397 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3426 INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3398 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3427 INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3399 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3428 INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3400 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3429 INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3401 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3430 INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3402 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3431 INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3403 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3432 INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3404 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3433 INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3405 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3434 INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3406 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3435 INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3407 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3436 INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3408 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3437 INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3409 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3438 INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3410 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3439 INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3411 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3440 INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3412 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3441 INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3413 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3442 INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3414 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3443 INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3415 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3444 INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3416 INIT_40 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3445 INIT_40 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3417 INIT_41 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3446 INIT_41 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3418 INIT_42 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3447 INIT_42 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3419 INIT_43 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3448 INIT_43 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3420 INIT_44 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3449 INIT_44 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3421 INIT_45 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3450 INIT_45 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3422 INIT_46 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3451 INIT_46 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3423 INIT_47 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3452 INIT_47 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3424 INIT_48 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3453 INIT_48 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3425 INIT_49 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3454 INIT_49 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3426 INIT_4A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3455 INIT_4A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3427 INIT_4B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3456 INIT_4B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3428 INIT_4C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3457 INIT_4C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3429 INIT_4D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3458 INIT_4D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3430 INIT_4E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3459 INIT_4E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3431 INIT_4F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3460 INIT_4F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3432 INIT_50 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3461 INIT_50 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3433 INIT_51 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3462 INIT_51 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3434 INIT_52 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3463 INIT_52 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3435 INIT_53 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3464 INIT_53 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3436 INIT_54 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3465 INIT_54 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3437 INIT_55 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3466 INIT_55 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3438 INIT_56 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3467 INIT_56 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3439 INIT_57 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3468 INIT_57 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3440 INIT_58 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3469 INIT_58 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3441 INIT_59 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3470 INIT_59 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3442 INIT_5A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3471 INIT_5A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3443 INIT_5B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3472 INIT_5B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3444 INIT_5C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3473 INIT_5C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3445 INIT_5D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3474 INIT_5D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3446 INIT_5E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3475 INIT_5E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3447 INIT_5F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3476 INIT_5F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3448 INIT_60 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3477 INIT_60 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3449 INIT_61 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3478 INIT_61 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3450 INIT_62 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3479 INIT_62 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3451 INIT_63 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3480 INIT_63 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3452 INIT_64 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3481 INIT_64 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3453 INIT_65 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3482 INIT_65 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3454 INIT_66 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3483 INIT_66 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3455 INIT_67 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3484 INIT_67 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3456 INIT_68 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3485 INIT_68 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3457 INIT_69 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3486 INIT_69 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3458 INIT_6A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3487 INIT_6A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3459 INIT_6B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3488 INIT_6B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3460 INIT_6C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3489 INIT_6C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3461 INIT_6D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3490 INIT_6D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3462 INIT_6E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3491 INIT_6E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3463 INIT_6F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3492 INIT_6F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3464 INIT_70 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3493 INIT_70 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3465 INIT_71 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3494 INIT_71 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3466 INIT_72 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3495 INIT_72 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3467 INIT_73 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3496 INIT_73 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3468 INIT_74 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3497 INIT_74 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3469 INIT_75 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3498 INIT_75 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3470 INIT_76 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3499 INIT_76 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3471 INIT_77 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3500 INIT_77 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3472 INIT_78 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3501 INIT_78 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3473 INIT_79 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3502 INIT_79 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3474 INIT_7A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3503 INIT_7A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3475 INIT_7B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3504 INIT_7B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3476 INIT_7C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3505 INIT_7C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3477 INIT_7D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3506 INIT_7D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3478 INIT_7E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3507 INIT_7E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3479 INIT_7F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3508 INIT_7F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
3480 INIT_A : bit_vector := X"000000000";
3509 INIT_A : bit_vector := X"000000000";
3481 INIT_B : bit_vector := X"000000000";
3510 INIT_B : bit_vector := X"000000000";
3482 INIT_FILE : string := "NONE";
3511 INIT_FILE : string := "NONE";
3483 RAM_EXTENSION_A : string := "NONE";
3512 RAM_EXTENSION_A : string := "NONE";
3484 RAM_EXTENSION_B : string := "NONE";
3513 RAM_EXTENSION_B : string := "NONE";
3485 READ_WIDTH_A : integer := 0;
3514 READ_WIDTH_A : integer := 0;
3486 READ_WIDTH_B : integer := 0;
3515 READ_WIDTH_B : integer := 0;
3487 SIM_COLLISION_CHECK : string := "ALL";
3516 SIM_COLLISION_CHECK : string := "ALL";
3488 SIM_MODE : string := "SAFE";
3517 SIM_MODE : string := "SAFE";
3489 SRVAL_A : bit_vector := X"000000000";
3518 SRVAL_A : bit_vector := X"000000000";
3490 SRVAL_B : bit_vector := X"000000000";
3519 SRVAL_B : bit_vector := X"000000000";
3491 WRITE_MODE_A : string := "WRITE_FIRST";
3520 WRITE_MODE_A : string := "WRITE_FIRST";
3492 WRITE_MODE_B : string := "WRITE_FIRST";
3521 WRITE_MODE_B : string := "WRITE_FIRST";
3493 WRITE_WIDTH_A : integer := 0;
3522 WRITE_WIDTH_A : integer := 0;
3494 WRITE_WIDTH_B : integer := 0
3523 WRITE_WIDTH_B : integer := 0
3495
3524
3496 );
3525 );
3497
3526
3498 port (
3527 port (
3499
3528
3500 CASCADEOUTLATA : out std_ulogic;
3529 CASCADEOUTLATA : out std_ulogic;
3501 CASCADEOUTLATB : out std_ulogic;
3530 CASCADEOUTLATB : out std_ulogic;
3502 CASCADEOUTREGA : out std_ulogic;
3531 CASCADEOUTREGA : out std_ulogic;
3503 CASCADEOUTREGB : out std_ulogic;
3532 CASCADEOUTREGB : out std_ulogic;
3504 DOA : out std_logic_vector(31 downto 0);
3533 DOA : out std_logic_vector(31 downto 0);
3505 DOB : out std_logic_vector(31 downto 0);
3534 DOB : out std_logic_vector(31 downto 0);
3506 DOPA : out std_logic_vector(3 downto 0);
3535 DOPA : out std_logic_vector(3 downto 0);
3507 DOPB : out std_logic_vector(3 downto 0);
3536 DOPB : out std_logic_vector(3 downto 0);
3508
3537
3509 ADDRA : in std_logic_vector(15 downto 0);
3538 ADDRA : in std_logic_vector(15 downto 0);
3510 ADDRB : in std_logic_vector(15 downto 0);
3539 ADDRB : in std_logic_vector(15 downto 0);
3511 CASCADEINLATA : in std_ulogic;
3540 CASCADEINLATA : in std_ulogic;
3512 CASCADEINLATB : in std_ulogic;
3541 CASCADEINLATB : in std_ulogic;
3513 CASCADEINREGA : in std_ulogic;
3542 CASCADEINREGA : in std_ulogic;
3514 CASCADEINREGB : in std_ulogic;
3543 CASCADEINREGB : in std_ulogic;
3515 CLKA : in std_ulogic;
3544 CLKA : in std_ulogic;
3516 CLKB : in std_ulogic;
3545 CLKB : in std_ulogic;
3517 DIA : in std_logic_vector(31 downto 0);
3546 DIA : in std_logic_vector(31 downto 0);
3518 DIB : in std_logic_vector(31 downto 0);
3547 DIB : in std_logic_vector(31 downto 0);
3519 DIPA : in std_logic_vector(3 downto 0);
3548 DIPA : in std_logic_vector(3 downto 0);
3520 DIPB : in std_logic_vector(3 downto 0);
3549 DIPB : in std_logic_vector(3 downto 0);
3521 ENA : in std_ulogic;
3550 ENA : in std_ulogic;
3522 ENB : in std_ulogic;
3551 ENB : in std_ulogic;
3523 REGCEA : in std_ulogic;
3552 REGCEA : in std_ulogic;
3524 REGCEB : in std_ulogic;
3553 REGCEB : in std_ulogic;
3525 SSRA : in std_ulogic;
3554 SSRA : in std_ulogic;
3526 SSRB : in std_ulogic;
3555 SSRB : in std_ulogic;
3527 WEA : in std_logic_vector(3 downto 0);
3556 WEA : in std_logic_vector(3 downto 0);
3528 WEB : in std_logic_vector(3 downto 0)
3557 WEB : in std_logic_vector(3 downto 0)
3529
3558
3530 );
3559 );
3531 end component;
3560 end component;
3532
3561
3533 component BUFGCE
3562 component BUFGCE
3534 port(
3563 port(
3535 O : out STD_ULOGIC;
3564 O : out STD_ULOGIC;
3536
3565
3537 CE: in STD_ULOGIC;
3566 CE: in STD_ULOGIC;
3538 I : in STD_ULOGIC
3567 I : in STD_ULOGIC
3539 );
3568 );
3540 end component;
3569 end component;
3541
3570
3542 component RAM64X1S
3571 component RAM64X1S
3543 generic (
3572 generic (
3544 INIT : bit_vector(63 downto 0) := X"0000000000000000"
3573 INIT : bit_vector(63 downto 0) := X"0000000000000000"
3545 );
3574 );
3546
3575
3547 port (
3576 port (
3548 O : out std_ulogic;
3577 O : out std_ulogic;
3549
3578
3550 A0 : in std_ulogic;
3579 A0 : in std_ulogic;
3551 A1 : in std_ulogic;
3580 A1 : in std_ulogic;
3552 A2 : in std_ulogic;
3581 A2 : in std_ulogic;
3553 A3 : in std_ulogic;
3582 A3 : in std_ulogic;
3554 A4 : in std_ulogic;
3583 A4 : in std_ulogic;
3555 A5 : in std_ulogic;
3584 A5 : in std_ulogic;
3556 D : in std_ulogic;
3585 D : in std_ulogic;
3557 WCLK : in std_ulogic;
3586 WCLK : in std_ulogic;
3558 WE : in std_ulogic
3587 WE : in std_ulogic
3559 );
3588 );
3560 end component;
3589 end component;
3561
3590
3562 component IBUFDS_GTXE1
3591 component IBUFDS_GTXE1
3563 generic (
3592 generic (
3564 CLKCM_CFG : boolean := TRUE;
3593 CLKCM_CFG : boolean := TRUE;
3565 CLKRCV_TRST : boolean := TRUE;
3594 CLKRCV_TRST : boolean := TRUE;
3566 REFCLKOUT_DLY : bit_vector := b"0000000000"
3595 REFCLKOUT_DLY : bit_vector := b"0000000000"
3567 );
3596 );
3568 port (
3597 port (
3569 O : out std_ulogic;
3598 O : out std_ulogic;
3570 ODIV2 : out std_ulogic;
3599 ODIV2 : out std_ulogic;
3571 CEB : in std_ulogic;
3600 CEB : in std_ulogic;
3572 I : in std_ulogic;
3601 I : in std_ulogic;
3573 IB : in std_ulogic
3602 IB : in std_ulogic
3574 );
3603 );
3575 end component;
3604 end component;
3576
3605
3577 ----- component MMCM_ADV -----
3606 ----- component MMCM_ADV -----
3578 component MMCM_ADV
3607 component MMCM_ADV
3579 generic (
3608 generic (
3580 BANDWIDTH : string := "OPTIMIZED";
3609 BANDWIDTH : string := "OPTIMIZED";
3581 CLKFBOUT_MULT_F : real := 5.000;
3610 CLKFBOUT_MULT_F : real := 5.000;
3582 CLKFBOUT_PHASE : real := 0.000;
3611 CLKFBOUT_PHASE : real := 0.000;
3583 CLKFBOUT_USE_FINE_PS : boolean := FALSE;
3612 CLKFBOUT_USE_FINE_PS : boolean := FALSE;
3584 CLKIN1_PERIOD : real := 0.000;
3613 CLKIN1_PERIOD : real := 0.000;
3585 CLKIN2_PERIOD : real := 0.000;
3614 CLKIN2_PERIOD : real := 0.000;
3586 CLKOUT0_DIVIDE_F : real := 1.000;
3615 CLKOUT0_DIVIDE_F : real := 1.000;
3587 CLKOUT0_DUTY_CYCLE : real := 0.500;
3616 CLKOUT0_DUTY_CYCLE : real := 0.500;
3588 CLKOUT0_PHASE : real := 0.000;
3617 CLKOUT0_PHASE : real := 0.000;
3589 CLKOUT0_USE_FINE_PS : boolean := FALSE;
3618 CLKOUT0_USE_FINE_PS : boolean := FALSE;
3590 CLKOUT1_DIVIDE : integer := 1;
3619 CLKOUT1_DIVIDE : integer := 1;
3591 CLKOUT1_DUTY_CYCLE : real := 0.500;
3620 CLKOUT1_DUTY_CYCLE : real := 0.500;
3592 CLKOUT1_PHASE : real := 0.000;
3621 CLKOUT1_PHASE : real := 0.000;
3593 CLKOUT1_USE_FINE_PS : boolean := FALSE;
3622 CLKOUT1_USE_FINE_PS : boolean := FALSE;
3594 CLKOUT2_DIVIDE : integer := 1;
3623 CLKOUT2_DIVIDE : integer := 1;
3595 CLKOUT2_DUTY_CYCLE : real := 0.500;
3624 CLKOUT2_DUTY_CYCLE : real := 0.500;
3596 CLKOUT2_PHASE : real := 0.000;
3625 CLKOUT2_PHASE : real := 0.000;
3597 CLKOUT2_USE_FINE_PS : boolean := FALSE;
3626 CLKOUT2_USE_FINE_PS : boolean := FALSE;
3598 CLKOUT3_DIVIDE : integer := 1;
3627 CLKOUT3_DIVIDE : integer := 1;
3599 CLKOUT3_DUTY_CYCLE : real := 0.500;
3628 CLKOUT3_DUTY_CYCLE : real := 0.500;
3600 CLKOUT3_PHASE : real := 0.000;
3629 CLKOUT3_PHASE : real := 0.000;
3601 CLKOUT3_USE_FINE_PS : boolean := FALSE;
3630 CLKOUT3_USE_FINE_PS : boolean := FALSE;
3602 CLKOUT4_CASCADE : boolean := FALSE;
3631 CLKOUT4_CASCADE : boolean := FALSE;
3603 CLKOUT4_DIVIDE : integer := 1;
3632 CLKOUT4_DIVIDE : integer := 1;
3604 CLKOUT4_DUTY_CYCLE : real := 0.500;
3633 CLKOUT4_DUTY_CYCLE : real := 0.500;
3605 CLKOUT4_PHASE : real := 0.000;
3634 CLKOUT4_PHASE : real := 0.000;
3606 CLKOUT4_USE_FINE_PS : boolean := FALSE;
3635 CLKOUT4_USE_FINE_PS : boolean := FALSE;
3607 CLKOUT5_DIVIDE : integer := 1;
3636 CLKOUT5_DIVIDE : integer := 1;
3608 CLKOUT5_DUTY_CYCLE : real := 0.500;
3637 CLKOUT5_DUTY_CYCLE : real := 0.500;
3609 CLKOUT5_PHASE : real := 0.000;
3638 CLKOUT5_PHASE : real := 0.000;
3610 CLKOUT5_USE_FINE_PS : boolean := FALSE;
3639 CLKOUT5_USE_FINE_PS : boolean := FALSE;
3611 CLKOUT6_DIVIDE : integer := 1;
3640 CLKOUT6_DIVIDE : integer := 1;
3612 CLKOUT6_DUTY_CYCLE : real := 0.500;
3641 CLKOUT6_DUTY_CYCLE : real := 0.500;
3613 CLKOUT6_PHASE : real := 0.000;
3642 CLKOUT6_PHASE : real := 0.000;
3614 CLKOUT6_USE_FINE_PS : boolean := FALSE;
3643 CLKOUT6_USE_FINE_PS : boolean := FALSE;
3615 CLOCK_HOLD : boolean := FALSE;
3644 CLOCK_HOLD : boolean := FALSE;
3616 COMPENSATION : string := "ZHOLD";
3645 COMPENSATION : string := "ZHOLD";
3617 DIVCLK_DIVIDE : integer := 1;
3646 DIVCLK_DIVIDE : integer := 1;
3618 REF_JITTER1 : real := 0.0;
3647 REF_JITTER1 : real := 0.0;
3619 REF_JITTER2 : real := 0.0;
3648 REF_JITTER2 : real := 0.0;
3620 STARTUP_WAIT : boolean := FALSE
3649 STARTUP_WAIT : boolean := FALSE
3621 );
3650 );
3622 port (
3651 port (
3623 CLKFBOUT : out std_ulogic := '0';
3652 CLKFBOUT : out std_ulogic := '0';
3624 CLKFBOUTB : out std_ulogic := '0';
3653 CLKFBOUTB : out std_ulogic := '0';
3625 CLKFBSTOPPED : out std_ulogic := '0';
3654 CLKFBSTOPPED : out std_ulogic := '0';
3626 CLKINSTOPPED : out std_ulogic := '0';
3655 CLKINSTOPPED : out std_ulogic := '0';
3627 CLKOUT0 : out std_ulogic := '0';
3656 CLKOUT0 : out std_ulogic := '0';
3628 CLKOUT0B : out std_ulogic := '0';
3657 CLKOUT0B : out std_ulogic := '0';
3629 CLKOUT1 : out std_ulogic := '0';
3658 CLKOUT1 : out std_ulogic := '0';
3630 CLKOUT1B : out std_ulogic := '0';
3659 CLKOUT1B : out std_ulogic := '0';
3631 CLKOUT2 : out std_ulogic := '0';
3660 CLKOUT2 : out std_ulogic := '0';
3632 CLKOUT2B : out std_ulogic := '0';
3661 CLKOUT2B : out std_ulogic := '0';
3633 CLKOUT3 : out std_ulogic := '0';
3662 CLKOUT3 : out std_ulogic := '0';
3634 CLKOUT3B : out std_ulogic := '0';
3663 CLKOUT3B : out std_ulogic := '0';
3635 CLKOUT4 : out std_ulogic := '0';
3664 CLKOUT4 : out std_ulogic := '0';
3636 CLKOUT5 : out std_ulogic := '0';
3665 CLKOUT5 : out std_ulogic := '0';
3637 CLKOUT6 : out std_ulogic := '0';
3666 CLKOUT6 : out std_ulogic := '0';
3638 DO : out std_logic_vector (15 downto 0);
3667 DO : out std_logic_vector (15 downto 0);
3639 DRDY : out std_ulogic := '0';
3668 DRDY : out std_ulogic := '0';
3640 LOCKED : out std_ulogic := '0';
3669 LOCKED : out std_ulogic := '0';
3641 PSDONE : out std_ulogic := '0';
3670 PSDONE : out std_ulogic := '0';
3642 CLKFBIN : in std_ulogic;
3671 CLKFBIN : in std_ulogic;
3643 CLKIN1 : in std_ulogic;
3672 CLKIN1 : in std_ulogic;
3644 CLKIN2 : in std_ulogic;
3673 CLKIN2 : in std_ulogic;
3645 CLKINSEL : in std_ulogic;
3674 CLKINSEL : in std_ulogic;
3646 DADDR : in std_logic_vector(6 downto 0);
3675 DADDR : in std_logic_vector(6 downto 0);
3647 DCLK : in std_ulogic;
3676 DCLK : in std_ulogic;
3648 DEN : in std_ulogic;
3677 DEN : in std_ulogic;
3649 DI : in std_logic_vector(15 downto 0);
3678 DI : in std_logic_vector(15 downto 0);
3650 DWE : in std_ulogic;
3679 DWE : in std_ulogic;
3651 PSCLK : in std_ulogic;
3680 PSCLK : in std_ulogic;
3652 PSEN : in std_ulogic;
3681 PSEN : in std_ulogic;
3653 PSINCDEC : in std_ulogic;
3682 PSINCDEC : in std_ulogic;
3654 PWRDWN : in std_ulogic;
3683 PWRDWN : in std_ulogic;
3655 RST : in std_ulogic
3684 RST : in std_ulogic
3656 );
3685 );
3657 end component;
3686 end component;
3658
3687
3659 component OSERDESE1
3688 component OSERDESE1
3660 generic (
3689 generic (
3661 DATA_RATE_OQ : string := "DDR";
3690 DATA_RATE_OQ : string := "DDR";
3662 DATA_RATE_TQ : string := "DDR";
3691 DATA_RATE_TQ : string := "DDR";
3663 DATA_WIDTH : integer := 4;
3692 DATA_WIDTH : integer := 4;
3664 DDR3_DATA : integer := 1;
3693 DDR3_DATA : integer := 1;
3665 INIT_OQ : bit := '0';
3694 INIT_OQ : bit := '0';
3666 INIT_TQ : bit := '0';
3695 INIT_TQ : bit := '0';
3667 INTERFACE_TYPE : string := "DEFAULT";
3696 INTERFACE_TYPE : string := "DEFAULT";
3668 ODELAY_USED : integer := 0;
3697 ODELAY_USED : integer := 0;
3669 SERDES_MODE : string := "MASTER";
3698 SERDES_MODE : string := "MASTER";
3670 SRVAL_OQ : bit := '0';
3699 SRVAL_OQ : bit := '0';
3671 SRVAL_TQ : bit := '0';
3700 SRVAL_TQ : bit := '0';
3672 TRISTATE_WIDTH : integer := 4
3701 TRISTATE_WIDTH : integer := 4
3673 );
3702 );
3674 port (
3703 port (
3675 OCBEXTEND : out std_ulogic;
3704 OCBEXTEND : out std_ulogic;
3676 OFB : out std_ulogic;
3705 OFB : out std_ulogic;
3677 OQ : out std_ulogic;
3706 OQ : out std_ulogic;
3678 SHIFTOUT1 : out std_ulogic;
3707 SHIFTOUT1 : out std_ulogic;
3679 SHIFTOUT2 : out std_ulogic;
3708 SHIFTOUT2 : out std_ulogic;
3680 TFB : out std_ulogic;
3709 TFB : out std_ulogic;
3681 TQ : out std_ulogic;
3710 TQ : out std_ulogic;
3682 CLK : in std_ulogic;
3711 CLK : in std_ulogic;
3683 CLKDIV : in std_ulogic;
3712 CLKDIV : in std_ulogic;
3684 CLKPERF : in std_ulogic;
3713 CLKPERF : in std_ulogic;
3685 CLKPERFDELAY : in std_ulogic;
3714 CLKPERFDELAY : in std_ulogic;
3686 D1 : in std_ulogic;
3715 D1 : in std_ulogic;
3687 D2 : in std_ulogic;
3716 D2 : in std_ulogic;
3688 D3 : in std_ulogic;
3717 D3 : in std_ulogic;
3689 D4 : in std_ulogic;
3718 D4 : in std_ulogic;
3690 D5 : in std_ulogic;
3719 D5 : in std_ulogic;
3691 D6 : in std_ulogic;
3720 D6 : in std_ulogic;
3692 OCE : in std_ulogic;
3721 OCE : in std_ulogic;
3693 ODV : in std_ulogic;
3722 ODV : in std_ulogic;
3694 RST : in std_ulogic;
3723 RST : in std_ulogic;
3695 SHIFTIN1 : in std_ulogic;
3724 SHIFTIN1 : in std_ulogic;
3696 SHIFTIN2 : in std_ulogic;
3725 SHIFTIN2 : in std_ulogic;
3697 T1 : in std_ulogic;
3726 T1 : in std_ulogic;
3698 T2 : in std_ulogic;
3727 T2 : in std_ulogic;
3699 T3 : in std_ulogic;
3728 T3 : in std_ulogic;
3700 T4 : in std_ulogic;
3729 T4 : in std_ulogic;
3701 TCE : in std_ulogic;
3730 TCE : in std_ulogic;
3702 WC : in std_ulogic
3731 WC : in std_ulogic
3703 );
3732 );
3704 end component;
3733 end component;
3705
3734
3706 component IODELAYE1
3735 component IODELAYE1
3707 generic (
3736 generic (
3708 CINVCTRL_SEL : boolean := FALSE;
3737 CINVCTRL_SEL : boolean := FALSE;
3709 DELAY_SRC : string := "I";
3738 DELAY_SRC : string := "I";
3710 HIGH_PERFORMANCE_MODE : boolean := FALSE;
3739 HIGH_PERFORMANCE_MODE : boolean := FALSE;
3711 IDELAY_TYPE : string := "DEFAULT";
3740 IDELAY_TYPE : string := "DEFAULT";
3712 IDELAY_VALUE : integer := 0;
3741 IDELAY_VALUE : integer := 0;
3713 ODELAY_TYPE : string := "FIXED";
3742 ODELAY_TYPE : string := "FIXED";
3714 ODELAY_VALUE : integer := 0;
3743 ODELAY_VALUE : integer := 0;
3715 REFCLK_FREQUENCY : real := 200.0;
3744 REFCLK_FREQUENCY : real := 200.0;
3716 SIGNAL_PATTERN : string := "DATA"
3745 SIGNAL_PATTERN : string := "DATA"
3717 );
3746 );
3718 port (
3747 port (
3719 CNTVALUEOUT : out std_logic_vector(4 downto 0);
3748 CNTVALUEOUT : out std_logic_vector(4 downto 0);
3720 DATAOUT : out std_ulogic;
3749 DATAOUT : out std_ulogic;
3721 C : in std_ulogic;
3750 C : in std_ulogic;
3722 CE : in std_ulogic;
3751 CE : in std_ulogic;
3723 CINVCTRL : in std_ulogic;
3752 CINVCTRL : in std_ulogic;
3724 CLKIN : in std_ulogic;
3753 CLKIN : in std_ulogic;
3725 CNTVALUEIN : in std_logic_vector(4 downto 0);
3754 CNTVALUEIN : in std_logic_vector(4 downto 0);
3726 DATAIN : in std_ulogic;
3755 DATAIN : in std_ulogic;
3727 IDATAIN : in std_ulogic;
3756 IDATAIN : in std_ulogic;
3728 INC : in std_ulogic;
3757 INC : in std_ulogic;
3729 ODATAIN : in std_ulogic;
3758 ODATAIN : in std_ulogic;
3730 RST : in std_ulogic;
3759 RST : in std_ulogic;
3731 T : in std_ulogic
3760 T : in std_ulogic
3732 );
3761 );
3733 end component;
3762 end component;
3734
3763
3735 component ISERDESE1
3764 component ISERDESE1
3736 generic (
3765 generic (
3737 DATA_RATE : string := "DDR";
3766 DATA_RATE : string := "DDR";
3738 DATA_WIDTH : integer := 4;
3767 DATA_WIDTH : integer := 4;
3739 DYN_CLKDIV_INV_EN : boolean := FALSE;
3768 DYN_CLKDIV_INV_EN : boolean := FALSE;
3740 DYN_CLK_INV_EN : boolean := FALSE;
3769 DYN_CLK_INV_EN : boolean := FALSE;
3741 INIT_Q1 : bit := '0';
3770 INIT_Q1 : bit := '0';
3742 INIT_Q2 : bit := '0';
3771 INIT_Q2 : bit := '0';
3743 INIT_Q3 : bit := '0';
3772 INIT_Q3 : bit := '0';
3744 INIT_Q4 : bit := '0';
3773 INIT_Q4 : bit := '0';
3745 INTERFACE_TYPE : string := "MEMORY";
3774 INTERFACE_TYPE : string := "MEMORY";
3746 IOBDELAY : string := "NONE";
3775 IOBDELAY : string := "NONE";
3747 NUM_CE : integer := 2;
3776 NUM_CE : integer := 2;
3748 OFB_USED : boolean := FALSE;
3777 OFB_USED : boolean := FALSE;
3749 SERDES_MODE : string := "MASTER";
3778 SERDES_MODE : string := "MASTER";
3750 SRVAL_Q1 : bit := '0';
3779 SRVAL_Q1 : bit := '0';
3751 SRVAL_Q2 : bit := '0';
3780 SRVAL_Q2 : bit := '0';
3752 SRVAL_Q3 : bit := '0';
3781 SRVAL_Q3 : bit := '0';
3753 SRVAL_Q4 : bit := '0'
3782 SRVAL_Q4 : bit := '0'
3754 );
3783 );
3755 port (
3784 port (
3756 O : out std_ulogic;
3785 O : out std_ulogic;
3757 Q1 : out std_ulogic;
3786 Q1 : out std_ulogic;
3758 Q2 : out std_ulogic;
3787 Q2 : out std_ulogic;
3759 Q3 : out std_ulogic;
3788 Q3 : out std_ulogic;
3760 Q4 : out std_ulogic;
3789 Q4 : out std_ulogic;
3761 Q5 : out std_ulogic;
3790 Q5 : out std_ulogic;
3762 Q6 : out std_ulogic;
3791 Q6 : out std_ulogic;
3763 SHIFTOUT1 : out std_ulogic;
3792 SHIFTOUT1 : out std_ulogic;
3764 SHIFTOUT2 : out std_ulogic;
3793 SHIFTOUT2 : out std_ulogic;
3765 BITSLIP : in std_ulogic;
3794 BITSLIP : in std_ulogic;
3766 CE1 : in std_ulogic;
3795 CE1 : in std_ulogic;
3767 CE2 : in std_ulogic;
3796 CE2 : in std_ulogic;
3768 CLK : in std_ulogic;
3797 CLK : in std_ulogic;
3769 CLKB : in std_ulogic;
3798 CLKB : in std_ulogic;
3770 CLKDIV : in std_ulogic;
3799 CLKDIV : in std_ulogic;
3771 D : in std_ulogic;
3800 D : in std_ulogic;
3772 DDLY : in std_ulogic;
3801 DDLY : in std_ulogic;
3773 DYNCLKDIVSEL : in std_ulogic;
3802 DYNCLKDIVSEL : in std_ulogic;
3774 DYNCLKSEL : in std_ulogic;
3803 DYNCLKSEL : in std_ulogic;
3775 OCLK : in std_ulogic;
3804 OCLK : in std_ulogic;
3776 OFB : in std_ulogic;
3805 OFB : in std_ulogic;
3777 RST : in std_ulogic;
3806 RST : in std_ulogic;
3778 SHIFTIN1 : in std_ulogic;
3807 SHIFTIN1 : in std_ulogic;
3779 SHIFTIN2 : in std_ulogic
3808 SHIFTIN2 : in std_ulogic
3780 );
3809 );
3781 end component;
3810 end component;
3782
3811
3783 component IOBUFDS_DIFF_OUT
3812 component IOBUFDS_DIFF_OUT
3784 generic (
3813 generic (
3785 DIFF_TERM : boolean := FALSE;
3814 DIFF_TERM : boolean := FALSE;
3786 IBUF_LOW_PWR : boolean := TRUE;
3815 IBUF_LOW_PWR : boolean := TRUE;
3787 IOSTANDARD : string := "DEFAULT"
3816 IOSTANDARD : string := "DEFAULT"
3788 );
3817 );
3789 port (
3818 port (
3790 O : out std_ulogic;
3819 O : out std_ulogic;
3791 OB : out std_ulogic;
3820 OB : out std_ulogic;
3792 IO : inout std_ulogic;
3821 IO : inout std_ulogic;
3793 IOB : inout std_ulogic;
3822 IOB : inout std_ulogic;
3794 I : in std_ulogic;
3823 I : in std_ulogic;
3795 TM : in std_ulogic;
3824 TM : in std_ulogic;
3796 TS : in std_ulogic
3825 TS : in std_ulogic
3797 );
3826 );
3798 end component;
3827 end component;
3799
3828
3800 component SRLC32E
3829 component SRLC32E
3801 generic (
3830 generic (
3802 INIT : bit_vector := X"00000000"
3831 INIT : bit_vector := X"00000000"
3803 );
3832 );
3804 port (
3833 port (
3805 Q : out STD_ULOGIC;
3834 Q : out STD_ULOGIC;
3806 Q31 : out STD_ULOGIC;
3835 Q31 : out STD_ULOGIC;
3807 A : in STD_LOGIC_VECTOR (4 downto 0);
3836 A : in STD_LOGIC_VECTOR (4 downto 0);
3808 CE : in STD_ULOGIC;
3837 CE : in STD_ULOGIC;
3809 CLK : in STD_ULOGIC;
3838 CLK : in STD_ULOGIC;
3810 D : in STD_ULOGIC
3839 D : in STD_ULOGIC
3811 );
3840 );
3812 end component;
3841 end component;
3813
3842
3814 end;
3843 end;
Show file before | Show file after | Hide comments
@@ -1,25 +1,26
1 #================================================================================================
1 #================================================================================================
2 #
2 #
3 # _| _| _| _| _|_|_|_|_| _|
3 # _| _| _| _| _|_|_|_|_| _|
4 # _| _| _|_|_| _|_|_| _|_|_| _| _|_| _|_| _| _|_|_
4 # _| _| _|_|_| _|_|_| _|_|_| _| _|_| _|_| _| _|_|_
5 # _|_| _| _| _| _| _| _| _| _| _| _| _| _| _|_|
5 # _|_| _| _| _| _| _| _| _| _| _| _| _| _| _|_|
6 # _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_
6 # _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_
7 # _| _| _| _|_|_| _|_|_| _|_|_| _| _|_| _|_| _| _|_|_|
7 # _| _| _| _|_|_| _|_|_| _|_|_| _| _|_| _|_| _| _|_|_|
8 #
8 #
9 #================================================================================================
9 #================================================================================================
10 #
10 #
11 #
11 #
12
12
13
13
14 TEMPLATE = subdirs
14 TEMPLATE = subdirs
15 CONFIG += ordered release
15 CONFIG += ordered release
16
16
17 SUBDIRS += \
17 SUBDIRS += \
18 vhdlparser \
18 vhdlparser \
19 tests/basic_VHDL_parser
19 tests/basic_VHDL_parser \
20 tests/VHDL_TreeWidget
20
21
21
22
22
23
23 OTHER_FILES += \
24 OTHER_FILES += \
24 README.md \
25 README.md \
25 COPYING
26 COPYING
Show file before | Show file after | Hide comments
@@ -1,222 +1,250
1 %{
1 %{
2 /* C++ string header, for string ops below */
2 /* C++ string header, for string ops below */
3 #include <string>
3 #include <string>
4 #include <QString>
4 #include <QString>
5 /* Implementation of yyFlexScanner */
5 /* Implementation of yyFlexScanner */
6 #include "vhdl_scanner.h"
6 #include "vhdl_scanner.h"
7 #include <QDebug>
7 #include <QDebug>
8 /* define to keep from re-typing the same code over and over */
8 /* define to keep from re-typing the same code over and over */
9 #define STOKEN( x ) ( new QString( x ) )
9 #define STOKEN( x ) ( new QString( x ) )
10
10
11 /* define yyterminate as this instead of NULL */
11 /* define yyterminate as this instead of NULL */
12 //#define yyterminate() return( token::END )
12 //#define yyterminate() return( token::END )
13
13
14 /* msvc2010 requires that we exclude this header file. */
14 /* msvc2010 requires that we exclude this header file. */
15 #define YY_NO_UNISTD_H
15 #define YY_NO_UNISTD_H
16
17 /* handle locations */
18 int yycolumn = 1;
19
20 #define YY_USER_ACTION yycolumn += yyleng;
21
16 %}
22 %}
17
18 %option debug
23 %option debug
19 %option nodefault
24 %option nodefault
20 %option yyclass="vhdl_Scanner"
25 %option yyclass="vhdl_Scanner"
21 %option case-insensitive yylineno
26 %option case-insensitive yylineno
22 %option noyywrap
27 %option noyywrap
23 %option c++
28 %option c++
24
29
25
30
26 %%
31 %%
27
32
28 /*-----------------------------------------------------------*/
33 /*-----------------------------------------------------------*/
29 /*Separators*/
34 /*Separators*/
30 [ \t\n]+ { } //skip new lines, blanc spaces and tabulations
35 [ \t]+ { } //skip new lines, blanc spaces and tabulations
31 /*-----------------------------------------------------------*/
36 /*-----------------------------------------------------------*/
32
37 \n {yycolumn=1;}
33
38
34 /*comment*/
39 /*comment*/
35 --.* {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::comment));}
40 --.* {
41 //this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::comment,yylineno, yycolumn-yyleng));
42 }
36 /*-----------------------------------------------------------*/
43 /*-----------------------------------------------------------*/
37
44
38 /*Reserved words*/
45 /*Reserved words*/
39
46
40 abs |
47 abs |
41 access |
48 access |
42 after |
49 after |
43 alias |
50 alias |
44 all |
51 all |
45 and |
52 and |
46 architecture |
47 array |
53 array |
48 assert |
54 assert |
49 attribute |
55 attribute |
50 begin |
56 begin |
51 block |
52 body |
57 body |
53 buffer |
58 buffer |
54 bus |
59 bus |
55 case |
56 component |
57 configuration |
58 constant |
59 disconnect |
60 disconnect |
60 downto |
61 downto |
61 else |
62 else |
62 elsif |
63 elsif |
63 end |
64 entity |
65 exit |
64 exit |
66 file |
65 file |
67 for |
68 function |
66 function |
69 generate |
67 generate | /* don't parse generate as block! just look for "if" or "for" */
70 generic |
71 group |
68 group |
72 guarded |
69 guarded |
73 if |
74 impure |
70 impure |
75 in |
71 in |
76 inertial |
72 inertial |
77 inout |
73 inout |
78 is |
74 is |
79 label |
75 label |
80 library |
81 linkage |
76 linkage |
82 literal |
77 literal |
83 loop |
84 map |
85 mod |
78 mod |
86 nand |
79 nand |
87 new |
80 new |
88 next |
81 next |
89 nor |
82 nor |
90 not |
83 not |
91 null |
84 null |
92 of |
85 of |
93 on |
86 on |
94 open |
87 open |
95 or |
88 or |
96 others |
89 others |
97 out |
90 out |
98 package |
99 port |
100 postponed |
91 postponed |
101 procedure |
102 process |
103 pure |
92 pure |
104 range |
93 range |
105 record |
106 register |
94 register |
107 reject |
95 reject |
108 rem |
96 rem |
109 report |
97 report |
110 return |
98 return |
111 rol |
99 rol |
112 ror |
100 ror |
113 select |
101 select |
114 severity |
102 severity |
115 shared |
103 shared |
116 signal |
117 sla |
104 sla |
118 sll |
105 sll |
119 sra |
106 sra |
120 srl |
107 srl |
121 subtype |
122 then |
108 then |
123 to |
109 to |
124 transport |
110 transport |
125 type |
126 unaffected |
111 unaffected |
127 units |
128 until |
112 until |
129 use |
130 variable |
131 wait |
113 wait |
132 when |
114 when |
133 while |
115 while |
134 with |
116 with |
135 xnor |
117 xnor |
136 xor |
118 xor |
137 (true|false) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::keyword));}
119 (true|false) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::keyword,yylineno, yycolumn-yyleng));}
120
121 port {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::port,yylineno, yycolumn-yyleng));}
122
123 generic {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::generic,yylineno, yycolumn-yyleng));}
124
125 map {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::map,yylineno, yycolumn-yyleng));}
126
127 architecture |
128 block |
129 case |
130 configuration |
131 component |
132 for |
133 if |
134 loop |
135 package |
136 procedure |
137 process |
138 protected |
139 record {
140 this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::block,yylineno, yycolumn-yyleng));
141 }
142
143 entity {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::entity,yylineno, yycolumn-yyleng));}
138
144
139
145
140 /* delimiter*/
146 units {
141 \. | \| | \[ | \] |
147 this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::units,yylineno, yycolumn-yyleng));
142 \:= | \>\= |
148 }
143 \<\= |
149
144 \/\= |
150 constant |
145 \= |
151 library |
146 \> |
152 signal |
147 \< |
153 subtype |
148 \& |
154 type |
149 \‘ |
155 use |
150 \=\> |
156 variable {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::clause,yylineno, yycolumn-yyleng));}
151 \: |
157
152 \<\> |
158
153 \; |
159
154 \, |
160 end {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::endKw,yylineno, yycolumn-yyleng));}
155 \( |
156 \) |
157 \* |
158 \+ |
159 \- |
160 \/ |
161 \*\* {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::separator)); }
162
161
163
162
164 /*-----------------------------------------------------------*/
163 /*-----------------------------------------------------------*/
165
164
166 /*identifier (may be a reserved word)*/
165 /*identifier (may be a reserved word)*/
167 [a-z][a-z0-9\_]+[a-z] |
166 [a-z][a-z0-9\_\.]+[a-z0-9]+ |
168 [a-z]+ |
167 [a-z]+ |
169 \\.*\\ {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::identifier));}
168 \\.*\\ {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::identifier,yylineno, yycolumn-yyleng));}
170
169
171 /*-----------------------------------------------------------*/
170 /*-----------------------------------------------------------*/
172
171
173 /*abstract literal (integer or floating point type)*/
172 /*abstract literal (integer or floating point type)*/
174 /*Numerical literals*/
173 /*Numerical literals*/
175 (\+|\-)?([0-9\_]+)|(\+|\-)?([0-9\_]+E[0-9\_]+)|((2|3|4|5|6|7|8|9|10|11|12|13|14|15|16)\#[0-9\_]\#) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
174 (\+|\-)?([0-9\_]+)|(\+|\-)?([0-9\_]+E[0-9\_]+)|((2|3|4|5|6|7|8|9|10|11|12|13|14|15|16)\#[0-9\_]\#) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
176
175
177 (\+|\-)?[0-9\_]+\.[0-9\_]+|[0-9\_]+\.[0-9\_]+E[0-9\_]+ {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
176 (\+|\-)?[0-9\_]+\.[0-9\_]+|[0-9\_]+\.[0-9\_]+E[0-9\_]+ {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
178
177
179 \'(0|1)\' {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
178 \'(0|1)\' {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
180
179
181 \'.\' {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
180 \'.\' {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
182
181
183
182
184 (\+|\-)?([0-9\_]+)(fs|ps|ns|us|ms|sec|min|hr) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
183 (\+|\-)?([0-9\_]+)(fs|ps|ns|us|ms|sec|min|hr) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
185
184
186 /*Bit string literals*/
185 /*Bit string literals*/
187 \"[0-1\_]+\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
186 \"[0-1\_]+\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
188
187
189 /*String literals*/
188 /*String literals*/
190 \".*\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
189 \".*\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
191
190
192 x\"[0-9A-F\_]+\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
191 x\"[0-9A-F\_]+\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
193
192
194 o\"[0-7\_]+\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
193 o\"[0-7\_]+\" {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
195
194
196 /*The NULL literal*/
195 /*The NULL literal*/
197
196
198 \[NULL\] {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal));}
197 \[NULL\] {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::literal,yylineno, yycolumn-yyleng));}
199
198
200 /*-----------------------------------------------------------*/
199 /*-----------------------------------------------------------*/
201
200
202 /*character literal (a graphical character surrounded by ‘, e.g.: ‘H’)*/
201 /*character literal (a graphical character surrounded by ‘, e.g.: ‘H’)*/
203 /*-----------------------------------------------------------*/
202 /*-----------------------------------------------------------*/
204
203
205 /*string literal (a sequence of graphical characters surrounded by ”, e.g.: ”HAR-DI”)*/
204 /*string literal (a sequence of graphical characters surrounded by ”, e.g.: ”HAR-DI”)*/
206 /*-----------------------------------------------------------*/
205 /*-----------------------------------------------------------*/
207
206
208 /* bit string literal (a sequence of extended digits * surrounded by ”, e.g.: ”011”)*/
207 /* bit string literal (a sequence of extended digits * surrounded by ”, e.g.: ”011”)*/
209 /*-----------------------------------------------------------*/
208 /*-----------------------------------------------------------*/
210
209
210 /* delimiter*/
211 \. | \| | \[ | \] |
212 \:= | \>\= |
213 \<\= |
214 \/\= |
215 \= |
216 \> |
217 \< |
218 \& |
219 \‘ |
220 \' |
221 \=\> |
222 \<\> |
223 \, |
224 \* |
225 \+ |
226 \- |
227 \/ |
228 \*\* {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::separator,yylineno, yycolumn-yyleng)); }
211
229
212
230
231 \: {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::colon,yylineno, yycolumn-yyleng)); }
213
232
214
233
234 \( {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::leftParen,yylineno, yycolumn-yyleng));}
235
236 \) {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::rightParen,yylineno, yycolumn-yyleng));}
237
238
239 \; {this->appendNode(new VHDL_Tools::VHDL_AST_Node(YYText(),VHDL_Tools::semicolon,yylineno, yycolumn-yyleng)); }
240
241 . printf("bad input character '%s' at line %d column %d\n ", yytext, yylineno,yycolumn-yyleng);
242
215 %%
243 %%
216
244
217
245
218
246
219
247
220
248
221
249
222
250
Show file before | Show file after | Hide comments
@@ -1,46 +1,71
1 /*------------------------------------------------------------------------------
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the VHDL Tools Software
2 -- This file is a part of the VHDL Tools Software
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
18 -------------------------------------------------------------------------------*/
19 /*-- Author : Alexis Jeandet
19 /*-- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
20 -- Mail : alexis.jeandet@member.fsf.org
21 ----------------------------------------------------------------------------*/
21 ----------------------------------------------------------------------------*/
22 #include "vhdl_scanner.h"
22 #include "vhdl_scanner.h"
23 #include <QDebug>
23 #include <QDebug>
24
24
25 VHDL_Tools::vhdl_Scanner::vhdl_Scanner(std::istream *in)
25 VHDL_Tools::vhdl_Scanner::vhdl_Scanner(std::istream *in, const QString &fileName)
26 : yyFlexLexer(in)
26 : yyFlexLexer(in)
27 {
27 {
28 this->rootNode = new VHDL_Tools::VHDL_AST_Node("rootNode",VHDL_Tools::rootNode);
28 this->rootNode = new VHDL_Tools::VHDL_AST_Node(fileName,VHDL_Tools::rootNode);
29 this->currentNode = rootNode;
30 this->rootNode->parent = this->rootNode;
29 }
31 }
30
32
33 VHDL_Tools::vhdl_Scanner::~vhdl_Scanner()
34 {
35 deleteNode(rootNode);
36 }
37
38
31 int VHDL_Tools::vhdl_Scanner::scan()
39 int VHDL_Tools::vhdl_Scanner::scan()
32 {
40 {
33 return( yylex() );
41 return( yylex() );
34 }
42 }
35
43
36 void VHDL_Tools::vhdl_Scanner::stackData(QString data)
44 int VHDL_Tools::vhdl_Scanner::newFile(std::istream *in, const QString &fileName,bool trashPreviousTree)
37 {
45 {
38 qDebug()<<data;
46 switch_streams(in);
47 if(trashPreviousTree)
48 deleteNode(rootNode);
49 this->rootNode = new VHDL_Tools::VHDL_AST_Node(fileName,VHDL_Tools::rootNode);
50 this->currentNode = rootNode;
51 this->rootNode->parent = this->rootNode;
52 return 1;
39 }
53 }
40
54
55
41 void VHDL_Tools::vhdl_Scanner::appendNode(VHDL_Tools::VHDL_AST_Node *node)
56 void VHDL_Tools::vhdl_Scanner::appendNode(VHDL_Tools::VHDL_AST_Node *node)
42 {
57 {
43 this->rootNode->childs.append(node);
58 this->currentNode->childs.append(node);
59 node->parent = this->currentNode;
60 this->currentNode = node;
44 }
61 }
45
62
46
63 void VHDL_Tools::vhdl_Scanner::deleteNode(VHDL_Tools::VHDL_AST_Node *node)
64 {
65 for(int i=0;i<node->childs.count();i++)
66 {
67 deleteNode(node->childs.at(i));
68 }
69 node->parent->childs.removeAll(node);
70 delete node;
71 }
Show file before | Show file after | Hide comments
@@ -1,64 +1,68
1 /*------------------------------------------------------------------------------
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the VHDL Tools Software
2 -- This file is a part of the VHDL Tools Software
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
3 -- Copyright (C) 2014, Plasma Physics Laboratory - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
18 -------------------------------------------------------------------------------*/
19 /*-- Author : Alexis Jeandet
19 /*-- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
20 -- Mail : alexis.jeandet@member.fsf.org
21 ----------------------------------------------------------------------------*/
21 ----------------------------------------------------------------------------*/
22 #ifndef vhdl_SCANNER_H
22 #ifndef vhdl_SCANNER_H
23 #define vhdl_SCANNER_H
23 #define vhdl_SCANNER_H
24 #if ! defined(yyFlexLexerOnce)
24 #if ! defined(yyFlexLexerOnce)
25 #include <FlexLexer.h>
25 #include <FlexLexer.h>
26 #endif
26 #endif
27 #include <iostream>
27 #include <iostream>
28 #include <cstdlib>
28 #include <cstdlib>
29 #include <fstream>
29 #include <fstream>
30 #include <QString>
30 #include <QString>
31 #include <QList>
31 #include <QList>
32 #include <QStack>
33 #include "vhdl_ast_node.h"
34 #include "vhdl_fragment.h"
32
35
33 #undef YY_DECL
36 #undef YY_DECL
34 #define YY_DECL int VHDL_Tools::vhdl_Scanner::yylex()
37 #define YY_DECL int VHDL_Tools::vhdl_Scanner::yylex()
35
38
36 namespace VHDL_Tools{
39 namespace VHDL_Tools{
37
40
38 enum VHDL_AST_Node_type {separator,keyword,identifier,literal,rootNode,comment};
41 class vhdl_Scanner_block_stack
39 class VHDL_AST_Node
40 {
42 {
41 public:
43 public:
42 VHDL_AST_Node(const QString& value,VHDL_Tools::VHDL_AST_Node_type type):value(value),type(type) {}
44 vhdl_Scanner_block_stack(bool waitForSemicolon,bool waitForParen, int delta)
43 QString value;
45 :waitForSemicolon(waitForSemicolon),waitForParen(waitForParen),stackDelta(delta){}
44 VHDL_Tools::VHDL_AST_Node_type type;
46 bool waitForSemicolon;
45 VHDL_Tools::VHDL_AST_Node* parent;
47 bool waitForParen;
46 QList<VHDL_Tools::VHDL_AST_Node*> childs;
48 int stackDelta;
47 };
49 };
48
50
49 class vhdl_Scanner : public yyFlexLexer
51 class vhdl_Scanner : public yyFlexLexer
50 {
52 {
51 public:
53 public:
52 vhdl_Scanner(std::istream *in);
54 vhdl_Scanner(std::istream *in,const QString& fileName);
55 ~vhdl_Scanner();
53 int scan();
56 int scan();
54
57 int newFile(std::istream *in, const QString& fileName, bool trashPreviousTree=false);
58 VHDL_Tools::VHDL_AST_Node* getScanTree(){return rootNode;}
55 private:
59 private:
56 /* hide this one from public view */
60 /* hide this one from public view */
57 int yylex();
61 int yylex();
58 void stackData(QString data);
59 void appendNode(VHDL_Tools::VHDL_AST_Node* node);
62 void appendNode(VHDL_Tools::VHDL_AST_Node* node);
60 VHDL_Tools::VHDL_AST_Node* rootNode;
63 void deleteNode(VHDL_Tools::VHDL_AST_Node* node);
64 VHDL_Tools::VHDL_AST_Node* rootNode,*currentNode;
61 };
65 };
62 }
66 }
63
67
64 #endif // vhdl_SCANNER_H
68 #endif // vhdl_SCANNER_H
Show file before | Show file after | Hide comments
@@ -1,30 +1,169
1 #include "vhdl_file.h"
1 #include "vhdl_file.h"
2
2 #include <QDebug>
3
3
4 VHDL_Tools::VHDL_File::VHDL_File()
4 VHDL_Tools::VHDL_File::VHDL_File()
5 {
5 {
6 this->scanner = NULL;
6 this->scanner = NULL;
7 }
7 }
8
8
9 #define walkForward( node , code ) \
10 if((node)->childs.count())\
11 {\
12 (node) = (node)->childs.first();\
13 }\
14 else\
15 {\
16 return (code);\
17 }\
9
18
10 bool VHDL_Tools::VHDL_File::parseFile(const QString &file)
19
20 #define skipTokens(node,TokenType) while ((node)->type==(TokenType)){walkForward((node),-1);}
21
22 bool VHDL_Tools::VHDL_File::parseFile(const QString &file, bool trashPreviousTree)
11 {
23 {
12 std::ifstream in_file( file.toStdString().c_str() );
24 std::ifstream in_file( file.toStdString().c_str() );
13 if( ! in_file.good() ) return false;
25 if( ! in_file.good() ) return false;
14 if(scanner)
26 // if(scanner)
15 delete(scanner);
27 // delete(scanner);
16 try
28 // try
17 {
29 // {
18 scanner = new VHDL_Tools::vhdl_Scanner( &in_file );
30 // scanner = new VHDL_Tools::vhdl_Scanner( &in_file ,file);
19 }
31 // }
20 catch( std::bad_alloc &ba )
32 // catch( std::bad_alloc &ba )
33 // {
34 // std::cerr << "Failed to allocate scanner: (" <<
35 // ba.what() << ")\n";
36 // return false;
37 // }
38 if(scanner==NULL)
21 {
39 {
22 std::cerr << "Failed to allocate scanner: (" <<
40 try
23 ba.what() << ")\n";
41 {
24 return false;
42 scanner = new VHDL_Tools::vhdl_Scanner( &in_file ,file);
43 }
44 catch( std::bad_alloc &ba )
45 {
46 std::cerr << "Failed to allocate scanner: (" <<
47 ba.what() << ")\n";
48 return false;
49 }
25 }
50 }
51 scanner->newFile(&in_file,file,trashPreviousTree);
26 while (scanner->scan()!=0);
52 while (scanner->scan()!=0);
27 //parse(file.toStdString().c_str());
53 makeParseTree(scanner->getScanTree());
28
29 return false;
54 return false;
30 }
55 }
56
57 VHDL_Tools::VHDL_AST_Node *VHDL_Tools::VHDL_File::getParseTree()
58 {
59 return rootNode;
60 }
61
62 int VHDL_Tools::VHDL_File::makeParseTree(VHDL_AST_Node *rootNode)
63 {
64 this->rootNode = rootNode;
65 VHDL_AST_Node *currentNode=rootNode;
66 QStack<VHDL_AST_Node*> openBlocks;
67 openBlocks.push(rootNode);
68 while (currentNode)
69 {
70 switch (currentNode->type)
71 {
72 case block:
73 openBlocks.push(currentNode);
74 walkForward(currentNode,-1);
75 break;
76 case entity:
77 //Declaration or instanciation?
78 if(!((currentNode->parent->type == colon) && (currentNode->parent->parent->type==identifier)))
79 {
80 openBlocks.push(currentNode);
81 }
82 walkForward(currentNode,-1);
83 break;
84 case units:
85 if(openBlocks.top()->type==clause)
86 {
87 openBlocks.top()->type=units;
88 walkForward(currentNode,-1);
89 }
90 break;
91 case port:
92 currentNode->type = static_cast<VHDL_AST_Node_type>(currentNode->type | closedBySemicolon);
93 openBlocks.push(currentNode);
94 break;
95 case generic:
96 if(!(currentNode->childs.first()->type==map))
97 {
98 currentNode->type = static_cast<VHDL_AST_Node_type>(currentNode->type | closedBySemicolon);
99 openBlocks.push(currentNode);
100 }
101 walkForward(currentNode,-1);
102 break;
103 case clause:
104 openBlocks.push(currentNode);
105 walkForward(currentNode,-1);
106 break;
107 case endKw:
108 closeAndMatchBlock(&currentNode,&openBlocks,QList<VHDL_AST_Node_type>()<<units<<block<<identifier,true);
109 break;
110 case leftParen:
111 openBlocks.push(currentNode);
112 walkForward(currentNode,-1);
113 break;
114 case rightParen:
115 if((openBlocks.top()->parent->type==port)||(openBlocks.top()->parent->type==generic))
116 closeAndMatchBlock(&currentNode,&openBlocks,QList<VHDL_AST_Node_type>(),false);
117 else
118 closeAndMatchBlock(&currentNode,&openBlocks,QList<VHDL_AST_Node_type>(),false);
119 break;
120 case semicolon:
121 if(IS_CLOSED_BY_SEMICOLON(openBlocks.top()->type))
122 {
123 closeAndMatchBlock(&currentNode,&openBlocks,QList<VHDL_AST_Node_type>(),false);
124 }
125 else
126 {
127 walkForward(currentNode,0);
128 }
129 break;
130 default:
131 walkForward(currentNode,0);
132 break;
133 }
134 }
135 return 0;
136 }
137
138 int VHDL_Tools::VHDL_File::closeAndMatchBlock(VHDL_Tools::VHDL_AST_Node **currentNode, QStack<VHDL_Tools::VHDL_AST_Node *> *openBlocksContext, QList<VHDL_Tools::VHDL_AST_Node_type> skipTypes, bool endWithSemicolon)
139 {
140 VHDL_AST_Node* startNode = openBlocksContext->pop();
141
142 if( IS_CLOSED_BY(startNode->type,(*currentNode)->type))
143 {
144 walkForward((*currentNode),-1);
145 for(int i=0;i<skipTypes.length();i++)
146 {
147 skipTokens((*currentNode),skipTypes.at(i));
148 }
149 if(endWithSemicolon && ((*currentNode)->type==semicolon))
150 {
151 walkForward((*currentNode),-1);
152 (*currentNode)->move(startNode->parent);
153
154 }
155 else
156 {
157 (*currentNode)->move(startNode->parent);
158 }
159 }
160 else
161 {
162 // TODO improve message !
163 qDebug() << "Got unexpected close token! @ line:" << (*currentNode)->line << " column:"<< (*currentNode)->column;
164 }
165 return 0;
166 }
167
168
169
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@@ -1,20 +1,23
1 #ifndef VHDL_FILE_H
1 #ifndef VHDL_FILE_H
2 #define VHDL_FILE_H
2 #define VHDL_FILE_H
3
3
4 #include "vhdlparser_global.h"
4 #include "vhdlparser_global.h"
5 #include "scanner/vhdl_scanner.h"
5 #include "scanner/vhdl_scanner.h"
6 #include <QString>
6 #include <QString>
7 namespace VHDL_Tools {
7 namespace VHDL_Tools {
8 class VHDL_File
8 class VHDL_File
9 {
9 {
10
10
11 public:
11 public:
12 VHDL_File();
12 VHDL_File();
13 bool parseFile(const QString& file);
13 bool parseFile(const QString& file, bool trashPreviousTree=false);
14
14 VHDL_Tools::VHDL_AST_Node* getParseTree();
15 private:
15 private:
16 VHDL_Tools::vhdl_Scanner *scanner;
16 VHDL_Tools::vhdl_Scanner *scanner;
17 int makeParseTree(VHDL_Tools::VHDL_AST_Node* rootNode);
18 int closeAndMatchBlock(VHDL_Tools::VHDL_AST_Node** currentNode,QStack<VHDL_Tools::VHDL_AST_Node*>* openBlocksContext,QList<VHDL_Tools::VHDL_AST_Node_type>skipTypes,bool endWithSemicolon=false);
19 VHDL_Tools::VHDL_AST_Node* rootNode;
17 };
20 };
18
21
19 }
22 }
20 #endif // VHDL_FILE_H
23 #endif // VHDL_FILE_H
Show file before | Show file after | Hide comments
@@ -1,36 +1,40
1 #-------------------------------------------------
1 #-------------------------------------------------
2 #
2 #
3 # Project created by QtCreator 2014-07-20T21:32:03
3 # Project created by QtCreator 2014-07-20T21:32:03
4 #
4 #
5 #-------------------------------------------------
5 #-------------------------------------------------
6
6
7 QT -= gui
7 QT -= gui
8
8
9
9
10 include ( ./scanner/Flex_Bison_FIles/Flex_Bison_FIles.pri )
10 include ( ./scanner/Flex_Bison_FIles/Flex_Bison_FIles.pri )
11
11
12 TARGET = vhdlparser
12 TARGET = vhdlparser
13 TEMPLATE = lib
13 TEMPLATE = lib
14
14
15 LIBS += -lfl
15 LIBS += -lfl
16
16
17 DEFINES += LIBVHDLPARSER_LIBRARY
17 DEFINES += LIBVHDLPARSER_LIBRARY
18 DESTDIR = ../bin
18 DESTDIR = ../bin
19
19
20 INCLUDEPATH += ./scanner
20 INCLUDEPATH += ./scanner
21 INCLUDEPATH += \
21 INCLUDEPATH += \
22 ../vhdlparser
22 ../vhdlparser
23
23
24
24
25 SOURCES += vhdl_file.cpp \
25 SOURCES += vhdl_file.cpp \
26 scanner/vhdl_scanner.cpp
26 scanner/vhdl_scanner.cpp \
27 scanner/vhdl_fragment.cpp \
28 scanner/vhdl_ast_node.cpp
27
29
28 HEADERS += vhdl_file.h\
30 HEADERS += vhdl_file.h\
29 libvhdlparser_global.h \
31 libvhdlparser_global.h \
30 scanner/vhdl_scanner.h
32 scanner/vhdl_scanner.h \
33 scanner/vhdl_fragment.h \
34 scanner/vhdl_ast_node.h
31
35
32 unix {
36 unix {
33 target.path = /usr/lib
37 target.path = /usr/lib
34 INSTALLS += target
38 INSTALLS += target
35 }
39 }
36
40
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