{ "cells": [ { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false }, "outputs": [], "source": [ "import random\n", "import time\n", "#%matplotlib inline\n", "import matplotlib.pyplot as plt\n", "import numpy as np\n", "import pandas as pds\n", "import datetime as dt" ] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": true }, "outputs": [], "source": [ "DOFILE=\"run.do.in\"\n", "RAM1={\n", "\"instance\":\"testbench/lpp_lfr_filter_1/IIR_CEL_CTRLR_v2_1/IIR_CEL_CTRLR_v2_DATAFLOW_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/MEMORYFILE\",\n", "\"abits\":8,\n", "\"dbits\":12,\n", "\"name\":\"RAM1.txt\"\n", "}\n", "RAM2={\n", "\"instance\":\"testbench/lpp_lfr_filter_1/IIR_CEL_f0_to_f1/IIR_CEL_CTRLR_v2_DATAFLOW_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/MEMORYFILE\",\n", "\"abits\":8,\n", "\"dbits\":12,\n", "\"name\":\"RAM2.txt\"\n", "}\n", "RAM3={\n", "\"instance\":\"testbench/lpp_lfr_filter_1/cic_lfr_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/MEMORYFILE\",\n", "\"abits\":9,\n", "\"dbits\":10,\n", "\"name\":\"RAM3.txt\"\n", "}\n", "RAM4={\n", "\"instance\":\"testbench/lpp_lfr_filter_1/cic_lfr_1/memRAM/SRAM/axc/x0/a8to12/agen(1)/u0/u0/MEMORYFILE\",\n", "\"abits\":9,\n", "\"dbits\":10,\n", "\"name\":\"RAM4.txt\"\n", "}\n", "RAM5={\n", "\"instance\":\"testbench/lpp_lfr_filter_1/YES_IIR_FILTER_f2_f3/IIR_CEL_CTRLR_v3_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/MEMORYFILE\",\n", "\"abits\":8,\n", "\"dbits\":12,\n", "\"name\":\"RAM5.txt\"\n", "}\n", "RAM6={\n", "\"instance\":\"testbench/lpp_lfr_filter_1/YES_IIR_FILTER_f2_f3/IIR_CEL_CTRLR_v3_1/RAM_CTRLR_v2_2/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/MEMORYFILE\",\n", "\"abits\":8,\n", "\"dbits\":12,\n", "\"name\":\"RAM6.txt\"\n", "}\n", "\n", "RAMS=[RAM1,RAM2,RAM3,RAM4,RAM5,RAM6]" ] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false }, "outputs": [], "source": [ "def mkram(length,width,gentype='rand',**kwargs):\n", " return toBinStr(gen(length,width,gentype,**kwargs),width)\n", "\n", "def toBinStr(data,width):\n", " return [format(val, 'b').zfill(width) for val in data]\n", "\n", "def gen(length,width,gentype='rand',**kwargs):\n", " LUT={\n", " \"rand\":gen_rand,\n", " \"const\":gen_const\n", " }\n", " return LUT[gentype](length,width,**kwargs)\n", "\n", "def gen_rand(length,width,**kwargs):\n", " random.seed(time.time())\n", " mask=(2**width)-1\n", " data=[]\n", " for line in range(length):\n", " data.append(int(2**32*random.random())&mask)\n", " return data\n", "\n", "def gen_const(length,width, value):\n", " mask=(2**width)-1\n", " return [value&mask for i in range(length)]\n", "\n", "def save(data,file):\n", " f = open(file,\"w\")\n", " [f.write(line+'\\n') for line in data]\n", " f.close()\n", " \n", "def start_Vsim(gentype='rand',**kwargs):\n", " args=\"\"\n", " for RAM in RAMS:\n", " save(mkram(2**RAM[\"abits\"],RAM[\"dbits\"],gentype=gentype,**kwargs),\"simulation/\"+RAM[\"name\"])\n", " args = args + \" -g\" + RAM[\"instance\"] + \"=\\\"\" + RAM[\"name\"] + \"\\\"\"\n", " with open(\"run.do.in\",\"r\") as inFile, open(\"simulation/run.do\",\"w\") as outFile:\n", " input = inFile.read()\n", " outFile.write(input.replace(\"#VSIM_ARGS#\",args))\n", " $(cd simulation)\n", " vsim -do run.do > sim.log\n", " folder=dt.datetime.today().strftime(\"%Y-%m-%d_%H-%M\")\n", " mkdir @(folder)\n", " for RAM in RAMS:\n", " cp @(RAM[\"name\"]) @(folder+\"/\"+RAM[\"name\"])\n", " cp log*.txt run.do sim.log @(folder) \n", " $(cd ..)\n", " \n" ] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false }, "outputs": [], "source": [] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false }, "outputs": [], "source": [ "df = pds.read_csv(\"./simulation/log_input.txt\",index_col=0,delim_whitespace=True,header=None,names=[\"TSTAMP\",\"BIAS1\",\"BIAS2\",\"BIAS3\",\"BIAS4\",\"BIAS5\",\"B1\",\"B2\",\"B3\"])\n", "df2 = pds.read_csv(\"./simulation/log_output_f0.txt\",index_col=0,delim_whitespace=True,header=None,names=[\"TSTAMP\",\"BIAS1\",\"BIAS4\",\"BIAS5\",\"B1\",\"B2\",\"B3\"])\n", "df3 = pds.read_csv(\"./simulation/log_output_f1.txt\",index_col=0,delim_whitespace=True,header=None,names=[\"TSTAMP\",\"BIAS1\",\"BIAS4\",\"BIAS5\",\"B1\",\"B2\",\"B3\"])\n", "df4 = pds.read_csv(\"./simulation/log_output_f2.txt\",index_col=0,delim_whitespace=True,header=None,names=[\"TSTAMP\",\"BIAS1\",\"BIAS4\",\"BIAS5\",\"B1\",\"B2\",\"B3\"])\n", "\n", "df.index*=5e-9\n", "if len(df2.index):\n", " df2.index*=5e-9\n", " df2/=0.89\n", "if len(df3.index):\n", " df3.index*=5e-9\n", " df3/=0.87\n", "if len(df4.index):\n", " df4.index*=5e-9\n", " df4/=0.89\n", "\n", "print(len(df))\n", "df.filter([\"B1\"]).plot()\n", "#plt.plot(df2)\n", "plt.plot(df3.filter([\"B1\"]))\n", "#plt.plot(df4)\n", "plt.show()" ] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false }, "outputs": [], "source": [ "cd .." ] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false }, "outputs": [], "source": [ "mkram(2,32)\n", "\n", "mkram(20,32,gentype='const',value=55)\n", "\n", "save(mkram(10,32),\"RAM_FILE.txt\")" ] }, { "cell_type": "code", "execution_count": null, "metadata": { "collapsed": false, "scrolled": false }, "outputs": [], "source": [ "for i in range(2):\n", " start_Vsim(gentype='rand',value=0)" ] } ], "metadata": { "kernelspec": { "display_name": "Xonsh", "language": "xonsh", "name": "xonsh" }, "language_info": { "codemirror_mode": "shell", "file_extension": ".xsh", "mimetype": "text/x-sh", "name": "xonsh", "pygments_lexer": "xonsh" } }, "nbformat": 4, "nbformat_minor": 1 }