#-- Synopsys, Inc.
#-- Version E-2010.09A-1
#-- Project file C:\opt\GRLIB\grlib-gpl-1.1.0-b4108\designs\Projet-Blanc-M7A3P1K\synthesis\run_options.txt
#-- Written on Tue Jul 24 16:56:59 2012


#project files
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/misc/rstgen.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/stdlib/config.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/stdlib/version.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/stdlib/stdlib.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/amba/amba.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/gencomp/gencomp.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/allpads.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/clkpad.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/proasic3/clkgen_proasic3.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/allclkgen.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/clkgen.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/cpu_disasx.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/sparc/sparc.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/leon3.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/arith/arith.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmuconfig.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/libiu.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/sparc/sparc_disas.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/iu3.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/modgen/leaves.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/inferred/mul_inferred.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/modgen/multlib.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/allmul.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/techmult.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/arith/mul32.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/arith/div32.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmuiface.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/libcache.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmu_icache.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/libmmu.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmu_dcache.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/amba/devices.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmu_acache.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmutlbcam.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmulrue.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmulru.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/grgates.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/inferred/memory_inferred.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/proasic3/memory_apa3.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/allmem.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/syncram.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmutlb.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmutw.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmu.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mmu_cache.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/proc3.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/syncram_2p.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/syncram_dp.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/cachemem.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/syncram64.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/tbufmem.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/grfpw_net.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/regfile_3p.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/gencomp/netcomp.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/grfpwx.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/mfpwx.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/grlfpw_net.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/grlfpwx.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/libproc3.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/leon3s.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/outpad.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/clkand.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/dsu3x.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/dsu3.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/inpad.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/leon3/irqmp.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/memctrl/memctrl.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/memctrl/sdmctrl.vhd"
add_file -vhdl -lib esa "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/esa/memoryctrl/memoryctrl.vhd"
add_file -vhdl -lib esa "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/esa/memoryctrl/mctrl.vhd"
add_file -vhdl -lib techmap "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/techmap/maps/iopad.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/amba/ahbctrl.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/misc/misc.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/misc/ahbmst.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/uart/uart.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/uart/libdcom.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/uart/dcom_uart.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/uart/dcom.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/uart/ahbuart.vhd"
add_file -vhdl -lib grlib "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/grlib/amba/apbctrl.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/misc/gptimer.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/uart/apbuart.vhd"
add_file -vhdl -lib gaisler "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/gaisler/misc/grgpio.vhd"
add_file -vhdl -lib work "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/config.vhd"
add_file -vhdl -lib lpp "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/../../lib/lpp/./lpp_amba/lpp_amba.vhd"
add_file -vhdl -lib work "C:/opt/GRLIB/grlib-gpl-1.1.0-b4108/designs/Projet-Blanc-M7A3P1K/leon3mp.vhd"


#implementation: "synthesis"
impl -add synthesis -type fpga

#device options
set_option -technology ProASIC3
set_option -part M7A3P1000
set_option -package FBGA144
set_option -speed_grade -2
set_option -part_companion ""

#compilation/mapping options
set_option -use_fsm_explorer 0
set_option -top_module "work.leon3mp"

# mapper_options
set_option -frequency 100.000
set_option -write_verilog 0
set_option -write_vhdl 0

# Actel 500K
set_option -run_prop_extract 1
set_option -maxfan 24
set_option -maxfan_hard3 0
set_option -disable_io_insertion 0
set_option -retiming 0
set_option -report_path 0
set_option -opcond COMWC
set_option -update_models_cp 0
set_option -preserve_registers 0

# Actel 500K
set_option -globalthreshold 50

# NFilter
set_option -popfeed 0
set_option -constprop 0
set_option -createhierarchy 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./leon3mp.edn"
impl -active "synthesis"