@@ -0,0 +1,181 | |||||
|
1 | ------------------------------------------------------------------------------ | |||
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
|
4 | -- | |||
|
5 | -- This program is free software; you can redistribute it and/or modify | |||
|
6 | -- it under the terms of the GNU General Public License as published by | |||
|
7 | -- the Free Software Foundation; either version 2 of the License, or | |||
|
8 | -- (at your option) any later version. | |||
|
9 | -- | |||
|
10 | -- This program is distributed in the hope that it will be useful, | |||
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
|
13 | -- GNU General Public License for more details. | |||
|
14 | -- | |||
|
15 | -- You should have received a copy of the GNU General Public License | |||
|
16 | -- along with this program; if not, write to the Free Software | |||
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
|
18 | ------------------------------------------------------------------------------- | |||
|
19 | ---------------------------------------------------------------------------------- | |||
|
20 | -- Company: | |||
|
21 | -- Engineer: | |||
|
22 | -- | |||
|
23 | -- Create Date: 08:44:41 10/14/2010 | |||
|
24 | -- Design Name: | |||
|
25 | -- Module Name: Top_LCD - Behavioral | |||
|
26 | -- Project Name: | |||
|
27 | -- Target Devices: | |||
|
28 | -- Tool versions: | |||
|
29 | -- Description: | |||
|
30 | -- | |||
|
31 | -- Dependencies: | |||
|
32 | -- | |||
|
33 | -- Revision: | |||
|
34 | -- Revision 0.01 - File Created | |||
|
35 | -- Additional Comments: | |||
|
36 | -- | |||
|
37 | ---------------------------------------------------------------------------------- | |||
|
38 | library IEEE; | |||
|
39 | use IEEE.STD_LOGIC_1164.ALL; | |||
|
40 | use ieee.numeric_std.all; | |||
|
41 | library grlib; | |||
|
42 | use grlib.amba.all; | |||
|
43 | use grlib.stdlib.all; | |||
|
44 | use grlib.devices.all; | |||
|
45 | library lpp; | |||
|
46 | use lpp.amba_lcd_16x2_ctrlr.all; | |||
|
47 | use lpp.LCD_16x2_CFG.all; | |||
|
48 | use lpp.lpp_amba.all; | |||
|
49 | ||||
|
50 | entity apb_lcd_ctrlr is | |||
|
51 | generic ( | |||
|
52 | pindex : integer := 0; | |||
|
53 | paddr : integer := 0; | |||
|
54 | pmask : integer := 16#fff#; | |||
|
55 | pirq : integer := 0; | |||
|
56 | abits : integer := 8); | |||
|
57 | port ( | |||
|
58 | rst : in std_ulogic; | |||
|
59 | clk : in std_ulogic; | |||
|
60 | apbi : in apb_slv_in_type; | |||
|
61 | apbo : out apb_slv_out_type; | |||
|
62 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |||
|
63 | LCD_RS : out STD_LOGIC; | |||
|
64 | LCD_RW : out STD_LOGIC; | |||
|
65 | LCD_E : out STD_LOGIC; | |||
|
66 | LCD_RET : out STD_LOGIC; | |||
|
67 | LCD_CS1 : out STD_LOGIC; | |||
|
68 | LCD_CS2 : out STD_LOGIC; | |||
|
69 | SF_CE0 : out std_logic | |||
|
70 | ); | |||
|
71 | end apb_lcd_ctrlr; | |||
|
72 | ||||
|
73 | architecture Behavioral of apb_lcd_ctrlr is | |||
|
74 | ||||
|
75 | signal FramBUFF : STD_LOGIC_VECTOR(16*2*8-1 downto 0); | |||
|
76 | signal CMD : std_logic_vector(10 downto 0); | |||
|
77 | signal Exec : std_logic; | |||
|
78 | signal Ready : std_logic; | |||
|
79 | signal LCD_CTRL : LCD_DRVR_CTRL_BUSS; | |||
|
80 | ||||
|
81 | ||||
|
82 | ||||
|
83 | constant REVISION : integer := 1; | |||
|
84 | ||||
|
85 | constant pconfig : apb_config_type := ( | |||
|
86 | 0 => ahb_device_reg (VENDOR_LPP, LPP_LCD_CTRLR, 0, REVISION, 0), | |||
|
87 | 1 => apb_iobar(paddr, pmask)); | |||
|
88 | ||||
|
89 | ||||
|
90 | --type FRM_Buff_El is std_logic_vector(31 downto 0); | |||
|
91 | type FRM_Buff_Reg is array(31 downto 0) of std_logic_vector(31 downto 0); | |||
|
92 | ||||
|
93 | ||||
|
94 | type LCD_ctrlr_Reg is record | |||
|
95 | CTRL_Reg : std_logic_vector(31 downto 0); | |||
|
96 | FRAME_BUFF : FRM_Buff_Reg; | |||
|
97 | end record; | |||
|
98 | ||||
|
99 | signal r : LCD_ctrlr_Reg; | |||
|
100 | ||||
|
101 | ||||
|
102 | begin | |||
|
103 | ||||
|
104 | LCD_data <= LCD_CTRL.LCD_DATA; | |||
|
105 | LCD_RS <= LCD_CTRL.LCD_RS; | |||
|
106 | LCD_RW <= LCD_CTRL.LCD_RW; | |||
|
107 | LCD_E <= LCD_CTRL.LCD_E; | |||
|
108 | ||||
|
109 | ||||
|
110 | LCD_RET <= '0'; | |||
|
111 | LCD_CS1 <= '0'; | |||
|
112 | LCD_CS2 <= '0'; | |||
|
113 | ||||
|
114 | SF_CE0 <= '1'; | |||
|
115 | ||||
|
116 | CMD(7 downto 0) <= r.CTRL_Reg(7 downto 0); --CMD value | |||
|
117 | CMD(9 downto 8) <= r.CTRL_Reg(9 downto 8); --CMD tempo value | |||
|
118 | ||||
|
119 | r.CTRL_Reg(10) <= Ready; | |||
|
120 | ||||
|
121 | Driver0 : LCD_16x2_ENGINE | |||
|
122 | generic map(50000) | |||
|
123 | Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL); | |||
|
124 | ||||
|
125 | FRM_BF : for i in 0 to 15 generate | |||
|
126 | FramBUFF((8*(i+1))-1 downto 8*i) <= r.FRAME_BUFF(i)(7 downto 0); | |||
|
127 | end generate; | |||
|
128 | ||||
|
129 | ||||
|
130 | process(rst,clk) | |||
|
131 | begin | |||
|
132 | if rst = '0' then | |||
|
133 | r.CTRL_Reg(9 downto 0) <= (others => '0'); | |||
|
134 | apbo.prdata <= (others => '0'); | |||
|
135 | Exec <= '0'; | |||
|
136 | elsif clk'event and clk = '1' then | |||
|
137 | ||||
|
138 | --APB Write OP | |||
|
139 | if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then | |||
|
140 | case apbi.paddr(7 downto 2) is | |||
|
141 | when "000000" => | |||
|
142 | r.CTRL_Reg(9 downto 0) <= apbi.pwdata(9 downto 0); | |||
|
143 | when others => | |||
|
144 | writeC: for i in 1 to 32 loop | |||
|
145 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |||
|
146 | r.FRAME_BUFF(i-1) <= apbi.pwdata; | |||
|
147 | end if; | |||
|
148 | end loop; | |||
|
149 | end case; | |||
|
150 | end if; | |||
|
151 | ||||
|
152 | --APB READ OP | |||
|
153 | if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then | |||
|
154 | case apbi.paddr(7 downto 2) is | |||
|
155 | when "000000" => | |||
|
156 | apbo.prdata <= r.CTRL_Reg; | |||
|
157 | when others => | |||
|
158 | readC: for i in 1 to 32 loop | |||
|
159 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |||
|
160 | apbo.prdata(7 downto 0) <= r.FRAME_BUFF(i-1)(7 downto 0); | |||
|
161 | Exec <= '1'; | |||
|
162 | end if; | |||
|
163 | end loop; | |||
|
164 | end case; | |||
|
165 | else | |||
|
166 | Exec <= '0'; | |||
|
167 | end if; | |||
|
168 | ||||
|
169 | end if; | |||
|
170 | apbo.pconfig <= pconfig; | |||
|
171 | end process; | |||
|
172 | ||||
|
173 | ||||
|
174 | ||||
|
175 | end Behavioral; | |||
|
176 | ||||
|
177 | ||||
|
178 | ||||
|
179 | ||||
|
180 | ||||
|
181 |
@@ -19,7 +19,10 | |||||
19 |
|
19 | |||
20 | library ieee; |
|
20 | library ieee; | |
21 | use ieee.std_logic_1164.all; |
|
21 | use ieee.std_logic_1164.all; | |
22 |
|
22 | library grlib; | ||
|
23 | use grlib.amba.all; | |||
|
24 | use grlib.stdlib.all; | |||
|
25 | use grlib.devices.all; | |||
23 |
|
26 | |||
24 |
|
27 | |||
25 | package amba_lcd_16x2_ctrlr is |
|
28 | package amba_lcd_16x2_ctrlr is | |
@@ -134,4 +137,31 component LCD_16x2_ENGINE is | |||||
134 | end component; |
|
137 | end component; | |
135 |
|
138 | |||
136 |
|
139 | |||
|
140 | ||||
|
141 | component apb_lcd_ctrlr is | |||
|
142 | generic ( | |||
|
143 | pindex : integer := 0; | |||
|
144 | paddr : integer := 0; | |||
|
145 | pmask : integer := 16#fff#; | |||
|
146 | pirq : integer := 0; | |||
|
147 | abits : integer := 8); | |||
|
148 | port ( | |||
|
149 | rst : in std_ulogic; | |||
|
150 | clk : in std_ulogic; | |||
|
151 | apbi : in apb_slv_in_type; | |||
|
152 | apbo : out apb_slv_out_type; | |||
|
153 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |||
|
154 | LCD_RS : out STD_LOGIC; | |||
|
155 | LCD_RW : out STD_LOGIC; | |||
|
156 | LCD_E : out STD_LOGIC; | |||
|
157 | LCD_RET : out STD_LOGIC; | |||
|
158 | LCD_CS1 : out STD_LOGIC; | |||
|
159 | LCD_CS2 : out STD_LOGIC; | |||
|
160 | SF_CE0 : out std_logic | |||
|
161 | ); | |||
|
162 | end component; | |||
|
163 | ||||
|
164 | ||||
|
165 | ||||
|
166 | ||||
137 | end; |
|
167 | end; |
@@ -1,4 +1,5 | |||||
1 | amba_lcd_16x2_ctrlr.vhd |
|
1 | amba_lcd_16x2_ctrlr.vhd | |
|
2 | apb_lcd_ctrlr.vhd | |||
2 | FRAME_CLK.vhd |
|
3 | FRAME_CLK.vhd | |
3 | LCD_16x2_CFG.vhd |
|
4 | LCD_16x2_CFG.vhd | |
4 | LCD_16x2_DRVR.vhd |
|
5 | LCD_16x2_DRVR.vhd |
@@ -37,6 +37,7 constant ROCKET_TM : amb | |||||
37 | constant otherCore : amba_device_type := 16#002#; |
|
37 | constant otherCore : amba_device_type := 16#002#; | |
38 | constant LPP_SIMPLE_DIODE : amba_device_type := 16#003#; |
|
38 | constant LPP_SIMPLE_DIODE : amba_device_type := 16#003#; | |
39 | constant LPP_MULTI_DIODE : amba_device_type := 16#004#; |
|
39 | constant LPP_MULTI_DIODE : amba_device_type := 16#004#; | |
|
40 | constant LPP_LCD_CTRLR : amba_device_type := 16#005#; | |||
40 |
|
41 | |||
41 |
|
42 | |||
42 | component APB_SIMPLE_DIODE is |
|
43 | component APB_SIMPLE_DIODE is |
General Comments 0
You need to be logged in to leave comments.
Login now