@@ -511,7 +511,7 BEGIN -- beh | |||
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511 | 511 | pirq_ms => 6, |
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512 | 512 | pirq_wfp => 14, |
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513 | 513 | hindex => 2, |
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514 |
top_lfr_version => X"00012 |
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514 | top_lfr_version => X"00012A") -- aa.bb.cc version | |
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515 | 515 | PORT MAP ( |
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516 | 516 | clk => clk_25, |
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517 | 517 | rstn => LFR_rstn, |
@@ -126,8 +126,15 ARCHITECTURE tb OF lpp_lfr_filter IS | |||
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126 | 126 | SIGNAL sample_f1_s : samplT(5 DOWNTO 0, 15 DOWNTO 0); |
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127 | 127 | -- |
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128 | 128 | -- SIGNAL sample_f2_val : STD_LOGIC; |
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129 |
SIGNAL sample_f2 : sampl |
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130 |
SIGNAL sample_f |
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129 | SIGNAL sample_f2 : samplT(5 DOWNTO 0, 15 DOWNTO 0); | |
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130 | SIGNAL sample_f2_cic_s : samplT(5 DOWNTO 0, 15 DOWNTO 0); | |
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131 | SIGNAL sample_f2_cic : sample_vector(5 DOWNTO 0, 15 DOWNTO 0); | |
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132 | SIGNAL sample_f2_cic_val : STD_LOGIC; | |
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133 | ||
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134 | SIGNAL sample_f3 : samplT(5 DOWNTO 0, 15 DOWNTO 0); | |
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135 | SIGNAL sample_f3_cic_s : samplT(5 DOWNTO 0, 15 DOWNTO 0); | |
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136 | SIGNAL sample_f3_cic : sample_vector(5 DOWNTO 0, 15 DOWNTO 0); | |
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137 | SIGNAL sample_f3_cic_val : STD_LOGIC; | |
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131 | 138 | |
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132 | 139 | ----------------------------------------------------------------------------- |
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133 | 140 | --SIGNAL data_f0_in_valid : STD_LOGIC_VECTOR(159 DOWNTO 0) := (OTHERS => '0'); |
@@ -341,29 +348,65 BEGIN | |||
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341 | 348 | data_in => sample_f0_s, |
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342 | 349 | data_in_valid => sample_f0_val_s, |
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343 | 350 | |
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344 | data_out_16 => sample_f2, | |
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345 | data_out_16_valid => sample_f2_val, | |
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351 | data_out_16 => sample_f2_cic, | |
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352 | data_out_16_valid => sample_f2_cic_val, | |
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346 | 353 | |
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347 | data_out_256 => sample_f3, | |
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348 | data_out_256_valid => sample_f3_val); | |
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354 | data_out_256 => sample_f3_cic, | |
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355 | data_out_256_valid => sample_f3_cic_val); | |
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356 | ||
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357 | ----------------------------------------------------------------------------- | |
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358 | ||
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359 | all_bit_sample_f2_cic : FOR I IN 15 DOWNTO 0 GENERATE | |
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360 | all_channel_sample_f2_cic : FOR J IN 5 DOWNTO 0 GENERATE | |
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361 | sample_f2_cic_s(J,I) <= sample_f2_cic(J,I); | |
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362 | END GENERATE all_channel_sample_f2_cic; | |
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363 | END GENERATE all_bit_sample_f2_cic; | |
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364 | ||
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365 | Downsampling_f2 : Downsampling | |
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366 | GENERIC MAP ( | |
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367 | ChanelCount => 6, | |
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368 | SampleSize => 16, | |
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369 | DivideParam => 6) | |
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370 | PORT MAP ( | |
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371 | clk => clk, | |
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372 | rstn => rstn, | |
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373 | sample_in_val => sample_f2_cic_val , | |
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374 | sample_in => sample_f2_cic_s, | |
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375 | sample_out_val => sample_f2_val, | |
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376 | sample_out => sample_f2); | |
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349 | 377 |
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350 | 378 | all_bit_sample_f2 : FOR I IN 15 DOWNTO 0 GENERATE |
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351 | sample_f2_wdata_s(I) <= sample_f2(0, I); | |
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352 |
sample_f2_wdata_s(16* |
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353 | sample_f2_wdata_s(16*2+I) <= sample_f2(2, I); | |
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354 | sample_f2_wdata_s(16*3+I) <= sample_f2(3, I); | |
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355 | sample_f2_wdata_s(16*4+I) <= sample_f2(4, I); | |
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356 | sample_f2_wdata_s(16*5+I) <= sample_f2(5, I); | |
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379 | all_channel_sample_f2 : FOR J IN 5 DOWNTO 0 GENERATE | |
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380 | sample_f2_wdata_s(16*J+I) <= sample_f2(J,I); | |
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381 | END GENERATE all_channel_sample_f2; | |
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357 | 382 | END GENERATE all_bit_sample_f2; |
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358 | ||
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383 | ||
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384 | ----------------------------------------------------------------------------- | |
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385 | ||
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359 | 386 |
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360 | sample_f3_wdata_s(I) <= sample_f3(0, I); | |
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361 |
sample_f3_ |
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362 | sample_f3_wdata_s(16*2+I) <= sample_f3(2, I); | |
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363 | sample_f3_wdata_s(16*3+I) <= sample_f3(3, I); | |
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364 | sample_f3_wdata_s(16*4+I) <= sample_f3(4, I); | |
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365 | sample_f3_wdata_s(16*5+I) <= sample_f3(5, I); | |
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387 | all_channel_sample_f3 : FOR J IN 5 DOWNTO 0 GENERATE | |
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388 | sample_f3_cic_s(J,I) <= sample_f3_cic(J,I); | |
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389 | END GENERATE all_channel_sample_f3; | |
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366 | 390 | END GENERATE all_bit_sample_f3; |
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391 | ||
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392 | Downsampling_f3 : Downsampling | |
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393 | GENERIC MAP ( | |
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394 | ChanelCount => 6, | |
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395 | SampleSize => 16, | |
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396 | DivideParam => 6) | |
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397 | PORT MAP ( | |
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398 | clk => clk, | |
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399 | rstn => rstn, | |
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400 | sample_in_val => sample_f3_cic_val , | |
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401 | sample_in => sample_f3_cic_s, | |
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402 | sample_out_val => sample_f3_val, | |
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403 | sample_out => sample_f3); | |
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404 | ||
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405 | all_bit_sample_f3 : FOR I IN 15 DOWNTO 0 GENERATE | |
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406 | all_channel_sample_f3 : FOR J IN 5 DOWNTO 0 GENERATE | |
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407 | sample_f3_wdata_s(16*J+I) <= sample_f3(J,I); | |
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408 | END GENERATE all_channel_sample_f3; | |
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409 | END GENERATE all_bit_sample_f3; | |
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367 | 410 |
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368 | 411 |
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369 | 412 | -- |
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