# HG changeset patch # User martin # Date 2011-04-06 12:18:34 # Node ID e0d39502407e81127d155afe41a5b46f42377238 # Parent 9747167434f28a721afcaa4510a3cfe5dc4da124 IP FFT modified/cleaned, FFT C Driver added diff --git a/LPP_drivers/exemples/BenchFFT/Makefile b/LPP_drivers/exemples/BenchFFT/Makefile new file mode 100644 --- /dev/null +++ b/LPP_drivers/exemples/BenchFFT/Makefile @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------ +#-- This file is a part of the LPP VHDL IP LIBRARY +#-- Copyright (C) 2010, Laboratory of Plasmas Physic - CNRS +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------ + +include ../../rules.mk +LIBDIR = ../../lib +INCPATH = ../../includes +SCRIPTDIR=../../scripts/ +LIBS=-lapb_fft_Driver -llpp_apb_functions -lapb_uart_Driver +INPUTFILE=main.c +EXEC=BenchFFT.bin +OUTBINDIR=bin/ + + +.PHONY:bin + +all:bin + @echo $(EXEC)" file created" + +clean: + rm -f *.{o,a} + + + +help:ruleshelp + @echo " all : makes an executable file called "$(EXEC) + @echo " in "$(OUTBINDIR) + @echo " clean : removes temporary files" + diff --git a/LPP_drivers/exemples/BenchFFT/main.c b/LPP_drivers/exemples/BenchFFT/main.c new file mode 100644 --- /dev/null +++ b/LPP_drivers/exemples/BenchFFT/main.c @@ -0,0 +1,43 @@ +#include +#include "lpp_apb_functions.h" +#include "apb_uart_Driver.h" +#include "apb_fft_Driver.h" + + +int main() +{ + char temp[256]; + int i; + int Table[256]; +//Somme de 2 sinus// + //int Tablo[256] = {0x00000000,0x0DA20000,0x1B080000,0x27F70000,0x34380000,0x3F960000,0x49E10000,0x52F10000,0x5AA10000,0x60D60000,0x657D0000,0x688C0000,0x69FE0000,0x69DB0000,0x68310000,0x65170000,0x60A90000,0x5B0D0000,0x546D0000,0x4CF90000,0x44E30000,0x3C610000,0x33AA0000,0x2AF40000,0x22750000,0x1A610000,0x12E70000,0x0C310000,0x06660000,0x01A30000,0xFE010000,0xFB8E0000,0xFA520000,0xFA4D0000,0xFB770000,0xFDBE0000,0x010A0000,0x053E0000,0x0A330000,0x0FBF0000,0x15B30000,0x1BDE0000,0x220C0000,0x28080000,0x2D9D0000,0x329B0000,0x36D20000,0x3A170000,0x3C440000,0x3D390000,0x3CDE0000,0x3B210000,0x37F90000,0x33650000,0x2D6D0000,0x26210000,0x1D990000,0x13F30000,0x09570000,0xFDF10000,0xF1F20000,0xE58F0000,0xD9030000,0xCC870000,0xC0560000,0xB4AA0000,0xA9BC0000,0x9FBF0000,0x96E40000,0x8F570000,0x893A0000,0x84AB0000,0x81BF0000,0x80830000,0x80FB0000,0x83220000,0x86EC0000,0x8C430000,0x93090000,0x9B1B0000,0xA44D0000,0xAE700000,0xB9500000,0xC4B40000,0xD0630000,0xDC240000,0xE7BD0000,0xF2F60000,0xFD9A0000,0x077A0000,0x106B0000,0x18480000,0x1EF30000,0x24570000,0x28650000,0x2B160000,0x2C6F0000,0x2C790000,0x2B470000,0x28F30000,0x259E0000,0x216E0000,0x1C8F0000,0x17310000,0x11860000,0x0BC10000,0x06170000,0x00BA0000,0xFBDD0000,0xF7AC0000,0xF44F0000,0xF1EA0000,0xF09C0000,0xF0790000,0xF1900000,0xF3E80000,0xF77E0000,0xFC4A0000,0x02370000,0x092E0000,0x110E0000,0x19AF0000,0x22E40000,0x2C7C0000,0x36420000,0x3FFF0000,0x497C0000,0x52810000,0x5AD70000,0x624B0000,0x68AD0000,0x6DD40000,0x71990000,0x73E10000,0x74950000,0x73A60000,0x71100000,0x6CD60000,0x67040000,0x5FAD0000,0x56EE0000,0x4CEA0000,0x41CD0000,0x35C50000,0x29070000,0x1BCC0000,0x0E4E0000,0x00CA0000,0xF37C0000,0xE69C0000,0xDA620000,0xCF040000,0xC4AE0000,0xBB8B0000,0xB3BC0000,0xAD5C0000,0xA87D0000,0xA5290000,0xA3630000,0xA3220000,0xA4590000,0xA6EF0000,0xAAC80000,0xAFBD0000,0xB5A40000,0xBC4F0000,0xC38B0000,0xCB220000,0xD2E00000,0xDA8E0000,0xE1F70000,0xE8EC0000,0xEF3C0000,0xF4C10000,0xF9560000,0xFCDF0000,0xFF470000,0x007F0000,0x00850000,0xFF5C0000,0xFD0B0000,0xF9A80000,0xF54B0000,0xF0170000,0xEA320000,0xE3C90000,0xDD0B0000,0xD62B0000,0xCF5F0000,0xC8DA0000,0xC2D30000,0xBD7A0000,0xB8FF0000,0xB58D0000,0xB3490000,0xB2510000,0xB2BE0000,0xB49F0000,0xB7FC0000,0xBCD60000,0xC3220000,0xCAD10000,0xD3C70000,0xDDE50000,0xE9030000,0xF4F20000,0x01800000,0x0E770000,0x1B9D0000,0x28B70000,0x35880000,0x41D70000,0x4D6C0000,0x58100000,0x61950000,0x69D00000,0x709C0000,0x75DE0000,0x79800000,0x7B750000,0x7BBB0000,0x7A570000,0x77550000,0x72CB0000,0x6CD70000,0x659E0000,0x5D490000,0x54090000,0x4A110000,0x3F980000,0x34D80000,0x2A090000,0x1F630000,0x151D0000,0x0B690000,0x02760000,0xFA6F0000,0xF3730000,0xEDA10000,0xE90B0000,0xE5BF0000,0xE3C00000,0xE30A0000,0xE38F0000,0xE53D0000,0xE7F80000,0xEB9D0000,0xF0050000,0xF5030000,0xFA680000,0x00000000,0x05980000,0x0AFD0000,0x0FFB0000,0x14630000,0x18080000}; +//1 Sinus// + int Tablo[256] = {0x00000000,0x080A0000,0x100B0000,0x17FC0000,0x1FD50000,0x278E0000,0x2F1F0000,0x36800000,0x3DAA0000,0x44960000,0x4B3D0000,0x51970000,0x579F0000,0x5D4F0000,0x62A00000,0x678E0000,0x6C130000,0x702B0000,0x73D10000,0x77030000,0x79BC0000,0x7BFB0000,0x7DBC0000,0x7EFE0000,0x7FBF0000,0x80000000,0x7FBF0000,0x7EFE0000,0x7DBC0000,0x7BFB0000,0x79BC0000,0x77030000,0x73D10000,0x702B0000,0x6C130000,0x678E0000,0x62A00000,0x5D4F0000,0x579F0000,0x51970000,0x4B3D0000,0x44960000,0x3DAA0000,0x36800000,0x2F1F0000,0x278E0000,0x1FD50000,0x17FC0000,0x100B0000,0x080A0000,0x00000000,0xF7F60000,0xEFF50000,0xE8040000,0xE02B0000,0xD8720000,0xD0E10000,0xC9800000,0xC2560000,0xBB6A0000,0xB4C30000,0xAE690000,0xA8610000,0xA2B10000,0x9D600000,0x98720000,0x93ED0000,0x8FD50000,0x8C2F0000,0x88FD0000,0x86440000,0x84050000,0x82440000,0x81020000,0x80410000,0x80000000,0x80410000,0x81020000,0x82440000,0x84050000,0x86440000,0x88FD0000,0x8C2F0000,0x8FD50000,0x93ED0000,0x98720000,0x9D600000,0xA2B10000,0xA8610000,0xAE690000,0xB4C30000,0xBB6A0000,0xC2560000,0xC9800000,0xD0E10000,0xD8720000,0xE02B0000,0xE8040000,0xEFF50000,0xF7F60000,0x00000000,0x080A0000,0x100B0000,0x17FC0000,0x1FD50000,0x278E0000,0x2F1F0000,0x36800000,0x3DAA0000,0x44960000,0x4B3D0000,0x51970000,0x579F0000,0x5D4F0000,0x62A00000,0x678E0000,0x6C130000,0x702B0000,0x73D10000,0x77030000,0x79BC0000,0x7BFB0000,0x7DBC0000,0x7EFE0000,0x7FBF0000,0x80000000,0x7FBF0000,0x7EFE0000,0x7DBC0000,0x7BFB0000,0x79BC0000,0x77030000,0x73D10000,0x702B0000,0x6C130000,0x678E0000,0x62A00000,0x5D4F0000,0x579F0000,0x51970000,0x4B3D0000,0x44960000,0x3DAA0000,0x36800000,0x2F1F0000,0x278E0000,0x1FD50000,0x17FC0000,0x100B0000,0x080A0000,0x00000000,0xF7F60000,0xEFF50000,0xE8040000,0xE02B0000,0xD8720000,0xD0E10000,0xC9800000,0xC2560000,0xBB6A0000,0xB4C30000,0xAE690000,0xA8610000,0xA2B10000,0x9D600000,0x98720000,0x93ED0000,0x8FD50000,0x8C2F0000,0x88FD0000,0x86440000,0x84050000,0x82440000,0x81020000,0x80410000,0x80000000,0x80410000,0x81020000,0x82440000,0x84050000,0x86440000,0x88FD0000,0x8C2F0000,0x8FD50000,0x93ED0000,0x98720000,0x9D600000,0xA2B10000,0xA8610000,0xAE690000,0xB4C30000,0xBB6A0000,0xC2560000,0xC9800000,0xD0E10000,0xD8720000,0xE02B0000,0xE8040000,0xEFF50000,0xF7F60000,0x00000000,0x080A0000,0x100B0000,0x17FC0000,0x1FD50000,0x278E0000,0x2F1F0000,0x36800000,0x3DAA0000,0x44960000,0x4B3D0000,0x51970000,0x579F0000,0x5D4F0000,0x62A00000,0x678E0000,0x6C130000,0x702B0000,0x73D10000,0x77030000,0x79BC0000,0x7BFB0000,0x7DBC0000,0x7EFE0000,0x7FBF0000,0x80000000,0x7FBF0000,0x7EFE0000,0x7DBC0000,0x7BFB0000,0x79BC0000,0x77030000,0x73D10000,0x702B0000,0x6C130000,0x678E0000,0x62A00000,0x5D4F0000,0x579F0000,0x51970000,0x4B3D0000,0x44960000,0x3DAA0000,0x36800000,0x2F1F0000,0x278E0000,0x1FD50000,0x17FC0000,0x100B0000,0x080A0000,0x00000000,0xF7F60000,0xEFF50000,0xE8040000,0xE02B0000,0xD8720000}; + printf("Debut Main\n\n"); + UART_Device* uart0 = openUART(0); + FFT_Device* fft0 = openFFT(0); + + printf("addr_fft: %x\n",(unsigned int)fft0); + printf("addr_uart: %x\n\n",(unsigned int)uart0); + printf("cfg_fft: %x\n",fft0->ConfigReg); + printf("cfg_uart: %x\n\n",uart0->ConfigReg); + + while(1) + { + FftInput(Tablo,fft0); + /* for (i = 0 ; i < 256 ; i++) + { + sprintf(temp,"%x/in",Tablo[i]); + uartputs(uart0,temp); + }*/ + + FftOutput(Table,fft0); + for (i = 0 ; i < 128 ; i++) + { + sprintf(temp,"%x/out",Table[i]); + uartputs(uart0,temp); + } + } + return 0; +} + diff --git a/LPP_drivers/exemples/Makefile b/LPP_drivers/exemples/Makefile --- a/LPP_drivers/exemples/Makefile +++ b/LPP_drivers/exemples/Makefile @@ -24,4 +24,5 @@ all: make all -C APB_lcd_ctrlr make all -C BenchFIFO make all -C BenchUART + make all -C BenchFFT diff --git a/LPP_drivers/includes/apb_fft_Driver.h b/LPP_drivers/includes/apb_fft_Driver.h new file mode 100644 --- /dev/null +++ b/LPP_drivers/includes/apb_fft_Driver.h @@ -0,0 +1,56 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the LPP VHDL IP LIBRARY +-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Martin Morlot +-- Mail : martin.morlot@lpp.polytechnique.fr +-----------------------------------------------------------------------------*/ +#ifndef APB_FFT_DRIVER_H +#define APB_FFT_DRIVER_H + +#define FFT_Empty 0x00100 +#define FFT_Full 0x01000 + + +/*=================================================== + T Y P E S D E F +====================================================*/ + +struct FFT_Driver +{ + int RWDataReg; + int ReadAddrReg; + int ConfigReg; + int Dummy1; + int Dummy0; + int WriteAddrReg; +}; + +typedef struct FFT_Driver FFT_Device; + + +/*=================================================== + F U N C T I O N S +====================================================*/ + +FFT_Device* openFFT(int count); +int FftInput(int Tbl[],FFT_Device*); +int FftOutput(int Tbl[],FFT_Device*); + + + +#endif diff --git a/LPP_drivers/libsrc/FFT/Makefile b/LPP_drivers/libsrc/FFT/Makefile new file mode 100644 --- /dev/null +++ b/LPP_drivers/libsrc/FFT/Makefile @@ -0,0 +1,25 @@ +#------------------------------------------------------------------------------ +#-- This file is a part of the LPP VHDL IP LIBRARY +#-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------ +FILE = apb_fft_Driver +LIB = liblpp_fft_Driver.a + +include ../../rules.mk + +all: $(FILE).a + @echo $(FILE)".a created" diff --git a/LPP_drivers/libsrc/FFT/apb_fft_Driver.c b/LPP_drivers/libsrc/FFT/apb_fft_Driver.c new file mode 100644 --- /dev/null +++ b/LPP_drivers/libsrc/FFT/apb_fft_Driver.c @@ -0,0 +1,90 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the LPP VHDL IP LIBRARY +-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Martin Morlot +-- Mail : martin.morlot@lpp.polytechnique.fr +-----------------------------------------------------------------------------*/ +#include "apb_fft_Driver.h" +#include "lpp_apb_functions.h" +#include + + +FFT_Device* openFFT(int count) +{ + FFT_Device* FFT0; + FFT0 = (FFT_Device*) apbgetdevice(LPP_FFT,VENDOR_LPP,count); + return FFT0; +} + + +int FftInput(int * Tbl,FFT_Device* fft) +{ + int i; + printf("\nFftInput\n\n"); + + while((fft->ConfigReg & FFT_Full) != FFT_Full) // full a 0 + { + printf("\nWrite\n\n"); + for (i = 0 ; i < 256 ; i++) + { + fft->RWDataReg = Tbl[i]; + if((fft->ConfigReg & FFT_Full) == FFT_Full) // full a 1 + { + printf("\nBreak\n\n"); + break; + } + } + } + + printf("\nFULL\n\n"); + return 0; +} + + +int FftOutput(int * Tbl, FFT_Device* fft) +{ + int i; + printf("\nFftOutput\n\n"); + + while((fft->ConfigReg & FFT_Empty) != FFT_Empty) // empty a 0 + { + printf("\nRead\n\n"); + for (i = 0 ; i < 256 ; i++) + { + //printf("\noutFor%d\n\n",i); + Tbl[i] = fft->RWDataReg; + if((fft->ConfigReg & FFT_Empty) == FFT_Empty) // empty a 1 + { + printf("\nBreak\n\n"); + break; + } + } + } + printf("\nEMPTY\n\n"); + return 0; +} + + + + + + + + + + diff --git a/LPP_drivers/libsrc/FFT/apb_fft_Driver.h b/LPP_drivers/libsrc/FFT/apb_fft_Driver.h new file mode 100644 --- /dev/null +++ b/LPP_drivers/libsrc/FFT/apb_fft_Driver.h @@ -0,0 +1,56 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the LPP VHDL IP LIBRARY +-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Martin Morlot +-- Mail : martin.morlot@lpp.polytechnique.fr +-----------------------------------------------------------------------------*/ +#ifndef APB_FFT_DRIVER_H +#define APB_FFT_DRIVER_H + +#define FFT_Empty 0x00100 +#define FFT_Full 0x01000 + + +/*=================================================== + T Y P E S D E F +====================================================*/ + +struct FFT_Driver +{ + int RWDataReg; + int ReadAddrReg; + int ConfigReg; + int Dummy1; + int Dummy0; + int WriteAddrReg; +}; + +typedef struct FFT_Driver FFT_Device; + + +/*=================================================== + F U N C T I O N S +====================================================*/ + +FFT_Device* openFFT(int count); +int FftInput(int Tbl[],FFT_Device*); +int FftOutput(int Tbl[],FFT_Device*); + + + +#endif diff --git a/LPP_drivers/libsrc/Makefile b/LPP_drivers/libsrc/Makefile --- a/LPP_drivers/libsrc/Makefile +++ b/LPP_drivers/libsrc/Makefile @@ -27,6 +27,7 @@ all: make all -C DAC make all -C FIFO make all -C UART + make all -C FFT cleanall: @@ -35,4 +36,5 @@ cleanall: make clean -C DAC make clean -C FIFO make clean -C UART + make clean -C FFT diff --git a/lib/lpp/dsp/lpp_fft/APB_FFT.vhd b/lib/lpp/dsp/lpp_fft/APB_FFT.vhd --- a/lib/lpp/dsp/lpp_fft/APB_FFT.vhd +++ b/lib/lpp/dsp/lpp_fft/APB_FFT.vhd @@ -47,10 +47,6 @@ entity APB_FFT is port ( clk : in std_logic; --! Horloge du composant rst : in std_logic; --! Reset general du composant - full,empty : out std_logic; - WR,RE : out std_logic; - flg_load,flg_rdy : out std_logic; - RZ : out std_logic; apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus apbo : out apb_slv_out_type --! Registre de gestion des sorties du bus ); @@ -69,24 +65,22 @@ signal DataIn_im : std_logic_vecto signal DataOut_im : std_logic_vector(gWSIZE-1 downto 0); signal DataIn : std_logic_vector(Data_sz-1 downto 0); signal DataOut : std_logic_vector(Data_sz-1 downto 0); -signal AddrIn : std_logic_vector(Addr_sz-1 downto 0); -signal AddrOut : std_logic_vector(Addr_sz-1 downto 0); +signal AddrIn : std_logic_vector(Addr_sz-1 downto 0); +signal AddrOut : std_logic_vector(Addr_sz-1 downto 0); signal start : std_logic; signal load : std_logic; signal rdy : std_logic; -signal raz : std_logic; - begin APB : ApbDriver generic map(pindex,paddr,pmask,pirq,abits,LPP_FFT,Data_sz,Addr_sz,addr_max_int) - port map(clk,rst,raz,ReadEnable,WriteEnable,FlagEmpty,FlagFull,DataIn,DataOut,AddrIn,AddrOut,apbi,apbo); + port map(clk,rst,ReadEnable,WriteEnable,FlagEmpty,FlagFull,DataIn,DataOut,AddrIn,AddrOut,apbi,apbo); Extremum : Flag_Extremum - port map(clk,raz,load,rdy,FlagFull,FlagEmpty); + port map(clk,rst,load,rdy,FlagFull,FlagEmpty); DEVICE : CoreFFT @@ -102,22 +96,12 @@ begin PTS => gPTS, HALFPTS => gHALFPTS, inBuf_RWDLY => gInBuf_RWDLY) - port map(clk,start,raz,WriteEnable,ReadEnable,DataIn_im,DataIn_re,load,open,DataOut_im,DataOut_re,open,rdy); + port map(clk,start,rst,WriteEnable,ReadEnable,DataIn_im,DataIn_re,load,open,DataOut_im,DataOut_re,open,rdy); -start <= not rst; +start <= not rst; DataIn_re <= DataIn(31 downto 16); DataIn_im <= DataIn(15 downto 0); -DataOut <= DataOut_re & DataOut_im; - - -full <= FlagFull; -empty <= FlagEmpty; -WR <= WriteEnable; -RE <= ReadEnable; -flg_load <= load; -flg_rdy <= rdy; -RZ <= raz; - +DataOut <= DataOut_re & DataOut_im; end ar_APB_FFT; \ No newline at end of file diff --git a/lib/lpp/dsp/lpp_fft/FFTDriver.vhd b/lib/lpp/dsp/lpp_fft/FFTDriver.vhd deleted file mode 100644 --- a/lib/lpp/dsp/lpp_fft/FFTDriver.vhd +++ /dev/null @@ -1,150 +0,0 @@ ------------------------------------------------------------------------------- --- This file is a part of the LPP VHDL IP LIBRARY --- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ------------------------------------------------------------------------------- --- Author : Martin Morlot --- Mail : martin.morlot@lpp.polytechnique.fr ------------------------------------------------------------------------------- -library ieee; -use ieee.std_logic_1164.all; -library grlib; -use grlib.amba.all; -use grlib.stdlib.all; -use grlib.devices.all; -library lpp; -use lpp.lpp_amba.all; -use lpp.apb_devices_list.all; - - -entity FFTDriver is - generic ( - pindex : integer := 0; - paddr : integer := 0; - pmask : integer := 16#fff#; - pirq : integer := 0; - abits : integer := 8; - LPP_DEVICE : integer; - Data_sz : integer := 16; - Addr_sz : integer := 8; - addr_max_int : integer := 256); - port ( - clk : in std_logic; --! Horloge du composant - rst : in std_logic; --! Reset general du composant - Rz : out std_logic; - ReadEnable : out std_logic; --! Instruction de lecture en m�moire - WriteEnable : out std_logic; --! Instruction d'�criture en m�moire - FlagEmpty : in std_logic; --! Flag, M�moire vide - FlagFull : in std_logic; --! Flag, M�moire pleine - DataIn : out std_logic_vector(Data_sz-1 downto 0); --! Registre de donn�es en entr�e - DataOut : in std_logic_vector(Data_sz-1 downto 0); --! Registre de donn�es en sortie - AddrIn : in std_logic_vector(Addr_sz-1 downto 0); --! Registre d'addresse (�criture) - AddrOut : in std_logic_vector(Addr_sz-1 downto 0); --! Registre d'addresse (lecture) - apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus - apbo : out apb_slv_out_type --! Registre de gestion des sorties du bus - ); -end FFTDriver; - -architecture ar_FFTDriver of FFTDriver is - -constant REVISION : integer := 1; - -constant pconfig : apb_config_type := ( - 0 => ahb_device_reg (VENDOR_LPP, LPP_DEVICE, 0, REVISION, 0), - 1 => apb_iobar(paddr, pmask)); - -type DEVICE_ctrlr_Reg is record - DEVICE_Cfg : std_logic_vector(3 downto 0); - DEVICE_DataW : std_logic_vector(Data_sz-1 downto 0); - DEVICE_DataR : std_logic_vector(Data_sz-1 downto 0); - DEVICE_AddrW : std_logic_vector(Addr_sz-1 downto 0); - DEVICE_AddrR : std_logic_vector(Addr_sz-1 downto 0); -end record; - -signal Rec : DEVICE_ctrlr_Reg; -signal Rdata : std_logic_vector(31 downto 0); - -signal FlagWR : std_logic; -begin - -Rz <= Rec.DEVICE_Cfg(0); -ReadEnable <= Rec.DEVICE_Cfg(1); -Rec.DEVICE_Cfg(2) <= FlagEmpty; -Rec.DEVICE_Cfg(3) <= FlagFull; - -DataIn <= Rec.DEVICE_DataW; -Rec.DEVICE_DataR <= DataOut; -Rec.DEVICE_AddrW <= AddrIn; -Rec.DEVICE_AddrR <= AddrOut; - - - - process(rst,clk) - begin - if(rst='0')then - Rec.DEVICE_DataW <= (others => '0'); - Rec.DEVICE_Cfg(0) <= '0'; - Rec.DEVICE_Cfg(1) <= '0'; - FlagWR <= '0'; - - elsif(clk'event and clk='1')then - - --APB Write OP - if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then - case apbi.paddr(abits-1 downto 2) is - when "000000" => - FlagWR <= '1'; - Rec.DEVICE_DataW <= apbi.pwdata(Data_sz-1 downto 0); - When "000010" => - Rec.DEVICE_Cfg(0) <= apbi.pwdata(0); - Rec.DEVICE_Cfg(1) <= apbi.pwdata(4); - when others => - null; - end case; - else - FlagWR <= '0'; - end if; - - --APB Read OP - if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then - case apbi.paddr(abits-1 downto 2) is - when "000000" => - Rdata(Data_sz-1 downto 0) <= Rec.DEVICE_DataR; - when "000001" => - Rdata(31 downto 8) <= X"AAAAAA"; - Rdata(7 downto 0) <= Rec.DEVICE_AddrR; - when "000101" => - Rdata(31 downto 8) <= X"AAAAAA"; - Rdata(7 downto 0) <= Rec.DEVICE_AddrW; - when "000010" => - Rdata(3 downto 0) <= "000" & Rec.DEVICE_Cfg(0); - Rdata(7 downto 4) <= "000" & Rec.DEVICE_Cfg(1); - Rdata(11 downto 8) <= "000" & Rec.DEVICE_Cfg(2); - Rdata(15 downto 12) <= "000" & Rec.DEVICE_Cfg(3); - Rdata(31 downto 16) <= X"CCCC"; - when others => - Rdata <= (others => '0'); - end case; - end if; - - end if; - apbo.pconfig <= pconfig; - end process; - -apbo.prdata <= Rdata when apbi.penable = '1'; -WriteEnable <= FlagWR; - -end ar_FFTDriver; \ No newline at end of file diff --git a/lib/lpp/dsp/lpp_fft/Flag_Extremum.vhd b/lib/lpp/dsp/lpp_fft/Flag_Extremum.vhd --- a/lib/lpp/dsp/lpp_fft/Flag_Extremum.vhd +++ b/lib/lpp/dsp/lpp_fft/Flag_Extremum.vhd @@ -24,42 +24,37 @@ use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; use work.FFT_config.all; +--! Programme qui va permettre de g�n�rer des flags utilis�s au niveau du driver C + entity Flag_Extremum is port( - clk,raz : in std_logic; - load : in std_logic; - y_rdy : in std_logic; - full : out std_logic; - empty : out std_logic + clk,raz : in std_logic; --! Horloge et Reset g�n�ral du composant + load : in std_logic; --! Signal en provenance de CoreFFT + y_rdy : in std_logic; --! Signal en provenance de CoreFFT + full : out std_logic; --! Flag, Va permettre d'autoriser l'�criture (Driver C) + empty : out std_logic --! Flag, Va permettre d'autoriser la lecture (Driver C) ); end Flag_Extremum; +--! @details Flags g�n�r�s a partir de signaux fourni par l'IP FFT d'actel + architecture ar_Flag_Extremum of Flag_Extremum is ---type etat is (eA,eB,eC,e0,e1,e2); ---signal ect : etat; - -signal load_reg : std_logic; -signal y_rdy_reg : std_logic; - -begin +begin process (clk,raz) begin if(raz='0')then full <= '1'; empty <= '1'; --- ect <= eA; - - elsif(clk' event and clk='1')then --- load_reg <= load; --- y_rdy_reg <= y_rdy; + + elsif(clk' event and clk='1')then if(load='1' and y_rdy='0')then - full <= '0'; + full <= '0'; empty <= '1'; elsif(y_rdy='1')then - full <= '1'; + full <= '1'; empty <= '0'; else @@ -67,49 +62,6 @@ begin empty <= '1'; end if; - --- case ect is - --- when eA => --- if(load_reg='0' and load='1')then --- full <= '0'; --- ect <= eB; --- end if; --- --- when eB => --- if(load_reg='1' and load='0')then --- ect <= eC; --- end if; --- --- when eC => --- if(load_reg='1' and load='0')then --- full <= '1'; --- ect <= e0; --- end if; - ---=================================================================================== - --- when e0 => --- if(load_reg='0' and load='1')then --- full <= '0'; --- ect <= e1; --- end if; --- --- when e1 => --- if(load_reg='1' and load='0')then --- full <= '1'; --- empty <= '0'; --- ect <= e2; --- end if; --- --- when e2 => --- if(y_rdy_reg='1' and y_rdy='0')then --- empty <= '1'; --- ect <= e0; --- end if; --- --- --- end case; end if; end process; diff --git a/lib/lpp/dsp/lpp_fft/lpp_fft.vhd b/lib/lpp/dsp/lpp_fft/lpp_fft.vhd --- a/lib/lpp/dsp/lpp_fft/lpp_fft.vhd +++ b/lib/lpp/dsp/lpp_fft/lpp_fft.vhd @@ -29,7 +29,6 @@ use lpp.lpp_amba.all; use lpp.lpp_memory.all; use work.fft_components.all; - --! Package contenant tous les programmes qui forment le composant int�gr� dans le l�on package lpp_fft is @@ -45,14 +44,10 @@ component APB_FFT is Addr_sz : integer := 8; addr_max_int : integer := 256); port ( - clk : in std_logic; --! Horloge du composant - rst : in std_logic; --! Reset general du composant - full,empty : out std_logic; - WR,RE : out std_logic; - flg_load,flg_rdy : out std_logic; - RZ : out std_logic; - apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus - apbo : out apb_slv_out_type --! Registre de gestion des sorties du bus + clk : in std_logic; + rst : in std_logic; + apbi : in apb_slv_in_type; + apbo : out apb_slv_out_type ); end component; @@ -67,6 +62,10 @@ component Flag_Extremum is ); end component; +--==============================================================| +--================== IP VHDL de la FFT actel ===================| +--================ non partag� dans la VHD_Lib =================| +--==============================================================| component CoreFFT IS GENERIC ( diff --git a/lib/lpp/lpp_memory/ApbDriver.vhd b/lib/lpp/lpp_memory/ApbDriver.vhd --- a/lib/lpp/lpp_memory/ApbDriver.vhd +++ b/lib/lpp/lpp_memory/ApbDriver.vhd @@ -45,7 +45,6 @@ entity ApbDriver is port ( clk : in std_logic; --! Horloge du composant rst : in std_logic; --! Reset general du composant - RZ : out std_logic; ReadEnable : out std_logic; --! Instruction de lecture en m�moire WriteEnable : out std_logic; --! Instruction d'�criture en m�moire FlagEmpty : in std_logic; --! Flag, M�moire vide @@ -70,7 +69,7 @@ constant pconfig : apb_config_type := ( 1 => apb_iobar(paddr, pmask)); type DEVICE_ctrlr_Reg is record - DEVICE_Cfg : std_logic_vector(4 downto 0); + DEVICE_Cfg : std_logic_vector(3 downto 0); DEVICE_DataW : std_logic_vector(Data_sz-1 downto 0); DEVICE_DataR : std_logic_vector(Data_sz-1 downto 0); DEVICE_AddrW : std_logic_vector(Addr_sz-1 downto 0); @@ -82,13 +81,13 @@ signal Rdata : std_logic_vector(31 down signal FlagRE : std_logic; signal FlagWR : std_logic; + begin Rec.DEVICE_Cfg(0) <= FlagRE; Rec.DEVICE_Cfg(1) <= FlagWR; Rec.DEVICE_Cfg(2) <= FlagEmpty; Rec.DEVICE_Cfg(3) <= FlagFull; -Rz <= Rec.DEVICE_Cfg(4); DataIn <= Rec.DEVICE_DataW; Rec.DEVICE_DataR <= DataOut; @@ -101,7 +100,6 @@ Rec.DEVICE_AddrR <= AddrOut; begin if(rst='0')then Rec.DEVICE_DataW <= (others => '0'); - Rec.DEVICE_Cfg(4) <= '0'; FlagWR <= '0'; FlagRE <= '0'; @@ -113,8 +111,6 @@ Rec.DEVICE_AddrR <= AddrOut; when "000000" => FlagWR <= '1'; Rec.DEVICE_DataW <= apbi.pwdata(Data_sz-1 downto 0); - when "000010" => - Rec.DEVICE_Cfg(4) <= apbi.pwdata(16); when others => null; end case; @@ -139,8 +135,7 @@ Rec.DEVICE_AddrR <= AddrOut; Rdata(7 downto 4) <= "000" & Rec.DEVICE_Cfg(1); Rdata(11 downto 8) <= "000" & Rec.DEVICE_Cfg(2); Rdata(15 downto 12) <= "000" & Rec.DEVICE_Cfg(3); - Rdata(19 downto 16) <= "000" & Rec.DEVICE_Cfg(4); - Rdata(31 downto 20) <= X"CCC"; + Rdata(31 downto 16) <= X"CCCC"; when others => Rdata <= (others => '0'); end case; diff --git a/lib/lpp/lpp_memory/lpp_memory.vhd b/lib/lpp/lpp_memory/lpp_memory.vhd --- a/lib/lpp/lpp_memory/lpp_memory.vhd +++ b/lib/lpp/lpp_memory/lpp_memory.vhd @@ -27,13 +27,12 @@ use std.textio.all; library lpp; use lpp.lpp_amba.all; - --! Package contenant tous les programmes qui forment le composant int�gr� dans le l�on package lpp_memory is --===========================================================| ---================= FIFOW SRAM FIFOR ========================| +--=================== FIFO Compl�te =========================| --===========================================================| component APB_FIFO is @@ -69,7 +68,6 @@ component ApbDriver is port ( clk : in std_logic; rst : in std_logic; - RZ : out std_logic; ReadEnable : in std_logic; WriteEnable : in std_logic; FlagEmpty : in std_logic; @@ -91,15 +89,15 @@ component Top_FIFO is addr_max_int : integer := 256 ); port( - clk,raz : in std_logic; --! Horloge et reset general du composant - flag_RE : in std_logic; --! Flag, Demande la lecture de la m�moire - flag_WR : in std_logic; --! Flag, Demande l'�criture dans la m�moire - Data_in : in std_logic_vector(Data_sz-1 downto 0); --! Data en entr�e du composant - Addr_RE : out std_logic_vector(addr_sz-1 downto 0); --! Adresse d'�criture - Addr_WR : out std_logic_vector(addr_sz-1 downto 0); --! Adresse de lecture - full : out std_logic; --! Flag, M�moire pleine - empty : out std_logic; --! Flag, M�moire vide - Data_out : out std_logic_vector(Data_sz-1 downto 0) --! Data en sortie du composant + clk,raz : in std_logic; + flag_RE : in std_logic; + flag_WR : in std_logic; + Data_in : in std_logic_vector(Data_sz-1 downto 0); + Addr_RE : out std_logic_vector(addr_sz-1 downto 0); + Addr_WR : out std_logic_vector(addr_sz-1 downto 0); + full : out std_logic; + empty : out std_logic; + Data_out : out std_logic_vector(Data_sz-1 downto 0) ); end component; @@ -148,7 +146,7 @@ component Link_Reg is end component; --===========================================================| ---===================== FIFOW SRAM ==========================| +--================= Demi FIFO Ecriture ======================| --===========================================================| component APB_FifoWrite is @@ -190,7 +188,7 @@ component Top_FifoWrite is end component; --===========================================================| ---===================== SRAM FIFOR ==========================| +--================== Demi FIFO Lecture ======================| --===========================================================| component APB_FifoRead is