# HG changeset patch # User pellion # Date 2013-04-18 15:18:28 # Node ID 6e4fef3f3bb079cee3912bcae48552b9780868da # Parent 90ecf57ca1c89a88adddea038fd6dfa226f8b916 Add DMA Matrix IRQ GEn diff --git a/lib/lpp/lpp_top_lfr/lpp_top_apbreg.vhd b/lib/lpp/lpp_top_lfr/lpp_top_apbreg.vhd --- a/lib/lpp/lpp_top_lfr/lpp_top_apbreg.vhd +++ b/lib/lpp/lpp_top_lfr/lpp_top_apbreg.vhd @@ -136,6 +136,9 @@ BEGIN -- beh reg.addr_matrix_f1 <= (OTHERS => '0'); reg.addr_matrix_f2 <= (OTHERS => '0'); prdata <= (OTHERS => '0'); + + apbo.pirq <= (OTHERS => '0'); + ELSIF HCLK'EVENT AND HCLK = '1' THEN -- rising clock edge reg.status_ready_matrix_f0_0 <= reg.status_ready_matrix_f0_0 OR ready_matrix_f0_0; @@ -186,10 +189,21 @@ BEGIN -- beh END CASE; END IF; END IF; + + apbo.pirq(pirq) <= ( reg.config_active_interruption_onNewMatrix AND ( ready_matrix_f0_0 OR + ready_matrix_f0_1 OR + ready_matrix_f1 OR + ready_matrix_f2) + ) + OR + ( reg.config_active_interruption_onError AND ( error_anticipating_empty_fifo OR + error_bad_component_error) + ); + + END IF; END PROCESS lpp_top_apbreg; - - apbo.pirq <= (OTHERS => '0'); + apbo.pindex <= pindex; apbo.pconfig <= pconfig; apbo.prdata <= prdata; diff --git a/lib/lpp/lpp_top_lfr/lpp_top_lfr.vhd b/lib/lpp/lpp_top_lfr/lpp_top_lfr.vhd --- a/lib/lpp/lpp_top_lfr/lpp_top_lfr.vhd +++ b/lib/lpp/lpp_top_lfr/lpp_top_lfr.vhd @@ -401,8 +401,11 @@ BEGIN addr_matrix_f2 => addr_matrix_f2); - --TODO : add the irq alert for DMA matrix transfert ending + --DONE : add the irq alert for DMA matrix transfert ending + --TODO : add 5 bit register into APB to control the DATA SHIPING + --TODO : data shiping + --TODO : add Spectral Matrix (FFT + SP) --TODO : add DMA for WaveForms Picker --TODO : add APB Reg to control WaveForms Picker