# HG changeset patch # User martin # Date 2012-03-23 15:25:52 # Node ID 5dd8398817e7daa8e41a5a622c36746ae4b2c7ad # Parent 2dfde37709a5346a306269d51222c7141fc62c12 Data Line second version diff --git a/LPP_drivers/exemples/BenchFFT+Matrix V2/Makefile b/LPP_drivers/exemples/BenchFFT+Matrix V2/Makefile new file mode 100644 --- /dev/null +++ b/LPP_drivers/exemples/BenchFFT+Matrix V2/Makefile @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------ +#-- This file is a part of the LPP VHDL IP LIBRARY +#-- Copyright (C) 2010, Laboratory of Plasmas Physic - CNRS +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------ + +include ../../rules.mk +LIBDIR = ../../lib +INCPATH = ../../includes +SCRIPTDIR=../../scripts/ +LIBS=-lapb_fft_Driver -llpp_apb_functions -lapb_fifo_Driver -lapb_uart_Driver -lapb_gpio_Driver +INPUTFILE=main.c +EXEC=BenchFFT+Matrix V2.bin +OUTBINDIR=bin/ + + +.PHONY:bin + +all:bin + @echo $(EXEC)" file created" + +clean: + rm -f *.{o,a} + + + +help:ruleshelp + @echo " all : makes an executable file called "$(EXEC) + @echo " in "$(OUTBINDIR) + @echo " clean : removes temporary files" + diff --git a/LPP_drivers/exemples/BenchFFT+Matrix V2/main.c b/LPP_drivers/exemples/BenchFFT+Matrix V2/main.c new file mode 100644 --- /dev/null +++ b/LPP_drivers/exemples/BenchFFT+Matrix V2/main.c @@ -0,0 +1,50 @@ +#include +#include "lpp_apb_functions.h" +#include "apb_fifo_Driver.h" +#include "apb_uart_Driver.h" +#include "apb_fft_Driver.h" + + +int main() +{ + int i=0; + int data1,data2; + char temp[256]; + int Table[256]; + + int TblSinA[256] = {0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE,0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE}; + int TblSinAB[256] = {0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD,0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD} ; + int TblSinB[256] = {0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF}; + int TblSinBC[256] = {0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C}; + int TblSinC[256] = {0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E}; + + FFT_Device* fft0 = openFFT(0); + UART_Device* uart0 = openUART(0); + FIFO_Device* fifoIn = openFIFO(0); + FIFO_Device* fifoOut = openFIFO(1); + + printf("\nDebut Main\n\n"); + + FftInput(TblSinA,fft0,delay); // raie en 3 + FftInput(TblSinAB,fft0,delay); + FftInput(TblSinB,fft0,delay); // raie en 21 + FftInput(TblSinBC,fft0,delay); + FftInput(TblSinC,fft0,delay); // raie en 5 + +while(i < 1600){ + + while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) == FIFO_Empty); // TANT QUE empty a 1 RIEN + + data1 = fifoOut->FIFOreg[(2*0)+FIFO_RWdata]; + data2 = fifoOut->FIFOreg[(2*0)+FIFO_RWdata]; + i++; + + sprintf(temp,"%d\t%d\n\r",data1,data2); + uartputs(uart0,temp); + } + printf("\nFin Main\n\n"); + return 0; +} + + + diff --git a/LPP_drivers/includes/apb_fft_Driver.h b/LPP_drivers/includes/apb_fft_Driver.h --- a/LPP_drivers/includes/apb_fft_Driver.h +++ b/LPP_drivers/includes/apb_fft_Driver.h @@ -23,15 +23,6 @@ #define APB_FFT_DRIVER_H #include "apb_delay_Driver.h" -/*! \file apb_fft_Driver.h - \brief LPP FFT driver. - - This library is written to work with LPP_APB_FFT VHDL module from LPP's FreeVHDLIB. It calculate a fast fourier transforms, - from an input data table. - - \author Martin Morlot martin.morlot@lpp.polytechnique.fr -*/ - #define FFT_Fill 0x00000001 #define FFT_Ready 0x00000010 #define Mask 0x0000FFFF @@ -40,9 +31,7 @@ /*=================================================== T Y P E S D E F ====================================================*/ -/*! \struct FFT_Driver - \brief Sturcture representing the fft registers -*/ + struct FFT_Driver { int ConfigReg; @@ -55,18 +44,11 @@ typedef struct FFT_Driver FFT_Device; /*=================================================== F U N C T I O N S ====================================================*/ -/*! \fn FFT_Device* openFFT(int count); - \brief Return count FFT. - - This Function scans APB devices table and returns count FFT. - - \param count The number of the FFT you whant to get. For example if you have 3 FFTS on your SOC you want - to use FFT1 so count = 1. - \return The pointer to the device. -*/ + FFT_Device* openFFT(int count); int FftInput(int Tbl[],FFT_Device*,DELAY_Device*); int FftOutput(int Tbl[],FFT_Device*); + #endif diff --git a/LPP_drivers/libsrc/FFT/apb_fft_Driver.c b/LPP_drivers/libsrc/FFT/apb_fft_Driver.c --- a/LPP_drivers/libsrc/FFT/apb_fft_Driver.c +++ b/LPP_drivers/libsrc/FFT/apb_fft_Driver.c @@ -34,22 +34,25 @@ FFT_Device* openFFT(int count) int FftInput(int * Tbl,FFT_Device* fft,DELAY_Device* delay) -{ +{ + //printf("\nFftInput\n\n"); int i=0; - while((fft->ConfigReg & FFT_Fill) == FFT_Fill) // fill a 1 + while((fft->ConfigReg & FFT_Fill) == FFT_Fill)// && (i<256)) // fill a 1 { fft->RWDataReg = Tbl[i]; i++; - Delay_us(delay,1); + //Delay_us(delay,1); } - + + //printf("\nEnd In %d\n\n",i); return 0; } int FftOutput(int * Tbl, FFT_Device* fft) { + //printf("\nFftOutput\n\n"); int i=0; int data; @@ -61,6 +64,7 @@ int FftOutput(int * Tbl, FFT_Device* fft i = i+2; } + //printf("\nEnd Out %d\n\n",i); return i; } diff --git a/LPP_drivers/libsrc/FFT/apb_fft_Driver.h b/LPP_drivers/libsrc/FFT/apb_fft_Driver.h --- a/LPP_drivers/libsrc/FFT/apb_fft_Driver.h +++ b/LPP_drivers/libsrc/FFT/apb_fft_Driver.h @@ -23,15 +23,6 @@ #define APB_FFT_DRIVER_H #include "apb_delay_Driver.h" -/*! \file apb_fft_Driver.h - \brief LPP FFT driver. - - This library is written to work with LPP_APB_FFT VHDL module from LPP's FreeVHDLIB. It calculate a fast fourier transforms, - from an input data table. - - \author Martin Morlot martin.morlot@lpp.polytechnique.fr -*/ - #define FFT_Fill 0x00000001 #define FFT_Ready 0x00000010 #define Mask 0x0000FFFF @@ -40,9 +31,7 @@ /*=================================================== T Y P E S D E F ====================================================*/ -/*! \struct FFT_Driver - \brief Sturcture representing the fft registers -*/ + struct FFT_Driver { int ConfigReg; @@ -55,18 +44,11 @@ typedef struct FFT_Driver FFT_Device; /*=================================================== F U N C T I O N S ====================================================*/ -/*! \fn FFT_Device* openFFT(int count); - \brief Return count FFT. - - This Function scans APB devices table and returns count FFT. - - \param count The number of the FFT you whant to get. For example if you have 3 FFTS on your SOC you want - to use FFT1 so count = 1. - \return The pointer to the device. -*/ + FFT_Device* openFFT(int count); int FftInput(int Tbl[],FFT_Device*,DELAY_Device*); int FftOutput(int Tbl[],FFT_Device*); + #endif diff --git a/lib/lpp/dsp/lpp_fft/APB_FFT.vhd b/lib/lpp/dsp/lpp_fft/APB_FFT.vhd --- a/lib/lpp/dsp/lpp_fft/APB_FFT.vhd +++ b/lib/lpp/dsp/lpp_fft/APB_FFT.vhd @@ -45,8 +45,6 @@ entity APB_FFT is port ( clk : in std_logic; --! Horloge du composant rst : in std_logic; --! Reset general du composant - eload : out std_logic; - eready :out std_logic; apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus apbo : out apb_slv_out_type --! Registre de gestion des sorties du bus ); diff --git a/lib/lpp/dsp/lpp_fft/APB_FFT_half.vhd b/lib/lpp/dsp/lpp_fft/APB_FFT_half.vhd new file mode 100644 --- /dev/null +++ b/lib/lpp/dsp/lpp_fft/APB_FFT_half.vhd @@ -0,0 +1,163 @@ +------------------------------------------------------------------------------ +-- This file is a part of the LPP VHDL IP LIBRARY +-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------ +-- Author : Martin Morlot +-- Mail : martin.morlot@lpp.polytechnique.fr +------------------------------------------------------------------------------ +library ieee; +use ieee.std_logic_1164.all; +library grlib; +use grlib.amba.all; +use grlib.stdlib.all; +use grlib.devices.all; +library lpp; +use lpp.lpp_amba.all; +use lpp.apb_devices_list.all; +use lpp.lpp_fft.all; +use work.fft_components.all; + +--! Driver APB, va faire le lien entre l'IP VHDL de la FFT et le bus Amba + +entity APB_FFT_half is + generic ( + pindex : integer := 0; + paddr : integer := 0; + pmask : integer := 16#fff#; + pirq : integer := 0; + abits : integer := 8; + Data_sz : integer := 16 + ); + port ( + clk : in std_logic; --! Horloge du composant + rst : in std_logic; --! Reset general du composant + Ren : in std_logic; + ready : out std_logic; + valid : out std_logic; + DataOut_re : out std_logic_vector(Data_sz-1 downto 0); + DataOut_im : out std_logic_vector(Data_sz-1 downto 0); + OUTfill : out std_logic; + OUTwrite : out std_logic; + apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus + apbo : out apb_slv_out_type --! Registre de gestion des sorties du bus + ); +end entity; + + +architecture ar_APB_FFT_half of APB_FFT_half is + +constant REVISION : integer := 1; + +constant pconfig : apb_config_type := ( + 0 => ahb_device_reg (VENDOR_LPP, LPP_FFT, 0, REVISION, 0), + 1 => apb_iobar(paddr, pmask)); + +signal Wen : std_logic; +signal load : std_logic; +signal d_valid : std_logic; +signal y_valid : std_logic; +signal y_rdy : std_logic; +signal read_y : std_logic; +signal fill : std_logic; +signal start : std_logic; +signal DataIn_re : std_logic_vector(Data_sz-1 downto 0); +signal DataIn_im : std_logic_vector(Data_sz-1 downto 0); + +type FFT_ctrlr_Reg is record + FFT_Cfg : std_logic; + FFT_Wdata : std_logic_vector((2*Data_sz)-1 downto 0); +end record; + +signal Rec : FFT_ctrlr_Reg; +signal Rdata : std_logic_vector(31 downto 0); + +begin + +Rec.FFT_Cfg <= fill; + +DataIn_im <= Rec.FFT_Wdata(Data_sz-1 downto 0); +DataIn_re <= Rec.FFT_Wdata((2*Data_sz)-1 downto Data_sz); + + Actel_FFT : CoreFFT + generic map( + LOGPTS => gLOGPTS, + LOGLOGPTS => gLOGLOGPTS, + WSIZE => gWSIZE, + TWIDTH => gTWIDTH, + DWIDTH => gDWIDTH, + TDWIDTH => gTDWIDTH, + RND_MODE => gRND_MODE, + SCALE_MODE => gSCALE_MODE, + PTS => gPTS, + HALFPTS => gHALFPTS, + inBuf_RWDLY => gInBuf_RWDLY) + port map(clk,start,rst,d_valid,read_y,DataIn_im,DataIn_re,load,open,DataOut_im,DataOut_re,y_valid,y_rdy); + +-- Flags : Flag_Extremum +-- port map(clk,rst,load,y_rdy,fill,ready); + + process(rst,clk) + begin + if(rst='0')then + Rec.FFT_Wdata <= (others => '0'); + Wen <= '1'; + + elsif(clk'event and clk='1')then + + --APB Write OP + if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then + case apbi.paddr(abits-1 downto 2) is + when "000001" => + Wen <= '0'; + Rec.FFT_Wdata(Data_sz-1 downto 0) <= (others => '0'); + Rec.FFT_Wdata((2*Data_sz)-1 downto Data_sz) <= apbi.pwdata(Data_sz-1 downto 0); + + when others => + null; + end case; + else + Wen <= '1'; + end if; + + --APB Read OP + if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then + case apbi.paddr(abits-1 downto 2) is + when "000000" => + Rdata(3 downto 0) <= "000" & Rec.FFT_Cfg; + Rdata(31 downto 4) <= (others => '0'); + + when others => + Rdata <= (others => '0'); + end case; + end if; + + end if; + apbo.pconfig <= pconfig; + end process; + +apbo.prdata <= Rdata when apbi.penable = '1'; +d_valid <= not Wen; +read_y <= not Ren; +fill <= Load; +Ready <= y_rdy; +valid <= y_valid; +start <= not rst; + +OUTfill <= Load; +OUTwrite <= not Wen; + +end architecture; \ No newline at end of file diff --git a/lib/lpp/dsp/lpp_fft/Linker_FFT_FIFO.vhd b/lib/lpp/dsp/lpp_fft/Linker_FFT_FIFO.vhd new file mode 100644 --- /dev/null +++ b/lib/lpp/dsp/lpp_fft/Linker_FFT_FIFO.vhd @@ -0,0 +1,131 @@ +------------------------------------------------------------------------------ +-- This file is a part of the LPP VHDL IP LIBRARY +-- Copyright (C) 2009 - 2012, Laboratory of Plasmas Physic - CNRS +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------ +-- Author : Martin Morlot +-- Mail : martin.morlot@lpp.polytechnique.fr +------------------------------------------------------------------------------ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity Linker_FFT_FIFO is +generic( + Data_sz : integer range 1 to 32 := 8 + ); +port( + clk : in std_logic; + rstn : in std_logic; + Ready : in std_logic; + Valid : in std_logic; + Full : in std_logic_vector(4 downto 0); + Data_re : in std_logic_vector(Data_sz-1 downto 0); + Data_im : in std_logic_vector(Data_sz-1 downto 0); + Read : out std_logic; + Write : out std_logic_vector(4 downto 0); + ReUse : out std_logic_vector(4 downto 0); + DATA : out std_logic_vector((5*Data_sz)-1 downto 0) +); +end entity; + + +architecture ar_Linker of Linker_FFT_FIFO is + +type etat is (eX,e0,e1,e2,e3); +signal ect : etat; + +signal FifoCpt : integer; +signal DataTmp : std_logic_vector(Data_sz-1 downto 0); + +signal sFull : std_logic; +signal sData : std_logic_vector(Data_sz-1 downto 0); +signal sReady : std_logic; + +begin + + process(clk,rstn) + begin + if(rstn='0')then + ect <= e0; + Read <= '1'; + Write <= (others => '1'); + Reuse <= (others => '0'); + FifoCpt <= 1; + sDATA <= (others => '0'); + + elsif(clk'event and clk='1')then + sReady <= Ready; + + case ect is + + when e0 => + Write(FifoCpt-1) <= '1'; + if(sReady='0' and Ready='1' and sfull='0')then + Read <= '0'; + ect <= e1; + end if; + + when e1 => + Read <= '1'; + if(Valid='1' and sfull='0')then + DataTmp <= Data_im; + sDATA <= Data_re; + Write(FifoCpt-1) <= '0'; + ect <= e2; + elsif(sfull='1')then + ReUse(FifoCpt-1) <= '1'; + ect <= eX; + end if; + + when e2 => + sDATA <= DataTmp; + ect <= e3; + + when e3 => + Write(FifoCpt-1) <= '1'; + if(Ready='1' and sfull='0')then + Read <= '0'; + ect <= e1; + end if; + + when eX => + if(FifoCpt=6)then + FifoCpt <= 1; + else + FifoCpt <= FifoCpt+1; + end if; + ect <= e0; + + end case; + end if; + end process; + +DATA <= sData & sData & sData & sData & sData; + +with FifoCpt select + sFull <= Full(0) when 1, + Full(1) when 2, + Full(2) when 3, + Full(3) when 4, + Full(4) when 5, + '1' when others; + +end architecture; + + + + diff --git a/lib/lpp/dsp/lpp_fft/lpp_fft.vhd b/lib/lpp/dsp/lpp_fft/lpp_fft.vhd --- a/lib/lpp/dsp/lpp_fft/lpp_fft.vhd +++ b/lib/lpp/dsp/lpp_fft/lpp_fft.vhd @@ -40,19 +40,42 @@ component APB_FFT is pmask : integer := 16#fff#; pirq : integer := 0; abits : integer := 8; - Data_sz : integer := 32; - Addr_sz : integer := 8; - addr_max_int : integer := 256); + Data_sz : integer := 16 + ); port ( clk : in std_logic; rst : in std_logic; --! Reset general du composant - eload : out std_logic; - eready :out std_logic; apbi : in apb_slv_in_type; apbo : out apb_slv_out_type ); end component; + +component APB_FFT_half is + generic ( + pindex : integer := 0; + paddr : integer := 0; + pmask : integer := 16#fff#; + pirq : integer := 0; + abits : integer := 8; + Data_sz : integer := 16 + ); + port ( + clk : in std_logic; --! Horloge du composant + rst : in std_logic; --! Reset general du composant + Ren : in std_logic; + ready : out std_logic; + valid : out std_logic; + DataOut_re : out std_logic_vector(Data_sz-1 downto 0); + DataOut_im : out std_logic_vector(Data_sz-1 downto 0); + OUTfill : out std_logic; + OUTwrite : out std_logic; + apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus + apbo : out apb_slv_out_type --! Registre de gestion des sorties du bus + ); +end component; + + component Flag_Extremum is port( clk,raz : in std_logic; --! Horloge et Reset g�n�ral du composant @@ -63,6 +86,26 @@ component Flag_Extremum is ); end component; + +component Linker_FFT_FIFO is +generic( + Data_sz : integer range 1 to 32 := 16 + ); +port( + clk : in std_logic; + rstn : in std_logic; + Ready : in std_logic; + Valid : in std_logic; + Full : in std_logic_vector(4 downto 0); + Data_re : in std_logic_vector(Data_sz-1 downto 0); + Data_im : in std_logic_vector(Data_sz-1 downto 0); + Read : out std_logic; + Write : out std_logic_vector(4 downto 0); + ReUse : out std_logic_vector(4 downto 0); + DATA : out std_logic_vector((5*Data_sz)-1 downto 0) +); +end component; + --==============================================================| --================== IP VHDL de la FFT actel ===================| --================ non partag� dans la VHD_Lib =================| diff --git a/lib/lpp/lpp_memory/SM_5lppFIFO.vhd b/lib/lpp/lpp_memory/SM_5lppFIFO.vhd new file mode 100644 --- /dev/null +++ b/lib/lpp/lpp_memory/SM_5lppFIFO.vhd @@ -0,0 +1,103 @@ +------------------------------------------------------------------------------ +-- This file is a part of the LPP VHDL IP LIBRARY +-- Copyright (C) 2009 - 2012, Laboratory of Plasmas Physic - CNRS +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------ +-- Author : Martin Morlot +-- Mail : martin.morlot@lpp.polytechnique.fr +------------------------------------------------------------------------------ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; +library lpp; +use lpp.lpp_memory.all; +library techmap; +use techmap.gencomp.all; + +entity SM_5lppFIFO is +generic( + tech : integer := apa3; + Data_sz : integer range 1 to 32 := 16; + Addr_sz : integer range 2 to 12 := 8; + Enable_ReUse : std_logic := '0' + ); +port( + rst : in std_logic; + wclk : in std_logic; + rclk : in std_logic; + ReUse : in std_logic_vector(4 downto 0); + wen : in std_logic_vector(4 downto 0); + ren : in std_logic_vector(4 downto 0); + wdata : in std_logic_vector((5*Data_sz)-1 downto 0); + rdata : out std_logic_vector((5*Data_sz)-1 downto 0); + full : out std_logic_vector(4 downto 0); + empty : out std_logic_vector(4 downto 0) +); +end entity; + + +architecture ar_SM_5lppFIFO of SM_5lppFIFO is + +begin + + fifoB1 : lpp_fifo + generic map (tech,Enable_ReUse,Data_sz,Addr_sz) + port map(rst,ReUse(0),rclk,ren(0),rdata(Data_sz-1 downto 0),empty(0),open,wclk,wen(0),wdata(Data_sz-1 downto 0),full(0),open); + + fifoB2 : lpp_fifo + generic map (tech,Enable_ReUse,Data_sz,Addr_sz) + port map(rst,ReUse(1),rclk,ren(1),rdata((2*Data_sz)-1 downto Data_sz),empty(1),open,wclk,wen(1),wdata((2*Data_sz)-1 downto Data_sz),full(1),open); + + fifoB3 : lpp_fifo + generic map (tech,Enable_ReUse,Data_sz,Addr_sz) + port map(rst,ReUse(2),rclk,ren(2),rdata((3*Data_sz)-1 downto 2*Data_sz),empty(2),open,wclk,wen(2),wdata((3*Data_sz)-1 downto 2*Data_sz),full(2),open); + + fifoE1 : lpp_fifo + generic map (tech,Enable_ReUse,Data_sz,Addr_sz) + port map(rst,ReUse(3),rclk,ren(3),rdata((4*Data_sz)-1 downto 3*Data_sz),empty(3),open,wclk,wen(3),wdata((4*Data_sz)-1 downto 3*Data_sz),full(3),open); + + fifoE2 : lpp_fifo + generic map (tech,Enable_ReUse,Data_sz,Addr_sz) + port map(rst,ReUse(4),rclk,ren(4),rdata((5*Data_sz)-1 downto 4*Data_sz),empty(4),open,wclk,wen(4),wdata((5*Data_sz)-1 downto 4*Data_sz),full(4),open); + + +end architecture; + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/lpp/lpp_memory/lpp_memory.vhd b/lib/lpp/lpp_memory/lpp_memory.vhd --- a/lib/lpp/lpp_memory/lpp_memory.vhd +++ b/lib/lpp/lpp_memory/lpp_memory.vhd @@ -93,6 +93,29 @@ port( ); end component; + +component SM_5lppFIFO is +generic( + tech : integer := 0; + Data_sz : integer range 1 to 32 := 16; + Addr_sz : integer range 2 to 12 := 8; + Enable_ReUse : std_logic := '0' + ); +port( + rst : in std_logic; + wclk : in std_logic; + rclk : in std_logic; + ReUse : in std_logic_vector(4 downto 0); + wen : in std_logic_vector(4 downto 0); + ren : in std_logic_vector(4 downto 0); + wdata : in std_logic_vector((5*Data_sz)-1 downto 0); + rdata : out std_logic_vector((5*Data_sz)-1 downto 0); + full : out std_logic_vector(4 downto 0); + empty : out std_logic_vector(4 downto 0) +); +end component; + + component ssram_plugin is generic (tech : integer := 0); port