diff --git a/designs/EGSE_ICI/EGSE_ICI.vhd b/designs/EGSE_ICI/EGSE_ICI.vhd
--- a/designs/EGSE_ICI/EGSE_ICI.vhd
+++ b/designs/EGSE_ICI/EGSE_ICI.vhd
@@ -243,8 +243,8 @@ rstn    <=  reset and RaZ;
 SCLK    <=  Sclkint;
 
 Major_Frame <=  MajF;
---Minor_Frame <=  MinF;
-Minor_Frame <=  MinFclk;
+Minor_Frame <=  MinF;
+--Minor_Frame <=  MinFclk;
 gateint <=  GateDC or GateLF or GateHF;
 Gate    <=  gateint;
 
@@ -259,8 +259,11 @@ end process;
 
 BUS0  <= WordClk;
 BUS12 <= MinFVector(0);
-BUS13 <= MinFclk;
-BUS14 <= '1' when WordCount = 0 else '0';
+--BUS13 <= MinFclk;
+--BUS14 <= '1' when WordCount = 0 else '0';
+BUS13 <= MinF;
+BUS14 <= MajF;
+
 
 MinFVector    <= std_logic_vector(TO_UNSIGNED(MinfCnt,WordSize));
 
diff --git a/designs/EGSE_ICI/MajF_Gen.vhd b/designs/EGSE_ICI/MajF_Gen.vhd
--- a/designs/EGSE_ICI/MajF_Gen.vhd
+++ b/designs/EGSE_ICI/MajF_Gen.vhd
@@ -23,6 +23,7 @@ end entity;
 
 
 architecture arMajF_Gen of MajF_Gen is
+signal monostable : std_logic := '0';
 
 begin
 
@@ -30,12 +31,18 @@ process(clk)
 begin
     if reset = '0' then
         MajF_Clk    <=  '0';
+        monostable  <=  '1';
     elsif clk'event and clk = '0' then
-        if WordCnt_in = 0 and MinfCnt_in = 0 and WordClk = '1' then
+        if WordCnt_in = 0 and MinfCnt_in = 0 and WordClk = '1' and monostable = '1' then
             MajF_Clk    <=  '1';
         else
             MajF_Clk    <=  '0';
         end if;
+        if WordCnt_in = 0 and MinfCnt_in = 0 and WordClk = '1' and monostable = '1' then
+            monostable  <=  '0';
+        elsif WordCnt_in /= 0  and monostable = '0' then
+            monostable  <=  '1';
+        end if;
     end if;
 end process;
 
diff --git a/designs/EGSE_ICI/MinF_Gen.vhd b/designs/EGSE_ICI/MinF_Gen.vhd
--- a/designs/EGSE_ICI/MinF_Gen.vhd
+++ b/designs/EGSE_ICI/MinF_Gen.vhd
@@ -22,19 +22,25 @@ end entity;
 
 
 architecture arMinF_Gen of MinF_Gen is
-
+signal monostable : std_logic := '0';
 begin
 
 process(clk)
 begin
     if reset = '0' then
         MinF_Clk    <=  '0';
+        monostable  <=  '1';
     elsif clk'event and clk = '0' then
-        if WordCnt_in = 0 and WordClk = '1' then
+        if WordCnt_in = 0 and WordClk = '1' and monostable = '1' then
             MinF_Clk    <=  '1';
         else
             MinF_Clk    <=  '0';
         end if;
+        if WordCnt_in = 0 and WordClk = '1' and monostable = '1' then
+            monostable  <=  '0';
+        elsif WordCnt_in /= 0  and monostable = '0' then
+            monostable  <=  '1';
+        end if;
     end if;
 end process;