diff --git a/.hgignore b/.hgignore --- a/.hgignore +++ b/.hgignore @@ -20,6 +20,7 @@ syntax: glob *doc* *Doc* *vhdlsyn.txt +*dirs.txt *.orig *.o *.a diff --git a/LPP_drivers/libsrc/AMBA/lpp_apb_functions.h b/LPP_drivers/libsrc/AMBA/lpp_apb_functions.h --- a/LPP_drivers/libsrc/AMBA/lpp_apb_functions.h +++ b/LPP_drivers/libsrc/AMBA/lpp_apb_functions.h @@ -14,7 +14,7 @@ -- -- You should have received a copy of the GNU General Public License -- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------*/ #ifndef LPP_APB_FUNCTIONS_H #define LPP_APB_FUNCTIONS_H @@ -30,6 +30,8 @@ #define LPP_SIMPLE_DIODE 0x003 #define LPP_MULTI_DIODE 0x004 #define LPP_LCD_CTRLR 0x005 +#define LPP_UART_CTRLR 0x006 +#define LPP_DAC_CTRLR 0x007 /** @todo implemente a descriptor structure for any APB device */ diff --git a/LPP_drivers/libsrc/DAC/Makefile b/LPP_drivers/libsrc/DAC/Makefile new file mode 100644 --- /dev/null +++ b/LPP_drivers/libsrc/DAC/Makefile @@ -0,0 +1,25 @@ +#------------------------------------------------------------------------------ +#-- This file is a part of the LPP VHDL IP LIBRARY +#-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------ +FILE = apb_dac_Driver +LIB = liblpp_dac_Driver.a + +include ../../rules.mk + +all: $(FILE).a + @echo $(FILE)".a created" diff --git a/LPP_drivers/libsrc/DAC/apb_dac_Driver.c b/LPP_drivers/libsrc/DAC/apb_dac_Driver.c new file mode 100644 --- /dev/null +++ b/LPP_drivers/libsrc/DAC/apb_dac_Driver.c @@ -0,0 +1,68 @@ +#include "apb_dac_Driver.h" +#include "lpp_apb_functions.h" +#include + + +DAC_Device* DacOpen(int count) +{ + DAC_Device* dac0; + dac0 = (DAC_Device*) apbgetdevice(LPP_DAC_CTRLR,VENDOR_LPP,count); + dac0->configReg = DAC_enable; + return dac0; +} + +/* +DAC_Device* DacClose(int count) +{ + DAC_Device* dac1; + dac1 = (DAC_Device*) apbgetdevice(LPP_DAC_CTRLR,VENDOR_LPP,count); + dac1->configReg = DAC_disable; + return dac1; +} +*/ + + +int DacTable() +{ + int i; + DAC_Device* dac2; + int tablo[251] = {0x9555,0x1800,0x19AA,0x1B15,0x1C0A,0x1C66,0x1C1F,0x1B44,0x19FC,0x187F,0x170F,0x15EA,0x1542,0x1537,0x15CE,0x16F2,0x187A,0x1A2B,0x1BC2,0x1D04,0x1DBF,0x1DDB,0x1D56,0x1C49,0x1AE3,0x195F,0x1800,0x1700,0x168D,0x16BA,0x1785,0x18D0,0x1A69,0x1C12,0x1D8A,0x1E98,0x1F13, + 0x1EEB,0x1E28,0x1CEC,0x1FFF,0x19E8,0x189F,0x17C8,0x1788,0x17EA,0x18E2,0x1A48,0x1BE7,0x1D7C,0x1ECA,0x1F9C,0x1FD2,0x1F64,0x1E66,0x1D00,0x1B6E,0x19EF,0x18C1,0x1817,0x180A,0x189D,0x19BA,0x1B33,0x1CCC,0x1E44,0x1F5F,0x1FEE,0x1FDC,0x1F2B,0x1DF6,0x1C6E,0x1AD1,0x1960,0x1855,0x17D9,0x1800, + 0x18C1,0x19FD,0x1B80,0x1D0A,0x1E5C,0x1F3D,0x1F87,0x1F2E,0x1E3E,0x1CDA,0x1B39,0x199C,0x1842,0x1760,0x1717,0x1771,0x185D,0x19B1,0x1B36,0x1CAA,0x1DCF,0x1E73,0x1E79,0x1DDD,0x1CB4,0x1B2B,0x197C,0x17EA,0x16B1,0x15FF,0x15EE,0x167C,0x178F,0x18F7,0x1A78,0x1BCF,0x1CC4,0x1D2A,0x1CED,0x1C14, + 0x1ABC,0x191A,0x176B,0x15F0,0x14E2,0x1467,0x1490,0x1552,0x1689,0x1800,0x1977,0x1AAE,0x1B70,0x1B99,0x1B1E,0x1A10,0x1895,0x16E6,0x1544,0x13EC,0x1313,0x12D6,0x133C,0x1431,0x1588,0x1709,0x1871,0x1984,0x1A12,0x1A01,0x194F,0x1816,0x1684,0x14D5,0x134C,0x1223,0x1187,0x118D,0x1231,0x1356, + 0x14CA,0x164F,0x17A3,0x188F,0x18E9,0x18A0,0x17BE,0x1664,0x14C7,0x1326,0x11C2,0x10D2,0x1079,0x10C3,0x11A4,0x12F6,0x1480,0x1603,0x173F,0x1800,0x1827,0x17AB,0x16A0,0x152F,0x1392,0x120A,0x10D5,0x1024,0x1012,0x10A1,0x11BC,0x1334,0x14CD,0x1646,0x1763,0x17F6,0x17E9,0x173F,0x1611,0x1492, + 0x1300,0x119A,0x109C,0x102E,0x1064,0x1136,0x1284,0x1419,0x15B8,0x171E,0x1816,0x1878,0x1838,0x1761,0x1618,0x1494,0x1314,0x11D8,0x1115,0x10ED,0x1168,0x1276,0x13EE,0x1597,0x1730,0x187B,0x1946,0x1973,0x1900,0x1800,0x16A1,0x151D,0x13B7,0x12AA,0x1225,0x1241,0x12FC,0x143E,0x15D5,0x1786, + 0x190E,0x1A32,0x1AC9,0x1ABE,0x1A16,0x18F1,0x1781,0x1604,0x14BC,0x13E1,0x139A,0x13F6,0x14EB,0x1656}; + dac2 = (DAC_Device*)0x80000800; + dac2->configReg = DAC_enable; + dac2->dataReg = tablo[0]; + + while(1) + { + for (i = 0 ; i < 251 ; i++) + { + while(!((dac2->configReg & DAC_ready) == DAC_ready)); + dac2->dataReg = tablo[i]; + while((dac2->configReg & DAC_ready) == DAC_ready); + } + } + return 0; +} + + + +int DacConst() +{ + DAC_Device* dac3; + int Value = 0x1FFF; + dac3 = (DAC_Device*)0x80000800; + dac3->configReg = DAC_enable; + while(1) + { + printf("\nEntrer une valeur entre 4096 et 8191 : "); + scanf("%d",&Value); + dac3->dataReg = Value; + } + return 0; +} + diff --git a/LPP_drivers/libsrc/DAC/apb_dac_Driver.h b/LPP_drivers/libsrc/DAC/apb_dac_Driver.h new file mode 100644 --- /dev/null +++ b/LPP_drivers/libsrc/DAC/apb_dac_Driver.h @@ -0,0 +1,35 @@ +#ifndef APB_CNA_DRIVER_H +#define APB_CNA_DRIVER_H + +#define DAC_ready 3 +#define DAC_enable 1 +#define DAC_disable 0 + + +/*=================================================== + T Y P E S D E F +====================================================*/ + +struct DAC_Driver +{ + int configReg; + int dataReg; +}; + +typedef struct DAC_Driver DAC_Device; + +/*=================================================== + F U N C T I O N S +====================================================*/ + +DAC_Device* DacOpen(int count); + +//DAC_Device* DacClose(int count); + +int DacTable(); + +int DacConst(); + + + +#endif diff --git a/LPP_drivers/libsrc/Makefile b/LPP_drivers/libsrc/Makefile --- a/LPP_drivers/libsrc/Makefile +++ b/LPP_drivers/libsrc/Makefile @@ -1,3 +1,36 @@ +#------------------------------------------------------------------------------ +#-- This file is a part of the LPP VHDL IP LIBRARY +#-- Copyright (C) 2010, Laboratory of Plasmas Physic - CNRS +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------ + +include ../rules.mk + + + +all: + make all -C AMBA + make all -C LCD + make all -C DAC + + +cleanall: + make clean -C AMBA + make clean -C LCD + make clean -C DAC #------------------------------------------------------------------------------ #-- This file is a part of the LPP VHDL IP LIBRARY #-- Copyright (C) 2010, Laboratory of Plasmas Physic - CNRS diff --git a/lib/lpp/amba_lcd_16x2_ctrlr/vhdlsyn.txt b/lib/lpp/amba_lcd_16x2_ctrlr/vhdlsyn.txt --- a/lib/lpp/amba_lcd_16x2_ctrlr/vhdlsyn.txt +++ b/lib/lpp/amba_lcd_16x2_ctrlr/vhdlsyn.txt @@ -1,5 +1,3 @@ -amba_lcd_16x2_ctrlr.vhd -apb_lcd_ctrlr.vhd FRAME_CLK.vhd LCD_16x2_CFG.vhd LCD_16x2_DRVR.vhd @@ -7,3 +5,5 @@ LCD_16x2_ENGINE.vhd LCD_2x16_DRIVER.vhd LCD_CLK_GENERATOR.vhd Top_LCD.vhd +amba_lcd_16x2_ctrlr.vhd +apb_lcd_ctrlr.vhd diff --git a/lib/lpp/dirs.txt b/lib/lpp/dirs.txt deleted file mode 100644 --- a/lib/lpp/dirs.txt +++ /dev/null @@ -1,8 +0,0 @@ -./general_purpose -./lpp_ad_Conv -./lpp_CNA_amba -./lpp_uart -./lpp_amba -./dsp/iir_filter -./amba_lcd_16x2_ctrlr -./lpp_cna diff --git a/lib/lpp/dsp/iir_filter/vhdlsyn.txt b/lib/lpp/dsp/iir_filter/vhdlsyn.txt --- a/lib/lpp/dsp/iir_filter/vhdlsyn.txt +++ b/lib/lpp/dsp/iir_filter/vhdlsyn.txt @@ -1,12 +1,12 @@ APB_IIR_CEL.vhd +FILTER.vhd +FILTER_RAM_CTRLR.vhd FILTERcfg.vhd FilterCTRLR.vhd -FILTER_RAM_CTRLR.vhd -FILTER.vhd IIR_CEL_CTRLR.vhd IIR_CEL_FILTER.vhd -iir_filter.vhd +RAM.vhd RAM_CEL.vhd RAM_CTRLR2.vhd -RAM.vhd Top_Filtre_IIR.vhd +iir_filter.vhd diff --git a/lib/lpp/general_purpose/vhdlsyn.txt b/lib/lpp/general_purpose/vhdlsyn.txt --- a/lib/lpp/general_purpose/vhdlsyn.txt +++ b/lib/lpp/general_purpose/vhdlsyn.txt @@ -1,14 +1,14 @@ -Adder.vhd ADDRcntr.vhd ALU.vhd +Adder.vhd Clk_divider.vhd -general_purpose.vhd +MAC.vhd MAC_CONTROLER.vhd -MAC_MUX2.vhd MAC_MUX.vhd +MAC_MUX2.vhd MAC_REG.vhd -MAC.vhd +MUX2.vhd Multiplier.vhd -MUX2.vhd REG.vhd Shifter.vhd +general_purpose.vhd diff --git a/lib/lpp/lpp_amba/APB_MULTI_DIODE.vhd b/lib/lpp/lpp_amba/APB_MULTI_DIODE.vhd --- a/lib/lpp/lpp_amba/APB_MULTI_DIODE.vhd +++ b/lib/lpp/lpp_amba/APB_MULTI_DIODE.vhd @@ -60,6 +60,7 @@ type LEDregs is record end record; signal r : LEDregs; +signal Rdata : std_logic_vector(31 downto 0); begin @@ -71,7 +72,7 @@ begin if rst = '0' then LED <= "000"; r.DATAin <= (others => '0'); - apbo.prdata <= (others => '0'); + elsif clk'event and clk = '1' then LED <= r.DATAin(2 downto 0); @@ -87,12 +88,12 @@ begin end if; --APB READ OP - if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then + if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then case apbi.paddr(abits-1 downto 2) is when "000000" => - apbo.prdata <= r.DATAin; + Rdata <= r.DATAin; when others => - apbo.prdata <= r.DATAout; + Rdata <= r.DATAout; end case; end if; @@ -100,5 +101,5 @@ begin apbo.pconfig <= pconfig; end process; - +apbo.prdata <= Rdata when apbi.penable = '1'; end ar_APB_MULTI_DIODE; diff --git a/lib/lpp/lpp_amba/APB_SIMPLE_DIODE.vhd b/lib/lpp/lpp_amba/APB_SIMPLE_DIODE.vhd --- a/lib/lpp/lpp_amba/APB_SIMPLE_DIODE.vhd +++ b/lib/lpp/lpp_amba/APB_SIMPLE_DIODE.vhd @@ -60,7 +60,7 @@ type LEDregs is record end record; signal r : LEDregs; - +signal Rdata : std_logic_vector(31 downto 0); begin @@ -71,7 +71,7 @@ begin if rst = '0' then LED <= '0'; r.DATAin <= (others => '0'); - apbo.prdata <= (others => '0'); + elsif clk'event and clk = '1' then LED <= r.DATAin(0); @@ -87,12 +87,12 @@ begin end if; --APB READ OP - if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then + if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then case apbi.paddr(abits-1 downto 2) is when "000000" => - apbo.prdata <= r.DATAin; + Rdata <= r.DATAin; when others => - apbo.prdata <= r.DATAout; + Rdata <= r.DATAout; end case; end if; @@ -100,7 +100,7 @@ begin apbo.pconfig <= pconfig; end process; - +apbo.prdata <= Rdata when apbi.penable = '1'; -- pragma translate_off -- bootmsg : report_version diff --git a/lib/lpp/lpp_cna/CNA_TabloC.vhd b/lib/lpp/lpp_cna/CNA_TabloC.vhd --- a/lib/lpp/lpp_cna/CNA_TabloC.vhd +++ b/lib/lpp/lpp_cna/CNA_TabloC.vhd @@ -44,7 +44,7 @@ CLKINT_1 : CLKINT port map(A => rst, Y => raz); -SystemCLK : entity work.Clock_Serie +SystemCLK : entity work.Systeme_Clock generic map (nb_serial) port map (clk,raz,s_SCLK); diff --git a/lib/lpp/lpp_cna/Systeme_Clock.vhd b/lib/lpp/lpp_cna/Systeme_Clock.vhd new file mode 100644 --- /dev/null +++ b/lib/lpp/lpp_cna/Systeme_Clock.vhd @@ -0,0 +1,40 @@ +-- Systeme_Clock.vhd +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +--! Programme qui va permetre de générer l'horloge systeme (sclk) + +entity Systeme_Clock is +generic(N :integer := 695); --! Générique contenant le résultat de la division clk/sclk +port( + clk, raz : in std_logic; --! Horloge et Reset globale + sclk : out std_logic --! Horloge Systeme générée +); +end Systeme_Clock; + +--! @details Fonctionne a base d'un compteur (countint) qui va permetre de diviser l'horloge N fois +architecture ar_Systeme_Clock of Systeme_Clock is + +signal clockint : std_logic; +signal countint : integer range 0 to N/2-1; + +begin + process (clk,raz) + begin + if(raz = '0') then + countint <= 0; + clockint <= '0'; + elsif (clk' event and clk='1') then + if (countint = N/2-1) then + countint <= 0; + clockint <= not clockint; + else + countint <= countint+1; + end if; + end if; + end process; + +sclk <= clockint; + +end ar_Systeme_Clock; \ No newline at end of file diff --git a/lib/lpp/lpp_cna/lpp_cna.vhd b/lib/lpp/lpp_cna/lpp_cna.vhd --- a/lib/lpp/lpp_cna/lpp_cna.vhd +++ b/lib/lpp/lpp_cna/lpp_cna.vhd @@ -46,7 +46,7 @@ component CNA_TabloC is end component; -component Clock_Serie is +component Systeme_Clock is generic(N :integer := 695); port( clk, raz : in std_logic ; diff --git a/lib/lpp/lpp_uart/APB_UART.vhd b/lib/lpp/lpp_uart/APB_UART.vhd --- a/lib/lpp/lpp_uart/APB_UART.vhd +++ b/lib/lpp/lpp_uart/APB_UART.vhd @@ -67,6 +67,7 @@ type UART_ctrlr_Reg is record end record; signal Rec : UART_ctrlr_Reg; +signal Rdata : std_logic_vector(31 downto 0); begin @@ -86,7 +87,7 @@ Rec.UART_Cfg(4) <= NwData; begin if(rst='0')then Rec.UART_Wdata <= (others => '0'); - apbo.prdata <= (others => '0'); + elsif(clk'event and clk='1')then @@ -104,18 +105,18 @@ Rec.UART_Cfg(4) <= NwData; end if; --APB READ OP - if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then + if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then case apbi.paddr(abits-1 downto 2) is when "000000" => - apbo.prdata(31 downto 27) <= Rec.UART_Cfg; - apbo.prdata(26 downto 12) <= (others => '0'); - apbo.prdata(11 downto 0) <= Rec.UART_BTrig; + Rdata(31 downto 27) <= Rec.UART_Cfg; + Rdata(26 downto 12) <= (others => '0'); + Rdata(11 downto 0) <= Rec.UART_BTrig; when "000001" => - apbo.prdata(7 downto 0) <= Rec.UART_Wdata; + Rdata(7 downto 0) <= Rec.UART_Wdata; when "000010" => - apbo.prdata(7 downto 0) <= Rec.UART_Rdata; + Rdata(7 downto 0) <= Rec.UART_Rdata; when others => - apbo.prdata <= (others => '0'); + Rdata <= (others => '0'); end case; end if; @@ -123,4 +124,6 @@ Rec.UART_Cfg(4) <= NwData; apbo.pconfig <= pconfig; end process; + apbo.prdata <= Rdata when apbi.penable = '1'; + end ar_APB_UART;