diff --git a/designs/LFR-EQM-WFP_MS/TB.vhd b/designs/LFR-EQM-WFP_MS/TB.vhd --- a/designs/LFR-EQM-WFP_MS/TB.vhd +++ b/designs/LFR-EQM-WFP_MS/TB.vhd @@ -299,7 +299,7 @@ BEGIN -- beh END GENERATE MODULE_RHF1401; ADC_OEB_bar_CH_s <= TRANSPORT ADC_OEB_bar_CH AFTER 10 ns; - ADC_data <= TRANSPORT ADC_data_s AFTER 20 ns; + ADC_data <= TRANSPORT ADC_data_s AFTER 35 ns; ----------------------------------------------------------------------------- PROCESS (clk50MHz, reset) BEGIN -- PROCESS diff --git a/designs/LFR-EQM-WFP_MS/wave.do b/designs/LFR-EQM-WFP_MS/wave.do --- a/designs/LFR-EQM-WFP_MS/wave.do +++ b/designs/LFR-EQM-WFP_MS/wave.do @@ -124,6 +124,10 @@ add wave -noupdate -expand -group ALL -r add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/rstn add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/clk add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data +add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data_reg +add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data_valid_s +add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data_valid +add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_val_s2 add wave -noupdate -expand -group ALL -radix hexadecimal -childformat {{/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(8) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(7) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(6) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(5) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(4) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(3) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(2) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(1) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(0) -radix hexadecimal}} -subitemconfig {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(8) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(7) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(6) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(5) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(4) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(3) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(2) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(1) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(0) {-height 15 -radix hexadecimal}} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(8) add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_nOE(7) @@ -145,7 +149,6 @@ add wave -noupdate -expand -group ALL /t add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_current_cycle_enabled add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data_valid add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data -add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data_reg add wave -noupdate -expand -group ALL /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/ADC_data_selected add wave -noupdate -expand -group ALL -radix hexadecimal -childformat {{/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(8) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(7) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(6) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(5) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(4) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(3) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(2) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(1) -radix hexadecimal} {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(0) -radix hexadecimal}} -subitemconfig {/tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(8) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(7) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(6) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(5) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(4) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(3) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(2) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(1) {-height 15 -radix hexadecimal} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg(0) {-height 15 -radix hexadecimal}} /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_reg add wave -noupdate -expand -group ALL -radix hexadecimal /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample @@ -194,8 +197,8 @@ add wave -noupdate -expand /tb/LFR_EQM_1 add wave -noupdate /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample add wave -noupdate /tb/LFR_EQM_1/USE_ADCDRIVER_true/top_ad_conv_RHF1401_withFilter_1/sample_val TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {33906609 ps} 0} {{Cursor 2} {33050000 ps} 0} {{Cursor 3} {42930000 ps} 0} {{Cursor 4} {8300650000 ps} 0} -quietly wave cursor active 3 +WaveRestoreCursors {{Cursor 1} {42970000 ps} 0} {{Cursor 2} {33108681 ps} 0} {{Cursor 3} {515290000 ps} 0} {{Cursor 4} {8300650000 ps} 0} +quietly wave cursor active 1 configure wave -namecolwidth 619 configure wave -valuecolwidth 311 configure wave -justifyvalue left @@ -210,4 +213,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {41901608 ps} {45906411 ps} +WaveRestoreZoom {31103383 ps} {50275736 ps} diff --git a/lib/lpp/dirs.txt b/lib/lpp/dirs.txt --- a/lib/lpp/dirs.txt +++ b/lib/lpp/dirs.txt @@ -9,6 +9,7 @@ ./dsp/cic ./dsp/lpp_downsampling ./dsp/lpp_fft_rtax +./dsp/window_function ./lpp_memory ./dsp/lpp_fft ./lpp_cna diff --git a/lib/lpp/lfr_management/apb_lfr_management.vhd b/lib/lpp/lfr_management/apb_lfr_management.vhd --- a/lib/lpp/lfr_management/apb_lfr_management.vhd +++ b/lib/lpp/lfr_management/apb_lfr_management.vhd @@ -184,6 +184,7 @@ BEGIN DAC_CFG <= (OTHERS => '0'); -- DAC_CAL_EN_s <= '0'; + force_reset <= '0'; ELSIF clk25MHz'EVENT AND clk25MHz = '1' THEN coarsetime_reg_updated <= '0'; diff --git a/lib/lpp/lpp_ad_Conv/top_ad_conv_RHF1401_withFilter.vhd b/lib/lpp/lpp_ad_Conv/top_ad_conv_RHF1401_withFilter.vhd --- a/lib/lpp/lpp_ad_Conv/top_ad_conv_RHF1401_withFilter.vhd +++ b/lib/lpp/lpp_ad_Conv/top_ad_conv_RHF1401_withFilter.vhd @@ -56,7 +56,7 @@ ARCHITECTURE ar_top_ad_conv_RHF1401 OF t ----------------------------------------------------------------------------- CONSTANT OE_NB_CYCLE_ENABLED : INTEGER := 1; - CONSTANT DATA_CYCLE_VALID : INTEGER := 1; + CONSTANT DATA_CYCLE_VALID : INTEGER := 2; -- GEN OutPut Enable TYPE FSM_GEN_OEn_state IS (IDLE, GEN_OE, WAIT_CYCLE); @@ -69,7 +69,7 @@ ARCHITECTURE ar_top_ad_conv_RHF1401 OF t ----------------------------------------------------------------------------- CONSTANT SAMPLE_DIVISION : INTEGER := 10; SIGNAL sample_val_s : STD_LOGIC; - SIGNAL sample_val_s2 : STD_LOGIC; + SIGNAL sample_val_s2 : STD_LOGIC; SIGNAL sample_val_counter : INTEGER RANGE 0 TO SAMPLE_DIVISION; BEGIN @@ -217,9 +217,10 @@ BEGIN END PROCESS; - ADC_data_valid_s <= '1' WHEN ADC_current_cycle_enabled = DATA_CYCLE_VALID + 1 ELSE '0'; REG_ADC_DATA_valid: IF DATA_CYCLE_VALID = OE_NB_CYCLE_ENABLED GENERATE + ADC_data_valid_s <= '1' WHEN ADC_current_cycle_enabled = DATA_CYCLE_VALID + 1 ELSE '0'; + PROCESS (clk, rstn) BEGIN -- PROCESS IF rstn = '0' THEN -- asynchronous reset (active low) @@ -234,10 +235,36 @@ BEGIN END GENERATE REG_ADC_DATA_valid; noREG_ADC_DATA_valid: IF DATA_CYCLE_VALID < OE_NB_CYCLE_ENABLED GENERATE + ADC_data_valid_s <= '1' WHEN ADC_current_cycle_enabled = DATA_CYCLE_VALID + 1 ELSE '0'; + ADC_data_valid <= ADC_data_valid_s; sample_val_s2 <= sample_val_s; END GENERATE noREG_ADC_DATA_valid; + REGm_ADC_DATA_valid: IF DATA_CYCLE_VALID > OE_NB_CYCLE_ENABLED GENERATE + + ADC_data_valid_s <= '1' WHEN ADC_current_cycle_enabled = OE_NB_CYCLE_ENABLED + 1 ELSE '0'; + + REG_1: SYNC_FF + GENERIC MAP ( + NB_FF_OF_SYNC => DATA_CYCLE_VALID-OE_NB_CYCLE_ENABLED+1) + PORT MAP ( + clk => clk, + rstn => rstn, + A => ADC_data_valid_s, + A_sync => ADC_data_valid); + + REG_2: SYNC_FF + GENERIC MAP ( + NB_FF_OF_SYNC => DATA_CYCLE_VALID-OE_NB_CYCLE_ENABLED+1) + PORT MAP ( + clk => clk, + rstn => rstn, + A => sample_val_s, + A_sync => sample_val_s2); + END GENERATE REGm_ADC_DATA_valid; + + WITH ADC_current SELECT ADC_data_selected <= sample_reg(0) WHEN 0,