diff --git a/Makefile b/Makefile --- a/Makefile +++ b/Makefile @@ -30,4 +30,5 @@ test: distclean: $(MAKE) -C tests distclean + $(MAKE) -C designs distclean diff --git a/boards/em-LeonLPP-A3PE3kL-v3-core1/em-LeonLPP-A3PE3kL_withHK-DAC.pdc b/boards/em-LeonLPP-A3PE3kL-v3-core1/em-LeonLPP-A3PE3kL_withHK-DAC.pdc --- a/boards/em-LeonLPP-A3PE3kL-v3-core1/em-LeonLPP-A3PE3kL_withHK-DAC.pdc +++ b/boards/em-LeonLPP-A3PE3kL-v3-core1/em-LeonLPP-A3PE3kL_withHK-DAC.pdc @@ -78,7 +78,7 @@ set_io {led[0]} -pinname K17 -fixed yes set_io {led[1]} -pinname L18 -fixed yes -DIRECTION Inout set_io {led[2]} -pinname M17 -fixed yes -DIRECTION Inout -set_io TAG1 -pinname J12 -fixed yes -DIRECTION Inout +#set_io TAG1 -pinname J12 -fixed yes -DIRECTION Inout set_io TAG2 -pinname K13 -fixed yes -DIRECTION Inout set_io TAG3 -pinname L16 -fixed yes -DIRECTION Inout set_io TAG4 -pinname L15 -fixed yes -DIRECTION Inout diff --git a/designs/LFR-EQM-WFP_MS-RTAX/LFR-EQM.vhd b/designs/LFR-EQM-WFP_MS-RTAX/LFR-EQM.vhd --- a/designs/LFR-EQM-WFP_MS-RTAX/LFR-EQM.vhd +++ b/designs/LFR-EQM-WFP_MS-RTAX/LFR-EQM.vhd @@ -256,6 +256,7 @@ BEGIN -- beh NB_APB_SLAVE => NB_APB_SLAVE, ADDRESS_SIZE => 19, USES_IAP_MEMCTRLR => 1, + USES_MBE_PIN => 1, BYPASS_EDAC_MEMCTRLR => '0', SRBANKSZ => 8) PORT MAP ( diff --git a/designs/LFR-RTAX_keypoint/LFR-EQM.vhd b/designs/LFR-RTAX_keypoint/LFR-EQM.vhd --- a/designs/LFR-RTAX_keypoint/LFR-EQM.vhd +++ b/designs/LFR-RTAX_keypoint/LFR-EQM.vhd @@ -260,6 +260,7 @@ BEGIN -- beh NB_APB_SLAVE => NB_APB_SLAVE, ADDRESS_SIZE => 19, USES_IAP_MEMCTRLR => 1, + USES_MBE_PIN => 1, BYPASS_EDAC_MEMCTRLR => '0', SRBANKSZ => 8) PORT MAP ( @@ -602,4 +603,4 @@ BEGIN -- beh --TAG(8) <= nSRAM_BUSY; END GENERATE USE_DEBUG_VECTOR_IF2; -END beh; \ No newline at end of file +END beh; diff --git a/designs/LFR-em-WFP_MS/LFR-em.vhd b/designs/LFR-em-WFP_MS/LFR-em.vhd --- a/designs/LFR-em-WFP_MS/LFR-em.vhd +++ b/designs/LFR-em-WFP_MS/LFR-em.vhd @@ -164,6 +164,7 @@ ARCHITECTURE beh OF LFR_em IS ---------------------------------------------------------------------------- SIGNAL nSRAM_CE_s : STD_LOGIC_VECTOR(1 DOWNTO 0); SIGNAL nSRAM_READY : STD_LOGIC; + SIGNAL SRAM_MBE : STD_LOGIC; BEGIN -- beh @@ -234,6 +235,7 @@ BEGIN -- beh NB_APB_SLAVE => NB_APB_SLAVE, ADDRESS_SIZE => 20, USES_IAP_MEMCTRLR => USE_IAP_MEMCTRL, + USES_MBE_PIN => 0, BYPASS_EDAC_MEMCTRLR => '0', SRBANKSZ => 9) PORT MAP ( @@ -256,7 +258,7 @@ BEGIN -- beh nSRAM_CE => nSRAM_CE_s, nSRAM_OE => nSRAM_OE, nSRAM_READY => nSRAM_READY, - SRAM_MBE => '0', + SRAM_MBE => SRAM_MBE, apbi_ext => apbi_ext, apbo_ext => apbo_ext, diff --git a/designs/LFR-em-WFP_MS/Makefile b/designs/LFR-em-WFP_MS/Makefile --- a/designs/LFR-em-WFP_MS/Makefile +++ b/designs/LFR-em-WFP_MS/Makefile @@ -1,4 +1,3 @@ -#GRLIB=../.. VHDLIB=../.. SCRIPTSDIR=$(VHDLIB)/scripts/ GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh) @@ -11,13 +10,9 @@ QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf EFFORT=high XSTOPT= SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0" -#VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd -#VHDLSYNFILES=config.vhd leon3mp.vhd VHDLSYNFILES=LFR-em.vhd VHDLSIMFILES=testbench.vhd -#SIMTOP=testbench -#SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc -#SDC=$(GRLIB)/boards/$(BOARD)/leon3mp.sdc + PDC=$(VHDLIB)/boards/$(BOARD)/em-LeonLPP-A3PE3kL_withHK-DAC.pdc SDCFILE=$(VHDLIB)/boards/$(BOARD)/LFR_EM_synthesis.sdc @@ -29,7 +24,7 @@ CLEAN=soft-clean TECHLIBS = proasic3e LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \ - tmtc openchip hynix ihp gleichmann micron usbhc + tmtc openchip hynix ihp gleichmann micron usbhc opencores can greth DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \ pci grusbhc haps slink ascs pwm coremp7 spi ac97 \ diff --git a/designs/Makefile b/designs/Makefile new file mode 100644 --- /dev/null +++ b/designs/Makefile @@ -0,0 +1,10 @@ +SUBDIRS := $(shell find ./ -maxdepth 1 -mindepth 1 -type d) + +all : + +.PHONY: force + + +%: + -for d in $(SUBDIRS); do (cd $$d; $(MAKE) $@ ); done + diff --git a/lib/lpp/lpp_leon3_soc/leon3_soc.vhd b/lib/lpp/lpp_leon3_soc/leon3_soc.vhd --- a/lib/lpp/lpp_leon3_soc/leon3_soc.vhd +++ b/lib/lpp/lpp_leon3_soc/leon3_soc.vhd @@ -73,6 +73,7 @@ ENTITY leon3_soc IS -- ADDRESS_SIZE : INTEGER := 19; USES_IAP_MEMCTRLR : INTEGER := 1; + USES_MBE_PIN : INTEGER := 1; BYPASS_EDAC_MEMCTRLR : STD_LOGIC := '0'; SRBANKSZ : INTEGER := 8; SLOW_TIMING_EMULATION : integer := 0 @@ -446,16 +447,23 @@ BEGIN ); memi.brdyn <= nSRAM_READY; + +drv_mbe: IF USES_MBE_PIN = 1 GENERATE + mbe_pad : iopad + GENERIC MAP(tech => padtech, oepol => USES_IAP_MEMCTRLR) + PORT MAP(pad => SRAM_MBE, + i => mbe, + en => mbe_drive, + o => memi.bexcn); - mbe_pad : iopad - GENERIC MAP(tech => padtech, oepol => USES_IAP_MEMCTRLR) - PORT MAP(pad => SRAM_MBE, - i => mbe, - en => mbe_drive, - o => memi.bexcn); - - nSRAM_CE_s <= (memo.ramsn(1 DOWNTO 0)); - nSRAM_OE_s <= memo.oen; + nSRAM_CE_s <= (memo.ramsn(1 DOWNTO 0)); + nSRAM_OE_s <= memo.oen; + END GENERATE; + +no_drv_mbe: IF USES_MBE_PIN /= 1 GENERATE + memi.bexcn <= '1'; + END GENERATE; + END GENERATE; diff --git a/lib/lpp/lpp_leon3_soc/lpp_leon3_soc_pkg.vhd b/lib/lpp/lpp_leon3_soc/lpp_leon3_soc_pkg.vhd --- a/lib/lpp/lpp_leon3_soc/lpp_leon3_soc_pkg.vhd +++ b/lib/lpp/lpp_leon3_soc/lpp_leon3_soc_pkg.vhd @@ -55,6 +55,7 @@ PACKAGE lpp_leon3_soc_pkg IS NB_APB_SLAVE : INTEGER; ADDRESS_SIZE : INTEGER; USES_IAP_MEMCTRLR : INTEGER; + USES_MBE_PIN : INTEGER:=1; BYPASS_EDAC_MEMCTRLR : STD_LOGIC; SRBANKSZ : INTEGER := 8; SLOW_TIMING_EMULATION : integer := 0