diff --git a/designs/Validation_LFR_SpectralMatrix/Makefile b/designs/Validation_LFR_SpectralMatrix/Makefile --- a/designs/Validation_LFR_SpectralMatrix/Makefile +++ b/designs/Validation_LFR_SpectralMatrix/Makefile @@ -399,6 +399,7 @@ vcom_lpp: $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/lpp_top_lfr/lpp_lfr_apbreg_simu.vhd $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/lpp_top_lfr/lpp_lfr_apbreg_ms_pointer.vhd $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd + $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/lpp_top_lfr/lpp_lfr_ms_reg_head.vhd $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/lpp_top_lfr/lpp_lfr_ms_fsmdma.vhd $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/lpp_top_lfr/lpp_lfr_ms_FFT.vhd @echo "vcom lpp done" diff --git a/designs/Validation_LFR_SpectralMatrix/wave.do b/designs/Validation_LFR_SpectralMatrix/wave.do --- a/designs/Validation_LFR_SpectralMatrix/wave.do +++ b/designs/Validation_LFR_SpectralMatrix/wave.do @@ -1,31 +1,61 @@ onerror {resume} quietly WaveActivateNextPane {} 0 -add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(0) -add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(1) -add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(2) -add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(5) -add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(4) -add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(3) -add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(8) -add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(7) -add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(6) -add wave -noupdate -group debug /tb/lpp_lfr_ms_1/debug_reg -add wave -noupdate -group debug /tb/lpp_lfr_apbreg_1/apbi -add wave -noupdate -group debug /tb/lpp_lfr_apbreg_1/apbo -add wave -noupdate -group debug /tb/ready_reg -add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(0) -add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(1) -add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(2) -add wave -noupdate -expand /tb/lpp_lfr_apbreg_1/debug_signal -add wave -noupdate -expand -subitemconfig {/tb/lpp_lfr_ms_1/observation_vector_0(2) {-color Blue} /tb/lpp_lfr_ms_1/observation_vector_0(0) {-color Blue}} /tb/lpp_lfr_ms_1/observation_vector_0 +add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(0) +add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(1) +add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(2) +add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(5) +add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(4) +add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(3) +add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(8) +add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(7) +add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(6) +add wave -noupdate -expand -group debug /tb/lpp_lfr_ms_1/debug_reg +add wave -noupdate -expand -group debug /tb/lpp_lfr_apbreg_1/apbi +add wave -noupdate -expand -group debug /tb/lpp_lfr_apbreg_1/apbo +add wave -noupdate -expand -group debug /tb/ready_reg +add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(0) +add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(1) +add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(2) +add wave -noupdate /tb/lpp_lfr_apbreg_1/debug_signal +add wave -noupdate -expand -subitemconfig {/tb/lpp_lfr_ms_1/observation_vector_0(2) {-color Blue -height 15} /tb/lpp_lfr_ms_1/observation_vector_0(0) {-color Blue -height 15}} /tb/lpp_lfr_ms_1/observation_vector_0 add wave -noupdate -expand /tb/lpp_lfr_ms_1/observation_vector_1 add wave -noupdate -divider {New Divider} add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/corefft_1/counter add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/corefft_1/counter_out add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/corefft_1/counter_wait +add wave -noupdate -expand -group ERROR /tb/lpp_lfr_ms_1/error_bad_component_error +add wave -noupdate -expand -group ERROR /tb/lpp_lfr_ms_1/error_buffer_full +add wave -noupdate -expand -group ERROR /tb/lpp_lfr_ms_1/error_input_fifo_write +add wave -noupdate -expand -group INPUT_FIFO_F1 /tb/lpp_lfr_ms_1/lppfifoxn_f1/wen +add wave -noupdate -expand -group INPUT_FIFO_F1 /tb/lpp_lfr_ms_1/lppfifoxn_f1/ren +add wave -noupdate -expand -group INPUT_FIFO_F1 /tb/lpp_lfr_ms_1/lppfifoxn_f1/empty +add wave -noupdate -expand -group INPUT_FIFO_F1 /tb/lpp_lfr_ms_1/lppfifoxn_f1/full +add wave -noupdate -expand -group INPUT_FIFO_F1 /tb/lpp_lfr_ms_1/lppfifoxn_f1/almost_full +add wave -noupdate -radix hexadecimal -expand -subitemconfig {/tb/lpp_lfr_apbreg_1/reg_sp.config_active_interruption_onnewmatrix {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.config_active_interruption_onerror {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.config_ms_run {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f0_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f1_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f2_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f0_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f1_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f2_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_error_bad_component_error {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_error_buffer_full {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.status_error_input_fifo_write {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f0_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f0_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f1_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f1_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f2_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f2_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.time_matrix_f0_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.time_matrix_f0_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.time_matrix_f1_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.time_matrix_f1_1 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.time_matrix_f2_0 {-height 15 -radix hexadecimal} /tb/lpp_lfr_apbreg_1/reg_sp.time_matrix_f2_1 {-height 15 -radix hexadecimal}} /tb/lpp_lfr_apbreg_1/reg_sp +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/sample_valid +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/fft_read +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/sample_data +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/sample_load +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/fft_pong +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/fft_data_im +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/fft_data_re +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/fft_data_valid +add wave -noupdate -expand -group FFT /tb/lpp_lfr_ms_1/lpp_lfr_ms_fft_1/fft_ready +add wave -noupdate /tb/lpp_lfr_ms_1/state_fsm_load_fft +add wave -noupdate /tb/lpp_lfr_ms_1/state_fsm_select_channel +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_wen +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_data +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_full +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_empty +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/fsm_state +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/reg_data +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_wen_s +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_wen +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_data +add wave -noupdate /tb/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_full TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {20859515887 ps} 0} -configure wave -namecolwidth 253 +WaveRestoreCursors {{Cursor 1} {41374417240 ps} 0} {{Cursor 2} {62390873400 ps} 0} +configure wave -namecolwidth 419 configure wave -valuecolwidth 112 configure wave -justifyvalue left configure wave -signalnamewidth 0 @@ -39,6 +69,6 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ps update -WaveRestoreZoom {20840058904 ps} {20863099265 ps} +WaveRestoreZoom {62074549955 ps} {63157132736 ps} bookmark add wave bookmark0 {{61745287067 ps} {63754655343 ps}} 0 bookmark add wave bookmark1 {{61745287067 ps} {63754655343 ps}} 0 diff --git a/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd b/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd --- a/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd +++ b/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd @@ -241,6 +241,16 @@ ARCHITECTURE Behavioral OF lpp_lfr_ms IS SIGNAL sample_load_reg : STD_LOGIC; SIGNAL sample_load_rising_down : STD_LOGIC; + + ----------------------------------------------------------------------------- + SIGNAL sample_f1_wen_head : STD_LOGIC_VECTOR(4 DOWNTO 0); + SIGNAL sample_f1_wen_head_in : STD_LOGIC; + SIGNAL sample_f1_wen_head_out : STD_LOGIC; + SIGNAL sample_f1_full_head_in : STD_LOGIC; + SIGNAL sample_f1_full_head_out : STD_LOGIC; + SIGNAL sample_f1_empty_head_in : STD_LOGIC; + + SIGNAL sample_f1_wdata_head : STD_LOGIC_VECTOR((5*16)-1 DOWNTO 0); BEGIN @@ -317,7 +327,23 @@ BEGIN -- sample_f1_wdata in -- sample_f1_full OUT + sample_f1_wen_head_in <= '0' WHEN sample_f1_wen = "00000" ELSE '1'; + sample_f1_full_head_in <= '0' WHEN sample_f1_full = "00000" ELSE '1'; + sample_f1_empty_head_in <= '1' WHEN sample_f1_empty = "11111" ELSE '0'; + + lpp_lfr_ms_reg_head_1:lpp_lfr_ms_reg_head + PORT MAP ( + clk => clk, + rstn => rstn, + in_wen => sample_f1_wen_head_in, + in_data => sample_f1_wdata, + in_full => sample_f1_full_head_in, + in_empty => sample_f1_empty_head_in, + out_wen => sample_f1_wen_head_out, + out_data => sample_f1_wdata_head, + out_full => sample_f1_full_head_out); + sample_f1_wen_head <= sample_f1_wen_head_out & sample_f1_wen_head_out & sample_f1_wen_head_out & sample_f1_wen_head_out & sample_f1_wen_head_out; lppFIFOxN_f1 : lppFIFOxN @@ -333,8 +359,8 @@ BEGIN ReUse => (OTHERS => '0'), - wen => sample_f1_wen, - wdata => sample_f1_wdata, + wen => sample_f1_wen_head, + wdata => sample_f1_wdata_head, ren => sample_f1_ren, rdata => sample_f1_rdata, empty => sample_f1_empty, @@ -350,7 +376,7 @@ BEGIN one_sample_f1_full <= '0'; error_wen_f1 <= '0'; ELSIF clk'EVENT AND clk = '1' THEN -- rising clock edge - IF sample_f1_full = "00000" THEN + IF sample_f1_full_head_out = '0' THEN one_sample_f1_full <= '0'; ELSE one_sample_f1_full <= '1'; diff --git a/lib/lpp/lpp_top_lfr/lpp_lfr_ms_reg_head.vhd b/lib/lpp/lpp_top_lfr/lpp_lfr_ms_reg_head.vhd new file mode 100644 --- /dev/null +++ b/lib/lpp/lpp_top_lfr/lpp_lfr_ms_reg_head.vhd @@ -0,0 +1,68 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +ENTITY lpp_lfr_ms_reg_head IS + + PORT ( + clk : IN STD_LOGIC; + rstn : IN STD_LOGIC; + + in_wen : IN STD_LOGIC; + in_data : IN STD_LOGIC_VECTOR(5*16-1 DOWNTO 0); + in_full : IN STD_LOGIC; + in_empty : IN STD_LOGIC; + + out_wen : OUT STD_LOGIC; + out_data : OUT STD_LOGIC_VECTOR(5*16-1 DOWNTO 0); + out_full : OUT STD_LOGIC + ); + +END lpp_lfr_ms_reg_head; + +ARCHITECTURE Beh OF lpp_lfr_ms_reg_head IS + TYPE fsm_state_reg_head IS (REG_EMPTY, REG_FULL); + SIGNAL fsm_state : fsm_state_reg_head; + + SIGNAL reg_data : STD_LOGIC_VECTOR(5*16-1 DOWNTO 0); + SIGNAL out_wen_s : STD_LOGIC; +BEGIN -- Beh + + PROCESS (clk, rstn) + BEGIN + IF rstn = '0' THEN + fsm_state <= REG_EMPTY; + reg_data <= (OTHERS => '0'); + out_wen_s <= '1'; + ELSIF clk'event AND clk = '1' THEN + out_wen_s <= '1'; + + CASE fsm_state IS + WHEN REG_EMPTY => + reg_data <= in_data; + IF in_wen = '0' AND in_full = '1' THEN + fsm_state <= REG_FULL; + END IF; + WHEN REG_FULL => + IF in_empty = '1' THEN + out_wen_s <= '0'; + IF in_wen = '0' THEN + reg_data <= in_data; + ELSE + fsm_state <= REG_EMPTY; + END IF; + END IF; + WHEN OTHERS => NULL; + END CASE; + + END IF; + END PROCESS; + + out_full <= '1' WHEN fsm_state = REG_FULL ELSE in_full; + + out_data <= reg_data WHEN fsm_state = REG_FULL ELSE in_data; + + out_wen <= '0' WHEN out_wen_s = '0' ELSE + '1' WHEN fsm_state = REG_FULL ELSE + in_wen; + +END Beh; diff --git a/lib/lpp/lpp_top_lfr/lpp_lfr_pkg.vhd b/lib/lpp/lpp_top_lfr/lpp_lfr_pkg.vhd --- a/lib/lpp/lpp_top_lfr/lpp_lfr_pkg.vhd +++ b/lib/lpp/lpp_top_lfr/lpp_lfr_pkg.vhd @@ -412,5 +412,18 @@ PACKAGE lpp_lfr_pkg IS addr_matrix : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); matrix_time : IN STD_LOGIC_VECTOR(47 DOWNTO 0)); END COMPONENT; + + COMPONENT lpp_lfr_ms_reg_head + PORT ( + clk : IN STD_LOGIC; + rstn : IN STD_LOGIC; + in_wen : IN STD_LOGIC; + in_data : IN STD_LOGIC_VECTOR(5*16-1 DOWNTO 0); + in_full : IN STD_LOGIC; + in_empty : IN STD_LOGIC; + out_wen : OUT STD_LOGIC; + out_data : OUT STD_LOGIC_VECTOR(5*16-1 DOWNTO 0); + out_full : OUT STD_LOGIC); + END COMPONENT; END lpp_lfr_pkg; diff --git a/lib/lpp/lpp_top_lfr/vhdlsyn.txt b/lib/lpp/lpp_top_lfr/vhdlsyn.txt --- a/lib/lpp/lpp_top_lfr/vhdlsyn.txt +++ b/lib/lpp/lpp_top_lfr/vhdlsyn.txt @@ -6,4 +6,5 @@ lpp_lfr_apbreg_ms_pointer.vhd lpp_lfr_ms_fsmdma.vhd lpp_lfr_ms_FFT.vhd lpp_lfr_ms.vhd +lpp_lfr_ms_reg_head.vhd lpp_lfr.vhd