HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · lib/lpp/lpp_dma/vhdlsyn.txt

Add SDC constraint files for MINI-LFR board....

Add SDC constraint files for MINI-LFR board. To include those constraints, you must into design's makefile the : SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_synthesis.sdc SDC=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_place_and_route.sdc During the Libero flow, you must choice the MINI_LFR_synthesis.sdc file for the synthesis step, and the MINI_LFR_place_and_route.sdc file for the place and route step.

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pellion Synthesis File Updated	r229	lpp_dma_pkg.vhd
jeandet Added ICI4 designs....	r129	fifo_latency_correction.vhd
pellion Synthesis File Updated	r229	lpp_dma.vhd
jeandet Added ICI4 designs....	r129	lpp_dma_ip.vhd
		lpp_dma_send_16word.vhd
pellion@stage-ps1.lab-lpp.local LPP DMA v1.0.0	r101	lpp_dma_send_1word.vhd
pellion sauvegarde modif waveform picker	r230	lpp_dma_singleOrBurst.vhd

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