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1 #ifndef TM_BYTE_POSITIONS_H
2 #define TM_BYTE_POSITIONS_H
3
4 // SEQUENCE_CNT
5 #define PACKET_POS_SEQUENCE_CNT 6 // 4 + 2
6
7 // TC_LFR_LOAD_COMMON_PAR
8
9 // TC_LFR_LOAD_NORMAL_PAR
10 #define DATAFIELD_POS_SY_LFR_N_SWF_L 0
11 #define DATAFIELD_POS_SY_LFR_N_SWF_P 2
12 #define DATAFIELD_POS_SY_LFR_N_ASM_P 4
13 #define DATAFIELD_POS_SY_LFR_N_BP_P0 6
14 #define DATAFIELD_POS_SY_LFR_N_BP_P1 7
15 #define DATAFIELD_POS_SY_LFR_N_CWF_LONG_F3 8
16
17 // TC_LFR_LOAD_BURST_PAR
18 #define DATAFIELD_POS_SY_LFR_B_BP_P0 0
19 #define DATAFIELD_POS_SY_LFR_B_BP_P1 1
20
21 // TC_LFR_LOAD_SBM1_PAR
22 #define DATAFIELD_POS_SY_LFR_S1_BP_P0 0
23 #define DATAFIELD_POS_SY_LFR_S1_BP_P1 1
24
25 // TC_LFR_LOAD_SBM2_PAR
26 #define DATAFIELD_POS_SY_LFR_S2_BP_P0 0
27 #define DATAFIELD_POS_SY_LFR_S2_BP_P1 1
28
29 // TC_LFR_UPDATE_INFO
30 #define BYTE_POS_UPDATE_INFO_PARAMETERS_SET5 34
31 #define BYTE_POS_UPDATE_INFO_PARAMETERS_SET6 35
32
33 // TC_LFR_ENTER_MODE
34 #define BYTE_POS_CP_MODE_LFR_SET 11
35 #define BYTE_POS_CP_LFR_ENTER_MODE_TIME 12
36
37 #endif // TM_BYTE_POSITIONS_H
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1 #ifndef FSW_PARAMS_PROCESSING_H
2 #define FSW_PARAMS_PROCESSING_H
3
4 #define NB_BINS_PER_SM 128
5 #define NB_VALUES_PER_SM 25
6 #define TOTAL_SIZE_SM 3200 // 25 * 128 = 0xC80
7 #define TOTAL_SIZE_NORM_BP1_F0 99 // 11 * 9 = 99
8 #define TOTAL_SIZE_NORM_BP1_F1 117 // 13 * 9 = 117
9 #define TOTAL_SIZE_NORM_BP1_F2 108 // 12 * 9 = 108
10 #define TOTAL_SIZE_SBM1_BP1_F0 198 // 22 * 9 = 198
11 //
12 #define NB_RING_NODES_SM_F0 12 // AT LEAST 8 due to the way the averaging is done
13 #define NB_RING_NODES_ASM_BURST_SBM_F0 10 // AT LEAST 3
14 #define NB_RING_NODES_ASM_NORM_F0 10 // AT LEAST 3
15 #define NB_RING_NODES_ASM_F0 3 // AT LEAST 3
16 #define NB_RING_NODES_SM_F1 12 // AT LEAST 8 due to the way the averaging is done
17 #define NB_RING_NODES_ASM_BURST_SBM_F1 5 // AT LEAST 3
18 #define NB_RING_NODES_ASM_NORM_F1 5 // AT LEAST 3
19 #define NB_RING_NODES_ASM_F1 3 // AT LEAST 3
20 #define NB_RING_NODES_SM_F2 3 // AT LEAST 3
21 #define NB_RING_NODES_ASM_BURST_SBM_F2 3 // AT LEAST 3
22 #define NB_RING_NODES_ASM_NORM_F2 3 // AT LEAST 3
23 #define NB_RING_NODES_ASM_F2 3 // AT LEAST 3
24 //
25 #define NB_BINS_PER_ASM_F0 88
26 #define NB_BINS_PER_PKT_ASM_F0 44
27 #define TOTAL_SIZE_ASM_F0_IN_BYTES 4400 // 25 * 88 * 2
28 #define ASM_F0_INDICE_START 17 // 88 bins
29 #define ASM_F0_INDICE_STOP 104 // 2 packets of 44 bins
30 //
31 #define NB_BINS_PER_ASM_F1 104
32 #define NB_BINS_PER_PKT_ASM_F1 52
33 #define TOTAL_SIZE_ASM_F1_IN_BYTES 5200 // 25 * 104 * 2
34 #define ASM_F1_INDICE_START 6 // 104 bins
35 #define ASM_F1_INDICE_STOP 109 // 2 packets of 52 bins
36 //
37 #define NB_BINS_PER_ASM_F2 96
38 #define NB_BINS_PER_PKT_ASM_F2 48
39 #define TOTAL_SIZE_ASM_F2_IN_BYTES 4800 // 25 * 96 * 2
40 #define ASM_F2_INDICE_START 7 // 96 bins
41 #define ASM_F2_INDICE_STOP 102 // 2 packets of 48 bins
42 //
43 #define NB_BINS_COMPRESSED_SM_F0 11
44 #define NB_BINS_COMPRESSED_SM_F1 13
45 #define NB_BINS_COMPRESSED_SM_F2 12
46 #define NB_BINS_COMPRESSED_SM_SBM_F0 22
47 #define NB_BINS_COMPRESSED_SM_SBM_F1 26
48 #define NB_BINS_COMPRESSED_SM_SBM_F2 24
49 //
50 #define NB_BYTES_PER_BP1 9
51 //
52 #define NB_BINS_TO_AVERAGE_ASM_F0 8
53 #define NB_BINS_TO_AVERAGE_ASM_F1 8
54 #define NB_BINS_TO_AVERAGE_ASM_F2 8
55 #define NB_BINS_TO_AVERAGE_ASM_SBM_F0 4
56 #define NB_BINS_TO_AVERAGE_ASM_SBM_F1 4
57 #define NB_BINS_TO_AVERAGE_ASM_SBM_F2 4
58 //
59 #define TOTAL_SIZE_COMPRESSED_ASM_NORM_F0 275 // 11 * 25 WORDS
60 #define TOTAL_SIZE_COMPRESSED_ASM_NORM_F1 325 // 13 * 25 WORDS
61 #define TOTAL_SIZE_COMPRESSED_ASM_NORM_F2 300 // 12 * 25 WORDS
62 #define TOTAL_SIZE_COMPRESSED_ASM_SBM_F0 550 // 22 * 25 WORDS
63 #define TOTAL_SIZE_COMPRESSED_ASM_SBM_F1 650 // 26 * 25 WORDS
64 #define TOTAL_SIZE_COMPRESSED_ASM_SBM_F2 600 // 24 * 25 WORDS
65 #define TOTAL_SIZE_BP1_NORM_F0 99 // 9 * 11 UNSIGNED CHAR
66 #define TOTAL_SIZE_BP1_SBM_F0 198 // 9 * 22 UNSIGNED CHAR
67 // GENERAL
68 #define NB_SM_BEFORE_AVF0 8 // must be 8 due to the SM_average() function
69 #define NB_SM_BEFORE_AVF1 8 // must be 8 due to the SM_average() function
70 #define NB_SM_BEFORE_AVF2 1 // must be 1 due to the SM_average_f2() function
71
72 #endif // FSW_PARAMS_PROCESSING_H
73
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1 #ifndef TM_BYTE_POSITIONS_H
2 #define TM_BYTE_POSITIONS_H
3
4 #define BYTE_POS_CP_LFR_MODE 11
5
6 // TC_LFR_LOAD_COMMON_PAR
7
8 // TC_LFR_LOAD_NORMAL_PAR
9 #define BYTE_POS_SY_LFR_N_SWF_L 0
10 #define BYTE_POS_SY_LFR_N_SWF_P 2
11 #define BYTE_POS_SY_LFR_N_ASM_P 4
12 #define BYTE_POS_SY_LFR_N_BP_P0 6
13 #define BYTE_POS_SY_LFR_N_BP_P1 7
14 #define BYTE_POS_SY_LFR_N_CWF_LONG_F3 8
15
16 // TC_LFR_LOAD_BURST_PAR
17
18 // TC_LFR_LOAD_SBM1_PAR
19
20 // TC_LFR_LOAD_SBM2_PAR
21
22
23 #endif // TM_BYTE_POSITIONS_H
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1 1 #ifndef FSW_PARAMS_H_INCLUDED
2 2 #define FSW_PARAMS_H_INCLUDED
3 3
4 #include "grlib_regs.h"
5 4 #include "fsw_params_processing.h"
6 5 #include "fsw_params_nb_bytes.h"
7 6 #include "tm_byte_positions.h"
8 7 #include "ccsds_types.h"
9 8
10 9 #define GRSPW_DEVICE_NAME "/dev/grspw0"
11 10 #define UART_DEVICE_NAME "/dev/console"
12 11
13 12 typedef struct ring_node
14 13 {
15 14 struct ring_node *previous;
16 15 struct ring_node *next;
17 16 unsigned int sid;
18 17 unsigned int coarseTime;
19 18 unsigned int fineTime;
20 19 int buffer_address;
21 20 unsigned int status;
22 21 } ring_node;
23 22
24 23 //************************
25 24 // flight software version
26 25 // this parameters is handled by the Qt project options
27 26
28 27 #define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk
29 28 #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
30 29 #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
31 30 #define TIME_OFFSET 2
32 31 #define TIME_OFFSET_IN_BYTES 8
33 32 //#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
34 33 #define NB_BYTES_SWF_BLK (2 * 6)
35 34 #define NB_WORDS_SWF_BLK 3
36 35 #define NB_BYTES_CWF3_LIGHT_BLK 6
37 36 //#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
38 37 #define NB_RING_NODES_F0 3 // AT LEAST 3
39 38 #define NB_RING_NODES_F1 5 // AT LEAST 3
40 39 #define NB_RING_NODES_F2 5 // AT LEAST 3
41 40 #define NB_RING_NODES_F3 3 // AT LEAST 3
42 41
43 42 //**********
44 43 // LFR MODES
45 44 #define LFR_MODE_STANDBY 0
46 45 #define LFR_MODE_NORMAL 1
47 46 #define LFR_MODE_BURST 2
48 47 #define LFR_MODE_SBM1 3
49 48 #define LFR_MODE_SBM2 4
50 49
51 50 #define TDS_MODE_LFM 5
52 51 #define TDS_MODE_STANDBY 0
53 52 #define TDS_MODE_NORMAL 1
54 53 #define TDS_MODE_BURST 2
55 54 #define TDS_MODE_SBM1 3
56 55 #define TDS_MODE_SBM2 4
57 56
58 57 #define THR_MODE_STANDBY 0
59 58 #define THR_MODE_NORMAL 1
60 59 #define THR_MODE_BURST 2
61 60
62 61 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
63 62 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
64 63 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
65 64 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
66 65 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
67 66 #define RTEMS_EVENT_MODE_SBM2_WFRM RTEMS_EVENT_5
68 67 #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
69 68 #define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7
70 69 #define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode
71 70 #define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9
72 71 #define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10
73 72 #define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode
74 73 #define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12
75 74 #define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13
76 75 #define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode
77 76 #define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15
78 77 #define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16
79 78 #define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17
80 79 #define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18
81 80 #define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19
82 81 #define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20
83 82 #define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21
84 83 #define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22
85 84
86 85 //****************************
87 86 // LFR DEFAULT MODE PARAMETERS
88 87 // COMMON
89 88 #define DEFAULT_SY_LFR_COMMON0 0x00
90 89 #define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
91 90 // NORM
92 91 #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
93 92 #define DFLT_SY_LFR_N_SWF_P 300 // sec
94 93 #define DFLT_SY_LFR_N_ASM_P 3600 // sec
95 94 #define DFLT_SY_LFR_N_BP_P0 4 // sec
96 95 #define DFLT_SY_LFR_N_BP_P1 20 // sec
97 96 #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
98 97 #define MIN_DELTA_SNAPSHOT 16 // sec
99 98 // BURST
100 99 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
101 100 #define DEFAULT_SY_LFR_B_BP_P1 5 // sec
102 101 // SBM1
103 102 #define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
104 103 #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
105 104 // SBM2
106 105 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
107 106 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
108 107 // ADDITIONAL PARAMETERS
109 108 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
110 109 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
111 110 // STATUS WORD
112 111 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
113 112 #define DEFAULT_STATUS_WORD_BYTE1 0x00
114 113 //
115 114 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
116 115 #define SY_LFR_DPU_CONNECT_ATTEMPT 3
117 116 //****************************
118 117
119 118 //*****************************
120 119 // APB REGISTERS BASE ADDRESSES
121 120 #define REGS_ADDR_APBUART 0x80000100
122 121 #define REGS_ADDR_GPTIMER 0x80000300
123 122 #define REGS_ADDR_GRSPW 0x80000500
124 123 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
125 124 #define REGS_ADDR_GRGPIO 0x80000b00
126 125
127 126 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
128 127 //#define REGS_ADDR_WAVEFORM_PICKER 0x80000f50
129 128 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
130 129 #define REGS_ADDR_VHDL_VERSION 0x80000ff0
131 130
132 131 #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
133 132 #define APBUART_CTRL_REG_MASK_TE 0x00000002
134 133 // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
135 134 #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400
136 135
137 136 //**********
138 137 // IRQ LINES
139 138 #define IRQ_SM_SIMULATOR 9
140 139 #define IRQ_SPARC_SM_SIMULATOR 0x19 // see sparcv8.pdf p.76 for interrupt levels
141 140 #define IRQ_WAVEFORM_PICKER 14
142 141 #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
143 142 #define IRQ_SPECTRAL_MATRIX 6
144 143 #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
145 144
146 145 //*****
147 146 // TIME
148 147 #define CLKDIV_SM_SIMULATOR (10416 - 1) // 10 ms => nominal is 1/96 = 0.010416667, 10417 - 1 = 10416
149 148 #define TIMER_SM_SIMULATOR 1
150 149 #define HK_PERIOD 100 // 100 * 10ms => 1s
151 150 #define SY_LFR_TIME_SYN_TIMEOUT_in_ms 2000
152 151 #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s
153 152
154 153 //**********
155 154 // LPP CODES
156 155 #define LFR_SUCCESSFUL 0
157 156 #define LFR_DEFAULT 1
158 157 #define LFR_EXE_ERROR 2
159 158
160 159 //******
161 160 // RTEMS
162 161 #define TASKID_RECV 1
163 162 #define TASKID_ACTN 2
164 163 #define TASKID_SPIQ 3
165 164 #define TASKID_STAT 4
166 165 #define TASKID_AVF0 5
167 166 #define TASKID_SWBD 6
168 167 #define TASKID_WFRM 7
169 168 #define TASKID_DUMB 8
170 169 #define TASKID_HOUS 9
171 170 #define TASKID_PRC0 10
172 171 #define TASKID_CWF3 11
173 172 #define TASKID_CWF2 12
174 173 #define TASKID_CWF1 13
175 174 #define TASKID_SEND 14
176 175 #define TASKID_WTDG 15
177 176 #define TASKID_AVF1 16
178 177 #define TASKID_PRC1 17
179 178 #define TASKID_AVF2 18
180 179 #define TASKID_PRC2 19
181 180
182 181 #define TASK_PRIORITY_SPIQ 5
183 182 #define TASK_PRIORITY_WTDG 20
184 183 #define TASK_PRIORITY_HOUS 30
185 184 #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
186 185 #define TASK_PRIORITY_CWF2 35 //
187 186 #define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
188 187 #define TASK_PRIORITY_WFRM 40
189 188 #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
190 189 #define TASK_PRIORITY_SEND 45
191 190 #define TASK_PRIORITY_RECV 50
192 191 #define TASK_PRIORITY_ACTN 50
193 192 #define TASK_PRIORITY_AVF0 60
194 193 #define TASK_PRIORITY_AVF1 70
195 194 #define TASK_PRIORITY_PRC0 100
196 195 #define TASK_PRIORITY_PRC1 100
197 196 #define TASK_PRIORITY_AVF2 110
198 197 #define TASK_PRIORITY_PRC2 110
199 198 #define TASK_PRIORITY_STAT 200
200 199 #define TASK_PRIORITY_DUMB 200
201 200
202 201 #define MSG_QUEUE_COUNT_RECV 10
203 202 #define MSG_QUEUE_COUNT_SEND 50
204 203 #define MSG_QUEUE_COUNT_PRC0 10
205 204 #define MSG_QUEUE_COUNT_PRC1 10
206 205 #define MSG_QUEUE_COUNT_PRC2 5
207 206 #define MSG_QUEUE_SIZE_SEND 810 // 806 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
208 207 #define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
209 208 #define MSG_QUEUE_SIZE_PRC0 20 // two pointers and one rtems_event + 2 integers
210 209 #define MSG_QUEUE_SIZE_PRC1 20 // two pointers and one rtems_event + 2 integers
211 210 #define MSG_QUEUE_SIZE_PRC2 20 // two pointers and one rtems_event + 2 integers
212 211
213 212 #define QUEUE_RECV 0
214 213 #define QUEUE_SEND 1
215 214 #define QUEUE_PRC0 2
216 215 #define QUEUE_PRC1 3
217 216 #define QUEUE_PRC2 4
218 217
219 218 //*******
220 219 // MACROS
221 220 #ifdef PRINT_MESSAGES_ON_CONSOLE
222 221 #define PRINTF(x) printf(x);
223 222 #define PRINTF1(x,y) printf(x,y);
224 223 #define PRINTF2(x,y,z) printf(x,y,z);
225 224 #else
226 225 #define PRINTF(x) ;
227 226 #define PRINTF1(x,y) ;
228 227 #define PRINTF2(x,y,z) ;
229 228 #endif
230 229
231 230 #ifdef BOOT_MESSAGES
232 231 #define BOOT_PRINTF(x) printf(x);
233 232 #define BOOT_PRINTF1(x,y) printf(x,y);
234 233 #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
235 234 #else
236 235 #define BOOT_PRINTF(x) ;
237 236 #define BOOT_PRINTF1(x,y) ;
238 237 #define BOOT_PRINTF2(x,y,z) ;
239 238 #endif
240 239
241 240 #ifdef DEBUG_MESSAGES
242 241 #define DEBUG_PRINTF(x) printf(x);
243 242 #define DEBUG_PRINTF1(x,y) printf(x,y);
244 243 #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
245 244 #else
246 245 #define DEBUG_PRINTF(x) ;
247 246 #define DEBUG_PRINTF1(x,y) ;
248 247 #define DEBUG_PRINTF2(x,y,z) ;
249 248 #endif
250 249
251 250 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
252 251
253 252 struct param_local_str{
254 253 unsigned int local_sbm1_nb_cwf_sent;
255 254 unsigned int local_sbm1_nb_cwf_max;
256 255 unsigned int local_sbm2_nb_cwf_sent;
257 256 unsigned int local_sbm2_nb_cwf_max;
258 257 };
259 258
260 259 #endif // FSW_PARAMS_H_INCLUDED
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