HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/lfr_common_headers Commit - r71:321ffad81ce6

Removed few unused macros

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r71:321ffad81ce6

ccsds_types.h 0 -1

             #define APID_TM_SCIENCE_NORMAL_BURST    0x0ccc // PID 76 CAT 12
             #define APID_TM_SCIENCE_SBM1_SBM2       0x0cfc // PID 79 CAT 12
             #define APID_TM_PARAMETER_DUMP          0x0cc6 // PID 76 CAT 6
-            #define APID_TM_KCOEFFICIENTS_DUMP      0x0cc6 // PID 76 CAT 6
             // PACKET CAT
             #define TM_PACKET_CAT_TC_EXE    1

fsw_params.h 0 -4

             #define NB_SAMPLES_PER_SNAPSHOT 2688    // 336 * 8 = 672 * 4 = 2688
             #define TIME_OFFSET 2
             #define TIME_OFFSET_IN_BYTES 8
-            //#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
             #define NB_BYTES_SWF_BLK (2 * 6)
             #define NB_WORDS_SWF_BLK 3
             #define NB_BYTES_CWF3_LIGHT_BLK 6
-            //#define WFRM_INDEX_OF_LAST_PACKET 6  // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
             #define NB_RING_NODES_F0 3      // AT LEAST 3
             #define NB_RING_NODES_F1 5      // AT LEAST 3
             #define NB_RING_NODES_F2 5      // AT LEAST 3
             #define APB_OFFSET_VHDL_REV         0xb0
             #define REGS_ADDR_VHDL_VERSION      0x80000ff0
-            #define APBUART_CTRL_REG_MASK_DB    0xfffff7ff
             #define APBUART_CTRL_REG_MASK_TE    0x00000002
             // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
             #define APBUART_SCALER_RELOAD_VALUE 0x00000050      // 25 MHz => about 38400
             #define MSG_QUEUE_COUNT_PRC1  10
             #define MSG_QUEUE_COUNT_PRC2  5
             #define MSG_QUEUE_SIZE_SEND             812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
-            #define ACTION_MSG_SPW_IOCTL_SEND_SIZE  24  // hlen *hdr dlen *data sent options
             #define MSG_QUEUE_SIZE_PRC0             36  // two pointers, one rtems_event + 6 integers
             #define MSG_QUEUE_SIZE_PRC1             36  // two pointers, one rtems_event + 6 integers
             #define MSG_QUEUE_SIZE_PRC2             36  // two pointers, one rtems_event + 6 integers

fsw_params_processing.h 0 -3

             #define DLEN_ASM_F0_PKT_1           3200    // 32 * 25 * 4, 25 components per matrix, 4 bytes per float
             #define DLEN_ASM_F0_PKT_2           2400    // 24 * 25 * 4, 25 components per matrix, 4 bytes per float
             #define ASM_F0_INDICE_START         16      // 17  - 1, (-1) due to the VHDL behaviour
-            #define ASM_F0_INDICE_STOP          103     // 104 - 1, 2 packets of 44 bins
             //
             #define NB_BINS_PER_ASM_F1          104
             #define NB_BINS_PER_PKT_ASM_F1_1    36
             #define DLEN_ASM_F1_PKT_1           3600    // 36 * 25 * 4, 25 components per matrix, 4 bytes per float
             #define DLEN_ASM_F1_PKT_2           3200    // 32 * 25 * 4, 25 components per matrix, 4 bytes per float
             #define ASM_F1_INDICE_START         5       //   6 - 1, (-1) due to the VHDL behaviour
-            #define ASM_F1_INDICE_STOP          108     // 109 - 1, 2 packets of 52 bins
             //
             #define NB_BINS_PER_ASM_F2          96
             #define NB_BINS_PER_PKT_ASM_F2      32
             #define DLEN_ASM_F2_PKT             3200    // 32 * 25 * 4, 25 components per matrix, 4 bytes per float
             #define ASM_F2_INDICE_START         6       //   7 - 1, (-1) due to the VHDL behaviour
-            #define ASM_F2_INDICE_STOP          101     // 102 - 1, 2 packets of 48 bins
             //
             #define KCOEFF_BLK_SIZE                 130
             #define KCOEFF_FREQ                     2

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