##// END OF EJS Templates
Removed most unused macros...
jeandet -
r72:0adeb6c86feb Next draft
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@@ -18,15 +18,11
18 18 #define CCSDS_PROTOCOLE_EXTRA_BYTES 4
19 19 #define CCSDS_TC_TM_PACKET_OFFSET 7
20 20 #define PROTID_RES_APP 3
21 #define CCSDS_TELEMETRY_HEADER_LENGTH (16+4)
22 21 #define CCSDS_TC_HEADER_LENGTH 10
23 #define CCSDS_TM_PKT_MAX_SIZE 4412
24 #define CCSDS_TELECOMMAND_HEADER_LENGTH (10+4)
25 22 #define CCSDS_TC_PKT_MAX_SIZE 232 // (228+3) with 3 for Prot ID, Reserved and User App bytes, SHALL BE A MULTIPLE OF 4
26 23 #define CCSDS_TC_PKT_MIN_SIZE 16
27 24 #define CCSDS_PROCESS_ID 76
28 25 #define CCSDS_PACKET_CATEGORY 12
29 #define CCSDS_NODE_ADDRESS 0xfe
30 26 #define CCSDS_USER_APP 0x00
31 27
32 28 #define DEFAULT_SPARE1_PUSVERSION_SPARE2 0x10
@@ -34,24 +30,13
34 30 #define DEFAULT_HKBIA 0x1e // 0001 1110
35 31
36 32 // PACKET ID
37 #define TM_PACKET_PID_DEFAULT 76
38 #define TM_PACKET_PID_BURST_SBM1_SBM2 79
39 33 #define APID_TM_TC_EXE 0x0cc1 // PID 76 CAT 1
40 34 #define APID_TM_HK 0x0cc4 // PID 76 CAT 4
41 35 #define APID_TM_SCIENCE_NORMAL_BURST 0x0ccc // PID 76 CAT 12
42 36 #define APID_TM_SCIENCE_SBM1_SBM2 0x0cfc // PID 79 CAT 12
43 37 #define APID_TM_PARAMETER_DUMP 0x0cc6 // PID 76 CAT 6
44 38
45 // PACKET CAT
46 #define TM_PACKET_CAT_TC_EXE 1
47 #define TM_PACKET_CAT_HK 4
48 #define TM_PACKET_CAT_SCIENCE 12
49 #define TM_PACKET_CAT_DUMP 6
50
51 39 // PACKET SEQUENCE CONTROL
52 #define TM_PACKET_SEQ_CTRL_CONTINUATION 0x00 // [0000 0000]
53 #define TM_PACKET_SEQ_CTRL_FIRST 0x40 // [0100 0000]
54 #define TM_PACKET_SEQ_CTRL_LAST 0x80 // [1000 0000]
55 40 #define TM_PACKET_SEQ_CTRL_STANDALONE 0xc0 // [1100 0000]
56 41 #define TM_PACKET_SEQ_CNT_DEFAULT 0x00 // [0000 0000]
57 42 #define TM_PACKET_SEQ_SHIFT 8
@@ -61,16 +46,6
61 46
62 47 // DESTINATION ID
63 48 #define TM_DESTINATION_ID_GROUND 0
64 #define TM_DESTINATION_ID_MISSION_TIMELINE 110
65 #define TM_DESTINATION_ID_TC_SEQUENCES 111
66 #define TM_DESTINATION_ID_RECOVERY_ACTION_COMMAND 112
67 #define TM_DESTINATION_ID_BACKUP_MISSION_TIMELINE 113
68 #define TM_DESTINATION_ID_DIRECT_CMD 120
69 #define TM_DESTINATION_ID_SPARE_GRD_SRC1 121
70 #define TM_DESTINATION_ID_SPARE_GRD_SRC2 122
71 #define TM_DESTINATION_ID_OBCP 15
72 #define TM_DESTINATION_ID_SYSTEM_CONTROL 14
73 #define TM_DESTINATION_ID_AOCS 11
74 49
75 50 //*********************************************************
76 51 //*** /!\ change CCSDS_DESTINATION_ID before flight /!\ ***
@@ -84,10 +59,6
84 59 #define CCSDS_RESERVED 0x00
85 60 #define CCSDS_USER_APP 0x00
86 61
87 #define SIZE_TM_LFR_TC_EXE_NOT_IMPLEMENTED 24
88 #define SIZE_TM_LFR_TC_EXE_CORRUPTED 32
89 #define SIZE_HK_PARAMETERS 112
90
91 62 // TC TYPES
92 63 #define TC_TYPE_GEN 181
93 64 #define TC_TYPE_TIME 9
@@ -158,7 +129,6
158 129 #define WRONG_SRC_ID 42001 // 0xa4 0x11
159 130 #define FUNCT_NOT_IMPL 42002 // 0xa4 0x12
160 131 #define FAIL_DETECTED 42003 // 0xa4 0x13
161 #define NOT_ALLOWED 42004 // 0xa4 0x14
162 132 #define CORRUPTED 42005 // 0xa4 0x15
163 133 #define CCSDS_TM_VALID 7
164 134
@@ -250,7 +220,6 enum apid_destid{
250 220 #define SID_K_DUMP 11
251 221
252 222 // HEADER_LENGTH
253 //#define TM_HEADER_LEN 16
254 223 #define HEADER_LENGTH_TM_LFR_SCIENCE_CWF 32
255 224 #define HEADER_LENGTH_TM_LFR_SCIENCE_SWF 34
256 225 #define HEADER_LENGTH_TM_LFR_SCIENCE_ASM 34
@@ -263,7 +232,6 enum apid_destid{
263 232 #define PACKET_LENGTH_TC_EXE_CORRUPTED (32 - CCSDS_TC_TM_PACKET_OFFSET)
264 233 #define PACKET_LENGTH_HK (136 - CCSDS_TC_TM_PACKET_OFFSET)
265 234 #define PACKET_LENGTH_PARAMETER_DUMP (212 - CCSDS_TC_TM_PACKET_OFFSET)
266 #define PACKET_LENGTH_K_DUMP (3920 - CCSDS_TC_TM_PACKET_OFFSET)
267 235 // SCIENCE ASM
268 236 #define PACKET_LENGTH_TM_LFR_SCIENCE_ASM_F0_1 (3230 - CCSDS_TC_TM_PACKET_OFFSET) // 32 * 25 * 4 + 30 => 32 bins (32 + 32 + 24 ), 3 packets
269 237 #define PACKET_LENGTH_TM_LFR_SCIENCE_ASM_F0_2 (2430 - CCSDS_TC_TM_PACKET_OFFSET) // 24 * 25 * 4 + 30 => 24 bins (32 + 32 + 24 ), 3 packets
@@ -635,9 +603,7 typedef struct {
635 603 #define STATUS_WORD_LINK_STATE_BITS 0x07 // [0000 0111]
636 604 #define STATUS_WORD_LINK_STATE_MASK 0xf8 // [1111 1000]
637 605 #define STATUS_WORD_LFR_MODE_SHIFT 4
638 #define STATUS_WORD_LFR_MODE_BITS 0xf0 // [1111 0000]
639 606 #define STATUS_WORD_LFR_MODE_MASK 0x0f // [0000 1111]
640 #define STATUS_WORD_0_DEFAULT 0x0d // [0000 1101]
641 607
642 608 typedef struct {
643 609 unsigned char targetLogicalAddress;
@@ -8,7 +8,6
8 8 #include "stdint.h"
9 9
10 10 #define GRSPW_DEVICE_NAME "/dev/grspw0"
11 #define UART_DEVICE_NAME "/dev/console"
12 11
13 12 //*******
14 13 // MACROS
@@ -46,10 +45,10
46 45 #define CONST_2048 2048 // 2^11
47 46 #define CONST_512 512 // 2^9
48 47 #define CONST_256 256 // 2^8
49 #define CONST_128 128 // 2^7
50 #define UINT8_MAX 255
48 #ifndef UINT8_MAX
49 #define UINT8_MAX 255
50 #endif
51 51
52 #define FLOAT_MSBYTE 0
53 52 #define FLOAT_LSBYTE 3
54 53 #define BITS_PER_BYTE 8
55 54 #define INIT_FLOAT 0.
@@ -68,7 +67,6
68 67 #define SHIFT_3_BITS 3
69 68 #define SHIFT_4_BITS 4
70 69 #define SHIFT_5_BITS 5
71 #define SHIFT_6_BITS 6
72 70 #define SHIFT_7_BITS 7
73 71 #define BYTE_0 0
74 72 #define BYTE_1 1
@@ -110,7 +108,6 typedef struct ring_node
110 108 #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
111 109 #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
112 110 #define TIME_OFFSET 2
113 #define TIME_OFFSET_IN_BYTES 8
114 111 #define NB_BYTES_SWF_BLK (2 * 6)
115 112 #define NB_WORDS_SWF_BLK 3
116 113 #define NB_BYTES_CWF3_LIGHT_BLK 6
@@ -138,10 +135,8 typedef struct ring_node
138 135 #define THR_MODE_NORMAL 1
139 136 #define THR_MODE_BURST 2
140 137
141 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
142 138 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
143 139 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
144 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
145 140 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
146 141 #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5
147 142 #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
@@ -182,7 +177,6 typedef struct ring_node
182 177 #define DFLT_SY_LFR_N_BP_P0 4 // sec
183 178 #define DFLT_SY_LFR_N_BP_P1 20 // sec
184 179 #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
185 #define MIN_DELTA_SNAPSHOT 16 // sec
186 180
187 181 // BURST
188 182 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
@@ -197,10 +191,6 typedef struct ring_node
197 191 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
198 192 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
199 193
200 // ADDITIONAL PARAMETERS
201 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
202 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
203
204 194 // STATUS WORD
205 195 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
206 196
@@ -215,7 +205,6 typedef struct ring_node
215 205 #define MIN_PAS_FILTER_SHIFT 0.0
216 206 #define MAX_PAS_FILTER_SHIFT 1.0
217 207 #define MIN_SY_LFR_SC_RW_DELTA_F 0
218 #define MIN_SY_LFR_RW_K 0
219 208 #define MIN_SY_LFR_RW_F 0
220 209 //
221 210 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
@@ -230,7 +219,6 typedef struct ring_node
230 219 #define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04
231 220 #define APB_OFFSET_GRSPW_TIME_REGISTER 0x14
232 221 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
233 #define REGS_ADDR_GRGPIO 0x80000b00
234 222
235 223 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
236 224 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
@@ -269,7 +257,6 typedef struct ring_node
269 257 #define LFR_SUCCESSFUL 0
270 258 #define LFR_DEFAULT 1
271 259 #define LFR_EXE_ERROR 2
272 #define LFR_DEFAULT_ALT -1
273 260
274 261 //******
275 262 // RTEMS
@@ -336,9 +323,6 typedef struct ring_node
336 323 #define QUEUE_PRC0 2
337 324 #define QUEUE_PRC1 3
338 325 #define QUEUE_PRC2 4
339 #define QUEUE_CALI 5
340
341 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
342 326
343 327 struct param_local_str{
344 328 unsigned int local_sbm1_nb_cwf_sent;
@@ -71,7 +71,6
71 71 // TC_LFR_LOAD_FILTER_PAR
72 72 #define NB_RW_K_COEFFS 16
73 73 #define NB_BYTES_PER_RW_K_COEFF 4
74 #define DATAFIELD_POS_PA_RPW_SPARE8_2 0 // 8 bits
75 74 #define DATAFIELD_POS_SY_LFR_PAS_FILTER_ENABLED 1 // 8 bits
76 75 #define DATAFIELD_POS_SY_LFR_PAS_FILTER_MODULUS 2 // 8 bits
77 76 #define DATAFIELD_POS_SY_LFR_PAS_FILTER_TBAD 3 // 32 bits
@@ -8,7 +8,6
8 8
9 9 #define NB_SM_PER_S_F0 96
10 10 #define NB_SM_PER_S_F1 16
11 #define NB_SM_PER_S_F2 1
12 11 #define NB_SM_PER_S1_BP_P0 24
13 12
14 13 #define ASM_COMP_B1B2 1
@@ -31,10 +30,6
31 30 #define NB_BINS_PER_SM 128
32 31 #define NB_VALUES_PER_SM 25
33 32 #define TOTAL_SIZE_SM 3200 // 25 * 128 = 0xC80
34 #define TOTAL_SIZE_NORM_BP1_F0 99 // 11 * 9 = 99
35 #define TOTAL_SIZE_NORM_BP1_F1 117 // 13 * 9 = 117
36 #define TOTAL_SIZE_NORM_BP1_F2 108 // 12 * 9 = 108
37 #define TOTAL_SIZE_SBM1_BP1_F0 198 // 22 * 9 = 198
38 33 // F0
39 34 #define NB_RING_NODES_SM_F0 20 // AT LEAST 8 due to the way the averaging is done
40 35 #define NB_RING_NODES_ASM_BURST_SBM_F0 10 // AT LEAST 3
@@ -50,21 +45,18
50 45 #define NB_RING_NODES_ASM_NORM_F2 3 // AT LEAST 3
51 46 #define NB_RING_NODES_ASM_F2 3 // AT LEAST 3
52 47 //
53 #define NB_BINS_PER_ASM_F0 88
54 48 #define NB_BINS_PER_PKT_ASM_F0_1 32
55 49 #define NB_BINS_PER_PKT_ASM_F0_2 24
56 50 #define DLEN_ASM_F0_PKT_1 3200 // 32 * 25 * 4, 25 components per matrix, 4 bytes per float
57 51 #define DLEN_ASM_F0_PKT_2 2400 // 24 * 25 * 4, 25 components per matrix, 4 bytes per float
58 52 #define ASM_F0_INDICE_START 16 // 17 - 1, (-1) due to the VHDL behaviour
59 53 //
60 #define NB_BINS_PER_ASM_F1 104
61 54 #define NB_BINS_PER_PKT_ASM_F1_1 36
62 55 #define NB_BINS_PER_PKT_ASM_F1_2 32
63 56 #define DLEN_ASM_F1_PKT_1 3600 // 36 * 25 * 4, 25 components per matrix, 4 bytes per float
64 57 #define DLEN_ASM_F1_PKT_2 3200 // 32 * 25 * 4, 25 components per matrix, 4 bytes per float
65 58 #define ASM_F1_INDICE_START 5 // 6 - 1, (-1) due to the VHDL behaviour
66 59 //
67 #define NB_BINS_PER_ASM_F2 96
68 60 #define NB_BINS_PER_PKT_ASM_F2 32
69 61 #define DLEN_ASM_F2_PKT 3200 // 32 * 25 * 4, 25 components per matrix, 4 bytes per float
70 62 #define ASM_F2_INDICE_START 6 // 7 - 1, (-1) due to the VHDL behaviour
@@ -77,26 +69,18
77 69 #define NB_BINS_COMPRESSED_SM 36 // 11 + 12 + 13
78 70 #define NB_BINS_COMPRESSED_SM_SBM_F0 22
79 71 #define NB_BINS_COMPRESSED_SM_SBM_F1 26
80 #define NB_BINS_COMPRESSED_SM_SBM_F2 24
81 //
82 #define NB_BYTES_PER_BP1 9
83 #define NB_BYTES_PER_BP2 30
84 72 //
85 73 #define NB_BINS_TO_AVERAGE_ASM_F0 8
86 74 #define NB_BINS_TO_AVERAGE_ASM_F1 8
87 75 #define NB_BINS_TO_AVERAGE_ASM_F2 8
88 76 #define NB_BINS_TO_AVERAGE_ASM_SBM_F0 4
89 77 #define NB_BINS_TO_AVERAGE_ASM_SBM_F1 4
90 #define NB_BINS_TO_AVERAGE_ASM_SBM_F2 4
91 78 //
92 79 #define TOTAL_SIZE_COMPRESSED_ASM_NORM_F0 275 // 11 * 25 WORDS
93 80 #define TOTAL_SIZE_COMPRESSED_ASM_NORM_F1 325 // 13 * 25 WORDS
94 81 #define TOTAL_SIZE_COMPRESSED_ASM_NORM_F2 300 // 12 * 25 WORDS
95 82 #define TOTAL_SIZE_COMPRESSED_ASM_SBM_F0 550 // 22 * 25 WORDS
96 83 #define TOTAL_SIZE_COMPRESSED_ASM_SBM_F1 650 // 26 * 25 WORDS
97 #define TOTAL_SIZE_BP1_NORM_F0 99 // 9 * 11 UNSIGNED CHAR
98 #define TOTAL_SIZE_BP2_NORM_F0 330 // 30 * 11 UNSIGNED CHAR
99 #define TOTAL_SIZE_BP1_SBM_F0 198 // 9 * 22 UNSIGNED CHAR
100 84 // GENERAL
101 85 #define NB_SM_BEFORE_AVF0_F1 8 // must be 8 due to the SM_average() function
102 86 #define NB_SM_BEFORE_AVF2 1 // must be 1 due to the SM_average_f2() function
@@ -1,14 +1,7
1 1 #ifndef TM_BYTE_POSITIONS_H
2 2 #define TM_BYTE_POSITIONS_H
3 3
4 #define BYTE_POS_CP_LFR_MODE 11
5
6 4 // TC_LFR_LOAD_NORMAL_PAR
7 #define BYTE_POS_SY_LFR_N_SWF_L 0
8 #define BYTE_POS_SY_LFR_N_SWF_P 2
9 #define BYTE_POS_SY_LFR_N_ASM_P 4
10 #define BYTE_POS_SY_LFR_N_BP_P0 6
11 #define BYTE_POS_SY_LFR_N_BP_P1 7
12 5 #define BYTE_POS_SY_LFR_N_CWF_LONG_F3 8
13 6
14 7 // TM_LFR_HK
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