@@ -1,423 +1,446 | |||||
1 | #ifndef FSW_PARAMS_H_INCLUDED |
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1 | #ifndef FSW_PARAMS_H_INCLUDED | |
2 | #define FSW_PARAMS_H_INCLUDED |
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2 | #define FSW_PARAMS_H_INCLUDED | |
3 |
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3 | |||
4 | #include "fsw_params_processing.h" |
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4 | #include "fsw_params_processing.h" | |
5 | #include "fsw_params_nb_bytes.h" |
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5 | #include "fsw_params_nb_bytes.h" | |
6 | #include "tm_byte_positions.h" |
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6 | #include "tm_byte_positions.h" | |
7 | #include "ccsds_types.h" |
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7 | #include "ccsds_types.h" | |
8 | #include "stdint.h" |
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8 | #include "stdint.h" | |
9 |
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9 | |||
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10 | /* | |||
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11 | * RTEMS CONFIG | |||
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12 | * | |||
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13 | */ | |||
10 | #define GRSPW_DEVICE_NAME "/dev/grspw0" |
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14 | #define GRSPW_DEVICE_NAME "/dev/grspw0" | |
11 |
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15 | |||
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16 | #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER | |||
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17 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER | |||
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18 | ||||
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19 | #define CONFIGURE_MAXIMUM_TASKS 23 // number of tasks concurrently active including INIT | |||
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20 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE | |||
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21 | #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE) | |||
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22 | #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32 | |||
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23 | #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100 | |||
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24 | #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT) | |||
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25 | #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT) | |||
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26 | #define CONFIGURE_MAXIMUM_DRIVERS 16 | |||
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27 | #define CONFIGURE_MAXIMUM_PERIODS 6 // [hous] [load] [avgv] | |||
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28 | #define CONFIGURE_MAXIMUM_TIMERS 6 // [spiq] [link] [spacewire_reset_link] | |||
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29 | #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5 | |||
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30 | #ifdef PRINT_STACK_REPORT | |||
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31 | #define CONFIGURE_STACK_CHECKER_ENABLED | |||
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32 | #endif | |||
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33 | ||||
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34 | ||||
12 | //******* |
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35 | //******* | |
13 | // MACROS |
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36 | // MACROS | |
14 | #ifdef PRINT_MESSAGES_ON_CONSOLE |
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37 | #ifdef PRINT_MESSAGES_ON_CONSOLE | |
15 | #define PRINTF(x) printf(x); |
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38 | #define PRINTF(x) printf(x); | |
16 | #define PRINTF1(x,y) printf(x,y); |
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39 | #define PRINTF1(x,y) printf(x,y); | |
17 | #define PRINTF2(x,y,z) printf(x,y,z); |
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40 | #define PRINTF2(x,y,z) printf(x,y,z); | |
18 | #else |
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41 | #else | |
19 | #define PRINTF(x) ; |
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42 | #define PRINTF(x) ; | |
20 | #define PRINTF1(x,y) ; |
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43 | #define PRINTF1(x,y) ; | |
21 | #define PRINTF2(x,y,z) ; |
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44 | #define PRINTF2(x,y,z) ; | |
22 | #endif |
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45 | #endif | |
23 |
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46 | |||
24 | #ifdef BOOT_MESSAGES |
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47 | #ifdef BOOT_MESSAGES | |
25 | #define BOOT_PRINTF(x) printf(x); |
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48 | #define BOOT_PRINTF(x) printf(x); | |
26 | #define BOOT_PRINTF1(x,y) printf(x,y); |
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49 | #define BOOT_PRINTF1(x,y) printf(x,y); | |
27 | #define BOOT_PRINTF2(x,y,z) printf(x,y,z); |
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50 | #define BOOT_PRINTF2(x,y,z) printf(x,y,z); | |
28 | #else |
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51 | #else | |
29 | #define BOOT_PRINTF(x) ; |
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52 | #define BOOT_PRINTF(x) ; | |
30 | #define BOOT_PRINTF1(x,y) ; |
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53 | #define BOOT_PRINTF1(x,y) ; | |
31 | #define BOOT_PRINTF2(x,y,z) ; |
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54 | #define BOOT_PRINTF2(x,y,z) ; | |
32 | #endif |
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55 | #endif | |
33 |
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56 | |||
34 | #ifdef DEBUG_MESSAGES |
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57 | #ifdef DEBUG_MESSAGES | |
35 | #define DEBUG_PRINTF(x) printf(x); |
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58 | #define DEBUG_PRINTF(x) printf(x); | |
36 | #define DEBUG_PRINTF1(x,y) printf(x,y); |
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59 | #define DEBUG_PRINTF1(x,y) printf(x,y); | |
37 | #define DEBUG_PRINTF2(x,y,z) printf(x,y,z); |
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60 | #define DEBUG_PRINTF2(x,y,z) printf(x,y,z); | |
38 | #else |
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61 | #else | |
39 | #define DEBUG_PRINTF(x) ; |
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62 | #define DEBUG_PRINTF(x) ; | |
40 | #define DEBUG_PRINTF1(x,y) ; |
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63 | #define DEBUG_PRINTF1(x,y) ; | |
41 | #define DEBUG_PRINTF2(x,y,z) ; |
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64 | #define DEBUG_PRINTF2(x,y,z) ; | |
42 | #endif |
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65 | #endif | |
43 |
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66 | |||
44 | #define CONST_65536 65536 // 2^16 |
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67 | #define CONST_65536 65536 // 2^16 | |
45 | #define CONST_2048 2048 // 2^11 |
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68 | #define CONST_2048 2048 // 2^11 | |
46 | #define CONST_512 512 // 2^9 |
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69 | #define CONST_512 512 // 2^9 | |
47 | #define CONST_256 256 // 2^8 |
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70 | #define CONST_256 256 // 2^8 | |
48 | #ifndef UINT8_MAX |
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71 | #ifndef UINT8_MAX | |
49 | #define UINT8_MAX 255 |
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72 | #define UINT8_MAX 255 | |
50 | #endif |
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73 | #endif | |
51 |
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74 | |||
52 | #define FLOAT_LSBYTE 3 |
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75 | #define FLOAT_LSBYTE 3 | |
53 | #define BITS_PER_BYTE 8 |
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76 | #define BITS_PER_BYTE 8 | |
54 | #define INIT_FLOAT 0. |
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77 | #define INIT_FLOAT 0. | |
55 | #define INIT_CHAR 0x00 |
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78 | #define INIT_CHAR 0x00 | |
56 | #define INIT_INT 0 |
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79 | #define INIT_INT 0 | |
57 | #define INT8_ALL_F 0xff |
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80 | #define INT8_ALL_F 0xff | |
58 | #define INT16_ALL_F 0xffff |
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81 | #define INT16_ALL_F 0xffff | |
59 | #define INT32_ALL_F 0xffffffff |
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82 | #define INT32_ALL_F 0xffffffff | |
60 | #define INT32_ALL_0 0x00000000 |
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83 | #define INT32_ALL_0 0x00000000 | |
61 | #define SHIFT_1_BYTE 8 |
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84 | #define SHIFT_1_BYTE 8 | |
62 | #define SHIFT_2_BYTES 16 |
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85 | #define SHIFT_2_BYTES 16 | |
63 | #define SHIFT_3_BYTES 24 |
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86 | #define SHIFT_3_BYTES 24 | |
64 | #define SHIFT_4_BYTES 32 |
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87 | #define SHIFT_4_BYTES 32 | |
65 | #define SHIFT_5_BYTES 40 |
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88 | #define SHIFT_5_BYTES 40 | |
66 | #define SHIFT_2_BITS 2 |
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89 | #define SHIFT_2_BITS 2 | |
67 | #define SHIFT_3_BITS 3 |
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90 | #define SHIFT_3_BITS 3 | |
68 | #define SHIFT_4_BITS 4 |
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91 | #define SHIFT_4_BITS 4 | |
69 | #define SHIFT_5_BITS 5 |
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92 | #define SHIFT_5_BITS 5 | |
70 | #define SHIFT_7_BITS 7 |
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93 | #define SHIFT_7_BITS 7 | |
71 | #define BYTE_0 0 |
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94 | #define BYTE_0 0 | |
72 | #define BYTE_1 1 |
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95 | #define BYTE_1 1 | |
73 | #define BYTE_2 2 |
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96 | #define BYTE_2 2 | |
74 | #define BYTE_3 3 |
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97 | #define BYTE_3 3 | |
75 | #define BYTE_4 4 |
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98 | #define BYTE_4 4 | |
76 | #define BYTE_5 5 |
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99 | #define BYTE_5 5 | |
77 | #define BYTE_6 6 |
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100 | #define BYTE_6 6 | |
78 | #define BYTE_7 7 |
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101 | #define BYTE_7 7 | |
79 | #define BYTE0_MASK 0xff00 |
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102 | #define BYTE0_MASK 0xff00 | |
80 | #define BYTE1_MASK 0x00ff |
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103 | #define BYTE1_MASK 0x00ff | |
81 |
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104 | |||
82 | enum lfr_transition_type_t{ |
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105 | enum lfr_transition_type_t{ | |
83 | TRANSITION_NOT_SPECIFIC, |
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106 | TRANSITION_NOT_SPECIFIC, | |
84 | TRANSITION_NORM_TO_S1, |
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107 | TRANSITION_NORM_TO_S1, | |
85 | TRANSITION_NORM_TO_S2, |
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108 | TRANSITION_NORM_TO_S2, | |
86 | TRANSITION_S1_TO_NORM, |
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109 | TRANSITION_S1_TO_NORM, | |
87 | TRANSITION_S2_TO_NORM, |
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110 | TRANSITION_S2_TO_NORM, | |
88 | TRANSITION_S1_TO_S2, |
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111 | TRANSITION_S1_TO_S2, | |
89 | TRANSITION_S2_TO_S1 |
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112 | TRANSITION_S2_TO_S1 | |
90 | }; |
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113 | }; | |
91 |
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114 | |||
92 | typedef struct ring_node |
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115 | typedef struct ring_node | |
93 | { |
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116 | { | |
94 | struct ring_node *previous; |
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117 | struct ring_node *previous; | |
95 | struct ring_node *next; |
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118 | struct ring_node *next; | |
96 | unsigned int sid; |
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119 | unsigned int sid; | |
97 | unsigned int coarseTime; |
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120 | unsigned int coarseTime; | |
98 | unsigned int fineTime; |
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121 | unsigned int fineTime; | |
99 | int buffer_address; |
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122 | int buffer_address; | |
100 | unsigned int status; |
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123 | unsigned int status; | |
101 | } ring_node; |
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124 | } ring_node; | |
102 |
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125 | |||
103 | //************************ |
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126 | //************************ | |
104 | // flight software version |
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127 | // flight software version | |
105 | // this parameters is handled by the Qt project options |
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128 | // this parameters is handled by the Qt project options | |
106 |
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129 | |||
107 | #define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk |
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130 | #define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk | |
108 | #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk |
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131 | #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk | |
109 | #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688 |
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132 | #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688 | |
110 | #define TIME_OFFSET 2 |
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133 | #define TIME_OFFSET 2 | |
111 | #define NB_BYTES_SWF_BLK (2 * 6) |
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134 | #define NB_BYTES_SWF_BLK (2 * 6) | |
112 | #define NB_WORDS_SWF_BLK 3 |
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135 | #define NB_WORDS_SWF_BLK 3 | |
113 | #define NB_BYTES_CWF3_LIGHT_BLK 6 |
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136 | #define NB_BYTES_CWF3_LIGHT_BLK 6 | |
114 | #define NB_RING_NODES_F0 3 // AT LEAST 3 |
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137 | #define NB_RING_NODES_F0 3 // AT LEAST 3 | |
115 | #define NB_RING_NODES_F1 5 // AT LEAST 3 |
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138 | #define NB_RING_NODES_F1 5 // AT LEAST 3 | |
116 | #define NB_RING_NODES_F2 5 // AT LEAST 3 |
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139 | #define NB_RING_NODES_F2 5 // AT LEAST 3 | |
117 | #define NB_RING_NODES_F3 3 // AT LEAST 3 |
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140 | #define NB_RING_NODES_F3 3 // AT LEAST 3 | |
118 |
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141 | |||
119 | //********** |
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142 | //********** | |
120 | // LFR MODES |
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143 | // LFR MODES | |
121 | #define LFR_MODE_STANDBY 0 |
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144 | #define LFR_MODE_STANDBY 0 | |
122 | #define LFR_MODE_NORMAL 1 |
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145 | #define LFR_MODE_NORMAL 1 | |
123 | #define LFR_MODE_BURST 2 |
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146 | #define LFR_MODE_BURST 2 | |
124 | #define LFR_MODE_SBM1 3 |
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147 | #define LFR_MODE_SBM1 3 | |
125 | #define LFR_MODE_SBM2 4 |
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148 | #define LFR_MODE_SBM2 4 | |
126 |
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149 | |||
127 | #define TDS_MODE_LFM 5 |
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150 | #define TDS_MODE_LFM 5 | |
128 | #define TDS_MODE_STANDBY 0 |
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151 | #define TDS_MODE_STANDBY 0 | |
129 | #define TDS_MODE_NORMAL 1 |
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152 | #define TDS_MODE_NORMAL 1 | |
130 | #define TDS_MODE_BURST 2 |
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153 | #define TDS_MODE_BURST 2 | |
131 | #define TDS_MODE_SBM1 3 |
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154 | #define TDS_MODE_SBM1 3 | |
132 | #define TDS_MODE_SBM2 4 |
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155 | #define TDS_MODE_SBM2 4 | |
133 |
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156 | |||
134 | #define THR_MODE_STANDBY 0 |
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157 | #define THR_MODE_STANDBY 0 | |
135 | #define THR_MODE_NORMAL 1 |
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158 | #define THR_MODE_NORMAL 1 | |
136 | #define THR_MODE_BURST 2 |
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159 | #define THR_MODE_BURST 2 | |
137 |
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160 | |||
138 | #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1 |
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161 | #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1 | |
139 | #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2 |
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162 | #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2 | |
140 | #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4 |
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163 | #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4 | |
141 | #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5 |
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164 | #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5 | |
142 | #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6 |
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165 | #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6 | |
143 | #define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7 |
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166 | #define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7 | |
144 | #define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode |
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167 | #define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode | |
145 | #define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9 |
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168 | #define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9 | |
146 | #define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10 |
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169 | #define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10 | |
147 | #define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode |
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170 | #define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode | |
148 | #define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12 |
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171 | #define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12 | |
149 | #define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13 |
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172 | #define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13 | |
150 | #define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode |
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173 | #define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode | |
151 | #define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15 |
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174 | #define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15 | |
152 | #define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16 |
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175 | #define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16 | |
153 | #define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17 |
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176 | #define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17 | |
154 | #define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18 |
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177 | #define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18 | |
155 | #define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19 |
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178 | #define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19 | |
156 | #define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20 |
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179 | #define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20 | |
157 | #define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21 |
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180 | #define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21 | |
158 | #define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22 |
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181 | #define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22 | |
159 | #define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23 |
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182 | #define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23 | |
160 | #define RTEMS_EVENT_CAL_SWEEP_WAKE RTEMS_EVENT_24 |
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183 | #define RTEMS_EVENT_CAL_SWEEP_WAKE RTEMS_EVENT_24 | |
161 |
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184 | |||
162 | //******************************************** |
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185 | //******************************************** | |
163 | //******************************************** |
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186 | //******************************************** | |
164 | // LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES |
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187 | // LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES | |
165 |
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188 | |||
166 | #define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff |
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189 | #define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff | |
167 |
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190 | |||
168 | // COMMON |
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191 | // COMMON | |
169 | #define DEFAULT_SY_LFR_COMMON0 0x00 |
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192 | #define DEFAULT_SY_LFR_COMMON0 0x00 | |
170 | #define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0 |
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193 | #define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0 | |
171 |
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194 | |||
172 | // NORM |
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195 | // NORM | |
173 | #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample |
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196 | #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample | |
174 | #define DFLT_SY_LFR_N_SWF_P 300 // sec |
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197 | #define DFLT_SY_LFR_N_SWF_P 300 // sec | |
175 | #define MIN_SY_LFR_N_SWF_P 22 // sec |
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198 | #define MIN_SY_LFR_N_SWF_P 22 // sec | |
176 | #define DFLT_SY_LFR_N_ASM_P 3600 // sec |
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199 | #define DFLT_SY_LFR_N_ASM_P 3600 // sec | |
177 | #define DFLT_SY_LFR_N_BP_P0 4 // sec |
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200 | #define DFLT_SY_LFR_N_BP_P0 4 // sec | |
178 | #define DFLT_SY_LFR_N_BP_P1 20 // sec |
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201 | #define DFLT_SY_LFR_N_BP_P1 20 // sec | |
179 | #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3 |
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202 | #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3 | |
180 |
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203 | |||
181 | // BURST |
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204 | // BURST | |
182 | #define DEFAULT_SY_LFR_B_BP_P0 1 // sec |
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205 | #define DEFAULT_SY_LFR_B_BP_P0 1 // sec | |
183 | #define DEFAULT_SY_LFR_B_BP_P1 5 // sec |
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206 | #define DEFAULT_SY_LFR_B_BP_P1 5 // sec | |
184 |
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207 | |||
185 | // SBM1 |
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208 | // SBM1 | |
186 | #define S1_BP_P0_SCALE 0.25 |
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209 | #define S1_BP_P0_SCALE 0.25 | |
187 | #define DEFAULT_SY_LFR_S1_BP_P0 1 // 0.25 sec |
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210 | #define DEFAULT_SY_LFR_S1_BP_P0 1 // 0.25 sec | |
188 | #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec |
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211 | #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec | |
189 |
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212 | |||
190 | // SBM2 |
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213 | // SBM2 | |
191 | #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec |
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214 | #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec | |
192 | #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec |
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215 | #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec | |
193 |
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216 | |||
194 | // STATUS WORD |
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217 | // STATUS WORD | |
195 | #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits |
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218 | #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits | |
196 |
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219 | |||
197 | #define DEFAULT_STATUS_WORD_BYTE1 0x00 |
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220 | #define DEFAULT_STATUS_WORD_BYTE1 0x00 | |
198 | // TC_LFR_LOAD_FILTER_PAR |
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221 | // TC_LFR_LOAD_FILTER_PAR | |
199 | #define MIN_PAS_FILTER_MODULUS 4 |
|
222 | #define MIN_PAS_FILTER_MODULUS 4 | |
200 | #define MAX_PAS_FILTER_MODULUS 8 |
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223 | #define MAX_PAS_FILTER_MODULUS 8 | |
201 | #define MIN_PAS_FILTER_TBAD 0.0 |
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224 | #define MIN_PAS_FILTER_TBAD 0.0 | |
202 | #define MAX_PAS_FILTER_TBAD 4.0 |
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225 | #define MAX_PAS_FILTER_TBAD 4.0 | |
203 | #define MIN_PAS_FILTER_OFFSET 0 |
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226 | #define MIN_PAS_FILTER_OFFSET 0 | |
204 | #define MAX_PAS_FILTER_OFFSET 7 |
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227 | #define MAX_PAS_FILTER_OFFSET 7 | |
205 | #define MIN_PAS_FILTER_SHIFT 0.0 |
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228 | #define MIN_PAS_FILTER_SHIFT 0.0 | |
206 | #define MAX_PAS_FILTER_SHIFT 1.0 |
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229 | #define MAX_PAS_FILTER_SHIFT 1.0 | |
207 | #define MIN_SY_LFR_SC_RW_DELTA_F 0 |
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230 | #define MIN_SY_LFR_SC_RW_DELTA_F 0 | |
208 | #define MIN_SY_LFR_RW_F 0 |
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231 | #define MIN_SY_LFR_RW_F 0 | |
209 | // |
|
232 | // | |
210 | #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s |
|
233 | #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s | |
211 | #define SY_LFR_DPU_CONNECT_ATTEMPT 3 |
|
234 | #define SY_LFR_DPU_CONNECT_ATTEMPT 3 | |
212 | //**************************** |
|
235 | //**************************** | |
213 |
|
236 | |||
214 | //***************************** |
|
237 | //***************************** | |
215 | // APB REGISTERS BASE ADDRESSES |
|
238 | // APB REGISTERS BASE ADDRESSES | |
216 | #define REGS_ADDR_APBUART 0x80000100 |
|
239 | #define REGS_ADDR_APBUART 0x80000100 | |
217 | #define REGS_ADDR_GPTIMER 0x80000300 |
|
240 | #define REGS_ADDR_GPTIMER 0x80000300 | |
218 | #define REGS_ADDR_GRSPW 0x80000500 |
|
241 | #define REGS_ADDR_GRSPW 0x80000500 | |
219 | #define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04 |
|
242 | #define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04 | |
220 | #define APB_OFFSET_GRSPW_TIME_REGISTER 0x14 |
|
243 | #define APB_OFFSET_GRSPW_TIME_REGISTER 0x14 | |
221 | #define REGS_ADDR_TIME_MANAGEMENT 0x80000600 |
|
244 | #define REGS_ADDR_TIME_MANAGEMENT 0x80000600 | |
222 |
|
245 | |||
223 | #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00 |
|
246 | #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00 | |
224 | #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28 |
|
247 | #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28 | |
225 | #define APB_OFFSET_VHDL_REV 0xb0 |
|
248 | #define APB_OFFSET_VHDL_REV 0xb0 | |
226 | #define REGS_ADDR_VHDL_VERSION 0x80000ff0 |
|
249 | #define REGS_ADDR_VHDL_VERSION 0x80000ff0 | |
227 |
|
250 | |||
228 | #define APBUART_CTRL_REG_MASK_TE 0x00000002 |
|
251 | #define APBUART_CTRL_REG_MASK_TE 0x00000002 | |
229 | // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1 |
|
252 | // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1 | |
230 | #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400 |
|
253 | #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400 | |
231 |
|
254 | |||
232 | //********** |
|
255 | //********** | |
233 | // IRQ LINES |
|
256 | // IRQ LINES | |
234 | #define IRQ_GPTIMER_WATCHDOG 9 |
|
257 | #define IRQ_GPTIMER_WATCHDOG 9 | |
235 | #define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels |
|
258 | #define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels | |
236 | #define IRQ_WAVEFORM_PICKER 14 |
|
259 | #define IRQ_WAVEFORM_PICKER 14 | |
237 | #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels |
|
260 | #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels | |
238 | #define IRQ_SPECTRAL_MATRIX 6 |
|
261 | #define IRQ_SPECTRAL_MATRIX 6 | |
239 | #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels |
|
262 | #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels | |
240 |
|
263 | |||
241 | //***** |
|
264 | //***** | |
242 | // TIME |
|
265 | // TIME | |
243 | #define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000 |
|
266 | #define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000 | |
244 | #define TIMER_WATCHDOG 1 |
|
267 | #define TIMER_WATCHDOG 1 | |
245 | #define WATCHDOG_PERIOD 100 // 1s |
|
268 | #define WATCHDOG_PERIOD 100 // 1s | |
246 | #define HK_PERIOD 100 // 100 * 10ms => 1s |
|
269 | #define HK_PERIOD 100 // 100 * 10ms => 1s | |
247 | #define AVGV_PERIOD 6 // 6 * 10ms => 60ms (1 / 16 = 62.5ms) |
|
270 | #define AVGV_PERIOD 6 // 6 * 10ms => 60ms (1 / 16 = 62.5ms) | |
248 | #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s |
|
271 | #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s | |
249 | #define HK_SYNC_WAIT 10 // 10 * 10 ms = 100 ms |
|
272 | #define HK_SYNC_WAIT 10 // 10 * 10 ms = 100 ms | |
250 | #define SPW_LINK_WAIT 10 // 10 * 10 ms = 100 ms |
|
273 | #define SPW_LINK_WAIT 10 // 10 * 10 ms = 100 ms | |
251 | #define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s |
|
274 | #define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s | |
252 | #define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s |
|
275 | #define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s | |
253 | #define TIMECODE_MASK 0x3f // 0011 1111 |
|
276 | #define TIMECODE_MASK 0x3f // 0011 1111 | |
254 |
|
277 | |||
255 | //********** |
|
278 | //********** | |
256 | // LPP CODES |
|
279 | // LPP CODES | |
257 | #define LFR_SUCCESSFUL 0 |
|
280 | #define LFR_SUCCESSFUL 0 | |
258 | #define LFR_DEFAULT 1 |
|
281 | #define LFR_DEFAULT 1 | |
259 | #define LFR_EXE_ERROR 2 |
|
282 | #define LFR_EXE_ERROR 2 | |
260 |
|
283 | |||
261 | //****** |
|
284 | //****** | |
262 | // RTEMS |
|
285 | // RTEMS | |
263 | #define STACK_SIZE_MULT 2 |
|
286 | #define STACK_SIZE_MULT 2 | |
264 |
|
287 | |||
265 | #define TASKID_AVGV 0 |
|
288 | #define TASKID_AVGV 0 | |
266 | #define TASKID_RECV 1 |
|
289 | #define TASKID_RECV 1 | |
267 | #define TASKID_ACTN 2 |
|
290 | #define TASKID_ACTN 2 | |
268 | #define TASKID_SPIQ 3 |
|
291 | #define TASKID_SPIQ 3 | |
269 | #define TASKID_LOAD 4 |
|
292 | #define TASKID_LOAD 4 | |
270 | #define TASKID_AVF0 5 |
|
293 | #define TASKID_AVF0 5 | |
271 | #define TASKID_SWBD 6 |
|
294 | #define TASKID_SWBD 6 | |
272 | #define TASKID_WFRM 7 |
|
295 | #define TASKID_WFRM 7 | |
273 | #define TASKID_DUMB 8 |
|
296 | #define TASKID_DUMB 8 | |
274 | #define TASKID_HOUS 9 |
|
297 | #define TASKID_HOUS 9 | |
275 | #define TASKID_PRC0 10 |
|
298 | #define TASKID_PRC0 10 | |
276 | #define TASKID_CWF3 11 |
|
299 | #define TASKID_CWF3 11 | |
277 | #define TASKID_CWF2 12 |
|
300 | #define TASKID_CWF2 12 | |
278 | #define TASKID_CWF1 13 |
|
301 | #define TASKID_CWF1 13 | |
279 | #define TASKID_SEND 14 |
|
302 | #define TASKID_SEND 14 | |
280 | #define TASKID_LINK 15 |
|
303 | #define TASKID_LINK 15 | |
281 | #define TASKID_AVF1 16 |
|
304 | #define TASKID_AVF1 16 | |
282 | #define TASKID_PRC1 17 |
|
305 | #define TASKID_PRC1 17 | |
283 | #define TASKID_AVF2 18 |
|
306 | #define TASKID_AVF2 18 | |
284 | #define TASKID_PRC2 19 |
|
307 | #define TASKID_PRC2 19 | |
285 | #define TASKID_SCRB 20 |
|
308 | #define TASKID_SCRB 20 | |
286 | #define TASKID_CALI 21 |
|
309 | #define TASKID_CALI 21 | |
287 |
|
310 | |||
288 | #define TASK_PRIORITY_SPIQ 5 |
|
311 | #define TASK_PRIORITY_SPIQ 5 | |
289 | #define TASK_PRIORITY_LINK 20 |
|
312 | #define TASK_PRIORITY_LINK 20 | |
290 | #define TASK_PRIORITY_AVGV 25 |
|
313 | #define TASK_PRIORITY_AVGV 25 | |
291 | #define TASK_PRIORITY_HOUS 30 |
|
314 | #define TASK_PRIORITY_HOUS 30 | |
292 | #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together |
|
315 | #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together | |
293 | #define TASK_PRIORITY_CWF2 35 // |
|
316 | #define TASK_PRIORITY_CWF2 35 // | |
294 | #define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it |
|
317 | #define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it | |
295 | #define TASK_PRIORITY_WFRM 40 |
|
318 | #define TASK_PRIORITY_WFRM 40 | |
296 | #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1 |
|
319 | #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1 | |
297 | #define TASK_PRIORITY_SEND 45 |
|
320 | #define TASK_PRIORITY_SEND 45 | |
298 | #define TASK_PRIORITY_RECV 50 |
|
321 | #define TASK_PRIORITY_RECV 50 | |
299 | #define TASK_PRIORITY_CALI 50 |
|
322 | #define TASK_PRIORITY_CALI 50 | |
300 | #define TASK_PRIORITY_ACTN 50 |
|
323 | #define TASK_PRIORITY_ACTN 50 | |
301 | #define TASK_PRIORITY_AVF0 60 |
|
324 | #define TASK_PRIORITY_AVF0 60 | |
302 | #define TASK_PRIORITY_AVF1 70 |
|
325 | #define TASK_PRIORITY_AVF1 70 | |
303 | #define TASK_PRIORITY_PRC0 100 |
|
326 | #define TASK_PRIORITY_PRC0 100 | |
304 | #define TASK_PRIORITY_PRC1 100 |
|
327 | #define TASK_PRIORITY_PRC1 100 | |
305 | #define TASK_PRIORITY_AVF2 110 |
|
328 | #define TASK_PRIORITY_AVF2 110 | |
306 | #define TASK_PRIORITY_PRC2 110 |
|
329 | #define TASK_PRIORITY_PRC2 110 | |
307 | #define TASK_PRIORITY_LOAD 190 |
|
330 | #define TASK_PRIORITY_LOAD 190 | |
308 | #define TASK_PRIORITY_DUMB 200 |
|
331 | #define TASK_PRIORITY_DUMB 200 | |
309 | #define TASK_PRIORITY_SCRB 210 |
|
332 | #define TASK_PRIORITY_SCRB 210 | |
310 |
|
333 | |||
311 | #define MSG_QUEUE_COUNT_RECV 10 |
|
334 | #define MSG_QUEUE_COUNT_RECV 10 | |
312 | #define MSG_QUEUE_COUNT_SEND 50 |
|
335 | #define MSG_QUEUE_COUNT_SEND 50 | |
313 | #define MSG_QUEUE_COUNT_PRC0 10 |
|
336 | #define MSG_QUEUE_COUNT_PRC0 10 | |
314 | #define MSG_QUEUE_COUNT_PRC1 10 |
|
337 | #define MSG_QUEUE_COUNT_PRC1 10 | |
315 | #define MSG_QUEUE_COUNT_PRC2 5 |
|
338 | #define MSG_QUEUE_COUNT_PRC2 5 | |
316 | #define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1 |
|
339 | #define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1 | |
317 | #define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers |
|
340 | #define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers | |
318 | #define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers |
|
341 | #define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers | |
319 | #define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers |
|
342 | #define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers | |
320 |
|
343 | |||
321 | #define QUEUE_RECV 0 |
|
344 | #define QUEUE_RECV 0 | |
322 | #define QUEUE_SEND 1 |
|
345 | #define QUEUE_SEND 1 | |
323 | #define QUEUE_PRC0 2 |
|
346 | #define QUEUE_PRC0 2 | |
324 | #define QUEUE_PRC1 3 |
|
347 | #define QUEUE_PRC1 3 | |
325 | #define QUEUE_PRC2 4 |
|
348 | #define QUEUE_PRC2 4 | |
326 |
|
349 | |||
327 | struct param_local_str{ |
|
350 | struct param_local_str{ | |
328 | unsigned int local_sbm1_nb_cwf_sent; |
|
351 | unsigned int local_sbm1_nb_cwf_sent; | |
329 | unsigned int local_sbm1_nb_cwf_max; |
|
352 | unsigned int local_sbm1_nb_cwf_max; | |
330 | unsigned int local_sbm2_nb_cwf_sent; |
|
353 | unsigned int local_sbm2_nb_cwf_sent; | |
331 | unsigned int local_sbm2_nb_cwf_max; |
|
354 | unsigned int local_sbm2_nb_cwf_max; | |
332 | }; |
|
355 | }; | |
333 |
|
356 | |||
334 | //************ |
|
357 | //************ | |
335 | // FBINS MASKS |
|
358 | // FBINS MASKS | |
336 |
|
359 | |||
337 | #define BYTES_PER_FBINS_MASK 16 |
|
360 | #define BYTES_PER_FBINS_MASK 16 | |
338 |
|
361 | |||
339 | typedef struct { |
|
362 | typedef struct { | |
340 | unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK]; |
|
363 | unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK]; | |
341 | unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK]; |
|
364 | unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK]; | |
342 | unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK]; |
|
365 | unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK]; | |
343 | } fbins_masks_t; |
|
366 | } fbins_masks_t; | |
344 |
|
367 | |||
345 | #define DEFAULT_SY_LFR_PAS_FILTER_ENABLED 0 |
|
368 | #define DEFAULT_SY_LFR_PAS_FILTER_ENABLED 0 | |
346 | #define DEFAULT_SY_LFR_PAS_FILTER_MODULUS 4 |
|
369 | #define DEFAULT_SY_LFR_PAS_FILTER_MODULUS 4 | |
347 | #define DEFAULT_SY_LFR_PAS_FILTER_TBAD 1.0f |
|
370 | #define DEFAULT_SY_LFR_PAS_FILTER_TBAD 1.0f | |
348 | #define DEFAULT_SY_LFR_PAS_FILTER_OFFSET 0 |
|
371 | #define DEFAULT_SY_LFR_PAS_FILTER_OFFSET 0 | |
349 | #define DEFAULT_SY_LFR_PAS_FILTER_SHIFT 0.5f |
|
372 | #define DEFAULT_SY_LFR_PAS_FILTER_SHIFT 0.5f | |
350 | #define DEFAULT_MODULUS 262144 // 65536 * 4 |
|
373 | #define DEFAULT_MODULUS 262144 // 65536 * 4 | |
351 | #define DEFAULT_TBAD 65536 // 65536 |
|
374 | #define DEFAULT_TBAD 65536 // 65536 | |
352 | #define DEFAULT_OFFSET 0 // 65536 * 0 |
|
375 | #define DEFAULT_OFFSET 0 // 65536 * 0 | |
353 | #define DEFAULT_SHIFT 32768 // 65536 / 2 |
|
376 | #define DEFAULT_SHIFT 32768 // 65536 / 2 | |
354 | #define DEFAULT_SY_LFR_SC_RW_DELTA_F 0.045f |
|
377 | #define DEFAULT_SY_LFR_SC_RW_DELTA_F 0.045f | |
355 | #define DEFAULT_SY_LFR_RW_K1 1.f |
|
378 | #define DEFAULT_SY_LFR_RW_K1 1.f | |
356 | #define DEFAULT_SY_LFR_RW_K2 8.f |
|
379 | #define DEFAULT_SY_LFR_RW_K2 8.f | |
357 | #define DEFAULT_SY_LFR_RW_K3 24.f |
|
380 | #define DEFAULT_SY_LFR_RW_K3 24.f | |
358 | #define DEFAULT_SY_LFR_RW_K4 48.f |
|
381 | #define DEFAULT_SY_LFR_RW_K4 48.f | |
359 |
|
382 | |||
360 | typedef struct{ |
|
383 | typedef struct{ | |
361 | unsigned char spare_sy_lfr_pas_filter_enabled; |
|
384 | unsigned char spare_sy_lfr_pas_filter_enabled; | |
362 | float sy_lfr_pas_filter_tbad; |
|
385 | float sy_lfr_pas_filter_tbad; | |
363 | float sy_lfr_pas_filter_shift; |
|
386 | float sy_lfr_pas_filter_shift; | |
364 | uint64_t modulus_in_finetime; |
|
387 | uint64_t modulus_in_finetime; | |
365 | uint64_t tbad_in_finetime; |
|
388 | uint64_t tbad_in_finetime; | |
366 | uint64_t offset_in_finetime; |
|
389 | uint64_t offset_in_finetime; | |
367 | uint64_t shift_in_finetime; |
|
390 | uint64_t shift_in_finetime; | |
368 | float sy_lfr_sc_rw_delta_f; |
|
391 | float sy_lfr_sc_rw_delta_f; | |
369 | // rw1_k |
|
392 | // rw1_k | |
370 | float sy_lfr_rw1_k1; |
|
393 | float sy_lfr_rw1_k1; | |
371 | float sy_lfr_rw1_k2; |
|
394 | float sy_lfr_rw1_k2; | |
372 | float sy_lfr_rw1_k3; |
|
395 | float sy_lfr_rw1_k3; | |
373 | float sy_lfr_rw1_k4; |
|
396 | float sy_lfr_rw1_k4; | |
374 | // rw2_k |
|
397 | // rw2_k | |
375 | float sy_lfr_rw2_k1; |
|
398 | float sy_lfr_rw2_k1; | |
376 | float sy_lfr_rw2_k2; |
|
399 | float sy_lfr_rw2_k2; | |
377 | float sy_lfr_rw2_k3; |
|
400 | float sy_lfr_rw2_k3; | |
378 | float sy_lfr_rw2_k4; |
|
401 | float sy_lfr_rw2_k4; | |
379 | // rw3_k |
|
402 | // rw3_k | |
380 | float sy_lfr_rw3_k1; |
|
403 | float sy_lfr_rw3_k1; | |
381 | float sy_lfr_rw3_k2; |
|
404 | float sy_lfr_rw3_k2; | |
382 | float sy_lfr_rw3_k3; |
|
405 | float sy_lfr_rw3_k3; | |
383 | float sy_lfr_rw3_k4; |
|
406 | float sy_lfr_rw3_k4; | |
384 | // rw4_k |
|
407 | // rw4_k | |
385 | float sy_lfr_rw4_k1; |
|
408 | float sy_lfr_rw4_k1; | |
386 | float sy_lfr_rw4_k2; |
|
409 | float sy_lfr_rw4_k2; | |
387 | float sy_lfr_rw4_k3; |
|
410 | float sy_lfr_rw4_k3; | |
388 | float sy_lfr_rw4_k4; |
|
411 | float sy_lfr_rw4_k4; | |
389 | } filterPar_t; |
|
412 | } filterPar_t; | |
390 |
|
413 | |||
391 | typedef struct{ |
|
414 | typedef struct{ | |
392 | // rw1_f |
|
415 | // rw1_f | |
393 | float cp_rpw_sc_rw1_f1; |
|
416 | float cp_rpw_sc_rw1_f1; | |
394 | float cp_rpw_sc_rw1_f2; |
|
417 | float cp_rpw_sc_rw1_f2; | |
395 | float cp_rpw_sc_rw1_f3; |
|
418 | float cp_rpw_sc_rw1_f3; | |
396 | float cp_rpw_sc_rw1_f4; |
|
419 | float cp_rpw_sc_rw1_f4; | |
397 | // rw2_f |
|
420 | // rw2_f | |
398 | float cp_rpw_sc_rw2_f1; |
|
421 | float cp_rpw_sc_rw2_f1; | |
399 | float cp_rpw_sc_rw2_f2; |
|
422 | float cp_rpw_sc_rw2_f2; | |
400 | float cp_rpw_sc_rw2_f3; |
|
423 | float cp_rpw_sc_rw2_f3; | |
401 | float cp_rpw_sc_rw2_f4; |
|
424 | float cp_rpw_sc_rw2_f4; | |
402 | // rw3_f |
|
425 | // rw3_f | |
403 | float cp_rpw_sc_rw3_f1; |
|
426 | float cp_rpw_sc_rw3_f1; | |
404 | float cp_rpw_sc_rw3_f2; |
|
427 | float cp_rpw_sc_rw3_f2; | |
405 | float cp_rpw_sc_rw3_f3; |
|
428 | float cp_rpw_sc_rw3_f3; | |
406 | float cp_rpw_sc_rw3_f4; |
|
429 | float cp_rpw_sc_rw3_f4; | |
407 | // rw4_f |
|
430 | // rw4_f | |
408 | float cp_rpw_sc_rw4_f1; |
|
431 | float cp_rpw_sc_rw4_f1; | |
409 | float cp_rpw_sc_rw4_f2; |
|
432 | float cp_rpw_sc_rw4_f2; | |
410 | float cp_rpw_sc_rw4_f3; |
|
433 | float cp_rpw_sc_rw4_f3; | |
411 | float cp_rpw_sc_rw4_f4; |
|
434 | float cp_rpw_sc_rw4_f4; | |
412 | } rw_f_t; |
|
435 | } rw_f_t; | |
413 |
|
436 | |||
414 | #define MATRIX_IS_POLLUTED 0 |
|
437 | #define MATRIX_IS_POLLUTED 0 | |
415 | #define MATRIX_IS_NOT_POLLUTED 1 |
|
438 | #define MATRIX_IS_NOT_POLLUTED 1 | |
416 | #define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536 |
|
439 | #define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536 | |
417 | #define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536 |
|
440 | #define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536 | |
418 | #define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536 |
|
441 | #define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536 | |
419 | #define HALF_ACQUISITION_DURATION_F0 341 // 256 / 24576 * 65536 / 2 |
|
442 | #define HALF_ACQUISITION_DURATION_F0 341 // 256 / 24576 * 65536 / 2 | |
420 | #define HALF_ACQUISITION_DURATION_F1 2048 // 256 / 4096 * 65536 / 2 |
|
443 | #define HALF_ACQUISITION_DURATION_F1 2048 // 256 / 4096 * 65536 / 2 | |
421 | #define HALF_ACQUISITION_DURATION_F2 32768 // 256 / 256 * 65536 / 2 |
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444 | #define HALF_ACQUISITION_DURATION_F2 32768 // 256 / 256 * 65536 / 2 | |
422 |
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445 | |||
423 | #endif // FSW_PARAMS_H_INCLUDED |
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446 | #endif // FSW_PARAMS_H_INCLUDED |
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