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# -*- coding: utf-8 -*-
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"""
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pygments.lexers.hdl
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~~~~~~~~~~~~~~~~~~~
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Lexers for hardware descriptor languages.
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:copyright: Copyright 2006-2012 by the Pygments team, see AUTHORS.
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:license: BSD, see LICENSE for details.
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"""
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import re
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from pygments.lexer import RegexLexer, bygroups, include, using, this
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from pygments.token import \
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Text, Comment, Operator, Keyword, Name, String, Number, Punctuation, \
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Error
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__all__ = ['VerilogLexer', 'SystemVerilogLexer', 'VhdlLexer']
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class VerilogLexer(RegexLexer):
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"""
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For verilog source code with preprocessor directives.
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*New in Pygments 1.4.*
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"""
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name = 'verilog'
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aliases = ['v']
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filenames = ['*.v']
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mimetypes = ['text/x-verilog']
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#: optional Comment or Whitespace
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_ws = r'(?:\s|//.*?\n|/[*].*?[*]/)+'
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tokens = {
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'root': [
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(r'^\s*`define', Comment.Preproc, 'macro'),
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(r'\n', Text),
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(r'\s+', Text),
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(r'\\\n', Text), # line continuation
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(r'/(\\\n)?/(\n|(.|\n)*?[^\\]\n)', Comment.Single),
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(r'/(\\\n)?[*](.|\n)*?[*](\\\n)?/', Comment.Multiline),
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(r'[{}#@]', Punctuation),
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(r'L?"', String, 'string'),
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(r"L?'(\\.|\\[0-7]{1,3}|\\x[a-fA-F0-9]{1,2}|[^\\\'\n])'", String.Char),
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(r'(\d+\.\d*|\.\d+|\d+)[eE][+-]?\d+[lL]?', Number.Float),
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(r'(\d+\.\d*|\.\d+|\d+[fF])[fF]?', Number.Float),
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(r'([0-9]+)|(\'h)[0-9a-fA-F]+', Number.Hex),
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(r'([0-9]+)|(\'b)[0-1]+', Number.Hex), # should be binary
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(r'([0-9]+)|(\'d)[0-9]+', Number.Integer),
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(r'([0-9]+)|(\'o)[0-7]+', Number.Oct),
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(r'\'[01xz]', Number),
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(r'\d+[Ll]?', Number.Integer),
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(r'\*/', Error),
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(r'[~!%^&*+=|?:<>/-]', Operator),
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(r'[()\[\],.;\']', Punctuation),
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(r'`[a-zA-Z_][a-zA-Z0-9_]*', Name.Constant),
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(r'^(\s*)(package)(\s+)', bygroups(Text, Keyword.Namespace, Text)),
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(r'^(\s*)(import)(\s+)', bygroups(Text, Keyword.Namespace, Text),
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'import'),
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(r'(always|always_comb|always_ff|always_latch|and|assign|automatic|'
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r'begin|break|buf|bufif0|bufif1|case|casex|casez|cmos|const|'
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r'continue|deassign|default|defparam|disable|do|edge|else|end|endcase|'
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r'endfunction|endgenerate|endmodule|endpackage|endprimitive|endspecify|'
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r'endtable|endtask|enum|event|final|for|force|forever|fork|function|'
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r'generate|genvar|highz0|highz1|if|initial|inout|input|'
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r'integer|join|large|localparam|macromodule|medium|module|'
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r'nand|negedge|nmos|nor|not|notif0|notif1|or|output|packed|'
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r'parameter|pmos|posedge|primitive|pull0|pull1|pulldown|pullup|rcmos|'
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r'ref|release|repeat|return|rnmos|rpmos|rtran|rtranif0|'
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r'rtranif1|scalared|signed|small|specify|specparam|strength|'
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r'string|strong0|strong1|struct|table|task|'
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r'tran|tranif0|tranif1|type|typedef|'
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r'unsigned|var|vectored|void|wait|weak0|weak1|while|'
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r'xnor|xor)\b', Keyword),
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(r'`(accelerate|autoexpand_vectornets|celldefine|default_nettype|'
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r'else|elsif|endcelldefine|endif|endprotect|endprotected|'
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r'expand_vectornets|ifdef|ifndef|include|noaccelerate|noexpand_vectornets|'
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r'noremove_gatenames|noremove_netnames|nounconnected_drive|'
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r'protect|protected|remove_gatenames|remove_netnames|resetall|'
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r'timescale|unconnected_drive|undef)\b', Comment.Preproc),
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(r'\$(bits|bitstoreal|bitstoshortreal|countdrivers|display|fclose|'
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r'fdisplay|finish|floor|fmonitor|fopen|fstrobe|fwrite|'
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r'getpattern|history|incsave|input|itor|key|list|log|'
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r'monitor|monitoroff|monitoron|nokey|nolog|printtimescale|'
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r'random|readmemb|readmemh|realtime|realtobits|reset|reset_count|'
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r'reset_value|restart|rtoi|save|scale|scope|shortrealtobits|'
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r'showscopes|showvariables|showvars|sreadmemb|sreadmemh|'
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r'stime|stop|strobe|time|timeformat|write)\b', Name.Builtin),
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(r'(byte|shortint|int|longint|integer|time|'
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r'bit|logic|reg|'
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r'supply0|supply1|tri|triand|trior|tri0|tri1|trireg|uwire|wire|wand|wor'
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r'shortreal|real|realtime)\b', Keyword.Type),
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('[a-zA-Z_][a-zA-Z0-9_]*:(?!:)', Name.Label),
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('[a-zA-Z_][a-zA-Z0-9_]*', Name),
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],
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'string': [
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(r'"', String, '#pop'),
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(r'\\([\\abfnrtv"\']|x[a-fA-F0-9]{2,4}|[0-7]{1,3})', String.Escape),
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(r'[^\\"\n]+', String), # all other characters
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(r'\\\n', String), # line continuation
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(r'\\', String), # stray backslash
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],
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'macro': [
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(r'[^/\n]+', Comment.Preproc),
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(r'/[*](.|\n)*?[*]/', Comment.Multiline),
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(r'//.*?\n', Comment.Single, '#pop'),
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(r'/', Comment.Preproc),
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(r'(?<=\\)\n', Comment.Preproc),
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(r'\n', Comment.Preproc, '#pop'),
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],
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'import': [
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(r'[a-zA-Z0-9_:]+\*?', Name.Namespace, '#pop')
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]
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}
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def get_tokens_unprocessed(self, text):
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for index, token, value in \
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RegexLexer.get_tokens_unprocessed(self, text):
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# Convention: mark all upper case names as constants
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if token is Name:
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if value.isupper():
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token = Name.Constant
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yield index, token, value
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class SystemVerilogLexer(RegexLexer):
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"""
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Extends verilog lexer to recognise all SystemVerilog keywords from IEEE
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1800-2009 standard.
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*New in Pygments 1.5.*
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"""
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name = 'systemverilog'
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aliases = ['sv']
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filenames = ['*.sv', '*.svh']
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mimetypes = ['text/x-systemverilog']
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#: optional Comment or Whitespace
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_ws = r'(?:\s|//.*?\n|/[*].*?[*]/)+'
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tokens = {
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'root': [
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(r'^\s*`define', Comment.Preproc, 'macro'),
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(r'^(\s*)(package)(\s+)', bygroups(Text, Keyword.Namespace, Text)),
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(r'^(\s*)(import)(\s+)', bygroups(Text, Keyword.Namespace, Text), 'import'),
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(r'\n', Text),
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(r'\s+', Text),
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(r'\\\n', Text), # line continuation
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(r'/(\\\n)?/(\n|(.|\n)*?[^\\]\n)', Comment.Single),
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(r'/(\\\n)?[*](.|\n)*?[*](\\\n)?/', Comment.Multiline),
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(r'[{}#@]', Punctuation),
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(r'L?"', String, 'string'),
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(r"L?'(\\.|\\[0-7]{1,3}|\\x[a-fA-F0-9]{1,2}|[^\\\'\n])'", String.Char),
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(r'(\d+\.\d*|\.\d+|\d+)[eE][+-]?\d+[lL]?', Number.Float),
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(r'(\d+\.\d*|\.\d+|\d+[fF])[fF]?', Number.Float),
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(r'([0-9]+)|(\'h)[0-9a-fA-F]+', Number.Hex),
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(r'([0-9]+)|(\'b)[0-1]+', Number.Hex), # should be binary
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(r'([0-9]+)|(\'d)[0-9]+', Number.Integer),
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(r'([0-9]+)|(\'o)[0-7]+', Number.Oct),
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(r'\'[01xz]', Number),
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(r'\d+[Ll]?', Number.Integer),
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(r'\*/', Error),
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(r'[~!%^&*+=|?:<>/-]', Operator),
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(r'[()\[\],.;\']', Punctuation),
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(r'`[a-zA-Z_][a-zA-Z0-9_]*', Name.Constant),
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(r'(accept_on|alias|always|always_comb|always_ff|always_latch|'
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r'and|assert|assign|assume|automatic|before|begin|bind|bins|'
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r'binsof|bit|break|buf|bufif0|bufif1|byte|case|casex|casez|'
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r'cell|chandle|checker|class|clocking|cmos|config|const|constraint|'
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r'context|continue|cover|covergroup|coverpoint|cross|deassign|'
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r'default|defparam|design|disable|dist|do|edge|else|end|endcase|'
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r'endchecker|endclass|endclocking|endconfig|endfunction|endgenerate|'
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r'endgroup|endinterface|endmodule|endpackage|endprimitive|'
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r'endprogram|endproperty|endsequence|endspecify|endtable|'
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r'endtask|enum|event|eventually|expect|export|extends|extern|'
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r'final|first_match|for|force|foreach|forever|fork|forkjoin|'
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r'function|generate|genvar|global|highz0|highz1|if|iff|ifnone|'
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r'ignore_bins|illegal_bins|implies|import|incdir|include|'
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r'initial|inout|input|inside|instance|int|integer|interface|'
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r'intersect|join|join_any|join_none|large|let|liblist|library|'
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r'local|localparam|logic|longint|macromodule|matches|medium|'
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r'modport|module|nand|negedge|new|nexttime|nmos|nor|noshowcancelled|'
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r'not|notif0|notif1|null|or|output|package|packed|parameter|'
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r'pmos|posedge|primitive|priority|program|property|protected|'
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r'pull0|pull1|pulldown|pullup|pulsestyle_ondetect|pulsestyle_onevent|'
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r'pure|rand|randc|randcase|randsequence|rcmos|real|realtime|'
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r'ref|reg|reject_on|release|repeat|restrict|return|rnmos|'
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r'rpmos|rtran|rtranif0|rtranif1|s_always|s_eventually|s_nexttime|'
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r's_until|s_until_with|scalared|sequence|shortint|shortreal|'
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r'showcancelled|signed|small|solve|specify|specparam|static|'
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r'string|strong|strong0|strong1|struct|super|supply0|supply1|'
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r'sync_accept_on|sync_reject_on|table|tagged|task|this|throughout|'
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r'time|timeprecision|timeunit|tran|tranif0|tranif1|tri|tri0|'
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r'tri1|triand|trior|trireg|type|typedef|union|unique|unique0|'
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r'unsigned|until|until_with|untyped|use|uwire|var|vectored|'
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r'virtual|void|wait|wait_order|wand|weak|weak0|weak1|while|'
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r'wildcard|wire|with|within|wor|xnor|xor)\b', Keyword ),
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(r'(`__FILE__|`__LINE__|`begin_keywords|`celldefine|`default_nettype|'
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r'`define|`else|`elsif|`end_keywords|`endcelldefine|`endif|'
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r'`ifdef|`ifndef|`include|`line|`nounconnected_drive|`pragma|'
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r'`resetall|`timescale|`unconnected_drive|`undef|`undefineall)\b',
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Comment.Preproc ),
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(r'(\$display|\$displayb|\$displayh|\$displayo|\$dumpall|\$dumpfile|'
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r'\$dumpflush|\$dumplimit|\$dumpoff|\$dumpon|\$dumpports|'
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r'\$dumpportsall|\$dumpportsflush|\$dumpportslimit|\$dumpportsoff|'
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r'\$dumpportson|\$dumpvars|\$fclose|\$fdisplay|\$fdisplayb|'
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r'\$fdisplayh|\$fdisplayo|\$feof|\$ferror|\$fflush|\$fgetc|'
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r'\$fgets|\$fmonitor|\$fmonitorb|\$fmonitorh|\$fmonitoro|'
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r'\$fopen|\$fread|\$fscanf|\$fseek|\$fstrobe|\$fstrobeb|\$fstrobeh|'
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r'\$fstrobeo|\$ftell|\$fwrite|\$fwriteb|\$fwriteh|\$fwriteo|'
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r'\$monitor|\$monitorb|\$monitorh|\$monitoro|\$monitoroff|'
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r'\$monitoron|\$plusargs|\$readmemb|\$readmemh|\$rewind|\$sformat|'
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r'\$sformatf|\$sscanf|\$strobe|\$strobeb|\$strobeh|\$strobeo|'
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r'\$swrite|\$swriteb|\$swriteh|\$swriteo|\$test|\$ungetc|'
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r'\$value\$plusargs|\$write|\$writeb|\$writeh|\$writememb|'
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r'\$writememh|\$writeo)\b' , Name.Builtin ),
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(r'(class)(\s+)', bygroups(Keyword, Text), 'classname'),
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(r'(byte|shortint|int|longint|integer|time|'
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r'bit|logic|reg|'
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r'supply0|supply1|tri|triand|trior|tri0|tri1|trireg|uwire|wire|wand|wor'
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r'shortreal|real|realtime)\b', Keyword.Type),
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('[a-zA-Z_][a-zA-Z0-9_]*:(?!:)', Name.Label),
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('[a-zA-Z_][a-zA-Z0-9_]*', Name),
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],
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'classname': [
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(r'[a-zA-Z_][a-zA-Z0-9_]*', Name.Class, '#pop'),
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],
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'string': [
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(r'"', String, '#pop'),
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(r'\\([\\abfnrtv"\']|x[a-fA-F0-9]{2,4}|[0-7]{1,3})', String.Escape),
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(r'[^\\"\n]+', String), # all other characters
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(r'\\\n', String), # line continuation
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(r'\\', String), # stray backslash
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],
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'macro': [
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(r'[^/\n]+', Comment.Preproc),
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(r'/[*](.|\n)*?[*]/', Comment.Multiline),
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(r'//.*?\n', Comment.Single, '#pop'),
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(r'/', Comment.Preproc),
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(r'(?<=\\)\n', Comment.Preproc),
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(r'\n', Comment.Preproc, '#pop'),
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],
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'import': [
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(r'[a-zA-Z0-9_:]+\*?', Name.Namespace, '#pop')
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]
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}
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def get_tokens_unprocessed(self, text):
|
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for index, token, value in \
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RegexLexer.get_tokens_unprocessed(self, text):
|
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# Convention: mark all upper case names as constants
|
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if token is Name:
|
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if value.isupper():
|
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token = Name.Constant
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yield index, token, value
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|
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def analyse_text(text):
|
|
|
if text.startswith('//') or text.startswith('/*'):
|
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return 0.5
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|
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|
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class VhdlLexer(RegexLexer):
|
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"""
|
|
|
For VHDL source code.
|
|
|
|
|
|
*New in Pygments 1.5.*
|
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|
"""
|
|
|
name = 'vhdl'
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|
aliases = ['vhdl']
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|
filenames = ['*.vhdl', '*.vhd']
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mimetypes = ['text/x-vhdl']
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flags = re.MULTILINE | re.IGNORECASE
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|
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tokens = {
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'root': [
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(r'\n', Text),
|
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(r'\s+', Text),
|
|
|
(r'\\\n', Text), # line continuation
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(r'--(?![!#$%&*+./<=>?@\^|_~]).*?$', Comment.Single),
|
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|
(r"'(U|X|0|1|Z|W|L|H|-)'", String.Char),
|
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(r'[~!%^&*+=|?:<>/-]', Operator),
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(r"'[a-zA-Z_][a-zA-Z0-9_]*", Name.Attribute),
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(r'[()\[\],.;\']', Punctuation),
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(r'"[^\n\\]*"', String),
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|
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(r'(library)(\s+)([a-zA-Z_][a-zA-Z0-9_]*)',
|
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bygroups(Keyword, Text, Name.Namespace)),
|
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(r'(use)(\s+)(entity)', bygroups(Keyword, Text, Keyword)),
|
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(r'(use)(\s+)([a-zA-Z_][\.a-zA-Z0-9_]*)',
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bygroups(Keyword, Text, Name.Namespace)),
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|
(r'(entity|component)(\s+)([a-zA-Z_][a-zA-Z0-9_]*)',
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bygroups(Keyword, Text, Name.Class)),
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(r'(architecture|configuration)(\s+)([a-zA-Z_][a-zA-Z0-9_]*)(\s+)'
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r'(of)(\s+)([a-zA-Z_][a-zA-Z0-9_]*)(\s+)(is)',
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|
bygroups(Keyword, Text, Name.Class, Text, Keyword, Text,
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|
Name.Class, Text, Keyword)),
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|
|
(r'(end)(\s+)', bygroups(using(this), Text), 'endblock'),
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|
|
include('types'),
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|
include('keywords'),
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|
|
include('numbers'),
|
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|
(r'[a-zA-Z_][a-zA-Z0-9_]*', Name),
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],
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'endblock': [
|
|
|
include('keywords'),
|
|
|
(r'[a-zA-Z_][a-zA-Z0-9_]*', Name.Class),
|
|
|
(r'(\s+)', Text),
|
|
|
(r';', Punctuation, '#pop'),
|
|
|
],
|
|
|
'types': [
|
|
|
(r'(boolean|bit|character|severity_level|integer|time|delay_length|'
|
|
|
r'natural|positive|string|bit_vector|file_open_kind|'
|
|
|
r'file_open_status|std_ulogic|std_ulogic_vector|std_logic|'
|
|
|
r'std_logic_vector)\b', Keyword.Type),
|
|
|
],
|
|
|
'keywords': [
|
|
|
(r'(abs|access|after|alias|all|and|'
|
|
|
r'architecture|array|assert|attribute|begin|block|'
|
|
|
r'body|buffer|bus|case|component|configuration|'
|
|
|
r'constant|disconnect|downto|else|elsif|end|'
|
|
|
r'entity|exit|file|for|function|generate|'
|
|
|
r'generic|group|guarded|if|impure|in|'
|
|
|
r'inertial|inout|is|label|library|linkage|'
|
|
|
r'literal|loop|map|mod|nand|new|'
|
|
|
r'next|nor|not|null|of|on|'
|
|
|
r'open|or|others|out|package|port|'
|
|
|
r'postponed|procedure|process|pure|range|record|'
|
|
|
r'register|reject|return|rol|ror|select|'
|
|
|
r'severity|signal|shared|sla|sli|sra|'
|
|
|
r'srl|subtype|then|to|transport|type|'
|
|
|
r'units|until|use|variable|wait|when|'
|
|
|
r'while|with|xnor|xor)\b', Keyword),
|
|
|
],
|
|
|
'numbers': [
|
|
|
(r'\d{1,2}#[0-9a-fA-F_]+#?', Number.Integer),
|
|
|
(r'[0-1_]+(\.[0-1_])', Number.Integer),
|
|
|
(r'\d+', Number.Integer),
|
|
|
(r'(\d+\.\d*|\.\d+|\d+)[eE][+-]?\d+', Number.Float),
|
|
|
(r'H"[0-9a-fA-F_]+"', Number.Oct),
|
|
|
(r'O"[0-7_]+"', Number.Oct),
|
|
|
(r'B"[0-1_]+"', Number.Oct),
|
|
|
],
|
|
|
}
|
|
|
|
