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Commit message |
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Author |
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r97:6e0139d937f6
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paul
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r96:bf0185565c5e
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.hgsub added to the repository
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paul
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r95:2543157c542c
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paul
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r94:399cb300a264
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paul
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r93:ffd04db5cce0
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paul
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r92:7c50b5fd63ee
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ICD 2.0
The FPGA version is written in the HK packets
SWF packets compliant with the ICD
2048 BLK = 6 * 304 + 224
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paul
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r91:6af3303996c6
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VHDL_DEV implemented. The code is compatible with:
1) the 206 bitstream
2) the new bitstream when VHDL_DEV is set
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paul
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r90:b0bdcde41112
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Integration of the VHDL_DEV option
Select the option to test the new VHDL design
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paul
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r89:4ddc79d344bf
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paul
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r88:bf8352344672
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paul
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