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SID corrected in TM_LFR_TC_EXE packets...
SID corrected in TM_LFR_TC_EXE packets fsw ready to test the spectral matrix unit tests performed on the Virtex 5 board

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fsw_params_processing.h
26 lines | 766 B | text/x-c | CLexer
/ header / fsw_params_processing.h
#ifndef FSW_PARAMS_PROCESSING_H
#define FSW_PARAMS_PROCESSING_H
#define NB_BINS_PER_SM 128
#define NB_VALUES_PER_SM 25
#define TOTAL_SIZE_SM (NB_BINS_PER_SM * NB_VALUES_PER_SM)
#define NB_BINS_COMPRESSED_SM_F0 11
#define NB_BINS_COMPRESSED_SM_F1 13
#define NB_BINS_COMPRESSED_SM_F2 12
#define TOTAL_SIZE_COMPRESSED_MATRIX_f0 (NB_BINS_COMPRESSED_SM_F0 * NB_VALUES_PER_SM)
#define NB_AVERAGE_NORMAL_f0 96*4
#define NB_SM_TO_RECEIVE_BEFORE_AVF0 8
struct BP1_str{
volatile unsigned char PE[2];
volatile unsigned char PB[2];
volatile unsigned char V0;
volatile unsigned char V1;
volatile unsigned char V2_ELLIP_DOP;
volatile unsigned char SZ;
volatile unsigned char VPHI;
};
typedef struct BP1_str BP1_t;
#endif // FSW_PARAMS_PROCESSING_H