HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/LFR_FSW Files · EQM/src/grspw.c

Added srec production and bumped FSW to 3.2.0.17 since .16 has been delivered...

Added srec production and bumped FSW to 3.2.0.17 since .16 has been delivered to LESIA to test snapshots synchronisation fix

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             grspw.c
        
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      #include "grspw.h"

      int grspw_set_ie( unsigned char value, unsigned int *ctrlReg )

      {

          // IE = bit 3

          // Interrupt Enable

          int ret = 0;

          if (value == 0)

          {

              *ctrlReg = *ctrlReg & 0xfffffff7;

          }

          else if (value == 1)

          {

              *ctrlReg = *ctrlReg | 0x00000008;

          }

          else

          {

              ret = -1;

          }

          return ret;

      }

      int grspw_set_tq( unsigned char value, unsigned int *ctrlReg )

      {

          // TQ = bit 8

          // Tick-out IRQ

          int ret = 0;

          if (value == 0)

          {

              *ctrlReg = *ctrlReg & 0xfffffeff;

          }

          else if (value == 1)

          {

              *ctrlReg = *ctrlReg | 0x00000100;

          }

          else

          {

              ret = -1;

          }

          return ret;

      }

      int grspw_set_tr( unsigned char value, unsigned int *ctrlReg )

      {

          // TR = bit 11

          // Enable timecode reception

          int ret = 0;

          if (value == 0)

          {

              *ctrlReg = *ctrlReg & 0xfffff7ff;

          }

          else if (value == 1)

          {

              *ctrlReg = *ctrlReg | 0x00000800;

          }

          else

          {

              ret = -1;

          }

          return ret;

      }

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				#include "grspw.h"

				int grspw_set_ie( unsigned char value, unsigned int *ctrlReg )
				{
				// IE = bit 3
				// Interrupt Enable

				int ret = 0;

				if (value == 0)
				{
				ctrlReg = ctrlReg & 0xfffffff7;
				}
				else if (value == 1)
				{
				ctrlReg = ctrlReg \| 0x00000008;
				}
				else
				{
				ret = -1;
				}

				return ret;
				}

				int grspw_set_tq( unsigned char value, unsigned int *ctrlReg )
				{
				// TQ = bit 8
				// Tick-out IRQ

				int ret = 0;

				if (value == 0)
				{
				ctrlReg = ctrlReg & 0xfffffeff;
				}
				else if (value == 1)
				{
				ctrlReg = ctrlReg \| 0x00000100;
				}
				else
				{
				ret = -1;
				}

				return ret;
				}

				int grspw_set_tr( unsigned char value, unsigned int *ctrlReg )
				{
				// TR = bit 11
				// Enable timecode reception

				int ret = 0;

				if (value == 0)
				{
				ctrlReg = ctrlReg & 0xfffff7ff;
				}
				else if (value == 1)
				{
				ctrlReg = ctrlReg \| 0x00000800;
				}
				else
				{
				ret = -1;
				}

				return ret;
				}