##// END OF EJS Templates
Minor changes
paul -
r93:ffd04db5cce0 VHDLib206
parent child
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@@ -1,248 +1,248
1 #############################################################################
1 #############################################################################
2 # Makefile for building: bin/fsw-vhdl-dev
2 # Makefile for building: bin/fsw-vhdl-dev
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Mon Jan 27 07:11:41 2014
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Thu Feb 6 09:29:25 2014
4 # Project: fsw-qt.pro
4 # Project: fsw-qt.pro
5 # Template: app
5 # Template: app
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
7 #############################################################################
7 #############################################################################
8
8
9 ####### Compiler, tools and options
9 ####### Compiler, tools and options
10
10
11 CC = sparc-rtems-gcc
11 CC = sparc-rtems-gcc
12 CXX = sparc-rtems-g++
12 CXX = sparc-rtems-g++
13 DEFINES = -DSW_VERSION_N1=1 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=1 -DPRINT_MESSAGES_ON_CONSOLE -DDEBUG_MESSAGES -DVHDL_DEV
13 DEFINES = -DSW_VERSION_N1=1 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=1 -DPRINT_MESSAGES_ON_CONSOLE -DDEBUG_MESSAGES -DVHDL_DEV
14 CFLAGS = -pipe -O3 -Wall $(DEFINES)
14 CFLAGS = -pipe -O3 -Wall $(DEFINES)
15 CXXFLAGS = -pipe -O3 -Wall $(DEFINES)
15 CXXFLAGS = -pipe -O3 -Wall $(DEFINES)
16 INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header
16 INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header
17 LINK = sparc-rtems-g++
17 LINK = sparc-rtems-g++
18 LFLAGS =
18 LFLAGS =
19 LIBS = $(SUBLIBS)
19 LIBS = $(SUBLIBS)
20 AR = sparc-rtems-ar rcs
20 AR = sparc-rtems-ar rcs
21 RANLIB =
21 RANLIB =
22 QMAKE = /usr/bin/qmake-qt4
22 QMAKE = /usr/bin/qmake-qt4
23 TAR = tar -cf
23 TAR = tar -cf
24 COMPRESS = gzip -9f
24 COMPRESS = gzip -9f
25 COPY = cp -f
25 COPY = cp -f
26 SED = sed
26 SED = sed
27 COPY_FILE = $(COPY)
27 COPY_FILE = $(COPY)
28 COPY_DIR = $(COPY) -r
28 COPY_DIR = $(COPY) -r
29 STRIP = sparc-rtems-strip
29 STRIP = sparc-rtems-strip
30 INSTALL_FILE = install -m 644 -p
30 INSTALL_FILE = install -m 644 -p
31 INSTALL_DIR = $(COPY_DIR)
31 INSTALL_DIR = $(COPY_DIR)
32 INSTALL_PROGRAM = install -m 755 -p
32 INSTALL_PROGRAM = install -m 755 -p
33 DEL_FILE = rm -f
33 DEL_FILE = rm -f
34 SYMLINK = ln -f -s
34 SYMLINK = ln -f -s
35 DEL_DIR = rmdir
35 DEL_DIR = rmdir
36 MOVE = mv -f
36 MOVE = mv -f
37 CHK_DIR_EXISTS= test -d
37 CHK_DIR_EXISTS= test -d
38 MKDIR = mkdir -p
38 MKDIR = mkdir -p
39
39
40 ####### Output directory
40 ####### Output directory
41
41
42 OBJECTS_DIR = obj/
42 OBJECTS_DIR = obj/
43
43
44 ####### Files
44 ####### Files
45
45
46 SOURCES = ../src/wf_handler.c \
46 SOURCES = ../src/wf_handler.c \
47 ../src/tc_handler.c \
47 ../src/tc_handler.c \
48 ../src/fsw_processing.c \
48 ../src/fsw_processing.c \
49 ../src/fsw_misc.c \
49 ../src/fsw_misc.c \
50 ../src/fsw_init.c \
50 ../src/fsw_init.c \
51 ../src/fsw_globals.c \
51 ../src/fsw_globals.c \
52 ../src/fsw_spacewire.c \
52 ../src/fsw_spacewire.c \
53 ../src/tc_load_dump_parameters.c \
53 ../src/tc_load_dump_parameters.c \
54 ../src/tm_lfr_tc_exe.c \
54 ../src/tm_lfr_tc_exe.c \
55 ../src/tc_acceptance.c
55 ../src/tc_acceptance.c
56 OBJECTS = obj/wf_handler.o \
56 OBJECTS = obj/wf_handler.o \
57 obj/tc_handler.o \
57 obj/tc_handler.o \
58 obj/fsw_processing.o \
58 obj/fsw_processing.o \
59 obj/fsw_misc.o \
59 obj/fsw_misc.o \
60 obj/fsw_init.o \
60 obj/fsw_init.o \
61 obj/fsw_globals.o \
61 obj/fsw_globals.o \
62 obj/fsw_spacewire.o \
62 obj/fsw_spacewire.o \
63 obj/tc_load_dump_parameters.o \
63 obj/tc_load_dump_parameters.o \
64 obj/tm_lfr_tc_exe.o \
64 obj/tm_lfr_tc_exe.o \
65 obj/tc_acceptance.o
65 obj/tc_acceptance.o
66 DIST = /usr/lib64/qt4/mkspecs/common/unix.conf \
66 DIST = /usr/lib64/qt4/mkspecs/common/unix.conf \
67 /usr/lib64/qt4/mkspecs/common/linux.conf \
67 /usr/lib64/qt4/mkspecs/common/linux.conf \
68 /usr/lib64/qt4/mkspecs/common/gcc-base.conf \
68 /usr/lib64/qt4/mkspecs/common/gcc-base.conf \
69 /usr/lib64/qt4/mkspecs/common/gcc-base-unix.conf \
69 /usr/lib64/qt4/mkspecs/common/gcc-base-unix.conf \
70 /usr/lib64/qt4/mkspecs/common/g++-base.conf \
70 /usr/lib64/qt4/mkspecs/common/g++-base.conf \
71 /usr/lib64/qt4/mkspecs/common/g++-unix.conf \
71 /usr/lib64/qt4/mkspecs/common/g++-unix.conf \
72 /usr/lib64/qt4/mkspecs/qconfig.pri \
72 /usr/lib64/qt4/mkspecs/qconfig.pri \
73 /usr/lib64/qt4/mkspecs/modules/qt_webkit.pri \
73 /usr/lib64/qt4/mkspecs/modules/qt_webkit.pri \
74 /usr/lib64/qt4/mkspecs/features/qt_functions.prf \
74 /usr/lib64/qt4/mkspecs/features/qt_functions.prf \
75 /usr/lib64/qt4/mkspecs/features/qt_config.prf \
75 /usr/lib64/qt4/mkspecs/features/qt_config.prf \
76 /usr/lib64/qt4/mkspecs/features/exclusive_builds.prf \
76 /usr/lib64/qt4/mkspecs/features/exclusive_builds.prf \
77 /usr/lib64/qt4/mkspecs/features/default_pre.prf \
77 /usr/lib64/qt4/mkspecs/features/default_pre.prf \
78 sparc.pri \
78 sparc.pri \
79 /usr/lib64/qt4/mkspecs/features/release.prf \
79 /usr/lib64/qt4/mkspecs/features/release.prf \
80 /usr/lib64/qt4/mkspecs/features/default_post.prf \
80 /usr/lib64/qt4/mkspecs/features/default_post.prf \
81 /usr/lib64/qt4/mkspecs/features/shared.prf \
81 /usr/lib64/qt4/mkspecs/features/shared.prf \
82 /usr/lib64/qt4/mkspecs/features/unix/gdb_dwarf_index.prf \
82 /usr/lib64/qt4/mkspecs/features/unix/gdb_dwarf_index.prf \
83 /usr/lib64/qt4/mkspecs/features/warn_on.prf \
83 /usr/lib64/qt4/mkspecs/features/warn_on.prf \
84 /usr/lib64/qt4/mkspecs/features/resources.prf \
84 /usr/lib64/qt4/mkspecs/features/resources.prf \
85 /usr/lib64/qt4/mkspecs/features/uic.prf \
85 /usr/lib64/qt4/mkspecs/features/uic.prf \
86 /usr/lib64/qt4/mkspecs/features/yacc.prf \
86 /usr/lib64/qt4/mkspecs/features/yacc.prf \
87 /usr/lib64/qt4/mkspecs/features/lex.prf \
87 /usr/lib64/qt4/mkspecs/features/lex.prf \
88 /usr/lib64/qt4/mkspecs/features/include_source_dir.prf \
88 /usr/lib64/qt4/mkspecs/features/include_source_dir.prf \
89 fsw-qt.pro
89 fsw-qt.pro
90 QMAKE_TARGET = fsw-vhdl-dev
90 QMAKE_TARGET = fsw-vhdl-dev
91 DESTDIR = bin/
91 DESTDIR = bin/
92 TARGET = bin/fsw-vhdl-dev
92 TARGET = bin/fsw-vhdl-dev
93
93
94 first: all
94 first: all
95 ####### Implicit rules
95 ####### Implicit rules
96
96
97 .SUFFIXES: .o .c .cpp .cc .cxx .C
97 .SUFFIXES: .o .c .cpp .cc .cxx .C
98
98
99 .cpp.o:
99 .cpp.o:
100 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
100 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
101
101
102 .cc.o:
102 .cc.o:
103 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
103 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
104
104
105 .cxx.o:
105 .cxx.o:
106 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
106 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
107
107
108 .C.o:
108 .C.o:
109 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
109 $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<"
110
110
111 .c.o:
111 .c.o:
112 $(CC) -c $(CFLAGS) $(INCPATH) -o "$@" "$<"
112 $(CC) -c $(CFLAGS) $(INCPATH) -o "$@" "$<"
113
113
114 ####### Build rules
114 ####### Build rules
115
115
116 all: Makefile $(TARGET)
116 all: Makefile $(TARGET)
117
117
118 $(TARGET): $(OBJECTS)
118 $(TARGET): $(OBJECTS)
119 @$(CHK_DIR_EXISTS) bin/ || $(MKDIR) bin/
119 @$(CHK_DIR_EXISTS) bin/ || $(MKDIR) bin/
120 $(LINK) $(LFLAGS) -o $(TARGET) $(OBJECTS) $(OBJCOMP) $(LIBS)
120 $(LINK) $(LFLAGS) -o $(TARGET) $(OBJECTS) $(OBJCOMP) $(LIBS)
121
121
122 Makefile: fsw-qt.pro /usr/lib64/qt4/mkspecs/linux-g++/qmake.conf /usr/lib64/qt4/mkspecs/common/unix.conf \
122 Makefile: fsw-qt.pro /usr/lib64/qt4/mkspecs/linux-g++/qmake.conf /usr/lib64/qt4/mkspecs/common/unix.conf \
123 /usr/lib64/qt4/mkspecs/common/linux.conf \
123 /usr/lib64/qt4/mkspecs/common/linux.conf \
124 /usr/lib64/qt4/mkspecs/common/gcc-base.conf \
124 /usr/lib64/qt4/mkspecs/common/gcc-base.conf \
125 /usr/lib64/qt4/mkspecs/common/gcc-base-unix.conf \
125 /usr/lib64/qt4/mkspecs/common/gcc-base-unix.conf \
126 /usr/lib64/qt4/mkspecs/common/g++-base.conf \
126 /usr/lib64/qt4/mkspecs/common/g++-base.conf \
127 /usr/lib64/qt4/mkspecs/common/g++-unix.conf \
127 /usr/lib64/qt4/mkspecs/common/g++-unix.conf \
128 /usr/lib64/qt4/mkspecs/qconfig.pri \
128 /usr/lib64/qt4/mkspecs/qconfig.pri \
129 /usr/lib64/qt4/mkspecs/modules/qt_webkit.pri \
129 /usr/lib64/qt4/mkspecs/modules/qt_webkit.pri \
130 /usr/lib64/qt4/mkspecs/features/qt_functions.prf \
130 /usr/lib64/qt4/mkspecs/features/qt_functions.prf \
131 /usr/lib64/qt4/mkspecs/features/qt_config.prf \
131 /usr/lib64/qt4/mkspecs/features/qt_config.prf \
132 /usr/lib64/qt4/mkspecs/features/exclusive_builds.prf \
132 /usr/lib64/qt4/mkspecs/features/exclusive_builds.prf \
133 /usr/lib64/qt4/mkspecs/features/default_pre.prf \
133 /usr/lib64/qt4/mkspecs/features/default_pre.prf \
134 sparc.pri \
134 sparc.pri \
135 /usr/lib64/qt4/mkspecs/features/release.prf \
135 /usr/lib64/qt4/mkspecs/features/release.prf \
136 /usr/lib64/qt4/mkspecs/features/default_post.prf \
136 /usr/lib64/qt4/mkspecs/features/default_post.prf \
137 /usr/lib64/qt4/mkspecs/features/shared.prf \
137 /usr/lib64/qt4/mkspecs/features/shared.prf \
138 /usr/lib64/qt4/mkspecs/features/unix/gdb_dwarf_index.prf \
138 /usr/lib64/qt4/mkspecs/features/unix/gdb_dwarf_index.prf \
139 /usr/lib64/qt4/mkspecs/features/warn_on.prf \
139 /usr/lib64/qt4/mkspecs/features/warn_on.prf \
140 /usr/lib64/qt4/mkspecs/features/resources.prf \
140 /usr/lib64/qt4/mkspecs/features/resources.prf \
141 /usr/lib64/qt4/mkspecs/features/uic.prf \
141 /usr/lib64/qt4/mkspecs/features/uic.prf \
142 /usr/lib64/qt4/mkspecs/features/yacc.prf \
142 /usr/lib64/qt4/mkspecs/features/yacc.prf \
143 /usr/lib64/qt4/mkspecs/features/lex.prf \
143 /usr/lib64/qt4/mkspecs/features/lex.prf \
144 /usr/lib64/qt4/mkspecs/features/include_source_dir.prf
144 /usr/lib64/qt4/mkspecs/features/include_source_dir.prf
145 $(QMAKE) -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
145 $(QMAKE) -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
146 /usr/lib64/qt4/mkspecs/common/unix.conf:
146 /usr/lib64/qt4/mkspecs/common/unix.conf:
147 /usr/lib64/qt4/mkspecs/common/linux.conf:
147 /usr/lib64/qt4/mkspecs/common/linux.conf:
148 /usr/lib64/qt4/mkspecs/common/gcc-base.conf:
148 /usr/lib64/qt4/mkspecs/common/gcc-base.conf:
149 /usr/lib64/qt4/mkspecs/common/gcc-base-unix.conf:
149 /usr/lib64/qt4/mkspecs/common/gcc-base-unix.conf:
150 /usr/lib64/qt4/mkspecs/common/g++-base.conf:
150 /usr/lib64/qt4/mkspecs/common/g++-base.conf:
151 /usr/lib64/qt4/mkspecs/common/g++-unix.conf:
151 /usr/lib64/qt4/mkspecs/common/g++-unix.conf:
152 /usr/lib64/qt4/mkspecs/qconfig.pri:
152 /usr/lib64/qt4/mkspecs/qconfig.pri:
153 /usr/lib64/qt4/mkspecs/modules/qt_webkit.pri:
153 /usr/lib64/qt4/mkspecs/modules/qt_webkit.pri:
154 /usr/lib64/qt4/mkspecs/features/qt_functions.prf:
154 /usr/lib64/qt4/mkspecs/features/qt_functions.prf:
155 /usr/lib64/qt4/mkspecs/features/qt_config.prf:
155 /usr/lib64/qt4/mkspecs/features/qt_config.prf:
156 /usr/lib64/qt4/mkspecs/features/exclusive_builds.prf:
156 /usr/lib64/qt4/mkspecs/features/exclusive_builds.prf:
157 /usr/lib64/qt4/mkspecs/features/default_pre.prf:
157 /usr/lib64/qt4/mkspecs/features/default_pre.prf:
158 sparc.pri:
158 sparc.pri:
159 /usr/lib64/qt4/mkspecs/features/release.prf:
159 /usr/lib64/qt4/mkspecs/features/release.prf:
160 /usr/lib64/qt4/mkspecs/features/default_post.prf:
160 /usr/lib64/qt4/mkspecs/features/default_post.prf:
161 /usr/lib64/qt4/mkspecs/features/shared.prf:
161 /usr/lib64/qt4/mkspecs/features/shared.prf:
162 /usr/lib64/qt4/mkspecs/features/unix/gdb_dwarf_index.prf:
162 /usr/lib64/qt4/mkspecs/features/unix/gdb_dwarf_index.prf:
163 /usr/lib64/qt4/mkspecs/features/warn_on.prf:
163 /usr/lib64/qt4/mkspecs/features/warn_on.prf:
164 /usr/lib64/qt4/mkspecs/features/resources.prf:
164 /usr/lib64/qt4/mkspecs/features/resources.prf:
165 /usr/lib64/qt4/mkspecs/features/uic.prf:
165 /usr/lib64/qt4/mkspecs/features/uic.prf:
166 /usr/lib64/qt4/mkspecs/features/yacc.prf:
166 /usr/lib64/qt4/mkspecs/features/yacc.prf:
167 /usr/lib64/qt4/mkspecs/features/lex.prf:
167 /usr/lib64/qt4/mkspecs/features/lex.prf:
168 /usr/lib64/qt4/mkspecs/features/include_source_dir.prf:
168 /usr/lib64/qt4/mkspecs/features/include_source_dir.prf:
169 qmake: FORCE
169 qmake: FORCE
170 @$(QMAKE) -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
170 @$(QMAKE) -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
171
171
172 dist:
172 dist:
173 @$(CHK_DIR_EXISTS) obj/fsw-vhdl-dev1.0.0 || $(MKDIR) obj/fsw-vhdl-dev1.0.0
173 @$(CHK_DIR_EXISTS) obj/fsw-vhdl-dev1.0.0 || $(MKDIR) obj/fsw-vhdl-dev1.0.0
174 $(COPY_FILE) --parents $(SOURCES) $(DIST) obj/fsw-vhdl-dev1.0.0/ && (cd `dirname obj/fsw-vhdl-dev1.0.0` && $(TAR) fsw-vhdl-dev1.0.0.tar fsw-vhdl-dev1.0.0 && $(COMPRESS) fsw-vhdl-dev1.0.0.tar) && $(MOVE) `dirname obj/fsw-vhdl-dev1.0.0`/fsw-vhdl-dev1.0.0.tar.gz . && $(DEL_FILE) -r obj/fsw-vhdl-dev1.0.0
174 $(COPY_FILE) --parents $(SOURCES) $(DIST) obj/fsw-vhdl-dev1.0.0/ && (cd `dirname obj/fsw-vhdl-dev1.0.0` && $(TAR) fsw-vhdl-dev1.0.0.tar fsw-vhdl-dev1.0.0 && $(COMPRESS) fsw-vhdl-dev1.0.0.tar) && $(MOVE) `dirname obj/fsw-vhdl-dev1.0.0`/fsw-vhdl-dev1.0.0.tar.gz . && $(DEL_FILE) -r obj/fsw-vhdl-dev1.0.0
175
175
176
176
177 clean:compiler_clean
177 clean:compiler_clean
178 -$(DEL_FILE) $(OBJECTS)
178 -$(DEL_FILE) $(OBJECTS)
179 -$(DEL_FILE) *~ core *.core
179 -$(DEL_FILE) *~ core *.core
180
180
181
181
182 ####### Sub-libraries
182 ####### Sub-libraries
183
183
184 distclean: clean
184 distclean: clean
185 -$(DEL_FILE) $(TARGET)
185 -$(DEL_FILE) $(TARGET)
186 -$(DEL_FILE) Makefile
186 -$(DEL_FILE) Makefile
187
187
188
188
189 grmon:
189 grmon:
190 cd bin && C:/opt/grmon-eval-2.0.29b/win32/bin/grmon.exe -uart COM4 -u
190 cd bin && C:/opt/grmon-eval-2.0.29b/win32/bin/grmon.exe -uart COM4 -u
191
191
192 check: first
192 check: first
193
193
194 compiler_rcc_make_all:
194 compiler_rcc_make_all:
195 compiler_rcc_clean:
195 compiler_rcc_clean:
196 compiler_uic_make_all:
196 compiler_uic_make_all:
197 compiler_uic_clean:
197 compiler_uic_clean:
198 compiler_image_collection_make_all: qmake_image_collection.cpp
198 compiler_image_collection_make_all: qmake_image_collection.cpp
199 compiler_image_collection_clean:
199 compiler_image_collection_clean:
200 -$(DEL_FILE) qmake_image_collection.cpp
200 -$(DEL_FILE) qmake_image_collection.cpp
201 compiler_yacc_decl_make_all:
201 compiler_yacc_decl_make_all:
202 compiler_yacc_decl_clean:
202 compiler_yacc_decl_clean:
203 compiler_yacc_impl_make_all:
203 compiler_yacc_impl_make_all:
204 compiler_yacc_impl_clean:
204 compiler_yacc_impl_clean:
205 compiler_lex_make_all:
205 compiler_lex_make_all:
206 compiler_lex_clean:
206 compiler_lex_clean:
207 compiler_clean:
207 compiler_clean:
208
208
209 ####### Compile
209 ####### Compile
210
210
211 obj/wf_handler.o: ../src/wf_handler.c
211 obj/wf_handler.o: ../src/wf_handler.c
212 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/wf_handler.o ../src/wf_handler.c
212 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/wf_handler.o ../src/wf_handler.c
213
213
214 obj/tc_handler.o: ../src/tc_handler.c
214 obj/tc_handler.o: ../src/tc_handler.c
215 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_handler.o ../src/tc_handler.c
215 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_handler.o ../src/tc_handler.c
216
216
217 obj/fsw_processing.o: ../src/fsw_processing.c ../src/fsw_processing_globals.c
217 obj/fsw_processing.o: ../src/fsw_processing.c ../src/fsw_processing_globals.c
218 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_processing.o ../src/fsw_processing.c
218 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_processing.o ../src/fsw_processing.c
219
219
220 obj/fsw_misc.o: ../src/fsw_misc.c
220 obj/fsw_misc.o: ../src/fsw_misc.c
221 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_misc.o ../src/fsw_misc.c
221 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_misc.o ../src/fsw_misc.c
222
222
223 obj/fsw_init.o: ../src/fsw_init.c ../src/fsw_config.c
223 obj/fsw_init.o: ../src/fsw_init.c ../src/fsw_config.c
224 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_init.o ../src/fsw_init.c
224 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_init.o ../src/fsw_init.c
225
225
226 obj/fsw_globals.o: ../src/fsw_globals.c
226 obj/fsw_globals.o: ../src/fsw_globals.c
227 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_globals.o ../src/fsw_globals.c
227 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_globals.o ../src/fsw_globals.c
228
228
229 obj/fsw_spacewire.o: ../src/fsw_spacewire.c
229 obj/fsw_spacewire.o: ../src/fsw_spacewire.c
230 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_spacewire.o ../src/fsw_spacewire.c
230 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/fsw_spacewire.o ../src/fsw_spacewire.c
231
231
232 obj/tc_load_dump_parameters.o: ../src/tc_load_dump_parameters.c
232 obj/tc_load_dump_parameters.o: ../src/tc_load_dump_parameters.c
233 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_load_dump_parameters.o ../src/tc_load_dump_parameters.c
233 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_load_dump_parameters.o ../src/tc_load_dump_parameters.c
234
234
235 obj/tm_lfr_tc_exe.o: ../src/tm_lfr_tc_exe.c
235 obj/tm_lfr_tc_exe.o: ../src/tm_lfr_tc_exe.c
236 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tm_lfr_tc_exe.o ../src/tm_lfr_tc_exe.c
236 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tm_lfr_tc_exe.o ../src/tm_lfr_tc_exe.c
237
237
238 obj/tc_acceptance.o: ../src/tc_acceptance.c
238 obj/tc_acceptance.o: ../src/tc_acceptance.c
239 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_acceptance.o ../src/tc_acceptance.c
239 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_acceptance.o ../src/tc_acceptance.c
240
240
241 ####### Install
241 ####### Install
242
242
243 install: FORCE
243 install: FORCE
244
244
245 uninstall: FORCE
245 uninstall: FORCE
246
246
247 FORCE:
247 FORCE:
248
248
@@ -1,311 +1,339
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159 </valuelist>
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248 <value type="int" key="ProjectExplorer.BuildConfiguration.BuildStepListCount">2</value>
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310 <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName"></value>
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312 <value type="QString" key="Qt4ProjectManager.Qt4RunConfiguration.CommandLineArguments"></value>
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314 <value type="bool" key="Qt4ProjectManager.Qt4RunConfiguration.UseDyldImageSuffix">false</value>
236 <value type="bool" key="Qt4ProjectManager.Qt4RunConfiguration.UseTerminal">true</value>
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316 <value type="QString" key="Qt4ProjectManager.Qt4RunConfiguration.UserWorkingDirectory"></value>
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253 <value type="double" key="Analyzer.Valgrind.Callgrind.VisualisationMinimumCostRatio">10</value>
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258 <value type="int" key="Analyzer.Valgrind.SelfModifyingCodeDetection">1</value>
259 <value type="bool" key="Analyzer.Valgrind.Settings.UseGlobalSettings">true</value>
260 <value type="bool" key="Analyzer.Valgrind.ShowReachable">false</value>
261 <value type="bool" key="Analyzer.Valgrind.TrackOrigins">true</value>
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281 <valuelist type="QVariantList" key="PE.EnvironmentAspect.Changes"/>
282 <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.Arguments"></value>
283 <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.Executable">doxygen</value>
284 <value type="bool" key="ProjectExplorer.CustomExecutableRunConfiguration.UseTerminal">true</value>
285 <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.WorkingDirectory">/opt/DEV_PLE/doc</value>
286 <value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">Run doxygen</value>
287 <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName"></value>
288 <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">ProjectExplorer.CustomExecutableRunConfiguration</value>
289 <value type="uint" key="RunConfiguration.QmlDebugServerPort">3768</value>
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294 <value type="bool" key="RunConfiguration.UseQmlDebuggerAuto">true</value>
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297 </valuemap>
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298 </data>
326 </data>
299 <data>
327 <data>
300 <variable>ProjectExplorer.Project.TargetCount</variable>
328 <variable>ProjectExplorer.Project.TargetCount</variable>
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302 </data>
330 </data>
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334 </data>
307 <data>
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336 <variable>ProjectExplorer.Project.Updater.FileVersion</variable>
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310 </data>
338 </data>
311 </qtcreator>
339 </qtcreator>
@@ -1,603 +1,605
1 #ifndef CCSDS_TYPES_H_INCLUDED
1 #ifndef CCSDS_TYPES_H_INCLUDED
2 #define CCSDS_TYPES_H_INCLUDED
2 #define CCSDS_TYPES_H_INCLUDED
3
3
4 #define CCSDS_PROTOCOLE_EXTRA_BYTES 4
4 #define CCSDS_PROTOCOLE_EXTRA_BYTES 4
5 #define CCSDS_TELEMETRY_HEADER_LENGTH 16+4
5 #define CCSDS_TELEMETRY_HEADER_LENGTH 16+4
6 #define CCSDS_TM_PKT_MAX_SIZE 4412
6 #define CCSDS_TM_PKT_MAX_SIZE 4412
7 #define CCSDS_TELECOMMAND_HEADER_LENGTH 10+4
7 #define CCSDS_TELECOMMAND_HEADER_LENGTH 10+4
8 #define CCSDS_TC_PKT_MAX_SIZE 256
8 #define CCSDS_TC_PKT_MAX_SIZE 256
9 #define CCSDS_TC_PKT_MIN_SIZE 16
9 #define CCSDS_TC_PKT_MIN_SIZE 16
10 #define CCSDS_TC_TM_PACKET_OFFSET 7
10 #define CCSDS_TC_TM_PACKET_OFFSET 7
11 #define CCSDS_PROCESS_ID 76
11 #define CCSDS_PROCESS_ID 76
12 #define CCSDS_PACKET_CATEGORY 12
12 #define CCSDS_PACKET_CATEGORY 12
13 #define CCSDS_NODE_ADDRESS 0xfe
13 #define CCSDS_NODE_ADDRESS 0xfe
14 #define CCSDS_USER_APP 0x00
14 #define CCSDS_USER_APP 0x00
15
15
16 #define DEFAULT_SPARE1_PUSVERSION_SPARE2 0x10
16 #define DEFAULT_SPARE1_PUSVERSION_SPARE2 0x10
17 #define DEFAULT_RESERVED 0x00
17 #define DEFAULT_RESERVED 0x00
18 #define DEFAULT_HKBIA 0x1e // 0001 1110
18 #define DEFAULT_HKBIA 0x1e // 0001 1110
19
19
20 // PACKET ID
20 // PACKET ID
21 #define TM_PACKET_ID_TC_EXE 0x0cc1 // PID 76 CAT 1
21 #define TM_PACKET_ID_TC_EXE 0x0cc1 // PID 76 CAT 1
22 #define TM_PACKET_ID_HK 0x0cc4 // PID 76 CAT 4
22 #define TM_PACKET_ID_HK 0x0cc4 // PID 76 CAT 4
23 #define TM_PACKET_ID_PARAMETER_DUMP 0x0cc9 // PID 76 CAT 9
23 #define TM_PACKET_ID_PARAMETER_DUMP 0x0cc9 // PID 76 CAT 9
24 #define TM_PACKET_ID_SCIENCE_NORMAL_BURST 0x0ccc // PID 76 CAT 12
24 #define TM_PACKET_ID_SCIENCE_NORMAL_BURST 0x0ccc // PID 76 CAT 12
25 #define TM_PACKET_ID_SCIENCE_SBM1_SBM2 0x0cfc // PID 79 CAT 12
25 #define TM_PACKET_ID_SCIENCE_SBM1_SBM2 0x0cfc // PID 79 CAT 12
26 #define TM_PACKET_PID_DEFAULT 76
26 #define TM_PACKET_PID_DEFAULT 76
27 #define TM_PACKET_PID_BURST_SBM1_SBM2 79
27 #define TM_PACKET_PID_BURST_SBM1_SBM2 79
28 #define TM_PACKET_CAT_TC_EXE 1
28 #define TM_PACKET_CAT_TC_EXE 1
29 #define TM_PACKET_CAT_HK 4
29 #define TM_PACKET_CAT_HK 4
30 #define TM_PACKET_CAT_PARAMETER_DUMP 9
30 #define TM_PACKET_CAT_PARAMETER_DUMP 9
31 #define TM_PACKET_CAT_SCIENCE 12
31 #define TM_PACKET_CAT_SCIENCE 12
32
32
33 // PACKET SEQUENCE CONTROL
33 // PACKET SEQUENCE CONTROL
34 #define TM_PACKET_SEQ_CTRL_CONTINUATION 0x00 // [0000 0000]
34 #define TM_PACKET_SEQ_CTRL_CONTINUATION 0x00 // [0000 0000]
35 #define TM_PACKET_SEQ_CTRL_FIRST 0x40 // [0100 0000]
35 #define TM_PACKET_SEQ_CTRL_FIRST 0x40 // [0100 0000]
36 #define TM_PACKET_SEQ_CTRL_LAST 0x80 // [1000 0000]
36 #define TM_PACKET_SEQ_CTRL_LAST 0x80 // [1000 0000]
37 #define TM_PACKET_SEQ_CTRL_STANDALONE 0xc0 // [1100 0000]
37 #define TM_PACKET_SEQ_CTRL_STANDALONE 0xc0 // [1100 0000]
38 #define TM_PACKET_SEQ_CNT_DEFAULT 0x00 // [0000 0000]
38 #define TM_PACKET_SEQ_CNT_DEFAULT 0x00 // [0000 0000]
39
39
40 // DESTINATION ID
40 // DESTINATION ID
41 #define TM_DESTINATION_ID_GROUND 0
41 #define TM_DESTINATION_ID_GROUND 0
42 #define TM_DESTINATION_ID_MISSION_TIMELINE 110
42 #define TM_DESTINATION_ID_MISSION_TIMELINE 110
43 #define TM_DESTINATION_ID_TC_SEQUENCES 111
43 #define TM_DESTINATION_ID_TC_SEQUENCES 111
44 #define TM_DESTINATION_ID_RECOVERY_ACTION_COMMAND 112
44 #define TM_DESTINATION_ID_RECOVERY_ACTION_COMMAND 112
45 #define TM_DESTINATION_ID_BACKUP_MISSION_TIMELINE 113
45 #define TM_DESTINATION_ID_BACKUP_MISSION_TIMELINE 113
46 #define TM_DESTINATION_ID_DIRECT_CMD 120
46 #define TM_DESTINATION_ID_DIRECT_CMD 120
47 #define TM_DESTINATION_ID_SPARE_GRD_SRC1 121
47 #define TM_DESTINATION_ID_SPARE_GRD_SRC1 121
48 #define TM_DESTINATION_ID_SPARE_GRD_SRC2 122
48 #define TM_DESTINATION_ID_SPARE_GRD_SRC2 122
49 #define TM_DESTINATION_ID_OBCP 15
49 #define TM_DESTINATION_ID_OBCP 15
50 #define TM_DESTINATION_ID_SYSTEM_CONTROL 14
50 #define TM_DESTINATION_ID_SYSTEM_CONTROL 14
51 #define TM_DESTINATION_ID_AOCS 11
51 #define TM_DESTINATION_ID_AOCS 11
52
52
53 #define CCSDS_DESTINATION_ID 0x01
53 #define CCSDS_DESTINATION_ID 0x01
54 #define CCSDS_PROTOCOLE_ID 0x02
54 #define CCSDS_PROTOCOLE_ID 0x02
55 #define CCSDS_RESERVED 0x00
55 #define CCSDS_RESERVED 0x00
56 #define CCSDS_USER_APP 0x00
56 #define CCSDS_USER_APP 0x00
57
57
58 #define SIZE_TM_LFR_TC_EXE_NOT_IMPLEMENTED 24
58 #define SIZE_TM_LFR_TC_EXE_NOT_IMPLEMENTED 24
59 #define SIZE_TM_LFR_TC_EXE_CORRUPTED 32
59 #define SIZE_TM_LFR_TC_EXE_CORRUPTED 32
60 #define SIZE_HK_PARAMETERS 112
60 #define SIZE_HK_PARAMETERS 112
61
61
62 // TC TYPES
62 // TC TYPES
63 #define TC_TYPE_GEN 181
63 #define TC_TYPE_GEN 181
64 #define TC_TYPE_TIME 9
64 #define TC_TYPE_TIME 9
65
65
66 // TC SUBTYPES
66 // TC SUBTYPES
67 #define TC_SUBTYPE_RESET 1
67 #define TC_SUBTYPE_RESET 1
68 #define TC_SUBTYPE_LOAD_COMM 11
68 #define TC_SUBTYPE_LOAD_COMM 11
69 #define TC_SUBTYPE_LOAD_NORM 13
69 #define TC_SUBTYPE_LOAD_NORM 13
70 #define TC_SUBTYPE_LOAD_BURST 19
70 #define TC_SUBTYPE_LOAD_BURST 19
71 #define TC_SUBTYPE_LOAD_SBM1 25
71 #define TC_SUBTYPE_LOAD_SBM1 25
72 #define TC_SUBTYPE_LOAD_SBM2 27
72 #define TC_SUBTYPE_LOAD_SBM2 27
73 #define TC_SUBTYPE_DUMP 31
73 #define TC_SUBTYPE_DUMP 31
74 #define TC_SUBTYPE_ENTER 41
74 #define TC_SUBTYPE_ENTER 41
75 #define TC_SUBTYPE_UPDT_INFO 51
75 #define TC_SUBTYPE_UPDT_INFO 51
76 #define TC_SUBTYPE_EN_CAL 61
76 #define TC_SUBTYPE_EN_CAL 61
77 #define TC_SUBTYPE_DIS_CAL 63
77 #define TC_SUBTYPE_DIS_CAL 63
78 #define TC_SUBTYPE_UPDT_TIME 129
78 #define TC_SUBTYPE_UPDT_TIME 129
79
79
80 // TC LEN
80 // TC LEN
81 #define TC_LEN_RESET 12
81 #define TC_LEN_RESET 12
82 #define TC_LEN_LOAD_COMM 14
82 #define TC_LEN_LOAD_COMM 14
83 #define TC_LEN_LOAD_NORM 22
83 #define TC_LEN_LOAD_NORM 22
84 #define TC_LEN_LOAD_BURST 14
84 #define TC_LEN_LOAD_BURST 14
85 #define TC_LEN_LOAD_SBM1 14
85 #define TC_LEN_LOAD_SBM1 14
86 #define TC_LEN_LOAD_SBM2 14
86 #define TC_LEN_LOAD_SBM2 14
87 #define TC_LEN_DUMP 12
87 #define TC_LEN_DUMP 12
88 #define TC_LEN_ENTER 20
88 #define TC_LEN_ENTER 20
89 #define TC_LEN_UPDT_INFO 46
89 #define TC_LEN_UPDT_INFO 46
90 #define TC_LEN_EN_CAL 12
90 #define TC_LEN_EN_CAL 12
91 #define TC_LEN_DIS_CAL 12
91 #define TC_LEN_DIS_CAL 12
92 #define TC_LEN_UPDT_TIME 18
92 #define TC_LEN_UPDT_TIME 18
93
93
94 // TM TYPES
94 // TM TYPES
95 #define TM_TYPE_TC_EXE 1
95 #define TM_TYPE_TC_EXE 1
96 #define TM_TYPE_HK 3
96 #define TM_TYPE_HK 3
97 #define TM_TYPE_PARAMETER_DUMP 3
97 #define TM_TYPE_PARAMETER_DUMP 3
98 #define TM_TYPE_LFR_SCIENCE 21
98 #define TM_TYPE_LFR_SCIENCE 21
99
99
100 // TM SUBTYPES
100 // TM SUBTYPES
101 #define TM_SUBTYPE_EXE_OK 7
101 #define TM_SUBTYPE_EXE_OK 7
102 #define TM_SUBTYPE_EXE_NOK 8
102 #define TM_SUBTYPE_EXE_NOK 8
103 #define TM_SUBTYPE_HK 25
103 #define TM_SUBTYPE_HK 25
104 #define TM_SUBTYPE_PARAMETER_DUMP 25
104 #define TM_SUBTYPE_PARAMETER_DUMP 25
105 #define TM_SUBTYPE_SCIENCE 3
105 #define TM_SUBTYPE_SCIENCE 3
106 #define TM_SUBTYPE_LFR_SCIENCE 3
106 #define TM_SUBTYPE_LFR_SCIENCE 3
107
107
108 // FAILURE CODES
108 // FAILURE CODES
109 #define ILLEGAL_APID 0
109 #define ILLEGAL_APID 0
110 #define WRONG_LEN_PKT 1
110 #define WRONG_LEN_PKT 1
111 #define INCOR_CHECKSUM 2
111 #define INCOR_CHECKSUM 2
112 #define ILL_TYPE 3
112 #define ILL_TYPE 3
113 #define ILL_SUBTYPE 4
113 #define ILL_SUBTYPE 4
114 #define WRONG_APP_DATA 5 // 0x00 0x05
114 #define WRONG_APP_DATA 5 // 0x00 0x05
115 #define TC_NOT_EXE 42000 // 0xa4 0x10
115 #define TC_NOT_EXE 42000 // 0xa4 0x10
116 #define WRONG_SRC_ID 42001 // 0xa4 0x11
116 #define WRONG_SRC_ID 42001 // 0xa4 0x11
117 #define FUNCT_NOT_IMPL 42002 // 0xa4 0x12
117 #define FUNCT_NOT_IMPL 42002 // 0xa4 0x12
118 #define FAIL_DETECTED 42003 // 0xa4 0x13
118 #define FAIL_DETECTED 42003 // 0xa4 0x13
119 #define NOT_ALLOWED 42004 // 0xa4 0x14
119 #define NOT_ALLOWED 42004 // 0xa4 0x14
120 #define CORRUPTED 42005 // 0xa4 0x15
120 #define CORRUPTED 42005 // 0xa4 0x15
121 #define CCSDS_TM_VALID 7
121 #define CCSDS_TM_VALID 7
122
122
123 // TC SID
123 // TC SID
124 #define SID_TC_GROUND 0
124 #define SID_TC_GROUND 0
125 #define SID_TC_MISSION_TIMELINE 110
125 #define SID_TC_MISSION_TIMELINE 110
126 #define SID_TC_TC_SEQUENCES 111
126 #define SID_TC_TC_SEQUENCES 111
127 #define SID_TC_RECOVERY_ACTION_CMD 112
127 #define SID_TC_RECOVERY_ACTION_CMD 112
128 #define SID_TC_BACKUP_MISSION_TIMELINE 113
128 #define SID_TC_BACKUP_MISSION_TIMELINE 113
129 #define SID_TC_DIRECT_CMD 120
129 #define SID_TC_DIRECT_CMD 120
130 #define SID_TC_SPARE_GRD_SRC1 121
130 #define SID_TC_SPARE_GRD_SRC1 121
131 #define SID_TC_SPARE_GRD_SRC2 122
131 #define SID_TC_SPARE_GRD_SRC2 122
132 #define SID_TC_OBCP 15
132 #define SID_TC_OBCP 15
133 #define SID_TC_SYSTEM_CONTROL 14
133 #define SID_TC_SYSTEM_CONTROL 14
134 #define SID_TC_AOCS 11
134 #define SID_TC_AOCS 11
135 #define SID_TC_RPW_INTERNAL 254
135 #define SID_TC_RPW_INTERNAL 254
136
136
137 enum apid_destid{
137 enum apid_destid{
138 GROUND,
138 GROUND,
139 MISSION_TIMELINE,
139 MISSION_TIMELINE,
140 TC_SEQUENCES,
140 TC_SEQUENCES,
141 RECOVERY_ACTION_CMD,
141 RECOVERY_ACTION_CMD,
142 BACKUP_MISSION_TIMELINE,
142 BACKUP_MISSION_TIMELINE,
143 DIRECT_CMD,
143 DIRECT_CMD,
144 SPARE_GRD_SRC1,
144 SPARE_GRD_SRC1,
145 SPARE_GRD_SRC2,
145 SPARE_GRD_SRC2,
146 OBCP,
146 OBCP,
147 SYSTEM_CONTROL,
147 SYSTEM_CONTROL,
148 AOCS,
148 AOCS,
149 RPW_INTERNAL
149 RPW_INTERNAL
150 };
150 };
151 // SEQUENCE COUNTERS
151 // SEQUENCE COUNTERS
152 #define SEQ_CNT_MAX 16383
152 #define SEQ_CNT_MAX 16383
153 #define SEQ_CNT_NB_DEST_ID 12
153 #define SEQ_CNT_NB_DEST_ID 12
154
154
155 // TM SID
155 // TM SID
156 #define SID_HK 1
156 #define SID_HK 1
157 #define SID_PARAMETER_DUMP 10
157 #define SID_PARAMETER_DUMP 10
158
158
159 #define SID_NORM_SWF_F0 3
159 #define SID_NORM_SWF_F0 3
160 #define SID_NORM_SWF_F1 4
160 #define SID_NORM_SWF_F1 4
161 #define SID_NORM_SWF_F2 5
161 #define SID_NORM_SWF_F2 5
162 #define SID_NORM_CWF_F3 1
162 #define SID_NORM_CWF_F3 1
163 #define SID_BURST_CWF_F2 2
163 #define SID_BURST_CWF_F2 2
164 #define SID_SBM1_CWF_F1 24
164 #define SID_SBM1_CWF_F1 24
165 #define SID_SBM2_CWF_F2 25
165 #define SID_SBM2_CWF_F2 25
166 #define SID_NORM_ASM_F0 11
166 #define SID_NORM_ASM_F0 11
167 #define SID_NORM_ASM_F1 12
167 #define SID_NORM_ASM_F1 12
168 #define SID_NORM_ASM_F2 13
168 #define SID_NORM_ASM_F2 13
169 #define SID_NORM_BP1_F0 14
169 #define SID_NORM_BP1_F0 14
170 #define SID_NORM_BP1_F1 15
170 #define SID_NORM_BP1_F1 15
171 #define SID_NORM_BP1_F2 16
171 #define SID_NORM_BP1_F2 16
172 #define SID_NORM_BP2_F0 19
172 #define SID_NORM_BP2_F0 19
173 #define SID_NORM_BP2_F1 20
173 #define SID_NORM_BP2_F1 20
174 #define SID_NORM_BP2_F2 21
174 #define SID_NORM_BP2_F2 21
175 #define SID_BURST_BP1_F0 17
175 #define SID_BURST_BP1_F0 17
176 #define SID_BURST_BP2_F0 22
176 #define SID_BURST_BP2_F0 22
177 #define SID_BURST_BP1_F1 18
177 #define SID_BURST_BP1_F1 18
178 #define SID_BURST_BP2_F1 23
178 #define SID_BURST_BP2_F1 23
179 #define SID_SBM1_BP1_F0 28
179 #define SID_SBM1_BP1_F0 28
180 #define SID_SBM1_BP2_F0 31
180 #define SID_SBM1_BP2_F0 31
181 #define SID_SBM2_BP1_F0 29
181 #define SID_SBM2_BP1_F0 29
182 #define SID_SBM2_BP2_F0 32
182 #define SID_SBM2_BP2_F0 32
183 #define SID_SBM2_BP1_F1 30
183 #define SID_SBM2_BP1_F1 30
184 #define SID_SBM2_BP2_F1 33
184 #define SID_SBM2_BP2_F1 33
185 #define SID_NORM_CWF_LONG_F3 34
185 #define SID_NORM_CWF_LONG_F3 34
186
186
187 // LENGTH (BYTES)
187 // LENGTH (BYTES)
188 #define LENGTH_TM_LFR_TC_EXE_MAX 32
188 #define LENGTH_TM_LFR_TC_EXE_MAX 32
189 #define LENGTH_TM_LFR_HK 126
189 #define LENGTH_TM_LFR_HK 126
190
190
191 // HEADER_LENGTH
191 // HEADER_LENGTH
192 #define TM_HEADER_LEN 16
192 #define TM_HEADER_LEN 16
193 #define HEADER_LENGTH_TM_LFR_SCIENCE_ASM 28
193 #define HEADER_LENGTH_TM_LFR_SCIENCE_ASM 28
194 // PACKET_LENGTH
194 // PACKET_LENGTH
195 #define PACKET_LENGTH_TC_EXE_SUCCESS (20 - CCSDS_TC_TM_PACKET_OFFSET)
195 #define PACKET_LENGTH_TC_EXE_SUCCESS (20 - CCSDS_TC_TM_PACKET_OFFSET)
196 #define PACKET_LENGTH_TC_EXE_INCONSISTENT (26 - CCSDS_TC_TM_PACKET_OFFSET)
196 #define PACKET_LENGTH_TC_EXE_INCONSISTENT (26 - CCSDS_TC_TM_PACKET_OFFSET)
197 #define PACKET_LENGTH_TC_EXE_NOT_EXECUTABLE (26 - CCSDS_TC_TM_PACKET_OFFSET)
197 #define PACKET_LENGTH_TC_EXE_NOT_EXECUTABLE (26 - CCSDS_TC_TM_PACKET_OFFSET)
198 #define PACKET_LENGTH_TC_EXE_NOT_IMPLEMENTED (24 - CCSDS_TC_TM_PACKET_OFFSET)
198 #define PACKET_LENGTH_TC_EXE_NOT_IMPLEMENTED (24 - CCSDS_TC_TM_PACKET_OFFSET)
199 #define PACKET_LENGTH_TC_EXE_ERROR (24 - CCSDS_TC_TM_PACKET_OFFSET)
199 #define PACKET_LENGTH_TC_EXE_ERROR (24 - CCSDS_TC_TM_PACKET_OFFSET)
200 #define PACKET_LENGTH_TC_EXE_CORRUPTED (32 - CCSDS_TC_TM_PACKET_OFFSET)
200 #define PACKET_LENGTH_TC_EXE_CORRUPTED (32 - CCSDS_TC_TM_PACKET_OFFSET)
201 #define PACKET_LENGTH_HK (126 - CCSDS_TC_TM_PACKET_OFFSET)
201 #define PACKET_LENGTH_HK (126 - CCSDS_TC_TM_PACKET_OFFSET)
202 #define PACKET_LENGTH_PARAMETER_DUMP (34 - CCSDS_TC_TM_PACKET_OFFSET)
202 #define PACKET_LENGTH_PARAMETER_DUMP (34 - CCSDS_TC_TM_PACKET_OFFSET)
203 #define PACKET_LENGTH_TM_LFR_SCIENCE_ASM (TOTAL_SIZE_SM + HEADER_LENGTH_TM_LFR_SCIENCE_ASM - CCSDS_TC_TM_PACKET_OFFSET)
203 #define PACKET_LENGTH_TM_LFR_SCIENCE_ASM (TOTAL_SIZE_SM + HEADER_LENGTH_TM_LFR_SCIENCE_ASM - CCSDS_TC_TM_PACKET_OFFSET)
204
204
205 #define SPARE1_PUSVERSION_SPARE2 0x10
205 #define SPARE1_PUSVERSION_SPARE2 0x10
206
206
207 #define LEN_TM_LFR_HK 130 // 126 + 4
207 #define LEN_TM_LFR_HK 130 // 126 + 4
208 #define LEN_TM_LFR_TC_EXE_NOT_IMP 28 // 24 + 4
208 #define LEN_TM_LFR_TC_EXE_NOT_IMP 28 // 24 + 4
209
209
210 // R1
210 // R1
211 #define TM_LEN_SCI_SWF_340 4101 // 340 * 12 + 10 + 12 - 1
211 #define TM_LEN_SCI_SWF_340 4101 // 340 * 12 + 10 + 12 - 1
212 #define TM_LEN_SCI_SWF_8 117 // 8 * 12 + 10 + 12 - 1
212 #define TM_LEN_SCI_SWF_8 117 // 8 * 12 + 10 + 12 - 1
213 // R2
214 #define TM_LEN_SCI_SWF_304 3669 // 304 * 12 + 10 + 12 - 1
215 #define TM_LEN_SCI_SWF_224 2709 // 224 * 12 + 10 + 12 - 1
216 //
217 #define TM_LEN_SCI_CWF_340 4099 // 340 * 12 + 10 + 10 - 1
213 #define TM_LEN_SCI_CWF_340 4099 // 340 * 12 + 10 + 10 - 1
218 #define TM_LEN_SCI_CWF_8 115 // 8 * 12 + 10 + 10 - 1
214 #define TM_LEN_SCI_CWF_8 115 // 8 * 12 + 10 + 10 - 1
219 #define TM_LEN_SCI_CWF3_LIGHT_340 2059 // 340 * 6 + 10 + 10 - 1
215 #define TM_LEN_SCI_CWF3_LIGHT_340 2059 // 340 * 6 + 10 + 10 - 1
220 #define TM_LEN_SCI_CWF3_LIGHT_8 67 // 8 * 6 + 10 + 10 - 1
216 #define TM_LEN_SCI_CWF3_LIGHT_8 67 // 8 * 6 + 10 + 10 - 1
217 // R2
218 #define TM_LEN_SCI_SWF_304 3669 // 304 * 12 + 10 + 12 - 1
219 #define TM_LEN_SCI_SWF_224 2709 // 224 * 12 + 10 + 12 - 1
220 #define TM_LEN_SCI_CWF_336 4051 // 336 * 12 + 10 + 10 - 1
221 #define TM_LEN_SCI_CWF_672 4051 // 672 * 6 + 10 + 10 - 1
222 //
221 #define DEFAULT_PKTCNT 0x07
223 #define DEFAULT_PKTCNT 0x07
222 #define BLK_NR_340 0x0154
223 #define BLK_NR_8 0x0008
224 #define BLK_NR_304 0x0130
224 #define BLK_NR_304 0x0130
225 #define BLK_NR_224 0x00e0
225 #define BLK_NR_224 0x00e0
226 #define BLK_NR_CWF 0x0150 // 336
227 #define BLK_NR_CWF_SHORT_F3 0x02a0 // 672
226
228
227 enum TM_TYPE{
229 enum TM_TYPE{
228 TM_LFR_TC_EXE_OK,
230 TM_LFR_TC_EXE_OK,
229 TM_LFR_TC_EXE_ERR,
231 TM_LFR_TC_EXE_ERR,
230 TM_LFR_HK,
232 TM_LFR_HK,
231 TM_LFR_SCI,
233 TM_LFR_SCI,
232 TM_LFR_SCI_SBM,
234 TM_LFR_SCI_SBM,
233 TM_LFR_PAR_DUMP
235 TM_LFR_PAR_DUMP
234 };
236 };
235
237
236 typedef struct {
238 typedef struct {
237 unsigned char targetLogicalAddress;
239 unsigned char targetLogicalAddress;
238 unsigned char protocolIdentifier;
240 unsigned char protocolIdentifier;
239 unsigned char reserved;
241 unsigned char reserved;
240 unsigned char userApplication;
242 unsigned char userApplication;
241 // PACKET HEADER
243 // PACKET HEADER
242 unsigned char packetID[2];
244 unsigned char packetID[2];
243 unsigned char packetSequenceControl[2];
245 unsigned char packetSequenceControl[2];
244 unsigned char packetLength[2];
246 unsigned char packetLength[2];
245 // DATA FIELD HEADER
247 // DATA FIELD HEADER
246 unsigned char spare1_pusVersion_spare2;
248 unsigned char spare1_pusVersion_spare2;
247 unsigned char serviceType;
249 unsigned char serviceType;
248 unsigned char serviceSubType;
250 unsigned char serviceSubType;
249 unsigned char destinationID;
251 unsigned char destinationID;
250 unsigned char time[6];
252 unsigned char time[6];
251 //
253 //
252 unsigned char telecommand_pkt_id[2];
254 unsigned char telecommand_pkt_id[2];
253 unsigned char pkt_seq_control[2];
255 unsigned char pkt_seq_control[2];
254 } Packet_TM_LFR_TC_EXE_SUCCESS_t;
256 } Packet_TM_LFR_TC_EXE_SUCCESS_t;
255
257
256 typedef struct {
258 typedef struct {
257 unsigned char targetLogicalAddress;
259 unsigned char targetLogicalAddress;
258 unsigned char protocolIdentifier;
260 unsigned char protocolIdentifier;
259 unsigned char reserved;
261 unsigned char reserved;
260 unsigned char userApplication;
262 unsigned char userApplication;
261 // PACKET HEADER
263 // PACKET HEADER
262 unsigned char packetID[2];
264 unsigned char packetID[2];
263 unsigned char packetSequenceControl[2];
265 unsigned char packetSequenceControl[2];
264 unsigned char packetLength[2];
266 unsigned char packetLength[2];
265 // DATA FIELD HEADER
267 // DATA FIELD HEADER
266 unsigned char spare1_pusVersion_spare2;
268 unsigned char spare1_pusVersion_spare2;
267 unsigned char serviceType;
269 unsigned char serviceType;
268 unsigned char serviceSubType;
270 unsigned char serviceSubType;
269 unsigned char destinationID;
271 unsigned char destinationID;
270 unsigned char time[6];
272 unsigned char time[6];
271 //
273 //
272 unsigned char tc_failure_code[2];
274 unsigned char tc_failure_code[2];
273 unsigned char telecommand_pkt_id[2];
275 unsigned char telecommand_pkt_id[2];
274 unsigned char pkt_seq_control[2];
276 unsigned char pkt_seq_control[2];
275 unsigned char tc_service;
277 unsigned char tc_service;
276 unsigned char tc_subtype;
278 unsigned char tc_subtype;
277 unsigned char byte_position;
279 unsigned char byte_position;
278 unsigned char rcv_value;
280 unsigned char rcv_value;
279 } Packet_TM_LFR_TC_EXE_INCONSISTENT_t;
281 } Packet_TM_LFR_TC_EXE_INCONSISTENT_t;
280
282
281 typedef struct {
283 typedef struct {
282 unsigned char targetLogicalAddress;
284 unsigned char targetLogicalAddress;
283 unsigned char protocolIdentifier;
285 unsigned char protocolIdentifier;
284 unsigned char reserved;
286 unsigned char reserved;
285 unsigned char userApplication;
287 unsigned char userApplication;
286 // PACKET HEADER
288 // PACKET HEADER
287 unsigned char packetID[2];
289 unsigned char packetID[2];
288 unsigned char packetSequenceControl[2];
290 unsigned char packetSequenceControl[2];
289 unsigned char packetLength[2];
291 unsigned char packetLength[2];
290 // DATA FIELD HEADER
292 // DATA FIELD HEADER
291 unsigned char spare1_pusVersion_spare2;
293 unsigned char spare1_pusVersion_spare2;
292 unsigned char serviceType;
294 unsigned char serviceType;
293 unsigned char serviceSubType;
295 unsigned char serviceSubType;
294 unsigned char destinationID;
296 unsigned char destinationID;
295 unsigned char time[6];
297 unsigned char time[6];
296 //
298 //
297 unsigned char tc_failure_code[2];
299 unsigned char tc_failure_code[2];
298 unsigned char telecommand_pkt_id[2];
300 unsigned char telecommand_pkt_id[2];
299 unsigned char pkt_seq_control[2];
301 unsigned char pkt_seq_control[2];
300 unsigned char tc_service;
302 unsigned char tc_service;
301 unsigned char tc_subtype;
303 unsigned char tc_subtype;
302 unsigned char lfr_status_word[2];
304 unsigned char lfr_status_word[2];
303 } Packet_TM_LFR_TC_EXE_NOT_EXECUTABLE_t;
305 } Packet_TM_LFR_TC_EXE_NOT_EXECUTABLE_t;
304
306
305 typedef struct {
307 typedef struct {
306 unsigned char targetLogicalAddress;
308 unsigned char targetLogicalAddress;
307 unsigned char protocolIdentifier;
309 unsigned char protocolIdentifier;
308 unsigned char reserved;
310 unsigned char reserved;
309 unsigned char userApplication;
311 unsigned char userApplication;
310 // PACKET HEADER
312 // PACKET HEADER
311 unsigned char packetID[2];
313 unsigned char packetID[2];
312 unsigned char packetSequenceControl[2];
314 unsigned char packetSequenceControl[2];
313 unsigned char packetLength[2];
315 unsigned char packetLength[2];
314 // DATA FIELD HEADER
316 // DATA FIELD HEADER
315 unsigned char spare1_pusVersion_spare2;
317 unsigned char spare1_pusVersion_spare2;
316 unsigned char serviceType;
318 unsigned char serviceType;
317 unsigned char serviceSubType;
319 unsigned char serviceSubType;
318 unsigned char destinationID;
320 unsigned char destinationID;
319 unsigned char time[6];
321 unsigned char time[6];
320 //
322 //
321 unsigned char tc_failure_code[2];
323 unsigned char tc_failure_code[2];
322 unsigned char telecommand_pkt_id[2];
324 unsigned char telecommand_pkt_id[2];
323 unsigned char pkt_seq_control[2];
325 unsigned char pkt_seq_control[2];
324 unsigned char tc_service;
326 unsigned char tc_service;
325 unsigned char tc_subtype;
327 unsigned char tc_subtype;
326 } Packet_TM_LFR_TC_EXE_NOT_IMPLEMENTED_t;
328 } Packet_TM_LFR_TC_EXE_NOT_IMPLEMENTED_t;
327
329
328 typedef struct {
330 typedef struct {
329 unsigned char targetLogicalAddress;
331 unsigned char targetLogicalAddress;
330 unsigned char protocolIdentifier;
332 unsigned char protocolIdentifier;
331 unsigned char reserved;
333 unsigned char reserved;
332 unsigned char userApplication;
334 unsigned char userApplication;
333 // PACKET HEADER
335 // PACKET HEADER
334 unsigned char packetID[2];
336 unsigned char packetID[2];
335 unsigned char packetSequenceControl[2];
337 unsigned char packetSequenceControl[2];
336 unsigned char packetLength[2];
338 unsigned char packetLength[2];
337 // DATA FIELD HEADER
339 // DATA FIELD HEADER
338 unsigned char spare1_pusVersion_spare2;
340 unsigned char spare1_pusVersion_spare2;
339 unsigned char serviceType;
341 unsigned char serviceType;
340 unsigned char serviceSubType;
342 unsigned char serviceSubType;
341 unsigned char destinationID;
343 unsigned char destinationID;
342 unsigned char time[6];
344 unsigned char time[6];
343 //
345 //
344 unsigned char tc_failure_code[2];
346 unsigned char tc_failure_code[2];
345 unsigned char telecommand_pkt_id[2];
347 unsigned char telecommand_pkt_id[2];
346 unsigned char pkt_seq_control[2];
348 unsigned char pkt_seq_control[2];
347 unsigned char tc_service;
349 unsigned char tc_service;
348 unsigned char tc_subtype;
350 unsigned char tc_subtype;
349 } Packet_TM_LFR_TC_EXE_ERROR_t;
351 } Packet_TM_LFR_TC_EXE_ERROR_t;
350
352
351 typedef struct {
353 typedef struct {
352 unsigned char targetLogicalAddress;
354 unsigned char targetLogicalAddress;
353 unsigned char protocolIdentifier;
355 unsigned char protocolIdentifier;
354 unsigned char reserved;
356 unsigned char reserved;
355 unsigned char userApplication;
357 unsigned char userApplication;
356 // PACKET HEADER
358 // PACKET HEADER
357 unsigned char packetID[2];
359 unsigned char packetID[2];
358 unsigned char packetSequenceControl[2];
360 unsigned char packetSequenceControl[2];
359 unsigned char packetLength[2];
361 unsigned char packetLength[2];
360 // DATA FIELD HEADER
362 // DATA FIELD HEADER
361 unsigned char spare1_pusVersion_spare2;
363 unsigned char spare1_pusVersion_spare2;
362 unsigned char serviceType;
364 unsigned char serviceType;
363 unsigned char serviceSubType;
365 unsigned char serviceSubType;
364 unsigned char destinationID;
366 unsigned char destinationID;
365 unsigned char time[6];
367 unsigned char time[6];
366 //
368 //
367 unsigned char tc_failure_code[2];
369 unsigned char tc_failure_code[2];
368 unsigned char telecommand_pkt_id[2];
370 unsigned char telecommand_pkt_id[2];
369 unsigned char pkt_seq_control[2];
371 unsigned char pkt_seq_control[2];
370 unsigned char tc_service;
372 unsigned char tc_service;
371 unsigned char tc_subtype;
373 unsigned char tc_subtype;
372 unsigned char pkt_len_rcv_value[2];
374 unsigned char pkt_len_rcv_value[2];
373 unsigned char pkt_datafieldsize_cnt[2];
375 unsigned char pkt_datafieldsize_cnt[2];
374 unsigned char rcv_crc[2];
376 unsigned char rcv_crc[2];
375 unsigned char computed_crc[2];
377 unsigned char computed_crc[2];
376 } Packet_TM_LFR_TC_EXE_CORRUPTED_t;
378 } Packet_TM_LFR_TC_EXE_CORRUPTED_t;
377
379
378 typedef struct {
380 typedef struct {
379 unsigned char targetLogicalAddress;
381 unsigned char targetLogicalAddress;
380 unsigned char protocolIdentifier;
382 unsigned char protocolIdentifier;
381 unsigned char reserved;
383 unsigned char reserved;
382 unsigned char userApplication;
384 unsigned char userApplication;
383 unsigned char packetID[2];
385 unsigned char packetID[2];
384 unsigned char packetSequenceControl[2];
386 unsigned char packetSequenceControl[2];
385 unsigned char packetLength[2];
387 unsigned char packetLength[2];
386 // DATA FIELD HEADER
388 // DATA FIELD HEADER
387 unsigned char spare1_pusVersion_spare2;
389 unsigned char spare1_pusVersion_spare2;
388 unsigned char serviceType;
390 unsigned char serviceType;
389 unsigned char serviceSubType;
391 unsigned char serviceSubType;
390 unsigned char destinationID;
392 unsigned char destinationID;
391 unsigned char time[6];
393 unsigned char time[6];
392 // AUXILIARY HEADER
394 // AUXILIARY HEADER
393 unsigned char sid;
395 unsigned char sid;
394 unsigned char hkBIA;
396 unsigned char hkBIA;
395 unsigned char pktCnt;
397 unsigned char pktCnt;
396 unsigned char pktNr;
398 unsigned char pktNr;
397 unsigned char acquisitionTime[6];
399 unsigned char acquisitionTime[6];
398 unsigned char blkNr[2];
400 unsigned char blkNr[2];
399 } Header_TM_LFR_SCIENCE_SWF_t;
401 } Header_TM_LFR_SCIENCE_SWF_t;
400
402
401 typedef struct {
403 typedef struct {
402 unsigned char targetLogicalAddress;
404 unsigned char targetLogicalAddress;
403 unsigned char protocolIdentifier;
405 unsigned char protocolIdentifier;
404 unsigned char reserved;
406 unsigned char reserved;
405 unsigned char userApplication;
407 unsigned char userApplication;
406 unsigned char packetID[2];
408 unsigned char packetID[2];
407 unsigned char packetSequenceControl[2];
409 unsigned char packetSequenceControl[2];
408 unsigned char packetLength[2];
410 unsigned char packetLength[2];
409 // DATA FIELD HEADER
411 // DATA FIELD HEADER
410 unsigned char spare1_pusVersion_spare2;
412 unsigned char spare1_pusVersion_spare2;
411 unsigned char serviceType;
413 unsigned char serviceType;
412 unsigned char serviceSubType;
414 unsigned char serviceSubType;
413 unsigned char destinationID;
415 unsigned char destinationID;
414 unsigned char time[6];
416 unsigned char time[6];
415 // AUXILIARY DATA HEADER
417 // AUXILIARY DATA HEADER
416 unsigned char sid;
418 unsigned char sid;
417 unsigned char hkBIA;
419 unsigned char hkBIA;
418 unsigned char acquisitionTime[6];
420 unsigned char acquisitionTime[6];
419 unsigned char blkNr[2];
421 unsigned char blkNr[2];
420 } Header_TM_LFR_SCIENCE_CWF_t;
422 } Header_TM_LFR_SCIENCE_CWF_t;
421
423
422 typedef struct {
424 typedef struct {
423 unsigned char targetLogicalAddress;
425 unsigned char targetLogicalAddress;
424 unsigned char protocolIdentifier;
426 unsigned char protocolIdentifier;
425 unsigned char reserved;
427 unsigned char reserved;
426 unsigned char userApplication;
428 unsigned char userApplication;
427 unsigned char packetID[2];
429 unsigned char packetID[2];
428 unsigned char packetSequenceControl[2];
430 unsigned char packetSequenceControl[2];
429 unsigned char packetLength[2];
431 unsigned char packetLength[2];
430 // DATA FIELD HEADER
432 // DATA FIELD HEADER
431 unsigned char spare1_pusVersion_spare2;
433 unsigned char spare1_pusVersion_spare2;
432 unsigned char serviceType;
434 unsigned char serviceType;
433 unsigned char serviceSubType;
435 unsigned char serviceSubType;
434 unsigned char destinationID;
436 unsigned char destinationID;
435 unsigned char time[6];
437 unsigned char time[6];
436 // AUXILIARY HEADER
438 // AUXILIARY HEADER
437 unsigned char sid;
439 unsigned char sid;
438 unsigned char biaStatusInfo;
440 unsigned char biaStatusInfo;
439 unsigned char cntASM;
441 unsigned char cntASM;
440 unsigned char nrASM;
442 unsigned char nrASM;
441 unsigned char acquisitionTime[6];
443 unsigned char acquisitionTime[6];
442 unsigned char blkNr[2];
444 unsigned char blkNr[2];
443 } Header_TM_LFR_SCIENCE_ASM_t;
445 } Header_TM_LFR_SCIENCE_ASM_t;
444
446
445 typedef struct {
447 typedef struct {
446 //targetLogicalAddress is removed by the grspw module
448 //targetLogicalAddress is removed by the grspw module
447 unsigned char protocolIdentifier;
449 unsigned char protocolIdentifier;
448 unsigned char reserved;
450 unsigned char reserved;
449 unsigned char userApplication;
451 unsigned char userApplication;
450 unsigned char packetID[2];
452 unsigned char packetID[2];
451 unsigned char packetSequenceControl[2];
453 unsigned char packetSequenceControl[2];
452 unsigned char packetLength[2];
454 unsigned char packetLength[2];
453 // DATA FIELD HEADER
455 // DATA FIELD HEADER
454 unsigned char headerFlag_pusVersion_Ack;
456 unsigned char headerFlag_pusVersion_Ack;
455 unsigned char serviceType;
457 unsigned char serviceType;
456 unsigned char serviceSubType;
458 unsigned char serviceSubType;
457 unsigned char sourceID;
459 unsigned char sourceID;
458 unsigned char dataAndCRC[CCSDS_TC_PKT_MAX_SIZE-10];
460 unsigned char dataAndCRC[CCSDS_TC_PKT_MAX_SIZE-10];
459 } ccsdsTelecommandPacket_t;
461 } ccsdsTelecommandPacket_t;
460
462
461 typedef struct {
463 typedef struct {
462 unsigned char targetLogicalAddress;
464 unsigned char targetLogicalAddress;
463 unsigned char protocolIdentifier;
465 unsigned char protocolIdentifier;
464 unsigned char reserved;
466 unsigned char reserved;
465 unsigned char userApplication;
467 unsigned char userApplication;
466 unsigned char packetID[2];
468 unsigned char packetID[2];
467 unsigned char packetSequenceControl[2];
469 unsigned char packetSequenceControl[2];
468 unsigned char packetLength[2];
470 unsigned char packetLength[2];
469 unsigned char spare1_pusVersion_spare2;
471 unsigned char spare1_pusVersion_spare2;
470 unsigned char serviceType;
472 unsigned char serviceType;
471 unsigned char serviceSubType;
473 unsigned char serviceSubType;
472 unsigned char destinationID;
474 unsigned char destinationID;
473 unsigned char time[6];
475 unsigned char time[6];
474 unsigned char sid;
476 unsigned char sid;
475
477
476 //**************
478 //**************
477 // HK PARAMETERS
479 // HK PARAMETERS
478 unsigned char lfr_status_word[2];
480 unsigned char lfr_status_word[2];
479 unsigned char lfr_sw_version[4];
481 unsigned char lfr_sw_version[4];
480 unsigned char lfr_fpga_version[3];
482 unsigned char lfr_fpga_version[3];
481 // ressource statistics
483 // ressource statistics
482 unsigned char hk_lfr_cpu_load;
484 unsigned char hk_lfr_cpu_load;
483 unsigned char hk_lfr_load_max;
485 unsigned char hk_lfr_load_max;
484 unsigned char hk_lfr_load_aver;
486 unsigned char hk_lfr_load_aver;
485 // tc statistics
487 // tc statistics
486 unsigned char hk_lfr_update_info_tc_cnt[2];
488 unsigned char hk_lfr_update_info_tc_cnt[2];
487 unsigned char hk_lfr_update_time_tc_cnt[2];
489 unsigned char hk_lfr_update_time_tc_cnt[2];
488 unsigned char hk_lfr_exe_tc_cnt[2];
490 unsigned char hk_lfr_exe_tc_cnt[2];
489 unsigned char hk_lfr_rej_tc_cnt[2];
491 unsigned char hk_lfr_rej_tc_cnt[2];
490 unsigned char hk_lfr_last_exe_tc_id[2];
492 unsigned char hk_lfr_last_exe_tc_id[2];
491 unsigned char hk_lfr_last_exe_tc_type[2];
493 unsigned char hk_lfr_last_exe_tc_type[2];
492 unsigned char hk_lfr_last_exe_tc_subtype[2];
494 unsigned char hk_lfr_last_exe_tc_subtype[2];
493 unsigned char hk_lfr_last_exe_tc_time[6];
495 unsigned char hk_lfr_last_exe_tc_time[6];
494 unsigned char hk_lfr_last_rej_tc_id[2];
496 unsigned char hk_lfr_last_rej_tc_id[2];
495 unsigned char hk_lfr_last_rej_tc_type[2];
497 unsigned char hk_lfr_last_rej_tc_type[2];
496 unsigned char hk_lfr_last_rej_tc_subtype[2];
498 unsigned char hk_lfr_last_rej_tc_subtype[2];
497 unsigned char hk_lfr_last_rej_tc_time[6];
499 unsigned char hk_lfr_last_rej_tc_time[6];
498 // anomaly statistics
500 // anomaly statistics
499 unsigned char hk_lfr_le_cnt[2];
501 unsigned char hk_lfr_le_cnt[2];
500 unsigned char hk_lfr_me_cnt[2];
502 unsigned char hk_lfr_me_cnt[2];
501 unsigned char hk_lfr_he_cnt[2];
503 unsigned char hk_lfr_he_cnt[2];
502 unsigned char hk_lfr_last_er_rid[2];
504 unsigned char hk_lfr_last_er_rid[2];
503 unsigned char hk_lfr_last_er_code;
505 unsigned char hk_lfr_last_er_code;
504 unsigned char hk_lfr_last_er_time[6];
506 unsigned char hk_lfr_last_er_time[6];
505 // vhdl_blk_status
507 // vhdl_blk_status
506 unsigned char hk_lfr_vhdl_aa_sm;
508 unsigned char hk_lfr_vhdl_aa_sm;
507 unsigned char hk_lfr_vhdl_fft_sr;
509 unsigned char hk_lfr_vhdl_fft_sr;
508 unsigned char hk_lfr_vhdl_cic_hk;
510 unsigned char hk_lfr_vhdl_cic_hk;
509 unsigned char hk_lfr_vhdl_iir_cal;
511 unsigned char hk_lfr_vhdl_iir_cal;
510 // spacewire_if_statistics
512 // spacewire_if_statistics
511 unsigned char hk_lfr_dpu_spw_pkt_rcv_cnt[2];
513 unsigned char hk_lfr_dpu_spw_pkt_rcv_cnt[2];
512 unsigned char hk_lfr_dpu_spw_pkt_sent_cnt[2];
514 unsigned char hk_lfr_dpu_spw_pkt_sent_cnt[2];
513 unsigned char hk_lfr_dpu_spw_tick_out_cnt;
515 unsigned char hk_lfr_dpu_spw_tick_out_cnt;
514 unsigned char hk_lfr_dpu_spw_last_timc;
516 unsigned char hk_lfr_dpu_spw_last_timc;
515 // ahb error statistics
517 // ahb error statistics
516 unsigned int hk_lfr_last_fail_addr;
518 unsigned int hk_lfr_last_fail_addr;
517 // temperatures
519 // temperatures
518 unsigned char hk_lfr_temp_scm[2];
520 unsigned char hk_lfr_temp_scm[2];
519 unsigned char hk_lfr_temp_pcb[2];
521 unsigned char hk_lfr_temp_pcb[2];
520 unsigned char hk_lfr_temp_fpga[2];
522 unsigned char hk_lfr_temp_fpga[2];
521 // spacecraft potential
523 // spacecraft potential
522 unsigned char hk_lfr_sc_v_f3[2];
524 unsigned char hk_lfr_sc_v_f3[2];
523 unsigned char hk_lfr_sc_e1_f3[2];
525 unsigned char hk_lfr_sc_e1_f3[2];
524 unsigned char hk_lfr_sc_e2_f3[2];
526 unsigned char hk_lfr_sc_e2_f3[2];
525 // error counters
527 // error counters
526 unsigned char hk_lfr_dpu_spw_parity;
528 unsigned char hk_lfr_dpu_spw_parity;
527 unsigned char hk_lfr_dpu_spw_disconnect;
529 unsigned char hk_lfr_dpu_spw_disconnect;
528 unsigned char hk_lfr_dpu_spw_escape;
530 unsigned char hk_lfr_dpu_spw_escape;
529 unsigned char hk_lfr_dpu_spw_credit;
531 unsigned char hk_lfr_dpu_spw_credit;
530 unsigned char hk_lfr_dpu_spw_write_sync;
532 unsigned char hk_lfr_dpu_spw_write_sync;
531 unsigned char hk_lfr_dpu_spw_rx_ahb;
533 unsigned char hk_lfr_dpu_spw_rx_ahb;
532 unsigned char hk_lfr_dpu_spw_tx_ahb;
534 unsigned char hk_lfr_dpu_spw_tx_ahb;
533 unsigned char hk_lfr_dpu_spw_early_eop;
535 unsigned char hk_lfr_dpu_spw_early_eop;
534 unsigned char hk_lfr_dpu_spw_invalid_addr;
536 unsigned char hk_lfr_dpu_spw_invalid_addr;
535 unsigned char hk_lfr_dpu_spw_eep;
537 unsigned char hk_lfr_dpu_spw_eep;
536 unsigned char hk_lfr_dpu_spw_rx_too_big;
538 unsigned char hk_lfr_dpu_spw_rx_too_big;
537 // timecode
539 // timecode
538 unsigned char hk_lfr_timecode_erroneous;
540 unsigned char hk_lfr_timecode_erroneous;
539 unsigned char hk_lfr_timecode_missing;
541 unsigned char hk_lfr_timecode_missing;
540 unsigned char hk_lfr_timecode_invalid;
542 unsigned char hk_lfr_timecode_invalid;
541 // time
543 // time
542 unsigned char hk_lfr_time_timecode_it;
544 unsigned char hk_lfr_time_timecode_it;
543 unsigned char hk_lfr_time_not_synchro;
545 unsigned char hk_lfr_time_not_synchro;
544 unsigned char hk_lfr_time_timecode_ctr;
546 unsigned char hk_lfr_time_timecode_ctr;
545 // hk_lfr_buffer_dpu_
547 // hk_lfr_buffer_dpu_
546 unsigned char hk_lfr_buffer_dpu_tc_fifo;
548 unsigned char hk_lfr_buffer_dpu_tc_fifo;
547 unsigned char hk_lfr_buffer_dpu_tm_fifo;
549 unsigned char hk_lfr_buffer_dpu_tm_fifo;
548 // hk_lfr_ahb_
550 // hk_lfr_ahb_
549 unsigned char hk_lfr_ahb_correctable;
551 unsigned char hk_lfr_ahb_correctable;
550 unsigned char hk_lfr_ahb_uncorrectable;
552 unsigned char hk_lfr_ahb_uncorrectable;
551 // spare
553 // spare
552 unsigned char parameters_spare;
554 unsigned char parameters_spare;
553 } Packet_TM_LFR_HK_t;
555 } Packet_TM_LFR_HK_t;
554
556
555 typedef struct {
557 typedef struct {
556 unsigned char targetLogicalAddress;
558 unsigned char targetLogicalAddress;
557 unsigned char protocolIdentifier;
559 unsigned char protocolIdentifier;
558 unsigned char reserved;
560 unsigned char reserved;
559 unsigned char userApplication;
561 unsigned char userApplication;
560 unsigned char packetID[2];
562 unsigned char packetID[2];
561 unsigned char packetSequenceControl[2];
563 unsigned char packetSequenceControl[2];
562 unsigned char packetLength[2];
564 unsigned char packetLength[2];
563 // DATA FIELD HEADER
565 // DATA FIELD HEADER
564 unsigned char spare1_pusVersion_spare2;
566 unsigned char spare1_pusVersion_spare2;
565 unsigned char serviceType;
567 unsigned char serviceType;
566 unsigned char serviceSubType;
568 unsigned char serviceSubType;
567 unsigned char destinationID;
569 unsigned char destinationID;
568 unsigned char time[6];
570 unsigned char time[6];
569 unsigned char sid;
571 unsigned char sid;
570
572
571 //******************
573 //******************
572 // COMMON PARAMETERS
574 // COMMON PARAMETERS
573 unsigned char unused0;
575 unsigned char unused0;
574 unsigned char bw_sp0_sp1_r0_r1;
576 unsigned char bw_sp0_sp1_r0_r1;
575
577
576 //******************
578 //******************
577 // NORMAL PARAMETERS
579 // NORMAL PARAMETERS
578 unsigned char sy_lfr_n_swf_l[2];
580 unsigned char sy_lfr_n_swf_l[2];
579 unsigned char sy_lfr_n_swf_p[2];
581 unsigned char sy_lfr_n_swf_p[2];
580 unsigned char sy_lfr_n_asm_p[2];
582 unsigned char sy_lfr_n_asm_p[2];
581 unsigned char sy_lfr_n_bp_p0;
583 unsigned char sy_lfr_n_bp_p0;
582 unsigned char sy_lfr_n_bp_p1;
584 unsigned char sy_lfr_n_bp_p1;
583 unsigned char sy_lfr_n_cwf_long_f3;
585 unsigned char sy_lfr_n_cwf_long_f3;
584 unsigned char lfr_normal_parameters_spare;
586 unsigned char lfr_normal_parameters_spare;
585
587
586 //*****************
588 //*****************
587 // BURST PARAMETERS
589 // BURST PARAMETERS
588 unsigned char sy_lfr_b_bp_p0;
590 unsigned char sy_lfr_b_bp_p0;
589 unsigned char sy_lfr_b_bp_p1;
591 unsigned char sy_lfr_b_bp_p1;
590
592
591 //****************
593 //****************
592 // SBM1 PARAMETERS
594 // SBM1 PARAMETERS
593 unsigned char sy_lfr_s1_bp_p0;
595 unsigned char sy_lfr_s1_bp_p0;
594 unsigned char sy_lfr_s1_bp_p1;
596 unsigned char sy_lfr_s1_bp_p1;
595
597
596 //****************
598 //****************
597 // SBM2 PARAMETERS
599 // SBM2 PARAMETERS
598 unsigned char sy_lfr_s2_bp_p0;
600 unsigned char sy_lfr_s2_bp_p0;
599 unsigned char sy_lfr_s2_bp_p1;
601 unsigned char sy_lfr_s2_bp_p1;
600 } Packet_TM_LFR_PARAMETER_DUMP_t;
602 } Packet_TM_LFR_PARAMETER_DUMP_t;
601
603
602
604
603 #endif // CCSDS_TYPES_H_INCLUDED
605 #endif // CCSDS_TYPES_H_INCLUDED
@@ -1,206 +1,218
1 #ifndef FSW_PARAMS_H_INCLUDED
1 #ifndef FSW_PARAMS_H_INCLUDED
2 #define FSW_PARAMS_H_INCLUDED
2 #define FSW_PARAMS_H_INCLUDED
3
3
4 #include "grlib_regs.h"
4 #include "grlib_regs.h"
5 #include "fsw_params_processing.h"
5 #include "fsw_params_processing.h"
6 #include "tm_byte_positions.h"
6 #include "tm_byte_positions.h"
7 #include "ccsds_types.h"
7 #include "ccsds_types.h"
8
8
9 #define GRSPW_DEVICE_NAME "/dev/grspw0"
9 #define GRSPW_DEVICE_NAME "/dev/grspw0"
10 #define UART_DEVICE_NAME "/dev/console"
10 #define UART_DEVICE_NAME "/dev/console"
11
11
12 typedef struct ring_node
13 {
14 struct ring_node *previous;
15 int buffer_address;
16 struct ring_node *next;
17 unsigned int status;
18 } ring_node;
19
12 //************************
20 //************************
13 // flight software version
21 // flight software version
14 // this parameters is handled by the Qt project options
22 // this parameters is handled by the Qt project options
15
23
16 //#define NB_SAMPLES_PER_SNAPSHOT 2048
24 //#define NB_SAMPLES_PER_SNAPSHOT 2048
17 #define NB_SAMPLES_PER_SNAPSHOT 2352 // 336 * 7 = 2352
25 #define NB_SAMPLES_PER_SNAPSHOT 2352 // 336 * 7 = 2352
18 #define TIME_OFFSET 2
26 #define TIME_OFFSET 2
27 #define TIME_OFFSET_IN_BYTES 8
19 #define WAVEFORM_EXTENDED_HEADER_OFFSET 22
28 #define WAVEFORM_EXTENDED_HEADER_OFFSET 22
20 #define NB_BYTES_SWF_BLK (2 * 6)
29 #define NB_BYTES_SWF_BLK (2 * 6)
21 #define NB_WORDS_SWF_BLK 3
30 #define NB_WORDS_SWF_BLK 3
22 #define NB_BYTES_CWF3_LIGHT_BLK 6
31 #define NB_BYTES_CWF3_LIGHT_BLK 6
23 #define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
32 #define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
24 #define NB_RING_NODES_F0 3 // AT LEAST 3
33 #define NB_RING_NODES_F0 3 // AT LEAST 3
25 #define NB_RING_NODES_F1 5 // AT LEAST 3
34 #define NB_RING_NODES_F1 5 // AT LEAST 3
26 #define NB_RING_NODES_F2 5 // AT LEAST 3
35 #define NB_RING_NODES_F2 5 // AT LEAST 3
36 #define NB_RING_NODES_ASM_F0 8 // AT LEAST 3
37 #define NB_RING_NODES_ASM_F1 2 // AT LEAST 3
38 #define NB_RING_NODES_ASM_F2 2 // AT LEAST 3
27
39
28 //**********
40 //**********
29 // LFR MODES
41 // LFR MODES
30 #define LFR_MODE_STANDBY 0
42 #define LFR_MODE_STANDBY 0
31 #define LFR_MODE_NORMAL 1
43 #define LFR_MODE_NORMAL 1
32 #define LFR_MODE_BURST 2
44 #define LFR_MODE_BURST 2
33 #define LFR_MODE_SBM1 3
45 #define LFR_MODE_SBM1 3
34 #define LFR_MODE_SBM2 4
46 #define LFR_MODE_SBM2 4
35 #define LFR_MODE_NORMAL_CWF_F3 5
47 #define LFR_MODE_NORMAL_CWF_F3 5
36
48
37 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
49 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
38 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
50 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
39 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
51 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
40 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
52 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
41 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
53 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
42 #define RTEMS_EVENT_MODE_SBM2_WFRM RTEMS_EVENT_5
54 #define RTEMS_EVENT_MODE_SBM2_WFRM RTEMS_EVENT_5
43
55
44 //****************************
56 //****************************
45 // LFR DEFAULT MODE PARAMETERS
57 // LFR DEFAULT MODE PARAMETERS
46 // COMMON
58 // COMMON
47 #define DEFAULT_SY_LFR_COMMON0 0x00
59 #define DEFAULT_SY_LFR_COMMON0 0x00
48 #define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
60 #define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
49 // NORM
61 // NORM
50 #define SY_LFR_N_SWF_L 2048 // nb sample
62 #define SY_LFR_N_SWF_L 2048 // nb sample
51 #define SY_LFR_N_SWF_P 20 // sec
63 #define SY_LFR_N_SWF_P 20 // sec
52 #define SY_LFR_N_ASM_P 3600 // sec
64 #define SY_LFR_N_ASM_P 3600 // sec
53 #define SY_LFR_N_BP_P0 4 // sec
65 #define SY_LFR_N_BP_P0 4 // sec
54 #define SY_LFR_N_BP_P1 20 // sec
66 #define SY_LFR_N_BP_P1 20 // sec
55 #define MIN_DELTA_SNAPSHOT 16 // sec
67 #define MIN_DELTA_SNAPSHOT 16 // sec
56 // BURST
68 // BURST
57 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
69 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
58 #define DEFAULT_SY_LFR_B_BP_P1 5 // sec
70 #define DEFAULT_SY_LFR_B_BP_P1 5 // sec
59 // SBM1
71 // SBM1
60 #define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
72 #define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
61 #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
73 #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
62 // SBM2
74 // SBM2
63 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
75 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
64 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
76 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
65 // ADDITIONAL PARAMETERS
77 // ADDITIONAL PARAMETERS
66 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
78 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
67 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
79 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
68 // STATUS WORD
80 // STATUS WORD
69 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
81 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
70 #define DEFAULT_STATUS_WORD_BYTE1 0x00
82 #define DEFAULT_STATUS_WORD_BYTE1 0x00
71 //
83 //
72 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
84 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
73 #define SY_LFR_DPU_CONNECT_ATTEMPT 3
85 #define SY_LFR_DPU_CONNECT_ATTEMPT 3
74 //****************************
86 //****************************
75
87
76 //*****************************
88 //*****************************
77 // APB REGISTERS BASE ADDRESSES
89 // APB REGISTERS BASE ADDRESSES
78 #define REGS_ADDR_APBUART 0x80000100
90 #define REGS_ADDR_APBUART 0x80000100
79 #define REGS_ADDR_GPTIMER 0x80000300
91 #define REGS_ADDR_GPTIMER 0x80000300
80 #define REGS_ADDR_GRSPW 0x80000500
92 #define REGS_ADDR_GRSPW 0x80000500
81 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
93 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
82 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
94 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
83
95
84 #ifdef GSA
96 #ifdef GSA
85 #else
97 #else
86 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f20
98 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f20
87 #endif
99 #endif
88
100
89 #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
101 #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
90 #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400 (0x50)
102 #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400 (0x50)
91
103
92 //**********
104 //**********
93 // IRQ LINES
105 // IRQ LINES
94 #define IRQ_SM 9
106 #define IRQ_SM 9
95 #define IRQ_SPARC_SM 0x19 // see sparcv8.pdf p.76 for interrupt levels
107 #define IRQ_SPARC_SM 0x19 // see sparcv8.pdf p.76 for interrupt levels
96 #define IRQ_WF 10
108 #define IRQ_WF 10
97 #define IRQ_SPARC_WF 0x1a // see sparcv8.pdf p.76 for interrupt levels
109 #define IRQ_SPARC_WF 0x1a // see sparcv8.pdf p.76 for interrupt levels
98 #define IRQ_TIME1 12
110 #define IRQ_TIME1 12
99 #define IRQ_SPARC_TIME1 0x1c // see sparcv8.pdf p.76 for interrupt levels
111 #define IRQ_SPARC_TIME1 0x1c // see sparcv8.pdf p.76 for interrupt levels
100 #define IRQ_TIME2 13
112 #define IRQ_TIME2 13
101 #define IRQ_SPARC_TIME2 0x1d // see sparcv8.pdf p.76 for interrupt levels
113 #define IRQ_SPARC_TIME2 0x1d // see sparcv8.pdf p.76 for interrupt levels
102 #define IRQ_WAVEFORM_PICKER 14
114 #define IRQ_WAVEFORM_PICKER 14
103 #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
115 #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
104 #define IRQ_SPECTRAL_MATRIX 6
116 #define IRQ_SPECTRAL_MATRIX 6
105 #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
117 #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
106
118
107 //*****
119 //*****
108 // TIME
120 // TIME
109 #define CLKDIV_SM_SIMULATOR (10000 - 1) // 10 ms
121 #define CLKDIV_SM_SIMULATOR (10000 - 1) // 10 ms
110 #define CLKDIV_WF_SIMULATOR (10000000 - 1) // 10 000 000 * 1 us = 10 s
122 #define CLKDIV_WF_SIMULATOR (10000000 - 1) // 10 000 000 * 1 us = 10 s
111 #define TIMER_SM_SIMULATOR 1
123 #define TIMER_SM_SIMULATOR 1
112 #define TIMER_WF_SIMULATOR 2
124 #define TIMER_WF_SIMULATOR 2
113 #define HK_PERIOD 100 // 100 * 10ms => 1sec
125 #define HK_PERIOD 100 // 100 * 10ms => 1sec
114
126
115 //**********
127 //**********
116 // LPP CODES
128 // LPP CODES
117 #define LFR_SUCCESSFUL 0
129 #define LFR_SUCCESSFUL 0
118 #define LFR_DEFAULT 1
130 #define LFR_DEFAULT 1
119
131
120 //******
132 //******
121 // RTEMS
133 // RTEMS
122 #define TASKID_RECV 1
134 #define TASKID_RECV 1
123 #define TASKID_ACTN 2
135 #define TASKID_ACTN 2
124 #define TASKID_SPIQ 3
136 #define TASKID_SPIQ 3
125 #define TASKID_SMIQ 4
137 #define TASKID_SMIQ 4
126 #define TASKID_STAT 5
138 #define TASKID_STAT 5
127 #define TASKID_AVF0 6
139 #define TASKID_AVF0 6
128 #define TASKID_BPF0 7
140 #define TASKID_BPF0 7
129 #define TASKID_WFRM 8
141 #define TASKID_WFRM 8
130 #define TASKID_DUMB 9
142 #define TASKID_DUMB 9
131 #define TASKID_HOUS 10
143 #define TASKID_HOUS 10
132 #define TASKID_MATR 11
144 #define TASKID_MATR 11
133 #define TASKID_CWF3 12
145 #define TASKID_CWF3 12
134 #define TASKID_CWF2 13
146 #define TASKID_CWF2 13
135 #define TASKID_CWF1 14
147 #define TASKID_CWF1 14
136 #define TASKID_SEND 15
148 #define TASKID_SEND 15
137 #define TASKID_WTDG 16
149 #define TASKID_WTDG 16
138
150
139 #define TASK_PRIORITY_SPIQ 5
151 #define TASK_PRIORITY_SPIQ 5
140 #define TASK_PRIORITY_SMIQ 10
152 #define TASK_PRIORITY_SMIQ 10
141 #define TASK_PRIORITY_WTDG 20
153 #define TASK_PRIORITY_WTDG 20
142 #define TASK_PRIORITY_HOUS 30
154 #define TASK_PRIORITY_HOUS 30
143 #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
155 #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
144 #define TASK_PRIORITY_CWF2 35 //
156 #define TASK_PRIORITY_CWF2 35 //
145 #define TASK_PRIORITY_WFRM 40
157 #define TASK_PRIORITY_WFRM 40
146 #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
158 #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
147 #define TASK_PRIORITY_SEND 45
159 #define TASK_PRIORITY_SEND 45
148 #define TASK_PRIORITY_RECV 50
160 #define TASK_PRIORITY_RECV 50
149 #define TASK_PRIORITY_ACTN 50
161 #define TASK_PRIORITY_ACTN 50
150 #define TASK_PRIORITY_AVF0 60
162 #define TASK_PRIORITY_AVF0 60
151 #define TASK_PRIORITY_BPF0 60
163 #define TASK_PRIORITY_BPF0 60
152 #define TASK_PRIORITY_MATR 100
164 #define TASK_PRIORITY_MATR 100
153 #define TASK_PRIORITY_STAT 200
165 #define TASK_PRIORITY_STAT 200
154 #define TASK_PRIORITY_DUMB 200
166 #define TASK_PRIORITY_DUMB 200
155
167
156 #define ACTION_MSG_QUEUE_COUNT 10
168 #define ACTION_MSG_QUEUE_COUNT 10
157 #define ACTION_MSG_PKTS_COUNT 50
169 #define ACTION_MSG_PKTS_COUNT 50
158 #define ACTION_MSG_PKTS_MAX_SIZE (PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES)
170 #define ACTION_MSG_PKTS_MAX_SIZE (PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES)
159 #define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
171 #define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
160
172
161 #define QUEUE_RECV 0
173 #define QUEUE_RECV 0
162 #define QUEUE_SEND 1
174 #define QUEUE_SEND 1
163
175
164 //*******
176 //*******
165 // MACROS
177 // MACROS
166 #ifdef PRINT_MESSAGES_ON_CONSOLE
178 #ifdef PRINT_MESSAGES_ON_CONSOLE
167 #define PRINTF(x) printf(x);
179 #define PRINTF(x) printf(x);
168 #define PRINTF1(x,y) printf(x,y);
180 #define PRINTF1(x,y) printf(x,y);
169 #define PRINTF2(x,y,z) printf(x,y,z);
181 #define PRINTF2(x,y,z) printf(x,y,z);
170 #else
182 #else
171 #define PRINTF(x) ;
183 #define PRINTF(x) ;
172 #define PRINTF1(x,y) ;
184 #define PRINTF1(x,y) ;
173 #define PRINTF2(x,y,z) ;
185 #define PRINTF2(x,y,z) ;
174 #endif
186 #endif
175
187
176 #ifdef BOOT_MESSAGES
188 #ifdef BOOT_MESSAGES
177 #define BOOT_PRINTF(x) printf(x);
189 #define BOOT_PRINTF(x) printf(x);
178 #define BOOT_PRINTF1(x,y) printf(x,y);
190 #define BOOT_PRINTF1(x,y) printf(x,y);
179 #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
191 #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
180 #else
192 #else
181 #define BOOT_PRINTF(x) ;
193 #define BOOT_PRINTF(x) ;
182 #define BOOT_PRINTF1(x,y) ;
194 #define BOOT_PRINTF1(x,y) ;
183 #define BOOT_PRINTF2(x,y,z) ;
195 #define BOOT_PRINTF2(x,y,z) ;
184 #endif
196 #endif
185
197
186 #ifdef DEBUG_MESSAGES
198 #ifdef DEBUG_MESSAGES
187 #define DEBUG_PRINTF(x) printf(x);
199 #define DEBUG_PRINTF(x) printf(x);
188 #define DEBUG_PRINTF1(x,y) printf(x,y);
200 #define DEBUG_PRINTF1(x,y) printf(x,y);
189 #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
201 #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
190 #else
202 #else
191 #define DEBUG_PRINTF(x) ;
203 #define DEBUG_PRINTF(x) ;
192 #define DEBUG_PRINTF1(x,y) ;
204 #define DEBUG_PRINTF1(x,y) ;
193 #define DEBUG_PRINTF2(x,y,z) ;
205 #define DEBUG_PRINTF2(x,y,z) ;
194 #endif
206 #endif
195
207
196 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
208 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
197
209
198 struct param_local_str{
210 struct param_local_str{
199 unsigned int local_sbm1_nb_cwf_sent;
211 unsigned int local_sbm1_nb_cwf_sent;
200 unsigned int local_sbm1_nb_cwf_max;
212 unsigned int local_sbm1_nb_cwf_max;
201 unsigned int local_sbm2_nb_cwf_sent;
213 unsigned int local_sbm2_nb_cwf_sent;
202 unsigned int local_sbm2_nb_cwf_max;
214 unsigned int local_sbm2_nb_cwf_max;
203 unsigned int local_nb_interrupt_f0_MAX;
215 unsigned int local_nb_interrupt_f0_MAX;
204 };
216 };
205
217
206 #endif // FSW_PARAMS_H_INCLUDED
218 #endif // FSW_PARAMS_H_INCLUDED
@@ -1,26 +1,26
1 #ifndef FSW_PARAMS_PROCESSING_H
1 #ifndef FSW_PARAMS_PROCESSING_H
2 #define FSW_PARAMS_PROCESSING_H
2 #define FSW_PARAMS_PROCESSING_H
3
3
4 #define NB_BINS_PER_SM 128
4 #define NB_BINS_PER_SM 128 //
5 #define NB_VALUES_PER_SM 25
5 #define NB_VALUES_PER_SM 25 //
6 #define TOTAL_SIZE_SM 0
6 #define TOTAL_SIZE_SM 3200 // 25 * 128
7 #define SM_HEADER 0
7 #define SM_HEADER 0 //
8
8
9 #define NB_BINS_COMPRESSED_SM_F0 11
9 #define NB_BINS_COMPRESSED_SM_F0 11
10 #define NB_BINS_COMPRESSED_SM_F1 13
10 #define NB_BINS_COMPRESSED_SM_F1 13
11 #define NB_BINS_COMPRESSED_SM_F2 12
11 #define NB_BINS_COMPRESSED_SM_F2 12
12 #define TOTAL_SIZE_COMPRESSED_MATRIX_f0 (NB_BINS_COMPRESSED_SM_F0 * NB_VALUES_PER_SM)
12 #define TOTAL_SIZE_COMPRESSED_MATRIX_f0 (NB_BINS_COMPRESSED_SM_F0 * NB_VALUES_PER_SM)
13 #define NB_AVERAGE_NORMAL_f0 96*4
13 #define NB_AVERAGE_NORMAL_f0 96*4
14 #define NB_SM_TO_RECEIVE_BEFORE_AVF0 8
14 #define NB_SM_TO_RECEIVE_BEFORE_AVF0 8
15
15
16 typedef struct {
16 typedef struct {
17 volatile unsigned char PE[2];
17 volatile unsigned char PE[2];
18 volatile unsigned char PB[2];
18 volatile unsigned char PB[2];
19 volatile unsigned char V0;
19 volatile unsigned char V0;
20 volatile unsigned char V1;
20 volatile unsigned char V1;
21 volatile unsigned char V2_ELLIP_DOP;
21 volatile unsigned char V2_ELLIP_DOP;
22 volatile unsigned char SZ;
22 volatile unsigned char SZ;
23 volatile unsigned char VPHI;
23 volatile unsigned char VPHI;
24 } BP1_t;
24 } BP1_t;
25
25
26 #endif // FSW_PARAMS_PROCESSING_H
26 #endif // FSW_PARAMS_PROCESSING_H
@@ -1,66 +1,54
1 #ifndef FSW_PROCESSING_H_INCLUDED
1 #ifndef FSW_PROCESSING_H_INCLUDED
2 #define FSW_PROCESSING_H_INCLUDED
2 #define FSW_PROCESSING_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <grspw.h>
5 #include <grspw.h>
6 #include <math.h>
6 #include <math.h>
7 #include <stdlib.h> // abs() is in the stdlib
7 #include <stdlib.h> // abs() is in the stdlib
8 #include <stdio.h> // printf()
8 #include <stdio.h> // printf()
9 #include <math.h>
9 #include <math.h>
10
10
11 #include "fsw_params.h"
11 #include "fsw_params.h"
12 #include "fsw_spacewire.h"
12 #include "fsw_spacewire.h"
13
13
14 extern volatile int spec_mat_f0_0[ ];
14 extern volatile int sm_f0[ ][ SM_HEADER + TOTAL_SIZE_SM ];
15 extern volatile int spec_mat_f0_1[ ];
15 extern volatile int sm_f1[ ][ SM_HEADER + TOTAL_SIZE_SM ];
16 extern volatile int spec_mat_f0_a[ ];
16 extern volatile int sm_f2[ ][ SM_HEADER + TOTAL_SIZE_SM ];
17 extern volatile int spec_mat_f0_b[ ];
18 extern volatile int spec_mat_f0_c[ ];
19 extern volatile int spec_mat_f0_d[ ];
20 extern volatile int spec_mat_f0_e[ ];
21 extern volatile int spec_mat_f0_f[ ];
22 extern volatile int spec_mat_f0_g[ ];
23 extern volatile int spec_mat_f0_h[ ];
24
25 extern volatile int spec_mat_f1[ ];
26 extern volatile int spec_mat_f2[ ];
27
28 extern volatile int spec_mat_f1_bis[ ];
29 extern volatile int spec_mat_f2_bis[ ];
30 extern volatile int spec_mat_f0_0_bis[ ];
31 extern volatile int spec_mat_f0_1_bis[ ];
32
17
33 // parameters
18 // parameters
34 extern struct param_local_str param_local;
19 extern struct param_local_str param_local;
35
20
36 // registers
21 // registers
37 extern time_management_regs_t *time_management_regs;
22 extern time_management_regs_t *time_management_regs;
38 extern spectral_matrix_regs_t *spectral_matrix_regs;
23 extern spectral_matrix_regs_t *spectral_matrix_regs;
39
24
40 extern rtems_name misc_name[5];
25 extern rtems_name misc_name[5];
41 extern rtems_id Task_id[20]; /* array of task ids */
26 extern rtems_id Task_id[20]; /* array of task ids */
42
27
28 //
29 void init_asm_rings( void );
30
43 // ISR
31 // ISR
44 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
32 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
45 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector );
33 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector );
46
34
47 // RTEMS TASKS
35 // RTEMS TASKS
48 rtems_task spw_bppr_task(rtems_task_argument argument);
36 rtems_task spw_bppr_task(rtems_task_argument argument);
49 rtems_task avf0_task(rtems_task_argument argument);
37 rtems_task avf0_task(rtems_task_argument argument);
50 rtems_task bpf0_task(rtems_task_argument argument);
38 rtems_task bpf0_task(rtems_task_argument argument);
51 rtems_task smiq_task(rtems_task_argument argument); // added to test the spectral matrix simulator
39 rtems_task smiq_task(rtems_task_argument argument); // added to test the spectral matrix simulator
52 rtems_task matr_task(rtems_task_argument argument);
40 rtems_task matr_task(rtems_task_argument argument);
53
41
54 void matrix_compression(volatile float *averaged_spec_mat, unsigned char fChannel, float *compressed_spec_mat);
42 void matrix_compression(volatile float *averaged_spec_mat, unsigned char fChannel, float *compressed_spec_mat);
55 void matrix_reset(volatile float *averaged_spec_mat);
43 void matrix_reset(volatile float *averaged_spec_mat);
56 void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1);
44 void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1);
57 void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat);
45 void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat);
58 //
46 //
59 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header);
47 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header);
60 void send_spectral_matrix(Header_TM_LFR_SCIENCE_ASM_t *header, char *spectral_matrix,
48 void send_spectral_matrix(Header_TM_LFR_SCIENCE_ASM_t *header, char *spectral_matrix,
61 unsigned int sid, spw_ioctl_pkt_send *spw_ioctl_send, rtems_id queue_id);
49 unsigned int sid, spw_ioctl_pkt_send *spw_ioctl_send, rtems_id queue_id);
62 void convert_averaged_spectral_matrix(volatile float *input_matrix, char *output_matrix);
50 void convert_averaged_spectral_matrix(volatile float *input_matrix, char *output_matrix);
63 void fill_averaged_spectral_matrix( void );
51 void fill_averaged_spectral_matrix( void );
64 void reset_spectral_matrix_regs();
52 void reset_spectral_matrix_regs();
65
53
66 #endif // FSW_PROCESSING_H_INCLUDED
54 #endif // FSW_PROCESSING_H_INCLUDED
@@ -1,94 +1,88
1 #ifndef WF_HANDLER_H_INCLUDED
1 #ifndef WF_HANDLER_H_INCLUDED
2 #define WF_HANDLER_H_INCLUDED
2 #define WF_HANDLER_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <grspw.h>
5 #include <grspw.h>
6 #include <stdio.h>
6 #include <stdio.h>
7 #include <math.h>
7 #include <math.h>
8
8
9 #include "fsw_params.h"
9 #include "fsw_params.h"
10 #include "fsw_spacewire.h"
10 #include "fsw_spacewire.h"
11 #include "fsw_misc.h"
11 #include "fsw_misc.h"
12
12
13 #define pi 3.1415
13 #define pi 3.1415
14
14
15 typedef struct ring_node
16 {
17 struct ring_node *previous;
18 int buffer_address;
19 struct ring_node *next;
20 unsigned int status;
21 } ring_node;
22
23 extern int fdSPW;
15 extern int fdSPW;
24
16
25 //*****************
17 //*****************
26 // waveform buffers
18 // waveform buffers
27 // F0
19 // F0
28 //extern volatile int wf_snap_f0[ ];
20 //extern volatile int wf_snap_f0[ ];
29 // F1 F2
21 // F1 F2
30 extern volatile int wf_snap_f0[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
22 extern volatile int wf_snap_f0[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
31 extern volatile int wf_snap_f1[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
23 extern volatile int wf_snap_f1[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
32 extern volatile int wf_snap_f2[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
24 extern volatile int wf_snap_f2[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
33 // F3
25 // F3
34 extern volatile int wf_cont_f3_a[ ];
26 extern volatile int wf_cont_f3_a[ ];
35 extern volatile int wf_cont_f3_b[ ];
27 extern volatile int wf_cont_f3_b[ ];
36 extern char wf_cont_f3_light[ ];
28 extern char wf_cont_f3_light[ ];
37
29
38 #ifdef VHDL_DEV
30 #ifdef VHDL_DEV
39 extern waveform_picker_regs_new_t *waveform_picker_regs;
31 extern waveform_picker_regs_new_t *waveform_picker_regs;
40 #else
32 #else
41 extern waveform_picker_regs_t *waveform_picker_regs;
33 extern waveform_picker_regs_t *waveform_picker_regs;
42 #endif
34 #endif
43 extern time_management_regs_t *time_management_regs;
35 extern time_management_regs_t *time_management_regs;
44 extern Packet_TM_LFR_HK_t housekeeping_packet;
36 extern Packet_TM_LFR_HK_t housekeeping_packet;
45 extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
37 extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
46 extern struct param_local_str param_local;
38 extern struct param_local_str param_local;
47
39
48 extern unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
40 extern unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
49 extern unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
41 extern unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
50
42
51 extern rtems_id Task_id[20]; /* array of task ids */
43 extern rtems_id Task_id[20]; /* array of task ids */
52
44
53 extern unsigned char lfrCurrentMode;
45 extern unsigned char lfrCurrentMode;
54
46
55 rtems_isr waveforms_isr( rtems_vector_number vector );
47 rtems_isr waveforms_isr( rtems_vector_number vector );
56 rtems_task wfrm_task( rtems_task_argument argument );
48 rtems_task wfrm_task( rtems_task_argument argument );
57 rtems_task cwf3_task( rtems_task_argument argument );
49 rtems_task cwf3_task( rtems_task_argument argument );
58 rtems_task cwf2_task( rtems_task_argument argument );
50 rtems_task cwf2_task( rtems_task_argument argument );
59 rtems_task cwf1_task( rtems_task_argument argument );
51 rtems_task cwf1_task( rtems_task_argument argument );
60
52
61 //******************
53 //******************
62 // general functions
54 // general functions
63 void init_waveforms( void );
55 void init_waveforms( void );
64 void init_waveform_rings( void );
56 void init_waveform_rings( void );
65 void reset_current_ring_nodes( void );
57 void reset_current_ring_nodes( void );
66 //
58 //
67 int init_header_snapshot_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF );
59 int init_header_snapshot_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF );
68 int init_header_continuous_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
60 int init_header_continuous_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
69 int init_header_continuous_cwf3_light_table( Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
61 int init_header_continuous_cwf3_light_table( Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
70 //
62 //
71 int send_waveform_SWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF, rtems_id queue_id );
63 int send_waveform_SWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF, rtems_id queue_id );
72 int send_waveform_CWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
64 int send_waveform_CWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
73 int send_waveform_CWF3( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
65 int send_waveform_CWF3( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
74 int send_waveform_CWF3_light( volatile int *waveform, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
66 int send_waveform_CWF3_light( volatile int *waveform, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
75 //
67 //
68 void compute_acquisition_time(unsigned int *coarseTime, unsigned int *fineTime, unsigned int sid, unsigned char pa_lfr_pkt_nr );
69 //
76 rtems_id get_pkts_queue_id( void );
70 rtems_id get_pkts_queue_id( void );
77
71
78 //**************
72 //**************
79 // wfp registers
73 // wfp registers
80 void set_wfp_data_shaping();
74 void set_wfp_data_shaping();
81 char set_wfp_delta_snapshot();
75 char set_wfp_delta_snapshot();
82 void set_wfp_burst_enable_register( unsigned char mode );
76 void set_wfp_burst_enable_register( unsigned char mode );
83 void reset_wfp_burst_enable();
77 void reset_wfp_burst_enable();
84 void reset_wfp_status();
78 void reset_wfp_status();
85 void reset_waveform_picker_regs();
79 void reset_waveform_picker_regs();
86 void reset_new_waveform_picker_regs();
80 void reset_new_waveform_picker_regs();
87
81
88 //*****************
82 //*****************
89 // local parameters
83 // local parameters
90 void set_local_nb_interrupt_f0_MAX( void );
84 void set_local_nb_interrupt_f0_MAX( void );
91
85
92 void increment_seq_counter_source_id( unsigned char *packet_sequence_control, unsigned int sid );
86 void increment_seq_counter_source_id( unsigned char *packet_sequence_control, unsigned int sid );
93
87
94 #endif // WF_HANDLER_H_INCLUDED
88 #endif // WF_HANDLER_H_INCLUDED
@@ -1,90 +1,75
1 /** Global variables of the LFR flight software.
1 /** Global variables of the LFR flight software.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * Among global variables, there are:
6 * Among global variables, there are:
7 * - RTEMS names and id.
7 * - RTEMS names and id.
8 * - APB configuration registers.
8 * - APB configuration registers.
9 * - waveforms global buffers, used by the waveform picker hardware module to store data.
9 * - waveforms global buffers, used by the waveform picker hardware module to store data.
10 * - spectral matrices buffesr, used by the hardware module to store data.
10 * - spectral matrices buffesr, used by the hardware module to store data.
11 * - variable related to LFR modes parameters.
11 * - variable related to LFR modes parameters.
12 * - the global HK packet buffer.
12 * - the global HK packet buffer.
13 * - the global dump parameter buffer.
13 * - the global dump parameter buffer.
14 *
14 *
15 */
15 */
16
16
17 #include <rtems.h>
17 #include <rtems.h>
18 #include <grspw.h>
18 #include <grspw.h>
19
19
20 #include "ccsds_types.h"
20 #include "ccsds_types.h"
21 #include "grlib_regs.h"
21 #include "grlib_regs.h"
22 #include "fsw_params.h"
22 #include "fsw_params.h"
23
23
24 // RTEMS GLOBAL VARIABLES
24 // RTEMS GLOBAL VARIABLES
25 rtems_name misc_name[5];
25 rtems_name misc_name[5];
26 rtems_id misc_id[5];
26 rtems_id misc_id[5];
27 rtems_name Task_name[20]; /* array of task names */
27 rtems_name Task_name[20]; /* array of task names */
28 rtems_id Task_id[20]; /* array of task ids */
28 rtems_id Task_id[20]; /* array of task ids */
29 unsigned int maxCount;
29 unsigned int maxCount;
30 int fdSPW = 0;
30 int fdSPW = 0;
31 int fdUART = 0;
31 int fdUART = 0;
32 unsigned char lfrCurrentMode;
32 unsigned char lfrCurrentMode;
33
33
34 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes
34 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes
35 // F0
35 // F0
36 //volatile int wf_snap_f0 [ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
36 //volatile int wf_snap_f0 [ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
37 volatile int wf_snap_f0[ NB_RING_NODES_F0 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
37 volatile int wf_snap_f0[ NB_RING_NODES_F0 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
38 // F1 F2
38 // F1 F2
39 volatile int wf_snap_f1[ NB_RING_NODES_F1 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
39 volatile int wf_snap_f1[ NB_RING_NODES_F1 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
40 volatile int wf_snap_f2[ NB_RING_NODES_F2 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
40 volatile int wf_snap_f2[ NB_RING_NODES_F2 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
41 // F3
41 // F3
42 volatile int wf_cont_f3_a[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100)));
42 volatile int wf_cont_f3_a [ (NB_SAMPLES_PER_SNAPSHOT) * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100)));
43 volatile int wf_cont_f3_b[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100)));
43 volatile int wf_cont_f3_b [ (NB_SAMPLES_PER_SNAPSHOT) * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100)));
44 char wf_cont_f3_light[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_CWF3_LIGHT_BLK ] __attribute__((aligned(0x100)));
44 char wf_cont_f3_light[ (NB_SAMPLES_PER_SNAPSHOT) * NB_BYTES_CWF3_LIGHT_BLK + TIME_OFFSET_IN_BYTES ] __attribute__((aligned(0x100)));
45
45
46 // SPECTRAL MATRICES GLOBAL VARIABLES
46 // SPECTRAL MATRICES GLOBAL VARIABLES
47 volatile int spec_mat_f0_0[ SM_HEADER + TOTAL_SIZE_SM ];
47 volatile int sm_f0[ NB_RING_NODES_ASM_F0 ][ SM_HEADER + TOTAL_SIZE_SM ];
48 volatile int spec_mat_f0_1[ SM_HEADER + TOTAL_SIZE_SM ];
48 volatile int sm_f1[ NB_RING_NODES_ASM_F1 ][ SM_HEADER + TOTAL_SIZE_SM ];
49 volatile int spec_mat_f0_a[ SM_HEADER + TOTAL_SIZE_SM ];
49 volatile int sm_f2[ NB_RING_NODES_ASM_F2 ][ SM_HEADER + TOTAL_SIZE_SM ];
50 volatile int spec_mat_f0_b[ SM_HEADER + TOTAL_SIZE_SM ];
51 volatile int spec_mat_f0_c[ SM_HEADER + TOTAL_SIZE_SM ];
52 volatile int spec_mat_f0_d[ SM_HEADER + TOTAL_SIZE_SM ];
53 volatile int spec_mat_f0_e[ SM_HEADER + TOTAL_SIZE_SM ];
54 volatile int spec_mat_f0_f[ SM_HEADER + TOTAL_SIZE_SM ];
55 volatile int spec_mat_f0_g[ SM_HEADER + TOTAL_SIZE_SM ];
56 volatile int spec_mat_f0_h[ SM_HEADER + TOTAL_SIZE_SM ];
57 volatile int spec_mat_f0_0_bis[ SM_HEADER + TOTAL_SIZE_SM ];
58 volatile int spec_mat_f0_1_bis[ SM_HEADER + TOTAL_SIZE_SM ];
59 //
60 volatile int spec_mat_f1[ SM_HEADER + TOTAL_SIZE_SM ];
61 volatile int spec_mat_f1_bis[ SM_HEADER + TOTAL_SIZE_SM ];
62 //
63 volatile int spec_mat_f2[ SM_HEADER + TOTAL_SIZE_SM ];
64 volatile int spec_mat_f2_bis[ SM_HEADER + TOTAL_SIZE_SM ];
65
50
66 // APB CONFIGURATION REGISTERS
51 // APB CONFIGURATION REGISTERS
67 time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT;
52 time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT;
68 gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER;
53 gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER;
69
54
70 #ifdef VHDL_DEV
55 #ifdef VHDL_DEV
71 waveform_picker_regs_new_t *waveform_picker_regs = (waveform_picker_regs_new_t*) REGS_ADDR_WAVEFORM_PICKER;
56 waveform_picker_regs_new_t *waveform_picker_regs = (waveform_picker_regs_new_t*) REGS_ADDR_WAVEFORM_PICKER;
72 #else
57 #else
73 waveform_picker_regs_t *waveform_picker_regs = (waveform_picker_regs_t*) REGS_ADDR_WAVEFORM_PICKER;
58 waveform_picker_regs_t *waveform_picker_regs = (waveform_picker_regs_t*) REGS_ADDR_WAVEFORM_PICKER;
74 #endif
59 #endif
75 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
60 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
76
61
77 // MODE PARAMETERS
62 // MODE PARAMETERS
78 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
63 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
79 struct param_local_str param_local;
64 struct param_local_str param_local;
80
65
81 // HK PACKETS
66 // HK PACKETS
82 Packet_TM_LFR_HK_t housekeeping_packet;
67 Packet_TM_LFR_HK_t housekeeping_packet;
83 // sequence counters are incremented by APID (PID + CAT) and destination ID
68 // sequence counters are incremented by APID (PID + CAT) and destination ID
84 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
69 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
85 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
70 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
86 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID];
71 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID];
87 spw_stats spacewire_stats;
72 spw_stats spacewire_stats;
88 spw_stats spacewire_stats_backup;
73 spw_stats spacewire_stats_backup;
89
74
90
75
@@ -1,643 +1,646
1 /** Functions related to data processing.
1 /** Functions related to data processing.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 *
7 *
8 */
8 */
9
9
10 #include <fsw_processing.h>
10 #include <fsw_processing.h>
11
11
12 #include "fsw_processing_globals.c"
12 #include "fsw_processing_globals.c"
13
13
14 //************************
15 // spectral matrices rings
16 ring_node sm_ring_f0[NB_RING_NODES_ASM_F0];
17 ring_node sm_ring_f1[NB_RING_NODES_ASM_F1];
18 ring_node sm_ring_f2[NB_RING_NODES_ASM_F2];
19 ring_node *current_ring_node_sm_f0;
20 ring_node *current_ring_node_sm_f1;
21 ring_node *current_ring_node_sm_f2;
22
14 BP1_t data_BP1[ NB_BINS_COMPRESSED_SM_F0 ];
23 BP1_t data_BP1[ NB_BINS_COMPRESSED_SM_F0 ];
15 float averaged_spec_mat_f0[ TOTAL_SIZE_SM ];
24 float averaged_sm_f0[ TOTAL_SIZE_SM ];
16 char averaged_spec_mat_f0_char[ TOTAL_SIZE_SM * 2 ];
25 char averaged_sm_f0_char[ TOTAL_SIZE_SM * 2 ];
17 float compressed_spec_mat_f0[ TOTAL_SIZE_COMPRESSED_MATRIX_f0 ];
26 float compressed_sm_f0[ TOTAL_SIZE_COMPRESSED_MATRIX_f0 ];
27
28 void init_asm_rings( void )
29 {
30 unsigned char i;
31
32 // F0 RING
33 sm_ring_f0[0].next = (ring_node*) &sm_ring_f0[1];
34 sm_ring_f0[0].previous = (ring_node*) &sm_ring_f0[NB_RING_NODES_ASM_F0-1];
35 sm_ring_f0[0].buffer_address = (int) &sm_f0[0][0];
36
37 sm_ring_f0[NB_RING_NODES_ASM_F0-1].next = (ring_node*) &sm_ring_f0[0];
38 sm_ring_f0[NB_RING_NODES_ASM_F0-1].previous = (ring_node*) &sm_ring_f0[NB_RING_NODES_ASM_F0-2];
39 sm_ring_f0[NB_RING_NODES_ASM_F0-1].buffer_address = (int) &sm_f0[NB_RING_NODES_ASM_F0-1][0];
40
41 for(i=1; i<NB_RING_NODES_ASM_F0-1; i++)
42 {
43 sm_ring_f0[i].next = (ring_node*) &sm_ring_f0[i+1];
44 sm_ring_f0[i].previous = (ring_node*) &sm_ring_f0[i-1];
45 sm_ring_f0[i].buffer_address = (int) &sm_f0[i][0];
46 }
47
48 DEBUG_PRINTF1("asm_ring_f0 @%x\n", (unsigned int) sm_ring_f0)
49
50 }
51
52 void reset_current_sm_ring_nodes( void )
53 {
54 current_ring_node_sm_f0 = sm_ring_f0;
55 }
18
56
19 //***********************************************************
57 //***********************************************************
20 // Interrupt Service Routine for spectral matrices processing
58 // Interrupt Service Routine for spectral matrices processing
21 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
59 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
22 {
60 {
23 unsigned char status;
61 unsigned char status;
24 unsigned char i;
62 unsigned char i;
25
63
26 status = spectral_matrix_regs->status; //[f2 f1 f0_1 f0_0]
64 status = spectral_matrix_regs->status; //[f2 f1 f0_1 f0_0]
27 for (i=0; i<4; i++)
65 for (i=0; i<4; i++)
28 {
66 {
29 if ( ( (status >> i) & 0x01) == 1) // (1) buffer rotation
67 if ( ( (status >> i) & 0x01) == 1) // (1) buffer rotation
30 {
68 {
31 switch(i)
69 switch(i)
32 {
70 {
33 case 0:
71 case 0:
34 if (spectral_matrix_regs->matrixF0_Address0 == (int) spec_mat_f0_0)
72 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
35 {
73 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
36 spectral_matrix_regs->matrixF0_Address0 = (int) spec_mat_f0_0_bis;
37 }
38 else
39 {
40 spectral_matrix_regs->matrixF0_Address0 = (int) spec_mat_f0_0;
41 }
42 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffe;
74 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffe;
43 break;
75 break;
44 case 1:
76 case 1:
45 if (spectral_matrix_regs->matrixFO_Address1 == (int) spec_mat_f0_1)
46 {
47 spectral_matrix_regs->matrixFO_Address1 = (int) spec_mat_f0_1_bis;
48 }
49 else
50 {
51 spectral_matrix_regs->matrixFO_Address1 = (int) spec_mat_f0_1;
52 }
53 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffd;
54 break;
77 break;
55 case 2:
78 case 2:
56 if (spectral_matrix_regs->matrixF1_Address == (int) spec_mat_f1)
57 {
58 spectral_matrix_regs->matrixF1_Address = (int) spec_mat_f1_bis;
59 }
60 else
61 {
62 spectral_matrix_regs->matrixF1_Address = (int) spec_mat_f1;
63 }
64 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffb;
65 break;
66 case 3:
67 if (spectral_matrix_regs->matrixF2_Address == (int) spec_mat_f2)
68 {
69 spectral_matrix_regs->matrixF2_Address = (int) spec_mat_f2_bis;
70 }
71 else
72 {
73 spectral_matrix_regs->matrixF2_Address = (int) spec_mat_f2;
74 }
75 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffff7;
76 break;
79 break;
77 default:
80 default:
78 break;
81 break;
79 }
82 }
80 }
83 }
81 }
84 }
82
85
83 // reset error codes to 0
86 // reset error codes to 0
84 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xffffffcf; // [1100 1111]
87 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xffffffcf; // [1100 1111]
85
88
86 if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
89 if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
87 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_4 );
90 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_4 );
88 }
91 }
89 }
92 }
90
93
91 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
94 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
92 {
95 {
93 if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
96 if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
94 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_4 );
97 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_4 );
95 }
98 }
96 }
99 }
97
100
98 //************
101 //************
99 // RTEMS TASKS
102 // RTEMS TASKS
100
103
101 rtems_task smiq_task(rtems_task_argument argument) // process the Spectral Matrices IRQ
104 rtems_task smiq_task(rtems_task_argument argument) // process the Spectral Matrices IRQ
102 {
105 {
103 rtems_event_set event_out;
106 rtems_event_set event_out;
104 unsigned int nb_interrupt_f0 = 0;
107 unsigned int nb_interrupt_f0 = 0;
105
108
106 BOOT_PRINTF("in SMIQ *** \n")
109 BOOT_PRINTF("in SMIQ *** \n")
107
110
108 while(1){
111 while(1){
109 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
112 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
110 nb_interrupt_f0 = nb_interrupt_f0 + 1;
113 nb_interrupt_f0 = nb_interrupt_f0 + 1;
111 if (nb_interrupt_f0 == NB_SM_TO_RECEIVE_BEFORE_AVF0 ){
114 if (nb_interrupt_f0 == NB_SM_TO_RECEIVE_BEFORE_AVF0 ){
112 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
115 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
113 {
116 {
114 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
117 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
115 }
118 }
116 nb_interrupt_f0 = 0;
119 nb_interrupt_f0 = 0;
117 }
120 }
118 }
121 }
119 }
122 }
120
123
121 rtems_task spw_bppr_task(rtems_task_argument argument)
124 rtems_task spw_bppr_task(rtems_task_argument argument)
122 {
125 {
123 rtems_status_code status;
126 rtems_status_code status;
124 rtems_event_set event_out;
127 rtems_event_set event_out;
125
128
126 BOOT_PRINTF("in BPPR ***\n");
129 BOOT_PRINTF("in BPPR ***\n");
127
130
128 while( true ){ // wait for an event to begin with the processing
131 while( true ){ // wait for an event to begin with the processing
129 status = rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out);
132 status = rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out);
130 }
133 }
131 }
134 }
132
135
133 rtems_task avf0_task(rtems_task_argument argument)
136 rtems_task avf0_task(rtems_task_argument argument)
134 {
137 {
135 int i;
138 int i;
136 static int nb_average;
139 static int nb_average;
137 rtems_event_set event_out;
140 rtems_event_set event_out;
138 rtems_status_code status;
141 rtems_status_code status;
139
142
140 nb_average = 0;
143 nb_average = 0;
141
144
142 BOOT_PRINTF("in AVFO *** \n")
145 BOOT_PRINTF("in AVFO *** \n")
143
146
144 while(1){
147 while(1){
145 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
148 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
146 for(i=0; i<TOTAL_SIZE_SM; i++){
149 for(i=0; i<TOTAL_SIZE_SM; i++){
147 averaged_spec_mat_f0[i] = averaged_spec_mat_f0[i] + spec_mat_f0_a[i]
150 averaged_sm_f0[i] = current_ring_node_sm_f0[0].buffer_address
148 + spec_mat_f0_b[i]
151 + current_ring_node_sm_f0[1].buffer_address
149 + spec_mat_f0_c[i]
152 + current_ring_node_sm_f0[2].buffer_address
150 + spec_mat_f0_d[i]
153 + current_ring_node_sm_f0[3].buffer_address
151 + spec_mat_f0_e[i]
154 + current_ring_node_sm_f0[4].buffer_address
152 + spec_mat_f0_f[i]
155 + current_ring_node_sm_f0[5].buffer_address
153 + spec_mat_f0_g[i]
156 + current_ring_node_sm_f0[6].buffer_address
154 + spec_mat_f0_h[i];
157 + current_ring_node_sm_f0[7].buffer_address;
155 }
158 }
156 nb_average = nb_average + NB_SM_TO_RECEIVE_BEFORE_AVF0;
159 nb_average = nb_average + NB_SM_TO_RECEIVE_BEFORE_AVF0;
157 if (nb_average == NB_AVERAGE_NORMAL_f0) {
160 if (nb_average == NB_AVERAGE_NORMAL_f0) {
158 nb_average = 0;
161 nb_average = 0;
159 status = rtems_event_send( Task_id[TASKID_MATR], RTEMS_EVENT_0 ); // sending an event to the task 7, BPF0
162 status = rtems_event_send( Task_id[TASKID_MATR], RTEMS_EVENT_0 ); // sending an event to the task 7, BPF0
160 if (status != RTEMS_SUCCESSFUL) {
163 if (status != RTEMS_SUCCESSFUL) {
161 printf("in AVF0 *** Error sending RTEMS_EVENT_0, code %d\n", status);
164 printf("in AVF0 *** Error sending RTEMS_EVENT_0, code %d\n", status);
162 }
165 }
163 }
166 }
164 }
167 }
165 }
168 }
166
169
167 rtems_task bpf0_task(rtems_task_argument argument)
170 rtems_task bpf0_task(rtems_task_argument argument)
168 {
171 {
169 rtems_event_set event_out;
172 rtems_event_set event_out;
170 static unsigned char LFR_BP1_F0[ NB_BINS_COMPRESSED_SM_F0 * 9 ];
173 static unsigned char LFR_BP1_F0[ NB_BINS_COMPRESSED_SM_F0 * 9 ];
171
174
172 BOOT_PRINTF("in BPFO *** \n")
175 BOOT_PRINTF("in BPFO *** \n")
173
176
174 while(1){
177 while(1){
175 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
178 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
176 matrix_compression(averaged_spec_mat_f0, 0, compressed_spec_mat_f0);
179 matrix_compression(averaged_sm_f0, 0, compressed_sm_f0);
177 BP1_set(compressed_spec_mat_f0, NB_BINS_COMPRESSED_SM_F0, LFR_BP1_F0);
180 BP1_set(compressed_sm_f0, NB_BINS_COMPRESSED_SM_F0, LFR_BP1_F0);
178 }
181 }
179 }
182 }
180
183
181 rtems_task matr_task(rtems_task_argument argument)
184 rtems_task matr_task(rtems_task_argument argument)
182 {
185 {
183 spw_ioctl_pkt_send spw_ioctl_send_ASM;
186 spw_ioctl_pkt_send spw_ioctl_send_ASM;
184 rtems_event_set event_out;
187 rtems_event_set event_out;
185 rtems_status_code status;
188 rtems_status_code status;
186 rtems_id queue_id;
189 rtems_id queue_id;
187 Header_TM_LFR_SCIENCE_ASM_t headerASM;
190 Header_TM_LFR_SCIENCE_ASM_t headerASM;
188
191
189 init_header_asm( &headerASM );
192 init_header_asm( &headerASM );
190
193
191 status = get_message_queue_id_send( &queue_id );
194 status = get_message_queue_id_send( &queue_id );
192 if (status != RTEMS_SUCCESSFUL)
195 if (status != RTEMS_SUCCESSFUL)
193 {
196 {
194 PRINTF1("in MATR *** ERR get_message_queue_id_send %d\n", status)
197 PRINTF1("in MATR *** ERR get_message_queue_id_send %d\n", status)
195 }
198 }
196
199
197 BOOT_PRINTF("in MATR *** \n")
200 BOOT_PRINTF("in MATR *** \n")
198
201
199 fill_averaged_spectral_matrix( );
202 fill_averaged_spectral_matrix( );
200
203
201 while(1){
204 while(1){
202 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
205 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
203 // 1) convert the float array in a char array
206 // 1) convert the float array in a char array
204 convert_averaged_spectral_matrix( averaged_spec_mat_f0, averaged_spec_mat_f0_char);
207 convert_averaged_spectral_matrix( averaged_sm_f0, averaged_sm_f0_char);
205 // 2) send the spectral matrix packets
208 // 2) send the spectral matrix packets
206 send_spectral_matrix( &headerASM, averaged_spec_mat_f0_char, SID_NORM_ASM_F0, &spw_ioctl_send_ASM, queue_id);
209 send_spectral_matrix( &headerASM, averaged_sm_f0_char, SID_NORM_ASM_F0, &spw_ioctl_send_ASM, queue_id);
207 }
210 }
208 }
211 }
209
212
210 //*****************************
213 //*****************************
211 // Spectral matrices processing
214 // Spectral matrices processing
212
215
213 void matrix_reset(volatile float *averaged_spec_mat)
216 void matrix_reset(volatile float *averaged_spec_mat)
214 {
217 {
215 int i;
218 int i;
216 for(i=0; i<TOTAL_SIZE_SM; i++){
219 for(i=0; i<TOTAL_SIZE_SM; i++){
217 averaged_spec_mat[i] = 0;
220 averaged_spec_mat[i] = 0;
218 }
221 }
219 }
222 }
220
223
221 void matrix_compression(volatile float *averaged_spec_mat, unsigned char fChannel, float *compressed_spec_mat)
224 void matrix_compression(volatile float *averaged_spec_mat, unsigned char fChannel, float *compressed_spec_mat)
222 {
225 {
223 int i;
226 int i;
224 int j;
227 int j;
225 switch (fChannel){
228 switch (fChannel){
226 case 0:
229 case 0:
227 for(i=0;i<NB_BINS_COMPRESSED_SM_F0;i++){
230 for(i=0;i<NB_BINS_COMPRESSED_SM_F0;i++){
228 j = 17 + (i * 8);
231 j = 17 + (i * 8);
229 compressed_spec_mat[i] = (averaged_spec_mat[j]
232 compressed_spec_mat[i] = (averaged_spec_mat[j]
230 + averaged_spec_mat[j+1]
233 + averaged_spec_mat[j+1]
231 + averaged_spec_mat[j+2]
234 + averaged_spec_mat[j+2]
232 + averaged_spec_mat[j+3]
235 + averaged_spec_mat[j+3]
233 + averaged_spec_mat[j+4]
236 + averaged_spec_mat[j+4]
234 + averaged_spec_mat[j+5]
237 + averaged_spec_mat[j+5]
235 + averaged_spec_mat[j+6]
238 + averaged_spec_mat[j+6]
236 + averaged_spec_mat[j+7])/(8*NB_AVERAGE_NORMAL_f0);
239 + averaged_spec_mat[j+7])/(8*NB_AVERAGE_NORMAL_f0);
237 }
240 }
238 break;
241 break;
239 case 1:
242 case 1:
240 // case fChannel = f1 to be completed later
243 // case fChannel = f1 to be completed later
241 break;
244 break;
242 case 2:
245 case 2:
243 // case fChannel = f1 to be completed later
246 // case fChannel = f1 to be completed later
244 break;
247 break;
245 default:
248 default:
246 break;
249 break;
247 }
250 }
248 }
251 }
249
252
250 void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1){
253 void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1){
251 int i;
254 int i;
252 int j;
255 int j;
253 unsigned char tmp_u_char;
256 unsigned char tmp_u_char;
254 unsigned char * pt_char = NULL;
257 unsigned char * pt_char = NULL;
255 float PSDB, PSDE;
258 float PSDB, PSDE;
256 float NVEC_V0;
259 float NVEC_V0;
257 float NVEC_V1;
260 float NVEC_V1;
258 float NVEC_V2;
261 float NVEC_V2;
259 //float significand;
262 //float significand;
260 //int exponent;
263 //int exponent;
261 float aux;
264 float aux;
262 float tr_SB_SB;
265 float tr_SB_SB;
263 float tmp;
266 float tmp;
264 float sx_re;
267 float sx_re;
265 float sx_im;
268 float sx_im;
266 float nebx_re = 0;
269 float nebx_re = 0;
267 float nebx_im = 0;
270 float nebx_im = 0;
268 float ny = 0;
271 float ny = 0;
269 float nz = 0;
272 float nz = 0;
270 float bx_bx_star = 0;
273 float bx_bx_star = 0;
271 for(i=0; i<nb_bins_compressed_spec_mat; i++){
274 for(i=0; i<nb_bins_compressed_spec_mat; i++){
272 //==============================================
275 //==============================================
273 // BP1 PSD == B PAR_LFR_SC_BP1_PE_FL0 == 16 bits
276 // BP1 PSD == B PAR_LFR_SC_BP1_PE_FL0 == 16 bits
274 PSDB = compressed_spec_mat[i*30] // S11
277 PSDB = compressed_spec_mat[i*30] // S11
275 + compressed_spec_mat[(i*30) + 10] // S22
278 + compressed_spec_mat[(i*30) + 10] // S22
276 + compressed_spec_mat[(i*30) + 18]; // S33
279 + compressed_spec_mat[(i*30) + 18]; // S33
277 //significand = frexp(PSDB, &exponent);
280 //significand = frexp(PSDB, &exponent);
278 pt_char = (unsigned char*) &PSDB;
281 pt_char = (unsigned char*) &PSDB;
279 LFR_BP1[(i*9) + 2] = pt_char[0]; // bits 31 downto 24 of the float
282 LFR_BP1[(i*9) + 2] = pt_char[0]; // bits 31 downto 24 of the float
280 LFR_BP1[(i*9) + 3] = pt_char[1]; // bits 23 downto 16 of the float
283 LFR_BP1[(i*9) + 3] = pt_char[1]; // bits 23 downto 16 of the float
281 //==============================================
284 //==============================================
282 // BP1 PSD == E PAR_LFR_SC_BP1_PB_FL0 == 16 bits
285 // BP1 PSD == E PAR_LFR_SC_BP1_PB_FL0 == 16 bits
283 PSDE = compressed_spec_mat[(i*30) + 24] * K44_pe // S44
286 PSDE = compressed_spec_mat[(i*30) + 24] * K44_pe // S44
284 + compressed_spec_mat[(i*30) + 28] * K55_pe // S55
287 + compressed_spec_mat[(i*30) + 28] * K55_pe // S55
285 + compressed_spec_mat[(i*30) + 26] * K45_pe_re // S45
288 + compressed_spec_mat[(i*30) + 26] * K45_pe_re // S45
286 - compressed_spec_mat[(i*30) + 27] * K45_pe_im; // S45
289 - compressed_spec_mat[(i*30) + 27] * K45_pe_im; // S45
287 pt_char = (unsigned char*) &PSDE;
290 pt_char = (unsigned char*) &PSDE;
288 LFR_BP1[(i*9) + 0] = pt_char[0]; // bits 31 downto 24 of the float
291 LFR_BP1[(i*9) + 0] = pt_char[0]; // bits 31 downto 24 of the float
289 LFR_BP1[(i*9) + 1] = pt_char[1]; // bits 23 downto 16 of the float
292 LFR_BP1[(i*9) + 1] = pt_char[1]; // bits 23 downto 16 of the float
290 //==============================================================================
293 //==============================================================================
291 // BP1 normal wave vector == PAR_LFR_SC_BP1_NVEC_V0_F0 == 8 bits
294 // BP1 normal wave vector == PAR_LFR_SC_BP1_NVEC_V0_F0 == 8 bits
292 // == PAR_LFR_SC_BP1_NVEC_V1_F0 == 8 bits
295 // == PAR_LFR_SC_BP1_NVEC_V1_F0 == 8 bits
293 // == PAR_LFR_SC_BP1_NVEC_V2_F0 == 1 bits
296 // == PAR_LFR_SC_BP1_NVEC_V2_F0 == 1 bits
294 tmp = sqrt(
297 tmp = sqrt(
295 compressed_spec_mat[(i*30) + 3]*compressed_spec_mat[(i*30) + 3] //Im S12
298 compressed_spec_mat[(i*30) + 3]*compressed_spec_mat[(i*30) + 3] //Im S12
296 +compressed_spec_mat[(i*30) + 5]*compressed_spec_mat[(i*30) + 5] //Im S13
299 +compressed_spec_mat[(i*30) + 5]*compressed_spec_mat[(i*30) + 5] //Im S13
297 +compressed_spec_mat[(i*30) + 13]*compressed_spec_mat[(i*30) + 13] //Im S23
300 +compressed_spec_mat[(i*30) + 13]*compressed_spec_mat[(i*30) + 13] //Im S23
298 );
301 );
299 NVEC_V0 = compressed_spec_mat[(i*30) + 13] / tmp; // Im S23
302 NVEC_V0 = compressed_spec_mat[(i*30) + 13] / tmp; // Im S23
300 NVEC_V1 = -compressed_spec_mat[(i*30) + 5] / tmp; // Im S13
303 NVEC_V1 = -compressed_spec_mat[(i*30) + 5] / tmp; // Im S13
301 NVEC_V2 = compressed_spec_mat[(i*30) + 3] / tmp; // Im S12
304 NVEC_V2 = compressed_spec_mat[(i*30) + 3] / tmp; // Im S12
302 LFR_BP1[(i*9) + 4] = (char) (NVEC_V0*127);
305 LFR_BP1[(i*9) + 4] = (char) (NVEC_V0*127);
303 LFR_BP1[(i*9) + 5] = (char) (NVEC_V1*127);
306 LFR_BP1[(i*9) + 5] = (char) (NVEC_V1*127);
304 pt_char = (unsigned char*) &NVEC_V2;
307 pt_char = (unsigned char*) &NVEC_V2;
305 LFR_BP1[(i*9) + 6] = pt_char[0] & 0x80; // extract the sign of NVEC_V2
308 LFR_BP1[(i*9) + 6] = pt_char[0] & 0x80; // extract the sign of NVEC_V2
306 //=======================================================
309 //=======================================================
307 // BP1 ellipticity == PAR_LFR_SC_BP1_ELLIP_F0 == 4 bits
310 // BP1 ellipticity == PAR_LFR_SC_BP1_ELLIP_F0 == 4 bits
308 aux = 2*tmp / PSDB; // compute the ellipticity
311 aux = 2*tmp / PSDB; // compute the ellipticity
309 tmp_u_char = (unsigned char) (aux*(16-1)); // convert the ellipticity
312 tmp_u_char = (unsigned char) (aux*(16-1)); // convert the ellipticity
310 LFR_BP1[i*9+6] = LFR_BP1[i*9+6] | ((tmp_u_char&0x0f)<<3); // keeps 4 bits of the resulting unsigned char
313 LFR_BP1[i*9+6] = LFR_BP1[i*9+6] | ((tmp_u_char&0x0f)<<3); // keeps 4 bits of the resulting unsigned char
311 //==============================================================
314 //==============================================================
312 // BP1 degree of polarization == PAR_LFR_SC_BP1_DOP_F0 == 3 bits
315 // BP1 degree of polarization == PAR_LFR_SC_BP1_DOP_F0 == 3 bits
313 for(j = 0; j<NB_VALUES_PER_SM;j++){
316 for(j = 0; j<NB_VALUES_PER_SM;j++){
314 tr_SB_SB = compressed_spec_mat[i*30] * compressed_spec_mat[i*30]
317 tr_SB_SB = compressed_spec_mat[i*30] * compressed_spec_mat[i*30]
315 + compressed_spec_mat[(i*30) + 10] * compressed_spec_mat[(i*30) + 10]
318 + compressed_spec_mat[(i*30) + 10] * compressed_spec_mat[(i*30) + 10]
316 + compressed_spec_mat[(i*30) + 18] * compressed_spec_mat[(i*30) + 18]
319 + compressed_spec_mat[(i*30) + 18] * compressed_spec_mat[(i*30) + 18]
317 + 2 * compressed_spec_mat[(i*30) + 2] * compressed_spec_mat[(i*30) + 2]
320 + 2 * compressed_spec_mat[(i*30) + 2] * compressed_spec_mat[(i*30) + 2]
318 + 2 * compressed_spec_mat[(i*30) + 3] * compressed_spec_mat[(i*30) + 3]
321 + 2 * compressed_spec_mat[(i*30) + 3] * compressed_spec_mat[(i*30) + 3]
319 + 2 * compressed_spec_mat[(i*30) + 4] * compressed_spec_mat[(i*30) + 4]
322 + 2 * compressed_spec_mat[(i*30) + 4] * compressed_spec_mat[(i*30) + 4]
320 + 2 * compressed_spec_mat[(i*30) + 5] * compressed_spec_mat[(i*30) + 5]
323 + 2 * compressed_spec_mat[(i*30) + 5] * compressed_spec_mat[(i*30) + 5]
321 + 2 * compressed_spec_mat[(i*30) + 12] * compressed_spec_mat[(i*30) + 12]
324 + 2 * compressed_spec_mat[(i*30) + 12] * compressed_spec_mat[(i*30) + 12]
322 + 2 * compressed_spec_mat[(i*30) + 13] * compressed_spec_mat[(i*30) + 13];
325 + 2 * compressed_spec_mat[(i*30) + 13] * compressed_spec_mat[(i*30) + 13];
323 }
326 }
324 aux = PSDB*PSDB;
327 aux = PSDB*PSDB;
325 tmp = sqrt( abs( ( 3*tr_SB_SB - aux ) / ( 2 * aux ) ) );
328 tmp = sqrt( abs( ( 3*tr_SB_SB - aux ) / ( 2 * aux ) ) );
326 tmp_u_char = (unsigned char) (NVEC_V0*(8-1));
329 tmp_u_char = (unsigned char) (NVEC_V0*(8-1));
327 LFR_BP1[(i*9) + 6] = LFR_BP1[(i*9) + 6] | (tmp_u_char & 0x07); // keeps 3 bits of the resulting unsigned char
330 LFR_BP1[(i*9) + 6] = LFR_BP1[(i*9) + 6] | (tmp_u_char & 0x07); // keeps 3 bits of the resulting unsigned char
328 //=======================================================================================
331 //=======================================================================================
329 // BP1 x-component of the normalized Poynting flux == PAR_LFR_SC_BP1_SZ_F0 == 8 bits (7+1)
332 // BP1 x-component of the normalized Poynting flux == PAR_LFR_SC_BP1_SZ_F0 == 8 bits (7+1)
330 sx_re = compressed_spec_mat[(i*30) + 20] * K34_sx_re
333 sx_re = compressed_spec_mat[(i*30) + 20] * K34_sx_re
331 + compressed_spec_mat[(i*30) + 6] * K14_sx_re
334 + compressed_spec_mat[(i*30) + 6] * K14_sx_re
332 + compressed_spec_mat[(i*30) + 8] * K15_sx_re
335 + compressed_spec_mat[(i*30) + 8] * K15_sx_re
333 + compressed_spec_mat[(i*30) + 14] * K24_sx_re
336 + compressed_spec_mat[(i*30) + 14] * K24_sx_re
334 + compressed_spec_mat[(i*30) + 16] * K25_sx_re
337 + compressed_spec_mat[(i*30) + 16] * K25_sx_re
335 + compressed_spec_mat[(i*30) + 22] * K35_sx_re;
338 + compressed_spec_mat[(i*30) + 22] * K35_sx_re;
336 sx_im = compressed_spec_mat[(i*30) + 21] * K34_sx_im
339 sx_im = compressed_spec_mat[(i*30) + 21] * K34_sx_im
337 + compressed_spec_mat[(i*30) + 7] * K14_sx_im
340 + compressed_spec_mat[(i*30) + 7] * K14_sx_im
338 + compressed_spec_mat[(i*30) + 9] * K15_sx_im
341 + compressed_spec_mat[(i*30) + 9] * K15_sx_im
339 + compressed_spec_mat[(i*30) + 15] * K24_sx_im
342 + compressed_spec_mat[(i*30) + 15] * K24_sx_im
340 + compressed_spec_mat[(i*30) + 17] * K25_sx_im
343 + compressed_spec_mat[(i*30) + 17] * K25_sx_im
341 + compressed_spec_mat[(i*30) + 23] * K35_sx_im;
344 + compressed_spec_mat[(i*30) + 23] * K35_sx_im;
342 LFR_BP1[(i*9) + 7] = ((unsigned char) (sx_re * 128)) & 0x7f; // cf DOC for the compression
345 LFR_BP1[(i*9) + 7] = ((unsigned char) (sx_re * 128)) & 0x7f; // cf DOC for the compression
343 if ( abs(sx_re) > abs(sx_im) ) {
346 if ( abs(sx_re) > abs(sx_im) ) {
344 LFR_BP1[(i*9) + 7] = LFR_BP1[(i*9) + 1] | (0x80); // extract the sector of sx
347 LFR_BP1[(i*9) + 7] = LFR_BP1[(i*9) + 1] | (0x80); // extract the sector of sx
345 }
348 }
346 else {
349 else {
347 LFR_BP1[(i*9) + 7] = LFR_BP1[(i*9) + 1] & (0x7f); // extract the sector of sx
350 LFR_BP1[(i*9) + 7] = LFR_BP1[(i*9) + 1] & (0x7f); // extract the sector of sx
348 }
351 }
349 //======================================================================
352 //======================================================================
350 // BP1 phase velocity estimator == PAR_LFR_SC_BP1_VPHI_F0 == 8 bits (7+1)
353 // BP1 phase velocity estimator == PAR_LFR_SC_BP1_VPHI_F0 == 8 bits (7+1)
351 ny = sin(Alpha_M)*NVEC_V1 + cos(Alpha_M)*NVEC_V2;
354 ny = sin(Alpha_M)*NVEC_V1 + cos(Alpha_M)*NVEC_V2;
352 nz = NVEC_V0;
355 nz = NVEC_V0;
353 bx_bx_star = cos(Alpha_M) * cos(Alpha_M) * compressed_spec_mat[i*30+10] // re S22
356 bx_bx_star = cos(Alpha_M) * cos(Alpha_M) * compressed_spec_mat[i*30+10] // re S22
354 + sin(Alpha_M) * sin(Alpha_M) * compressed_spec_mat[i*30+18] // re S33
357 + sin(Alpha_M) * sin(Alpha_M) * compressed_spec_mat[i*30+18] // re S33
355 - 2 * sin(Alpha_M) * cos(Alpha_M) * compressed_spec_mat[i*30+12]; // re S23
358 - 2 * sin(Alpha_M) * cos(Alpha_M) * compressed_spec_mat[i*30+12]; // re S23
356 nebx_re = ny * (compressed_spec_mat[(i*30) + 14] * K24_ny_re
359 nebx_re = ny * (compressed_spec_mat[(i*30) + 14] * K24_ny_re
357 +compressed_spec_mat[(i*30) + 16] * K25_ny_re
360 +compressed_spec_mat[(i*30) + 16] * K25_ny_re
358 +compressed_spec_mat[(i*30) + 20] * K34_ny_re
361 +compressed_spec_mat[(i*30) + 20] * K34_ny_re
359 +compressed_spec_mat[(i*30) + 22] * K35_ny_re)
362 +compressed_spec_mat[(i*30) + 22] * K35_ny_re)
360 + nz * (compressed_spec_mat[(i*30) + 14] * K24_nz_re
363 + nz * (compressed_spec_mat[(i*30) + 14] * K24_nz_re
361 +compressed_spec_mat[(i*30) + 16] * K25_nz_re
364 +compressed_spec_mat[(i*30) + 16] * K25_nz_re
362 +compressed_spec_mat[(i*30) + 20] * K34_nz_re
365 +compressed_spec_mat[(i*30) + 20] * K34_nz_re
363 +compressed_spec_mat[(i*30) + 22] * K35_nz_re);
366 +compressed_spec_mat[(i*30) + 22] * K35_nz_re);
364 nebx_im = ny * (compressed_spec_mat[(i*30) + 15]*K24_ny_re
367 nebx_im = ny * (compressed_spec_mat[(i*30) + 15]*K24_ny_re
365 +compressed_spec_mat[(i*30) + 17] * K25_ny_re
368 +compressed_spec_mat[(i*30) + 17] * K25_ny_re
366 +compressed_spec_mat[(i*30) + 21] * K34_ny_re
369 +compressed_spec_mat[(i*30) + 21] * K34_ny_re
367 +compressed_spec_mat[(i*30) + 23] * K35_ny_re)
370 +compressed_spec_mat[(i*30) + 23] * K35_ny_re)
368 + nz * (compressed_spec_mat[(i*30) + 15] * K24_nz_im
371 + nz * (compressed_spec_mat[(i*30) + 15] * K24_nz_im
369 +compressed_spec_mat[(i*30) + 17] * K25_nz_im
372 +compressed_spec_mat[(i*30) + 17] * K25_nz_im
370 +compressed_spec_mat[(i*30) + 21] * K34_nz_im
373 +compressed_spec_mat[(i*30) + 21] * K34_nz_im
371 +compressed_spec_mat[(i*30) + 23] * K35_nz_im);
374 +compressed_spec_mat[(i*30) + 23] * K35_nz_im);
372 tmp = nebx_re / bx_bx_star;
375 tmp = nebx_re / bx_bx_star;
373 LFR_BP1[(i*9) + 8] = ((unsigned char) (tmp * 128)) & 0x7f; // cf DOC for the compression
376 LFR_BP1[(i*9) + 8] = ((unsigned char) (tmp * 128)) & 0x7f; // cf DOC for the compression
374 if ( abs(nebx_re) > abs(nebx_im) ) {
377 if ( abs(nebx_re) > abs(nebx_im) ) {
375 LFR_BP1[(i*9) + 8] = LFR_BP1[(i*9) + 8] | (0x80); // extract the sector of nebx
378 LFR_BP1[(i*9) + 8] = LFR_BP1[(i*9) + 8] | (0x80); // extract the sector of nebx
376 }
379 }
377 else {
380 else {
378 LFR_BP1[(i*9) + 8] = LFR_BP1[(i*9) + 8] & (0x7f); // extract the sector of nebx
381 LFR_BP1[(i*9) + 8] = LFR_BP1[(i*9) + 8] & (0x7f); // extract the sector of nebx
379 }
382 }
380 }
383 }
381
384
382 }
385 }
383
386
384 void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat){
387 void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat){
385 // BP2 autocorrelation
388 // BP2 autocorrelation
386 int i;
389 int i;
387 int aux = 0;
390 int aux = 0;
388
391
389 for(i = 0; i<nb_bins_compressed_spec_mat; i++){
392 for(i = 0; i<nb_bins_compressed_spec_mat; i++){
390 // S12
393 // S12
391 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) + 10]);
394 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) + 10]);
392 compressed_spec_mat[(i*30) + 2] = compressed_spec_mat[(i*30) + 2] / aux;
395 compressed_spec_mat[(i*30) + 2] = compressed_spec_mat[(i*30) + 2] / aux;
393 compressed_spec_mat[(i*30) + 3] = compressed_spec_mat[(i*30) + 3] / aux;
396 compressed_spec_mat[(i*30) + 3] = compressed_spec_mat[(i*30) + 3] / aux;
394 // S13
397 // S13
395 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) + 18]);
398 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) + 18]);
396 compressed_spec_mat[(i*30) + 4] = compressed_spec_mat[(i*30) + 4] / aux;
399 compressed_spec_mat[(i*30) + 4] = compressed_spec_mat[(i*30) + 4] / aux;
397 compressed_spec_mat[(i*30) + 5] = compressed_spec_mat[(i*30) + 5] / aux;
400 compressed_spec_mat[(i*30) + 5] = compressed_spec_mat[(i*30) + 5] / aux;
398 // S23
401 // S23
399 aux = sqrt(compressed_spec_mat[i*30+12]*compressed_spec_mat[(i*30) + 18]);
402 aux = sqrt(compressed_spec_mat[i*30+12]*compressed_spec_mat[(i*30) + 18]);
400 compressed_spec_mat[(i*30) + 12] = compressed_spec_mat[(i*30) + 12] / aux;
403 compressed_spec_mat[(i*30) + 12] = compressed_spec_mat[(i*30) + 12] / aux;
401 compressed_spec_mat[(i*30) + 13] = compressed_spec_mat[(i*30) + 13] / aux;
404 compressed_spec_mat[(i*30) + 13] = compressed_spec_mat[(i*30) + 13] / aux;
402 // S45
405 // S45
403 aux = sqrt(compressed_spec_mat[i*30+24]*compressed_spec_mat[(i*30) + 28]);
406 aux = sqrt(compressed_spec_mat[i*30+24]*compressed_spec_mat[(i*30) + 28]);
404 compressed_spec_mat[(i*30) + 26] = compressed_spec_mat[(i*30) + 26] / aux;
407 compressed_spec_mat[(i*30) + 26] = compressed_spec_mat[(i*30) + 26] / aux;
405 compressed_spec_mat[(i*30) + 27] = compressed_spec_mat[(i*30) + 27] / aux;
408 compressed_spec_mat[(i*30) + 27] = compressed_spec_mat[(i*30) + 27] / aux;
406 // S14
409 // S14
407 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) +24]);
410 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) +24]);
408 compressed_spec_mat[(i*30) + 6] = compressed_spec_mat[(i*30) + 6] / aux;
411 compressed_spec_mat[(i*30) + 6] = compressed_spec_mat[(i*30) + 6] / aux;
409 compressed_spec_mat[(i*30) + 7] = compressed_spec_mat[(i*30) + 7] / aux;
412 compressed_spec_mat[(i*30) + 7] = compressed_spec_mat[(i*30) + 7] / aux;
410 // S15
413 // S15
411 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) + 28]);
414 aux = sqrt(compressed_spec_mat[i*30]*compressed_spec_mat[(i*30) + 28]);
412 compressed_spec_mat[(i*30) + 8] = compressed_spec_mat[(i*30) + 8] / aux;
415 compressed_spec_mat[(i*30) + 8] = compressed_spec_mat[(i*30) + 8] / aux;
413 compressed_spec_mat[(i*30) + 9] = compressed_spec_mat[(i*30) + 9] / aux;
416 compressed_spec_mat[(i*30) + 9] = compressed_spec_mat[(i*30) + 9] / aux;
414 // S24
417 // S24
415 aux = sqrt(compressed_spec_mat[i*10]*compressed_spec_mat[(i*30) + 24]);
418 aux = sqrt(compressed_spec_mat[i*10]*compressed_spec_mat[(i*30) + 24]);
416 compressed_spec_mat[(i*30) + 14] = compressed_spec_mat[(i*30) + 14] / aux;
419 compressed_spec_mat[(i*30) + 14] = compressed_spec_mat[(i*30) + 14] / aux;
417 compressed_spec_mat[(i*30) + 15] = compressed_spec_mat[(i*30) + 15] / aux;
420 compressed_spec_mat[(i*30) + 15] = compressed_spec_mat[(i*30) + 15] / aux;
418 // S25
421 // S25
419 aux = sqrt(compressed_spec_mat[i*10]*compressed_spec_mat[(i*30) + 28]);
422 aux = sqrt(compressed_spec_mat[i*10]*compressed_spec_mat[(i*30) + 28]);
420 compressed_spec_mat[(i*30) + 16] = compressed_spec_mat[(i*30) + 16] / aux;
423 compressed_spec_mat[(i*30) + 16] = compressed_spec_mat[(i*30) + 16] / aux;
421 compressed_spec_mat[(i*30) + 17] = compressed_spec_mat[(i*30) + 17] / aux;
424 compressed_spec_mat[(i*30) + 17] = compressed_spec_mat[(i*30) + 17] / aux;
422 // S34
425 // S34
423 aux = sqrt(compressed_spec_mat[i*18]*compressed_spec_mat[(i*30) + 24]);
426 aux = sqrt(compressed_spec_mat[i*18]*compressed_spec_mat[(i*30) + 24]);
424 compressed_spec_mat[(i*30) + 20] = compressed_spec_mat[(i*30) + 20] / aux;
427 compressed_spec_mat[(i*30) + 20] = compressed_spec_mat[(i*30) + 20] / aux;
425 compressed_spec_mat[(i*30) + 21] = compressed_spec_mat[(i*30) + 21] / aux;
428 compressed_spec_mat[(i*30) + 21] = compressed_spec_mat[(i*30) + 21] / aux;
426 // S35
429 // S35
427 aux = sqrt(compressed_spec_mat[i*18]*compressed_spec_mat[(i*30) + 28]);
430 aux = sqrt(compressed_spec_mat[i*18]*compressed_spec_mat[(i*30) + 28]);
428 compressed_spec_mat[(i*30) + 22] = compressed_spec_mat[(i*30) + 22] / aux;
431 compressed_spec_mat[(i*30) + 22] = compressed_spec_mat[(i*30) + 22] / aux;
429 compressed_spec_mat[(i*30) + 23] = compressed_spec_mat[(i*30) + 23] / aux;
432 compressed_spec_mat[(i*30) + 23] = compressed_spec_mat[(i*30) + 23] / aux;
430 }
433 }
431 }
434 }
432
435
433 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header)
436 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header)
434 {
437 {
435 header->targetLogicalAddress = CCSDS_DESTINATION_ID;
438 header->targetLogicalAddress = CCSDS_DESTINATION_ID;
436 header->protocolIdentifier = CCSDS_PROTOCOLE_ID;
439 header->protocolIdentifier = CCSDS_PROTOCOLE_ID;
437 header->reserved = 0x00;
440 header->reserved = 0x00;
438 header->userApplication = CCSDS_USER_APP;
441 header->userApplication = CCSDS_USER_APP;
439 header->packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
442 header->packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
440 header->packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
443 header->packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
441 header->packetSequenceControl[0] = 0xc0;
444 header->packetSequenceControl[0] = 0xc0;
442 header->packetSequenceControl[1] = 0x00;
445 header->packetSequenceControl[1] = 0x00;
443 header->packetLength[0] = 0x00;
446 header->packetLength[0] = 0x00;
444 header->packetLength[1] = 0x00;
447 header->packetLength[1] = 0x00;
445 // DATA FIELD HEADER
448 // DATA FIELD HEADER
446 header->spare1_pusVersion_spare2 = 0x10;
449 header->spare1_pusVersion_spare2 = 0x10;
447 header->serviceType = TM_TYPE_LFR_SCIENCE; // service type
450 header->serviceType = TM_TYPE_LFR_SCIENCE; // service type
448 header->serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
451 header->serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
449 header->destinationID = TM_DESTINATION_ID_GROUND;
452 header->destinationID = TM_DESTINATION_ID_GROUND;
450 // AUXILIARY DATA HEADER
453 // AUXILIARY DATA HEADER
451 header->sid = 0x00;
454 header->sid = 0x00;
452 header->biaStatusInfo = 0x00;
455 header->biaStatusInfo = 0x00;
453 header->cntASM = 0x00;
456 header->cntASM = 0x00;
454 header->nrASM = 0x00;
457 header->nrASM = 0x00;
455 header->time[0] = 0x00;
458 header->time[0] = 0x00;
456 header->time[0] = 0x00;
459 header->time[0] = 0x00;
457 header->time[0] = 0x00;
460 header->time[0] = 0x00;
458 header->time[0] = 0x00;
461 header->time[0] = 0x00;
459 header->time[0] = 0x00;
462 header->time[0] = 0x00;
460 header->time[0] = 0x00;
463 header->time[0] = 0x00;
461 header->blkNr[0] = 0x00; // BLK_NR MSB
464 header->blkNr[0] = 0x00; // BLK_NR MSB
462 header->blkNr[1] = 0x00; // BLK_NR LSB
465 header->blkNr[1] = 0x00; // BLK_NR LSB
463 }
466 }
464
467
465 void send_spectral_matrix(Header_TM_LFR_SCIENCE_ASM_t *header, char *spectral_matrix,
468 void send_spectral_matrix(Header_TM_LFR_SCIENCE_ASM_t *header, char *spectral_matrix,
466 unsigned int sid, spw_ioctl_pkt_send *spw_ioctl_send, rtems_id queue_id)
469 unsigned int sid, spw_ioctl_pkt_send *spw_ioctl_send, rtems_id queue_id)
467 {
470 {
468 unsigned int i;
471 unsigned int i;
469 unsigned int length = 0;
472 unsigned int length = 0;
470 rtems_status_code status;
473 rtems_status_code status;
471
474
472 header->sid = (unsigned char) sid;
475 header->sid = (unsigned char) sid;
473
476
474 for (i=0; i<2; i++)
477 for (i=0; i<2; i++)
475 {
478 {
476 // BUILD THE DATA
479 // BUILD THE DATA
477 spw_ioctl_send->dlen = TOTAL_SIZE_SM;
480 spw_ioctl_send->dlen = TOTAL_SIZE_SM;
478 spw_ioctl_send->data = &spectral_matrix[ i * TOTAL_SIZE_SM];
481 spw_ioctl_send->data = &spectral_matrix[ i * TOTAL_SIZE_SM];
479 spw_ioctl_send->hlen = HEADER_LENGTH_TM_LFR_SCIENCE_ASM + CCSDS_PROTOCOLE_EXTRA_BYTES;
482 spw_ioctl_send->hlen = HEADER_LENGTH_TM_LFR_SCIENCE_ASM + CCSDS_PROTOCOLE_EXTRA_BYTES;
480 spw_ioctl_send->hdr = (char *) header;
483 spw_ioctl_send->hdr = (char *) header;
481 spw_ioctl_send->options = 0;
484 spw_ioctl_send->options = 0;
482
485
483 // BUILD THE HEADER
486 // BUILD THE HEADER
484 length = PACKET_LENGTH_TM_LFR_SCIENCE_ASM;
487 length = PACKET_LENGTH_TM_LFR_SCIENCE_ASM;
485 header->packetLength[0] = (unsigned char) (length>>8);
488 header->packetLength[0] = (unsigned char) (length>>8);
486 header->packetLength[1] = (unsigned char) (length);
489 header->packetLength[1] = (unsigned char) (length);
487 header->sid = (unsigned char) sid; // SID
490 header->sid = (unsigned char) sid; // SID
488 header->cntASM = 2;
491 header->cntASM = 2;
489 header->nrASM = (unsigned char) (i+1);
492 header->nrASM = (unsigned char) (i+1);
490 header->blkNr[0] =(unsigned char) ( (NB_BINS_PER_SM/2) >> 8 ); // BLK_NR MSB
493 header->blkNr[0] =(unsigned char) ( (NB_BINS_PER_SM/2) >> 8 ); // BLK_NR MSB
491 header->blkNr[1] = (unsigned char) (NB_BINS_PER_SM/2); // BLK_NR LSB
494 header->blkNr[1] = (unsigned char) (NB_BINS_PER_SM/2); // BLK_NR LSB
492 // SET PACKET TIME
495 // SET PACKET TIME
493 header->time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
496 header->time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
494 header->time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
497 header->time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
495 header->time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
498 header->time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
496 header->time[3] = (unsigned char) (time_management_regs->coarse_time);
499 header->time[3] = (unsigned char) (time_management_regs->coarse_time);
497 header->time[4] = (unsigned char) (time_management_regs->fine_time>>8);
500 header->time[4] = (unsigned char) (time_management_regs->fine_time>>8);
498 header->time[5] = (unsigned char) (time_management_regs->fine_time);
501 header->time[5] = (unsigned char) (time_management_regs->fine_time);
499 header->acquisitionTime[0] = (unsigned char) (time_management_regs->coarse_time>>24);
502 header->acquisitionTime[0] = (unsigned char) (time_management_regs->coarse_time>>24);
500 header->acquisitionTime[1] = (unsigned char) (time_management_regs->coarse_time>>16);
503 header->acquisitionTime[1] = (unsigned char) (time_management_regs->coarse_time>>16);
501 header->acquisitionTime[2] = (unsigned char) (time_management_regs->coarse_time>>8);
504 header->acquisitionTime[2] = (unsigned char) (time_management_regs->coarse_time>>8);
502 header->acquisitionTime[3] = (unsigned char) (time_management_regs->coarse_time);
505 header->acquisitionTime[3] = (unsigned char) (time_management_regs->coarse_time);
503 header->acquisitionTime[4] = (unsigned char) (time_management_regs->fine_time>>8);
506 header->acquisitionTime[4] = (unsigned char) (time_management_regs->fine_time>>8);
504 header->acquisitionTime[5] = (unsigned char) (time_management_regs->fine_time);
507 header->acquisitionTime[5] = (unsigned char) (time_management_regs->fine_time);
505 // SEND PACKET
508 // SEND PACKET
506 status = rtems_message_queue_send( queue_id, spw_ioctl_send, ACTION_MSG_SPW_IOCTL_SEND_SIZE);
509 status = rtems_message_queue_send( queue_id, spw_ioctl_send, ACTION_MSG_SPW_IOCTL_SEND_SIZE);
507 if (status != RTEMS_SUCCESSFUL) {
510 if (status != RTEMS_SUCCESSFUL) {
508 printf("in send_spectral_matrix *** ERR %d\n", (int) status);
511 printf("in send_spectral_matrix *** ERR %d\n", (int) status);
509 }
512 }
510 }
513 }
511 }
514 }
512
515
513 void convert_averaged_spectral_matrix( volatile float *input_matrix, char *output_matrix)
516 void convert_averaged_spectral_matrix( volatile float *input_matrix, char *output_matrix)
514 {
517 {
515 unsigned int i;
518 unsigned int i;
516 unsigned int j;
519 unsigned int j;
517 char * pt_char_input;
520 char * pt_char_input;
518 char * pt_char_output;
521 char * pt_char_output;
519
522
520 pt_char_input = NULL;
523 pt_char_input = NULL;
521 pt_char_output = NULL;
524 pt_char_output = NULL;
522
525
523 for( i=0; i<NB_BINS_PER_SM; i++)
526 for( i=0; i<NB_BINS_PER_SM; i++)
524 {
527 {
525 for ( j=0; j<NB_VALUES_PER_SM; j++)
528 for ( j=0; j<NB_VALUES_PER_SM; j++)
526 {
529 {
527 pt_char_input = (char*) &input_matrix [ (i*NB_VALUES_PER_SM) + j ];
530 pt_char_input = (char*) &input_matrix [ (i*NB_VALUES_PER_SM) + j ];
528 pt_char_output = (char*) &output_matrix[ 2 * ( (i*NB_VALUES_PER_SM) + j ) ];
531 pt_char_output = (char*) &output_matrix[ 2 * ( (i*NB_VALUES_PER_SM) + j ) ];
529 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
532 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
530 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
533 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
531 }
534 }
532 }
535 }
533 }
536 }
534
537
535 void fill_averaged_spectral_matrix(void)
538 void fill_averaged_spectral_matrix(void)
536 {
539 {
537 /** This function fills spectral matrices related buffers with arbitrary data.
540 /** This function fills spectral matrices related buffers with arbitrary data.
538 *
541 *
539 * This function is for testing purpose only.
542 * This function is for testing purpose only.
540 *
543 *
541 */
544 */
542
545
543 float offset;
546 float offset;
544 float coeff;
547 float coeff;
545
548
546 offset = 10.;
549 offset = 10.;
547 coeff = 100000.;
550 coeff = 100000.;
548 averaged_spec_mat_f0[ 0 + 25 * 0 ] = 0. + offset;
551 averaged_sm_f0[ 0 + 25 * 0 ] = 0. + offset;
549 averaged_spec_mat_f0[ 0 + 25 * 1 ] = 1. + offset;
552 averaged_sm_f0[ 0 + 25 * 1 ] = 1. + offset;
550 averaged_spec_mat_f0[ 0 + 25 * 2 ] = 2. + offset;
553 averaged_sm_f0[ 0 + 25 * 2 ] = 2. + offset;
551 averaged_spec_mat_f0[ 0 + 25 * 3 ] = 3. + offset;
554 averaged_sm_f0[ 0 + 25 * 3 ] = 3. + offset;
552 averaged_spec_mat_f0[ 0 + 25 * 4 ] = 4. + offset;
555 averaged_sm_f0[ 0 + 25 * 4 ] = 4. + offset;
553 averaged_spec_mat_f0[ 0 + 25 * 5 ] = 5. + offset;
556 averaged_sm_f0[ 0 + 25 * 5 ] = 5. + offset;
554 averaged_spec_mat_f0[ 0 + 25 * 6 ] = 6. + offset;
557 averaged_sm_f0[ 0 + 25 * 6 ] = 6. + offset;
555 averaged_spec_mat_f0[ 0 + 25 * 7 ] = 7. + offset;
558 averaged_sm_f0[ 0 + 25 * 7 ] = 7. + offset;
556 averaged_spec_mat_f0[ 0 + 25 * 8 ] = 8. + offset;
559 averaged_sm_f0[ 0 + 25 * 8 ] = 8. + offset;
557 averaged_spec_mat_f0[ 0 + 25 * 9 ] = 9. + offset;
560 averaged_sm_f0[ 0 + 25 * 9 ] = 9. + offset;
558 averaged_spec_mat_f0[ 0 + 25 * 10 ] = 10. + offset;
561 averaged_sm_f0[ 0 + 25 * 10 ] = 10. + offset;
559 averaged_spec_mat_f0[ 0 + 25 * 11 ] = 11. + offset;
562 averaged_sm_f0[ 0 + 25 * 11 ] = 11. + offset;
560 averaged_spec_mat_f0[ 0 + 25 * 12 ] = 12. + offset;
563 averaged_sm_f0[ 0 + 25 * 12 ] = 12. + offset;
561 averaged_spec_mat_f0[ 0 + 25 * 13 ] = 13. + offset;
564 averaged_sm_f0[ 0 + 25 * 13 ] = 13. + offset;
562 averaged_spec_mat_f0[ 0 + 25 * 14 ] = 14. + offset;
565 averaged_sm_f0[ 0 + 25 * 14 ] = 14. + offset;
563 averaged_spec_mat_f0[ 9 + 25 * 0 ] = -(0. + offset)* coeff;
566 averaged_sm_f0[ 9 + 25 * 0 ] = -(0. + offset)* coeff;
564 averaged_spec_mat_f0[ 9 + 25 * 1 ] = -(1. + offset)* coeff;
567 averaged_sm_f0[ 9 + 25 * 1 ] = -(1. + offset)* coeff;
565 averaged_spec_mat_f0[ 9 + 25 * 2 ] = -(2. + offset)* coeff;
568 averaged_sm_f0[ 9 + 25 * 2 ] = -(2. + offset)* coeff;
566 averaged_spec_mat_f0[ 9 + 25 * 3 ] = -(3. + offset)* coeff;
569 averaged_sm_f0[ 9 + 25 * 3 ] = -(3. + offset)* coeff;
567 averaged_spec_mat_f0[ 9 + 25 * 4 ] = -(4. + offset)* coeff;
570 averaged_sm_f0[ 9 + 25 * 4 ] = -(4. + offset)* coeff;
568 averaged_spec_mat_f0[ 9 + 25 * 5 ] = -(5. + offset)* coeff;
571 averaged_sm_f0[ 9 + 25 * 5 ] = -(5. + offset)* coeff;
569 averaged_spec_mat_f0[ 9 + 25 * 6 ] = -(6. + offset)* coeff;
572 averaged_sm_f0[ 9 + 25 * 6 ] = -(6. + offset)* coeff;
570 averaged_spec_mat_f0[ 9 + 25 * 7 ] = -(7. + offset)* coeff;
573 averaged_sm_f0[ 9 + 25 * 7 ] = -(7. + offset)* coeff;
571 averaged_spec_mat_f0[ 9 + 25 * 8 ] = -(8. + offset)* coeff;
574 averaged_sm_f0[ 9 + 25 * 8 ] = -(8. + offset)* coeff;
572 averaged_spec_mat_f0[ 9 + 25 * 9 ] = -(9. + offset)* coeff;
575 averaged_sm_f0[ 9 + 25 * 9 ] = -(9. + offset)* coeff;
573 averaged_spec_mat_f0[ 9 + 25 * 10 ] = -(10. + offset)* coeff;
576 averaged_sm_f0[ 9 + 25 * 10 ] = -(10. + offset)* coeff;
574 averaged_spec_mat_f0[ 9 + 25 * 11 ] = -(11. + offset)* coeff;
577 averaged_sm_f0[ 9 + 25 * 11 ] = -(11. + offset)* coeff;
575 averaged_spec_mat_f0[ 9 + 25 * 12 ] = -(12. + offset)* coeff;
578 averaged_sm_f0[ 9 + 25 * 12 ] = -(12. + offset)* coeff;
576 averaged_spec_mat_f0[ 9 + 25 * 13 ] = -(13. + offset)* coeff;
579 averaged_sm_f0[ 9 + 25 * 13 ] = -(13. + offset)* coeff;
577 averaged_spec_mat_f0[ 9 + 25 * 14 ] = -(14. + offset)* coeff;
580 averaged_sm_f0[ 9 + 25 * 14 ] = -(14. + offset)* coeff;
578
581
579 offset = 10000000;
582 offset = 10000000;
580 averaged_spec_mat_f0[ 16 + 25 * 0 ] = (0. + offset)* coeff;
583 averaged_sm_f0[ 16 + 25 * 0 ] = (0. + offset)* coeff;
581 averaged_spec_mat_f0[ 16 + 25 * 1 ] = (1. + offset)* coeff;
584 averaged_sm_f0[ 16 + 25 * 1 ] = (1. + offset)* coeff;
582 averaged_spec_mat_f0[ 16 + 25 * 2 ] = (2. + offset)* coeff;
585 averaged_sm_f0[ 16 + 25 * 2 ] = (2. + offset)* coeff;
583 averaged_spec_mat_f0[ 16 + 25 * 3 ] = (3. + offset)* coeff;
586 averaged_sm_f0[ 16 + 25 * 3 ] = (3. + offset)* coeff;
584 averaged_spec_mat_f0[ 16 + 25 * 4 ] = (4. + offset)* coeff;
587 averaged_sm_f0[ 16 + 25 * 4 ] = (4. + offset)* coeff;
585 averaged_spec_mat_f0[ 16 + 25 * 5 ] = (5. + offset)* coeff;
588 averaged_sm_f0[ 16 + 25 * 5 ] = (5. + offset)* coeff;
586 averaged_spec_mat_f0[ 16 + 25 * 6 ] = (6. + offset)* coeff;
589 averaged_sm_f0[ 16 + 25 * 6 ] = (6. + offset)* coeff;
587 averaged_spec_mat_f0[ 16 + 25 * 7 ] = (7. + offset)* coeff;
590 averaged_sm_f0[ 16 + 25 * 7 ] = (7. + offset)* coeff;
588 averaged_spec_mat_f0[ 16 + 25 * 8 ] = (8. + offset)* coeff;
591 averaged_sm_f0[ 16 + 25 * 8 ] = (8. + offset)* coeff;
589 averaged_spec_mat_f0[ 16 + 25 * 9 ] = (9. + offset)* coeff;
592 averaged_sm_f0[ 16 + 25 * 9 ] = (9. + offset)* coeff;
590 averaged_spec_mat_f0[ 16 + 25 * 10 ] = (10. + offset)* coeff;
593 averaged_sm_f0[ 16 + 25 * 10 ] = (10. + offset)* coeff;
591 averaged_spec_mat_f0[ 16 + 25 * 11 ] = (11. + offset)* coeff;
594 averaged_sm_f0[ 16 + 25 * 11 ] = (11. + offset)* coeff;
592 averaged_spec_mat_f0[ 16 + 25 * 12 ] = (12. + offset)* coeff;
595 averaged_sm_f0[ 16 + 25 * 12 ] = (12. + offset)* coeff;
593 averaged_spec_mat_f0[ 16 + 25 * 13 ] = (13. + offset)* coeff;
596 averaged_sm_f0[ 16 + 25 * 13 ] = (13. + offset)* coeff;
594 averaged_spec_mat_f0[ 16 + 25 * 14 ] = (14. + offset)* coeff;
597 averaged_sm_f0[ 16 + 25 * 14 ] = (14. + offset)* coeff;
595
598
596 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 0 ] = averaged_spec_mat_f0[ 0 ];
599 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 0 ] = averaged_sm_f0[ 0 ];
597 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 1 ] = averaged_spec_mat_f0[ 1 ];
600 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 1 ] = averaged_sm_f0[ 1 ];
598 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 2 ] = averaged_spec_mat_f0[ 2 ];
601 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 2 ] = averaged_sm_f0[ 2 ];
599 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 3 ] = averaged_spec_mat_f0[ 3 ];
602 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 3 ] = averaged_sm_f0[ 3 ];
600 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 4 ] = averaged_spec_mat_f0[ 4 ];
603 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 4 ] = averaged_sm_f0[ 4 ];
601 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 5 ] = averaged_spec_mat_f0[ 5 ];
604 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 5 ] = averaged_sm_f0[ 5 ];
602 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 6 ] = averaged_spec_mat_f0[ 6 ];
605 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 6 ] = averaged_sm_f0[ 6 ];
603 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 7 ] = averaged_spec_mat_f0[ 7 ];
606 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 7 ] = averaged_sm_f0[ 7 ];
604 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 8 ] = averaged_spec_mat_f0[ 8 ];
607 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 8 ] = averaged_sm_f0[ 8 ];
605 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 9 ] = averaged_spec_mat_f0[ 9 ];
608 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 9 ] = averaged_sm_f0[ 9 ];
606 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 10 ] = averaged_spec_mat_f0[ 10 ];
609 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 10 ] = averaged_sm_f0[ 10 ];
607 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 11 ] = averaged_spec_mat_f0[ 11 ];
610 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 11 ] = averaged_sm_f0[ 11 ];
608 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 12 ] = averaged_spec_mat_f0[ 12 ];
611 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 12 ] = averaged_sm_f0[ 12 ];
609 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 13 ] = averaged_spec_mat_f0[ 13 ];
612 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 13 ] = averaged_sm_f0[ 13 ];
610 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 14 ] = averaged_spec_mat_f0[ 14 ];
613 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 14 ] = averaged_sm_f0[ 14 ];
611 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 15 ] = averaged_spec_mat_f0[ 15 ];
614 averaged_sm_f0[ (TOTAL_SIZE_SM/2) + 15 ] = averaged_sm_f0[ 15 ];
612 }
615 }
613
616
614 void reset_spectral_matrix_regs()
617 void reset_spectral_matrix_regs()
615 {
618 {
616 /** This function resets the spectral matrices module registers.
619 /** This function resets the spectral matrices module registers.
617 *
620 *
618 * The registers affected by this function are located at the following offset addresses:
621 * The registers affected by this function are located at the following offset addresses:
619 *
622 *
620 * - 0x00 config
623 * - 0x00 config
621 * - 0x04 status
624 * - 0x04 status
622 * - 0x08 matrixF0_Address0
625 * - 0x08 matrixF0_Address0
623 * - 0x10 matrixFO_Address1
626 * - 0x10 matrixFO_Address1
624 * - 0x14 matrixF1_Address
627 * - 0x14 matrixF1_Address
625 * - 0x18 matrixF2_Address
628 * - 0x18 matrixF2_Address
626 *
629 *
627 */
630 */
628
631
629 #ifdef GSA
632 #ifdef GSA
630 #else
633 #else
631 spectral_matrix_regs->matrixF0_Address0 = (int) spec_mat_f0_0;
634 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
632 spectral_matrix_regs->matrixFO_Address1 = (int) spec_mat_f0_1;
635 spectral_matrix_regs->matrixFO_Address1 = current_ring_node_sm_f0->buffer_address;
633 spectral_matrix_regs->matrixF1_Address = (int) spec_mat_f1;
636 spectral_matrix_regs->matrixF1_Address = current_ring_node_sm_f1->buffer_address;
634 spectral_matrix_regs->matrixF2_Address = (int) spec_mat_f2;
637 spectral_matrix_regs->matrixF2_Address = current_ring_node_sm_f2->buffer_address;
635 #endif
638 #endif
636 }
639 }
637
640
638 //******************
641 //******************
639 // general functions
642 // general functions
640
643
641
644
642
645
643
646
@@ -1,1181 +1,1250
1 /** Functions and tasks related to waveform packet generation.
1 /** Functions and tasks related to waveform packet generation.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * A group of functions to handle waveforms, in snapshot or continuous format.\n
6 * A group of functions to handle waveforms, in snapshot or continuous format.\n
7 *
7 *
8 */
8 */
9
9
10 #include "wf_handler.h"
10 #include "wf_handler.h"
11
11
12 //*****************
12 //*****************
13 // waveform headers
13 // waveform headers
14 // SWF
14 // SWF
15 Header_TM_LFR_SCIENCE_SWF_t headerSWF_F0[7];
15 Header_TM_LFR_SCIENCE_SWF_t headerSWF_F0[7];
16 Header_TM_LFR_SCIENCE_SWF_t headerSWF_F1[7];
16 Header_TM_LFR_SCIENCE_SWF_t headerSWF_F1[7];
17 Header_TM_LFR_SCIENCE_SWF_t headerSWF_F2[7];
17 Header_TM_LFR_SCIENCE_SWF_t headerSWF_F2[7];
18 // CWF
18 // CWF
19 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F1[7];
19 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F1[7];
20 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F2_BURST[7];
20 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F2_BURST[7];
21 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F2_SBM2[7];
21 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F2_SBM2[7];
22 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F3[7];
22 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F3[7];
23 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F3_light[7];
23 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F3_light[7];
24
24
25 //**************
25 //**************
26 // waveform ring
26 // waveform ring
27 ring_node waveform_ring_f0[NB_RING_NODES_F0];
27 ring_node waveform_ring_f0[NB_RING_NODES_F0];
28 ring_node waveform_ring_f1[NB_RING_NODES_F1];
28 ring_node waveform_ring_f1[NB_RING_NODES_F1];
29 ring_node waveform_ring_f2[NB_RING_NODES_F2];
29 ring_node waveform_ring_f2[NB_RING_NODES_F2];
30 ring_node *current_ring_node_f0;
30 ring_node *current_ring_node_f0;
31 ring_node *ring_node_to_send_swf_f0;
31 ring_node *ring_node_to_send_swf_f0;
32 ring_node *current_ring_node_f1;
32 ring_node *current_ring_node_f1;
33 ring_node *ring_node_to_send_swf_f1;
33 ring_node *ring_node_to_send_swf_f1;
34 ring_node *ring_node_to_send_cwf_f1;
34 ring_node *ring_node_to_send_cwf_f1;
35 ring_node *current_ring_node_f2;
35 ring_node *current_ring_node_f2;
36 ring_node *ring_node_to_send_swf_f2;
36 ring_node *ring_node_to_send_swf_f2;
37 ring_node *ring_node_to_send_cwf_f2;
37 ring_node *ring_node_to_send_cwf_f2;
38
38
39 unsigned char doubleSendCWF2 = 0;
40
41 rtems_isr waveforms_isr( rtems_vector_number vector )
39 rtems_isr waveforms_isr( rtems_vector_number vector )
42 {
40 {
43 /** This is the interrupt sub routine called by the waveform picker core.
41 /** This is the interrupt sub routine called by the waveform picker core.
44 *
42 *
45 * This ISR launch different actions depending mainly on two pieces of information:
43 * This ISR launch different actions depending mainly on two pieces of information:
46 * 1. the values read in the registers of the waveform picker.
44 * 1. the values read in the registers of the waveform picker.
47 * 2. the current LFR mode.
45 * 2. the current LFR mode.
48 *
46 *
49 */
47 */
50
48
49 static unsigned char nb_swf = 0;
50
51 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
51 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
52 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
52 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
53 { // in modes other than STANDBY and BURST, send the CWF_F3 data
53 { // in modes other than STANDBY and BURST, send the CWF_F3 data
54 if ((waveform_picker_regs->status & 0x08) == 0x08){ // [1000] f3 is full
54 if ((waveform_picker_regs->status & 0x08) == 0x08){ // [1000] f3 is full
55 // (1) change the receiving buffer for the waveform picker
55 // (1) change the receiving buffer for the waveform picker
56 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
56 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
57 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_b);
57 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_b);
58 }
58 }
59 else {
59 else {
60 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a);
60 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a);
61 }
61 }
62 // (2) send an event for the waveforms transmission
62 // (2) send an event for the waveforms transmission
63 if (rtems_event_send( Task_id[TASKID_CWF3], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
63 if (rtems_event_send( Task_id[TASKID_CWF3], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
64 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
64 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
65 }
65 }
66 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff777; // reset f3 bits to 0, [1111 0111 0111 0111]
66 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff777; // reset f3 bits to 0, [1111 0111 0111 0111]
67 }
67 }
68 }
68 }
69
69
70 switch(lfrCurrentMode)
70 switch(lfrCurrentMode)
71 {
71 {
72 //********
72 //********
73 // STANDBY
73 // STANDBY
74 case(LFR_MODE_STANDBY):
74 case(LFR_MODE_STANDBY):
75 break;
75 break;
76
76
77 //******
77 //******
78 // NORMAL
78 // NORMAL
79 case(LFR_MODE_NORMAL):
79 case(LFR_MODE_NORMAL):
80 if ( (waveform_picker_regs->status & 0x7) == 0x7 ){ // f2 f1 and f0 are full
80 if ( (waveform_picker_regs->status & 0x7) == 0x7 ){ // f2 f1 and f0 are full
81 // change F0 ring node
81 // change F0 ring node
82 ring_node_to_send_swf_f0 = current_ring_node_f0;
82 ring_node_to_send_swf_f0 = current_ring_node_f0;
83 current_ring_node_f0 = current_ring_node_f0->next;
83 current_ring_node_f0 = current_ring_node_f0->next;
84 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address;
84 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address;
85 // change F1 ring node
85 // change F1 ring node
86 ring_node_to_send_swf_f1 = current_ring_node_f1;
86 ring_node_to_send_swf_f1 = current_ring_node_f1;
87 current_ring_node_f1 = current_ring_node_f1->next;
87 current_ring_node_f1 = current_ring_node_f1->next;
88 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
88 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
89 // change F2 ring node
89 // change F2 ring node
90 ring_node_to_send_swf_f2 = current_ring_node_f2;
90 ring_node_to_send_swf_f2 = current_ring_node_f2;
91 current_ring_node_f2 = current_ring_node_f2->next;
91 current_ring_node_f2 = current_ring_node_f2->next;
92 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
92 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
93 // send an event to the WFRM task
93 // send an event to the WFRM task
94 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
94 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
95 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
95 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
96 }
96 }
97 // nb_swf = nb_swf + 1;
98 // if (nb_swf == 2)
99 // {
100 // reset_wfp_burst_enable();
101 // }
102 // else
103 // {
97 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
104 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
98 // rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_7 );
105 // }
99 // reset_wfp_burst_enable();
100 }
106 }
101 break;
107 break;
102
108
103 //******
109 //******
104 // BURST
110 // BURST
105 case(LFR_MODE_BURST):
111 case(LFR_MODE_BURST):
106 if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit
112 if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit
107 // (1) change the receiving buffer for the waveform picker
113 // (1) change the receiving buffer for the waveform picker
108 ring_node_to_send_cwf_f2 = current_ring_node_f2;
114 ring_node_to_send_cwf_f2 = current_ring_node_f2;
109 current_ring_node_f2 = current_ring_node_f2->next;
115 current_ring_node_f2 = current_ring_node_f2->next;
110 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
116 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
111 // (2) send an event for the waveforms transmission
117 // (2) send an event for the waveforms transmission
112 if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_BURST ) != RTEMS_SUCCESSFUL) {
118 if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_BURST ) != RTEMS_SUCCESSFUL) {
113 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
119 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
114 }
120 }
115 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0
121 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0
116 }
122 }
117 break;
123 break;
118
124
119 //*****
125 //*****
120 // SBM1
126 // SBM1
121 case(LFR_MODE_SBM1):
127 case(LFR_MODE_SBM1):
122 if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit
128 if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit
123 // (1) change the receiving buffer for the waveform picker
129 // (1) change the receiving buffer for the waveform picker
124 ring_node_to_send_cwf_f1 = current_ring_node_f1;
130 ring_node_to_send_cwf_f1 = current_ring_node_f1;
125 current_ring_node_f1 = current_ring_node_f1->next;
131 current_ring_node_f1 = current_ring_node_f1->next;
126 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
132 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
127 // (2) send an event for the waveforms transmission
133 // (2) send an event for the waveforms transmission
128 if (rtems_event_send( Task_id[TASKID_CWF1], RTEMS_EVENT_MODE_SBM1 ) != RTEMS_SUCCESSFUL) {
134 if (rtems_event_send( Task_id[TASKID_CWF1], RTEMS_EVENT_MODE_SBM1 ) != RTEMS_SUCCESSFUL) {
129 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
135 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
130 }
136 }
131 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1 bit = 0
137 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1 bit = 0
132 }
138 }
133 if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit
139 if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit
134 ring_node_to_send_swf_f1 = current_ring_node_f1->previous;
140 ring_node_to_send_swf_f1 = current_ring_node_f1->previous;
135 }
141 }
136 if ( (waveform_picker_regs->status & 0x04) == 0x04 ) { // [0100] check the f2 full bit
142 if ( (waveform_picker_regs->status & 0x04) == 0x04 ) { // [0100] check the f2 full bit
137 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
143 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
138 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
144 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
139 }
145 }
140 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffaaa; // [1111 1010 1010 1010] f2 and f0 bits = 0
146 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffaaa; // [1111 1010 1010 1010] f2 and f0 bits = 0
141 }
147 }
142 break;
148 break;
143
149
144 //*****
150 //*****
145 // SBM2
151 // SBM2
146 case(LFR_MODE_SBM2):
152 case(LFR_MODE_SBM2):
147 if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit
153 if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit
148 // (1) change the receiving buffer for the waveform picker
154 // (1) change the receiving buffer for the waveform picker
149 ring_node_to_send_cwf_f2 = current_ring_node_f2;
155 ring_node_to_send_cwf_f2 = current_ring_node_f2;
150 current_ring_node_f2 = current_ring_node_f2->next;
156 current_ring_node_f2 = current_ring_node_f2->next;
151 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
157 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
152 // (2) send an event for the waveforms transmission
158 // (2) send an event for the waveforms transmission
153 if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_SBM2 ) != RTEMS_SUCCESSFUL) {
159 if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_SBM2 ) != RTEMS_SUCCESSFUL) {
154 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
160 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
155 }
161 }
156 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0
162 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0
157 }
163 }
158 if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit
164 if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit
159 ring_node_to_send_swf_f2 = current_ring_node_f2->previous;
165 ring_node_to_send_swf_f2 = current_ring_node_f2->previous;
160 }
166 }
161 if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit
167 if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit
162 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
168 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
163 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
169 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
164 }
170 }
165 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffccc; // [1111 1100 1100 1100] f1, f0 bits = 0
171 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffccc; // [1111 1100 1100 1100] f1, f0 bits = 0
166 }
172 }
167 break;
173 break;
168
174
169 //********
175 //********
170 // DEFAULT
176 // DEFAULT
171 default:
177 default:
172 break;
178 break;
173 }
179 }
174 }
180 }
175
181
176 rtems_task wfrm_task(rtems_task_argument argument) //used with the waveform picker VHDL IP
182 rtems_task wfrm_task(rtems_task_argument argument) //used with the waveform picker VHDL IP
177 {
183 {
178 /** This RTEMS task is dedicated to the transmission of snapshots of the NORMAL mode.
184 /** This RTEMS task is dedicated to the transmission of snapshots of the NORMAL mode.
179 *
185 *
180 * @param unused is the starting argument of the RTEMS task
186 * @param unused is the starting argument of the RTEMS task
181 *
187 *
182 * The following data packets are sent by this task:
188 * The following data packets are sent by this task:
183 * - TM_LFR_SCIENCE_NORMAL_SWF_F0
189 * - TM_LFR_SCIENCE_NORMAL_SWF_F0
184 * - TM_LFR_SCIENCE_NORMAL_SWF_F1
190 * - TM_LFR_SCIENCE_NORMAL_SWF_F1
185 * - TM_LFR_SCIENCE_NORMAL_SWF_F2
191 * - TM_LFR_SCIENCE_NORMAL_SWF_F2
186 *
192 *
187 */
193 */
188
194
189 rtems_event_set event_out;
195 rtems_event_set event_out;
190 rtems_id queue_id;
196 rtems_id queue_id;
191 rtems_status_code status;
197 rtems_status_code status;
192
198
193 init_header_snapshot_wf_table( SID_NORM_SWF_F0, headerSWF_F0 );
199 init_header_snapshot_wf_table( SID_NORM_SWF_F0, headerSWF_F0 );
194 init_header_snapshot_wf_table( SID_NORM_SWF_F1, headerSWF_F1 );
200 init_header_snapshot_wf_table( SID_NORM_SWF_F1, headerSWF_F1 );
195 init_header_snapshot_wf_table( SID_NORM_SWF_F2, headerSWF_F2 );
201 init_header_snapshot_wf_table( SID_NORM_SWF_F2, headerSWF_F2 );
196
202
197 init_waveforms();
203 init_waveforms();
198
204
199 status = get_message_queue_id_send( &queue_id );
205 status = get_message_queue_id_send( &queue_id );
200 if (status != RTEMS_SUCCESSFUL)
206 if (status != RTEMS_SUCCESSFUL)
201 {
207 {
202 PRINTF1("in WFRM *** ERR get_message_queue_id_send %d\n", status)
208 PRINTF1("in WFRM *** ERR get_message_queue_id_send %d\n", status)
203 }
209 }
204
210
205 BOOT_PRINTF("in WFRM ***\n")
211 BOOT_PRINTF("in WFRM ***\n")
206
212
207 while(1){
213 while(1){
208 // wait for an RTEMS_EVENT
214 // wait for an RTEMS_EVENT
209 rtems_event_receive(RTEMS_EVENT_MODE_NORMAL | RTEMS_EVENT_MODE_SBM1
215 rtems_event_receive(RTEMS_EVENT_MODE_NORMAL | RTEMS_EVENT_MODE_SBM1
210 | RTEMS_EVENT_MODE_SBM2 | RTEMS_EVENT_MODE_SBM2_WFRM,
216 | RTEMS_EVENT_MODE_SBM2 | RTEMS_EVENT_MODE_SBM2_WFRM,
211 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
217 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
212 if (event_out == RTEMS_EVENT_MODE_NORMAL)
218 if (event_out == RTEMS_EVENT_MODE_NORMAL)
213 {
219 {
220 PRINTF1("status %x\n", waveform_picker_regs->status )
214 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f0->buffer_address, SID_NORM_SWF_F0, headerSWF_F0, queue_id);
221 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f0->buffer_address, SID_NORM_SWF_F0, headerSWF_F0, queue_id);
215 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f1->buffer_address, SID_NORM_SWF_F1, headerSWF_F1, queue_id);
222 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f1->buffer_address, SID_NORM_SWF_F1, headerSWF_F1, queue_id);
216 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f2->buffer_address, SID_NORM_SWF_F2, headerSWF_F2, queue_id);
223 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f2->buffer_address, SID_NORM_SWF_F2, headerSWF_F2, queue_id);
224 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
217 }
225 }
218 else
226 else
219 {
227 {
220 PRINTF("in WFRM *** unexpected event")
228 PRINTF("in WFRM *** unexpected event")
221 }
229 }
222 }
230 }
223 }
231 }
224
232
225 rtems_task cwf3_task(rtems_task_argument argument) //used with the waveform picker VHDL IP
233 rtems_task cwf3_task(rtems_task_argument argument) //used with the waveform picker VHDL IP
226 {
234 {
227 /** This RTEMS task is dedicated to the transmission of continuous waveforms at f3.
235 /** This RTEMS task is dedicated to the transmission of continuous waveforms at f3.
228 *
236 *
229 * @param unused is the starting argument of the RTEMS task
237 * @param unused is the starting argument of the RTEMS task
230 *
238 *
231 * The following data packet is sent by this task:
239 * The following data packet is sent by this task:
232 * - TM_LFR_SCIENCE_NORMAL_CWF_F3
240 * - TM_LFR_SCIENCE_NORMAL_CWF_F3
233 *
241 *
234 */
242 */
235
243
236 rtems_event_set event_out;
244 rtems_event_set event_out;
237 rtems_id queue_id;
245 rtems_id queue_id;
238 rtems_status_code status;
246 rtems_status_code status;
239
247
240 init_header_continuous_wf_table( SID_NORM_CWF_LONG_F3, headerCWF_F3 );
248 init_header_continuous_wf_table( SID_NORM_CWF_LONG_F3, headerCWF_F3 );
241 init_header_continuous_cwf3_light_table( headerCWF_F3_light );
249 init_header_continuous_cwf3_light_table( headerCWF_F3_light );
242
250
243 status = get_message_queue_id_send( &queue_id );
251 status = get_message_queue_id_send( &queue_id );
244 if (status != RTEMS_SUCCESSFUL)
252 if (status != RTEMS_SUCCESSFUL)
245 {
253 {
246 PRINTF1("in CWF3 *** ERR get_message_queue_id_send %d\n", status)
254 PRINTF1("in CWF3 *** ERR get_message_queue_id_send %d\n", status)
247 }
255 }
248
256
249 BOOT_PRINTF("in CWF3 ***\n")
257 BOOT_PRINTF("in CWF3 ***\n")
250
258
251 while(1){
259 while(1){
252 // wait for an RTEMS_EVENT
260 // wait for an RTEMS_EVENT
253 rtems_event_receive( RTEMS_EVENT_0,
261 rtems_event_receive( RTEMS_EVENT_0,
254 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
262 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
255 PRINTF("send CWF F3 \n")
263 PRINTF("send CWF F3 \n")
256 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
264 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
257 if ( (parameter_dump_packet.sy_lfr_n_cwf_long_f3 & 0x01) == 0x01)
265 if ( (parameter_dump_packet.sy_lfr_n_cwf_long_f3 & 0x01) == 0x01)
258 {
266 {
259 send_waveform_CWF( wf_cont_f3_b, SID_NORM_CWF_LONG_F3, headerCWF_F3, queue_id );
267 send_waveform_CWF( wf_cont_f3_b, SID_NORM_CWF_LONG_F3, headerCWF_F3, queue_id );
260 }
268 }
261 else
269 else
262 {
270 {
263 send_waveform_CWF3_light( wf_cont_f3_b, headerCWF_F3_light, queue_id );
271 send_waveform_CWF3_light( wf_cont_f3_b, headerCWF_F3_light, queue_id );
264 }
272 }
265 }
273 }
266 else
274 else
267 {
275 {
268 if ( (parameter_dump_packet.sy_lfr_n_cwf_long_f3 & 0x01) == 0x00)
276 if ( (parameter_dump_packet.sy_lfr_n_cwf_long_f3 & 0x01) == 0x00)
269 {
277 {
270 send_waveform_CWF( wf_cont_f3_a, SID_NORM_CWF_LONG_F3, headerCWF_F3, queue_id );
278 send_waveform_CWF( wf_cont_f3_a, SID_NORM_CWF_LONG_F3, headerCWF_F3, queue_id );
271 }
279 }
272 else
280 else
273 {
281 {
274 send_waveform_CWF3_light( wf_cont_f3_a, headerCWF_F3_light, queue_id );
282 send_waveform_CWF3_light( wf_cont_f3_a, headerCWF_F3_light, queue_id );
275 }
283 }
276
284
277 }
285 }
278 }
286 }
279 }
287 }
280
288
281 rtems_task cwf2_task(rtems_task_argument argument) // ONLY USED IN BURST AND SBM2
289 rtems_task cwf2_task(rtems_task_argument argument) // ONLY USED IN BURST AND SBM2
282 {
290 {
283 /** This RTEMS task is dedicated to the transmission of continuous waveforms at f2.
291 /** This RTEMS task is dedicated to the transmission of continuous waveforms at f2.
284 *
292 *
285 * @param unused is the starting argument of the RTEMS task
293 * @param unused is the starting argument of the RTEMS task
286 *
294 *
287 * The following data packet is sent by this function:
295 * The following data packet is sent by this function:
288 * - TM_LFR_SCIENCE_BURST_CWF_F2
296 * - TM_LFR_SCIENCE_BURST_CWF_F2
289 * - TM_LFR_SCIENCE_SBM2_CWF_F2
297 * - TM_LFR_SCIENCE_SBM2_CWF_F2
290 *
298 *
291 */
299 */
292
300
293 rtems_event_set event_out;
301 rtems_event_set event_out;
294 rtems_id queue_id;
302 rtems_id queue_id;
295 rtems_status_code status;
303 rtems_status_code status;
296
304
297 init_header_continuous_wf_table( SID_BURST_CWF_F2, headerCWF_F2_BURST );
305 init_header_continuous_wf_table( SID_BURST_CWF_F2, headerCWF_F2_BURST );
298 init_header_continuous_wf_table( SID_SBM2_CWF_F2, headerCWF_F2_SBM2 );
306 init_header_continuous_wf_table( SID_SBM2_CWF_F2, headerCWF_F2_SBM2 );
299
307
300 status = get_message_queue_id_send( &queue_id );
308 status = get_message_queue_id_send( &queue_id );
301 if (status != RTEMS_SUCCESSFUL)
309 if (status != RTEMS_SUCCESSFUL)
302 {
310 {
303 PRINTF1("in CWF2 *** ERR get_message_queue_id_send %d\n", status)
311 PRINTF1("in CWF2 *** ERR get_message_queue_id_send %d\n", status)
304 }
312 }
305
313
306 BOOT_PRINTF("in CWF2 ***\n")
314 BOOT_PRINTF("in CWF2 ***\n")
307
315
308 while(1){
316 while(1){
309 // wait for an RTEMS_EVENT
317 // wait for an RTEMS_EVENT
310 rtems_event_receive( RTEMS_EVENT_MODE_BURST | RTEMS_EVENT_MODE_SBM2,
318 rtems_event_receive( RTEMS_EVENT_MODE_BURST | RTEMS_EVENT_MODE_SBM2,
311 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
319 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
312 if (event_out == RTEMS_EVENT_MODE_BURST)
320 if (event_out == RTEMS_EVENT_MODE_BURST)
313 {
321 {
314 send_waveform_CWF( (volatile int *) ring_node_to_send_cwf_f2->buffer_address, SID_BURST_CWF_F2, headerCWF_F2_BURST, queue_id );
322 send_waveform_CWF( (volatile int *) ring_node_to_send_cwf_f2->buffer_address, SID_BURST_CWF_F2, headerCWF_F2_BURST, queue_id );
315 }
323 }
316 if (event_out == RTEMS_EVENT_MODE_SBM2)
324 if (event_out == RTEMS_EVENT_MODE_SBM2)
317 {
325 {
318 send_waveform_CWF( (volatile int *) ring_node_to_send_cwf_f2->buffer_address, SID_SBM2_CWF_F2, headerCWF_F2_SBM2, queue_id );
326 send_waveform_CWF( (volatile int *) ring_node_to_send_cwf_f2->buffer_address, SID_SBM2_CWF_F2, headerCWF_F2_SBM2, queue_id );
319 }
327 }
320 }
328 }
321 }
329 }
322
330
323 rtems_task cwf1_task(rtems_task_argument argument) // ONLY USED IN SBM1
331 rtems_task cwf1_task(rtems_task_argument argument) // ONLY USED IN SBM1
324 {
332 {
325 /** This RTEMS task is dedicated to the transmission of continuous waveforms at f1.
333 /** This RTEMS task is dedicated to the transmission of continuous waveforms at f1.
326 *
334 *
327 * @param unused is the starting argument of the RTEMS task
335 * @param unused is the starting argument of the RTEMS task
328 *
336 *
329 * The following data packet is sent by this function:
337 * The following data packet is sent by this function:
330 * - TM_LFR_SCIENCE_SBM1_CWF_F1
338 * - TM_LFR_SCIENCE_SBM1_CWF_F1
331 *
339 *
332 */
340 */
333
341
334 rtems_event_set event_out;
342 rtems_event_set event_out;
335 rtems_id queue_id;
343 rtems_id queue_id;
336 rtems_status_code status;
344 rtems_status_code status;
337
345
338 init_header_continuous_wf_table( SID_SBM1_CWF_F1, headerCWF_F1 );
346 init_header_continuous_wf_table( SID_SBM1_CWF_F1, headerCWF_F1 );
339
347
340 status = get_message_queue_id_send( &queue_id );
348 status = get_message_queue_id_send( &queue_id );
341 if (status != RTEMS_SUCCESSFUL)
349 if (status != RTEMS_SUCCESSFUL)
342 {
350 {
343 PRINTF1("in CWF1 *** ERR get_message_queue_id_send %d\n", status)
351 PRINTF1("in CWF1 *** ERR get_message_queue_id_send %d\n", status)
344 }
352 }
345
353
346 BOOT_PRINTF("in CWF1 ***\n")
354 BOOT_PRINTF("in CWF1 ***\n")
347
355
348 while(1){
356 while(1){
349 // wait for an RTEMS_EVENT
357 // wait for an RTEMS_EVENT
350 rtems_event_receive( RTEMS_EVENT_MODE_SBM1,
358 rtems_event_receive( RTEMS_EVENT_MODE_SBM1,
351 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
359 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
352 send_waveform_CWF( (volatile int*) ring_node_to_send_cwf_f1->buffer_address, SID_SBM1_CWF_F1, headerCWF_F1, queue_id );
360 send_waveform_CWF( (volatile int*) ring_node_to_send_cwf_f1->buffer_address, SID_SBM1_CWF_F1, headerCWF_F1, queue_id );
353 }
361 }
354 }
362 }
355
363
356 //******************
364 //******************
357 // general functions
365 // general functions
358 void init_waveforms( void )
366 void init_waveforms( void )
359 {
367 {
360 int i = 0;
368 int i = 0;
361
369
362 for (i=0; i< NB_SAMPLES_PER_SNAPSHOT; i++)
370 for (i=0; i< NB_SAMPLES_PER_SNAPSHOT; i++)
363 {
371 {
364 //***
372 //***
365 // F0
373 // F0
366 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x88887777; //
374 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x88887777; //
367 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x22221111; //
375 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x22221111; //
368 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0x44443333; //
376 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0x44443333; //
369
377
370 //***
378 //***
371 // F1
379 // F1
372 // wf_snap_f1[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x22221111;
380 // wf_snap_f1[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x22221111;
373 // wf_snap_f1[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x44443333;
381 // wf_snap_f1[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x44443333;
374 // wf_snap_f1[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0xaaaa0000;
382 // wf_snap_f1[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0xaaaa0000;
375
383
376 //***
384 //***
377 // F2
385 // F2
378 // wf_snap_f2[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x44443333;
386 // wf_snap_f2[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x44443333;
379 // wf_snap_f2[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x22221111;
387 // wf_snap_f2[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x22221111;
380 // wf_snap_f2[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0xaaaa0000;
388 // wf_snap_f2[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0xaaaa0000;
381
389
382 //***
390 //***
383 // F3
391 // F3
384 // wf_cont_f3[ (i* NB_WORDS_SWF_BLK) + 0 ] = val1;
392 // wf_cont_f3[ (i* NB_WORDS_SWF_BLK) + 0 ] = val1;
385 // wf_cont_f3[ (i* NB_WORDS_SWF_BLK) + 1 ] = val2;
393 // wf_cont_f3[ (i* NB_WORDS_SWF_BLK) + 1 ] = val2;
386 // wf_cont_f3[ (i* NB_WORDS_SWF_BLK) + 2 ] = 0xaaaa0000;
394 // wf_cont_f3[ (i* NB_WORDS_SWF_BLK) + 2 ] = 0xaaaa0000;
387 }
395 }
388 }
396 }
389
397
390 void init_waveform_rings( void )
398 void init_waveform_rings( void )
391 {
399 {
392 unsigned char i;
400 unsigned char i;
393
401
394 // F0 RING
402 // F0 RING
395 waveform_ring_f0[0].next = (ring_node*) &waveform_ring_f0[1];
403 waveform_ring_f0[0].next = (ring_node*) &waveform_ring_f0[1];
396 waveform_ring_f0[0].previous = (ring_node*) &waveform_ring_f0[NB_RING_NODES_F0-1];
404 waveform_ring_f0[0].previous = (ring_node*) &waveform_ring_f0[NB_RING_NODES_F0-1];
397 waveform_ring_f0[0].buffer_address = (int) &wf_snap_f0[0][0];
405 waveform_ring_f0[0].buffer_address = (int) &wf_snap_f0[0][0];
398
406
399 waveform_ring_f0[NB_RING_NODES_F0-1].next = (ring_node*) &waveform_ring_f0[0];
407 waveform_ring_f0[NB_RING_NODES_F0-1].next = (ring_node*) &waveform_ring_f0[0];
400 waveform_ring_f0[NB_RING_NODES_F0-1].previous = (ring_node*) &waveform_ring_f0[NB_RING_NODES_F0-2];
408 waveform_ring_f0[NB_RING_NODES_F0-1].previous = (ring_node*) &waveform_ring_f0[NB_RING_NODES_F0-2];
401 waveform_ring_f0[NB_RING_NODES_F0-1].buffer_address = (int) &wf_snap_f0[NB_RING_NODES_F0-1][0];
409 waveform_ring_f0[NB_RING_NODES_F0-1].buffer_address = (int) &wf_snap_f0[NB_RING_NODES_F0-1][0];
402
410
403 for(i=1; i<NB_RING_NODES_F0-1; i++)
411 for(i=1; i<NB_RING_NODES_F0-1; i++)
404 {
412 {
405 waveform_ring_f0[i].next = (ring_node*) &waveform_ring_f0[i+1];
413 waveform_ring_f0[i].next = (ring_node*) &waveform_ring_f0[i+1];
406 waveform_ring_f0[i].previous = (ring_node*) &waveform_ring_f0[i-1];
414 waveform_ring_f0[i].previous = (ring_node*) &waveform_ring_f0[i-1];
407 waveform_ring_f0[i].buffer_address = (int) &wf_snap_f0[i][0];
415 waveform_ring_f0[i].buffer_address = (int) &wf_snap_f0[i][0];
408 }
416 }
409
417
410 // F1 RING
418 // F1 RING
411 waveform_ring_f1[0].next = (ring_node*) &waveform_ring_f1[1];
419 waveform_ring_f1[0].next = (ring_node*) &waveform_ring_f1[1];
412 waveform_ring_f1[0].previous = (ring_node*) &waveform_ring_f1[NB_RING_NODES_F1-1];
420 waveform_ring_f1[0].previous = (ring_node*) &waveform_ring_f1[NB_RING_NODES_F1-1];
413 waveform_ring_f1[0].buffer_address = (int) &wf_snap_f1[0][0];
421 waveform_ring_f1[0].buffer_address = (int) &wf_snap_f1[0][0];
414
422
415 waveform_ring_f1[NB_RING_NODES_F1-1].next = (ring_node*) &waveform_ring_f1[0];
423 waveform_ring_f1[NB_RING_NODES_F1-1].next = (ring_node*) &waveform_ring_f1[0];
416 waveform_ring_f1[NB_RING_NODES_F1-1].previous = (ring_node*) &waveform_ring_f1[NB_RING_NODES_F1-2];
424 waveform_ring_f1[NB_RING_NODES_F1-1].previous = (ring_node*) &waveform_ring_f1[NB_RING_NODES_F1-2];
417 waveform_ring_f1[NB_RING_NODES_F1-1].buffer_address = (int) &wf_snap_f1[NB_RING_NODES_F1-1][0];
425 waveform_ring_f1[NB_RING_NODES_F1-1].buffer_address = (int) &wf_snap_f1[NB_RING_NODES_F1-1][0];
418
426
419 for(i=1; i<NB_RING_NODES_F1-1; i++)
427 for(i=1; i<NB_RING_NODES_F1-1; i++)
420 {
428 {
421 waveform_ring_f1[i].next = (ring_node*) &waveform_ring_f1[i+1];
429 waveform_ring_f1[i].next = (ring_node*) &waveform_ring_f1[i+1];
422 waveform_ring_f1[i].previous = (ring_node*) &waveform_ring_f1[i-1];
430 waveform_ring_f1[i].previous = (ring_node*) &waveform_ring_f1[i-1];
423 waveform_ring_f1[i].buffer_address = (int) &wf_snap_f1[i][0];
431 waveform_ring_f1[i].buffer_address = (int) &wf_snap_f1[i][0];
424 }
432 }
425
433
426 // F2 RING
434 // F2 RING
427 waveform_ring_f2[0].next = (ring_node*) &waveform_ring_f2[1];
435 waveform_ring_f2[0].next = (ring_node*) &waveform_ring_f2[1];
428 waveform_ring_f2[0].previous = (ring_node*) &waveform_ring_f2[NB_RING_NODES_F2-1];
436 waveform_ring_f2[0].previous = (ring_node*) &waveform_ring_f2[NB_RING_NODES_F2-1];
429 waveform_ring_f2[0].buffer_address = (int) &wf_snap_f2[0][0];
437 waveform_ring_f2[0].buffer_address = (int) &wf_snap_f2[0][0];
430
438
431 waveform_ring_f2[NB_RING_NODES_F2-1].next = (ring_node*) &waveform_ring_f2[0];
439 waveform_ring_f2[NB_RING_NODES_F2-1].next = (ring_node*) &waveform_ring_f2[0];
432 waveform_ring_f2[NB_RING_NODES_F2-1].previous = (ring_node*) &waveform_ring_f2[NB_RING_NODES_F2-2];
440 waveform_ring_f2[NB_RING_NODES_F2-1].previous = (ring_node*) &waveform_ring_f2[NB_RING_NODES_F2-2];
433 waveform_ring_f2[NB_RING_NODES_F2-1].buffer_address = (int) &wf_snap_f2[NB_RING_NODES_F2-1][0];
441 waveform_ring_f2[NB_RING_NODES_F2-1].buffer_address = (int) &wf_snap_f2[NB_RING_NODES_F2-1][0];
434
442
435 for(i=1; i<NB_RING_NODES_F2-1; i++)
443 for(i=1; i<NB_RING_NODES_F2-1; i++)
436 {
444 {
437 waveform_ring_f2[i].next = (ring_node*) &waveform_ring_f2[i+1];
445 waveform_ring_f2[i].next = (ring_node*) &waveform_ring_f2[i+1];
438 waveform_ring_f2[i].previous = (ring_node*) &waveform_ring_f2[i-1];
446 waveform_ring_f2[i].previous = (ring_node*) &waveform_ring_f2[i-1];
439 waveform_ring_f2[i].buffer_address = (int) &wf_snap_f2[i][0];
447 waveform_ring_f2[i].buffer_address = (int) &wf_snap_f2[i][0];
440 }
448 }
441
449
442 DEBUG_PRINTF1("waveform_ring_f0 @%x\n", (unsigned int) waveform_ring_f0)
450 DEBUG_PRINTF1("waveform_ring_f0 @%x\n", (unsigned int) waveform_ring_f0)
443 DEBUG_PRINTF1("waveform_ring_f1 @%x\n", (unsigned int) waveform_ring_f1)
451 DEBUG_PRINTF1("waveform_ring_f1 @%x\n", (unsigned int) waveform_ring_f1)
444 DEBUG_PRINTF1("waveform_ring_f2 @%x\n", (unsigned int) waveform_ring_f2)
452 DEBUG_PRINTF1("waveform_ring_f2 @%x\n", (unsigned int) waveform_ring_f2)
445
453
446 }
454 }
447
455
448 void reset_current_ring_nodes( void )
456 void reset_current_ring_nodes( void )
449 {
457 {
450 current_ring_node_f0 = waveform_ring_f0;
458 current_ring_node_f0 = waveform_ring_f0;
451 ring_node_to_send_swf_f0 = waveform_ring_f0;
459 ring_node_to_send_swf_f0 = waveform_ring_f0;
452
460
453 current_ring_node_f1 = waveform_ring_f1;
461 current_ring_node_f1 = waveform_ring_f1;
454 ring_node_to_send_cwf_f1 = waveform_ring_f1;
462 ring_node_to_send_cwf_f1 = waveform_ring_f1;
455 ring_node_to_send_swf_f1 = waveform_ring_f1;
463 ring_node_to_send_swf_f1 = waveform_ring_f1;
456
464
457 current_ring_node_f2 = waveform_ring_f2;
465 current_ring_node_f2 = waveform_ring_f2;
458 ring_node_to_send_cwf_f2 = waveform_ring_f2;
466 ring_node_to_send_cwf_f2 = waveform_ring_f2;
459 ring_node_to_send_swf_f2 = waveform_ring_f2;
467 ring_node_to_send_swf_f2 = waveform_ring_f2;
460 }
468 }
461
469
462 int init_header_snapshot_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF)
470 int init_header_snapshot_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF)
463 {
471 {
464 unsigned char i;
472 unsigned char i;
465
473
466 for (i=0; i<7; i++)
474 for (i=0; i<7; i++)
467 {
475 {
468 headerSWF[ i ].targetLogicalAddress = CCSDS_DESTINATION_ID;
476 headerSWF[ i ].targetLogicalAddress = CCSDS_DESTINATION_ID;
469 headerSWF[ i ].protocolIdentifier = CCSDS_PROTOCOLE_ID;
477 headerSWF[ i ].protocolIdentifier = CCSDS_PROTOCOLE_ID;
470 headerSWF[ i ].reserved = DEFAULT_RESERVED;
478 headerSWF[ i ].reserved = DEFAULT_RESERVED;
471 headerSWF[ i ].userApplication = CCSDS_USER_APP;
479 headerSWF[ i ].userApplication = CCSDS_USER_APP;
472 headerSWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
480 headerSWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
473 headerSWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
481 headerSWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
474 headerSWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
482 headerSWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
475 if (i == 6)
483 if (i == 6)
476 {
484 {
477 headerSWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_SWF_224 >> 8);
485 headerSWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_SWF_224 >> 8);
478 headerSWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_SWF_224 );
486 headerSWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_SWF_224 );
479 headerSWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_224 >> 8);
487 headerSWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_224 >> 8);
480 headerSWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_224 );
488 headerSWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_224 );
481 }
489 }
482 else
490 else
483 {
491 {
484 headerSWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_SWF_304 >> 8);
492 headerSWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_SWF_304 >> 8);
485 headerSWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_SWF_304 );
493 headerSWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_SWF_304 );
486 headerSWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_304 >> 8);
494 headerSWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_304 >> 8);
487 headerSWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_304 );
495 headerSWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_304 );
488 }
496 }
489 headerSWF[ i ].packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
497 headerSWF[ i ].packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
490 headerSWF[ i ].pktCnt = DEFAULT_PKTCNT; // PKT_CNT
498 headerSWF[ i ].pktCnt = DEFAULT_PKTCNT; // PKT_CNT
491 headerSWF[ i ].pktNr = i+1; // PKT_NR
499 headerSWF[ i ].pktNr = i+1; // PKT_NR
492 // DATA FIELD HEADER
500 // DATA FIELD HEADER
493 headerSWF[ i ].spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
501 headerSWF[ i ].spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
494 headerSWF[ i ].serviceType = TM_TYPE_LFR_SCIENCE; // service type
502 headerSWF[ i ].serviceType = TM_TYPE_LFR_SCIENCE; // service type
495 headerSWF[ i ].serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
503 headerSWF[ i ].serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
496 headerSWF[ i ].destinationID = TM_DESTINATION_ID_GROUND;
504 headerSWF[ i ].destinationID = TM_DESTINATION_ID_GROUND;
497 // AUXILIARY DATA HEADER
505 // AUXILIARY DATA HEADER
498 headerSWF[ i ].time[0] = 0x00;
506 headerSWF[ i ].time[0] = 0x00;
499 headerSWF[ i ].time[0] = 0x00;
507 headerSWF[ i ].time[0] = 0x00;
500 headerSWF[ i ].time[0] = 0x00;
508 headerSWF[ i ].time[0] = 0x00;
501 headerSWF[ i ].time[0] = 0x00;
509 headerSWF[ i ].time[0] = 0x00;
502 headerSWF[ i ].time[0] = 0x00;
510 headerSWF[ i ].time[0] = 0x00;
503 headerSWF[ i ].time[0] = 0x00;
511 headerSWF[ i ].time[0] = 0x00;
504 headerSWF[ i ].sid = sid;
512 headerSWF[ i ].sid = sid;
505 headerSWF[ i ].hkBIA = DEFAULT_HKBIA;
513 headerSWF[ i ].hkBIA = DEFAULT_HKBIA;
506 }
514 }
507 return LFR_SUCCESSFUL;
515 return LFR_SUCCESSFUL;
508 }
516 }
509
517
510 int init_header_continuous_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF )
518 int init_header_continuous_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF )
511 {
519 {
512 unsigned int i;
520 unsigned int i;
513
521
514 for (i=0; i<7; i++)
522 for (i=0; i<7; i++)
515 {
523 {
516 headerCWF[ i ].targetLogicalAddress = CCSDS_DESTINATION_ID;
524 headerCWF[ i ].targetLogicalAddress = CCSDS_DESTINATION_ID;
517 headerCWF[ i ].protocolIdentifier = CCSDS_PROTOCOLE_ID;
525 headerCWF[ i ].protocolIdentifier = CCSDS_PROTOCOLE_ID;
518 headerCWF[ i ].reserved = DEFAULT_RESERVED;
526 headerCWF[ i ].reserved = DEFAULT_RESERVED;
519 headerCWF[ i ].userApplication = CCSDS_USER_APP;
527 headerCWF[ i ].userApplication = CCSDS_USER_APP;
520 if ( (sid == SID_SBM1_CWF_F1) || (sid == SID_SBM2_CWF_F2) )
528 if ( (sid == SID_SBM1_CWF_F1) || (sid == SID_SBM2_CWF_F2) )
521 {
529 {
522 headerCWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_SBM1_SBM2 >> 8);
530 headerCWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_SBM1_SBM2 >> 8);
523 headerCWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_SBM1_SBM2);
531 headerCWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_SBM1_SBM2);
524 }
532 }
525 else
533 else
526 {
534 {
527 headerCWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
535 headerCWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
528 headerCWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
536 headerCWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
529 }
537 }
530 if (i == 0)
538 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
531 {
539 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF_336 >> 8);
532 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_FIRST;
540 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF_336 );
533 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF_340 >> 8);
541 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_CWF >> 8);
534 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF_340 );
542 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_CWF );
535 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_340 >> 8);
536 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_340 );
537 }
538 else if (i == 6)
539 {
540 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_LAST;
541 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF_8 >> 8);
542 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF_8 );
543 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_8 >> 8);
544 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_8 );
545 }
546 else
547 {
548 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_CONTINUATION;
549 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF_340 >> 8);
550 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF_340 );
551 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_340 >> 8);
552 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_340 );
553 }
554 headerCWF[ i ].packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
543 headerCWF[ i ].packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
555 // PKT_CNT
556 // PKT_NR
557 // DATA FIELD HEADER
544 // DATA FIELD HEADER
558 headerCWF[ i ].spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
545 headerCWF[ i ].spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
559 headerCWF[ i ].serviceType = TM_TYPE_LFR_SCIENCE; // service type
546 headerCWF[ i ].serviceType = TM_TYPE_LFR_SCIENCE; // service type
560 headerCWF[ i ].serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
547 headerCWF[ i ].serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
561 headerCWF[ i ].destinationID = TM_DESTINATION_ID_GROUND;
548 headerCWF[ i ].destinationID = TM_DESTINATION_ID_GROUND;
562 // AUXILIARY DATA HEADER
549 // AUXILIARY DATA HEADER
563 headerCWF[ i ].sid = sid;
550 headerCWF[ i ].sid = sid;
564 headerCWF[ i ].hkBIA = DEFAULT_HKBIA;
551 headerCWF[ i ].hkBIA = DEFAULT_HKBIA;
565 headerCWF[ i ].time[0] = 0x00;
552 headerCWF[ i ].time[0] = 0x00;
566 headerCWF[ i ].time[0] = 0x00;
553 headerCWF[ i ].time[0] = 0x00;
567 headerCWF[ i ].time[0] = 0x00;
554 headerCWF[ i ].time[0] = 0x00;
568 headerCWF[ i ].time[0] = 0x00;
555 headerCWF[ i ].time[0] = 0x00;
569 headerCWF[ i ].time[0] = 0x00;
556 headerCWF[ i ].time[0] = 0x00;
570 headerCWF[ i ].time[0] = 0x00;
557 headerCWF[ i ].time[0] = 0x00;
571 }
558 }
572 return LFR_SUCCESSFUL;
559 return LFR_SUCCESSFUL;
573 }
560 }
574
561
575 int init_header_continuous_cwf3_light_table( Header_TM_LFR_SCIENCE_CWF_t *headerCWF )
562 int init_header_continuous_cwf3_light_table( Header_TM_LFR_SCIENCE_CWF_t *headerCWF )
576 {
563 {
577 unsigned int i;
564 unsigned int i;
578
565
579 for (i=0; i<7; i++)
566 for (i=0; i<7; i++)
580 {
567 {
581 headerCWF[ i ].targetLogicalAddress = CCSDS_DESTINATION_ID;
568 headerCWF[ i ].targetLogicalAddress = CCSDS_DESTINATION_ID;
582 headerCWF[ i ].protocolIdentifier = CCSDS_PROTOCOLE_ID;
569 headerCWF[ i ].protocolIdentifier = CCSDS_PROTOCOLE_ID;
583 headerCWF[ i ].reserved = DEFAULT_RESERVED;
570 headerCWF[ i ].reserved = DEFAULT_RESERVED;
584 headerCWF[ i ].userApplication = CCSDS_USER_APP;
571 headerCWF[ i ].userApplication = CCSDS_USER_APP;
585
572
586 headerCWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
573 headerCWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
587 headerCWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
574 headerCWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
588 if (i == 0)
575
589 {
576 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
590 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_FIRST;
577 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF_672 >> 8);
591 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF3_LIGHT_340 >> 8);
578 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF_672 );
592 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF3_LIGHT_340 );
579 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_CWF_SHORT_F3 >> 8);
593 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_340 >> 8);
580 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_CWF_SHORT_F3 );
594 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_340 );
581
595 }
596 else if (i == 6)
597 {
598 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_LAST;
599 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF3_LIGHT_8 >> 8);
600 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF3_LIGHT_8 );
601 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_8 >> 8);
602 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_8 );
603 }
604 else
605 {
606 headerCWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_CONTINUATION;
607 headerCWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_CWF3_LIGHT_340 >> 8);
608 headerCWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_CWF3_LIGHT_340 );
609 headerCWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_340 >> 8);
610 headerCWF[ i ].blkNr[1] = (unsigned char) (BLK_NR_340 );
611 }
612 headerCWF[ i ].packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
582 headerCWF[ i ].packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
613 // DATA FIELD HEADER
583 // DATA FIELD HEADER
614 headerCWF[ i ].spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
584 headerCWF[ i ].spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
615 headerCWF[ i ].serviceType = TM_TYPE_LFR_SCIENCE; // service type
585 headerCWF[ i ].serviceType = TM_TYPE_LFR_SCIENCE; // service type
616 headerCWF[ i ].serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
586 headerCWF[ i ].serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
617 headerCWF[ i ].destinationID = TM_DESTINATION_ID_GROUND;
587 headerCWF[ i ].destinationID = TM_DESTINATION_ID_GROUND;
618 // AUXILIARY DATA HEADER
588 // AUXILIARY DATA HEADER
619 headerCWF[ i ].sid = SID_NORM_CWF_F3;
589 headerCWF[ i ].sid = SID_NORM_CWF_F3;
620 headerCWF[ i ].hkBIA = DEFAULT_HKBIA;
590 headerCWF[ i ].hkBIA = DEFAULT_HKBIA;
621 headerCWF[ i ].time[0] = 0x00;
591 headerCWF[ i ].time[0] = 0x00;
622 headerCWF[ i ].time[0] = 0x00;
592 headerCWF[ i ].time[0] = 0x00;
623 headerCWF[ i ].time[0] = 0x00;
593 headerCWF[ i ].time[0] = 0x00;
624 headerCWF[ i ].time[0] = 0x00;
594 headerCWF[ i ].time[0] = 0x00;
625 headerCWF[ i ].time[0] = 0x00;
595 headerCWF[ i ].time[0] = 0x00;
626 headerCWF[ i ].time[0] = 0x00;
596 headerCWF[ i ].time[0] = 0x00;
627 }
597 }
628 return LFR_SUCCESSFUL;
598 return LFR_SUCCESSFUL;
629 }
599 }
630
600
631 int send_waveform_SWF( volatile int *waveform, unsigned int sid,
601 int send_waveform_SWF( volatile int *waveform, unsigned int sid,
632 Header_TM_LFR_SCIENCE_SWF_t *headerSWF, rtems_id queue_id )
602 Header_TM_LFR_SCIENCE_SWF_t *headerSWF, rtems_id queue_id )
633 {
603 {
634 /** This function sends SWF CCSDS packets (F2, F1 or F0).
604 /** This function sends SWF CCSDS packets (F2, F1 or F0).
635 *
605 *
636 * @param waveform points to the buffer containing the data that will be send.
606 * @param waveform points to the buffer containing the data that will be send.
637 * @param sid is the source identifier of the data that will be sent.
607 * @param sid is the source identifier of the data that will be sent.
638 * @param headerSWF points to a table of headers that have been prepared for the data transmission.
608 * @param headerSWF points to a table of headers that have been prepared for the data transmission.
639 * @param queue_id is the id of the rtems queue to which spw_ioctl_pkt_send structures will be send. The structures
609 * @param queue_id is the id of the rtems queue to which spw_ioctl_pkt_send structures will be send. The structures
640 * contain information to setup the transmission of the data packets.
610 * contain information to setup the transmission of the data packets.
641 *
611 *
642 * One group of 2048 samples is sent as 7 consecutive packets, 6 packets containing 340 blocks and 8 packets containing 8 blocks.
612 * One group of 2048 samples is sent as 7 consecutive packets, 6 packets containing 340 blocks and 8 packets containing 8 blocks.
643 *
613 *
644 */
614 */
645
615
646 unsigned int i;
616 unsigned int i;
647 int ret;
617 int ret;
618 unsigned int coarseTime;
619 unsigned int fineTime;
648 rtems_status_code status;
620 rtems_status_code status;
649 spw_ioctl_pkt_send spw_ioctl_send_SWF;
621 spw_ioctl_pkt_send spw_ioctl_send_SWF;
650
622
651 spw_ioctl_send_SWF.hlen = TM_HEADER_LEN + 4 + 12; // + 4 is for the protocole extra header, + 12 is for the auxiliary header
623 spw_ioctl_send_SWF.hlen = TM_HEADER_LEN + 4 + 12; // + 4 is for the protocole extra header, + 12 is for the auxiliary header
652 spw_ioctl_send_SWF.options = 0;
624 spw_ioctl_send_SWF.options = 0;
653
625
654 ret = LFR_DEFAULT;
626 ret = LFR_DEFAULT;
655
627
628 PRINTF1("sid = %d, ", sid)
629 PRINTF2("coarse = %x, fine = %x\n", waveform[0], waveform[1])
630
656 for (i=0; i<7; i++) // send waveform
631 for (i=0; i<7; i++) // send waveform
657 {
632 {
658 #ifdef VHDL_DEV
633 #ifdef VHDL_DEV
659 spw_ioctl_send_SWF.data = (char*) &waveform[ (i * 304 * NB_WORDS_SWF_BLK) + TIME_OFFSET];
634 spw_ioctl_send_SWF.data = (char*) &waveform[ (i * BLK_NR_304 * NB_WORDS_SWF_BLK) + TIME_OFFSET];
660 #else
635 #else
661 spw_ioctl_send_SWF.data = (char*) &waveform[ (i * 304 * NB_WORDS_SWF_BLK) ];
636 spw_ioctl_send_SWF.data = (char*) &waveform[ (i * BLK_NR_304 * NB_WORDS_SWF_BLK) ];
662 #endif
637 #endif
663 spw_ioctl_send_SWF.hdr = (char*) &headerSWF[ i ];
638 spw_ioctl_send_SWF.hdr = (char*) &headerSWF[ i ];
664 // BUILD THE DATA
639 // BUILD THE DATA
665 if (i==6) {
640 if (i==6) {
666 spw_ioctl_send_SWF.dlen = 224 * NB_BYTES_SWF_BLK;
641 spw_ioctl_send_SWF.dlen = BLK_NR_224 * NB_BYTES_SWF_BLK;
667 }
642 }
668 else {
643 else {
669 spw_ioctl_send_SWF.dlen = 304 * NB_BYTES_SWF_BLK;
644 spw_ioctl_send_SWF.dlen = BLK_NR_304 * NB_BYTES_SWF_BLK;
670 }
645 }
671 // SET PACKET SEQUENCE COUNTER
646 // SET PACKET SEQUENCE COUNTER
672 increment_seq_counter_source_id( headerSWF[ i ].packetSequenceControl, sid );
647 increment_seq_counter_source_id( headerSWF[ i ].packetSequenceControl, sid );
673 // SET PACKET TIME
648 // SET PACKET TIME
649 #ifdef VHDL_DEV
650 coarseTime = waveform[0];
651 fineTime = waveform[1];
652 compute_acquisition_time( &coarseTime, &fineTime, sid, i);
653
654 headerSWF[ i ].acquisitionTime[0] = (unsigned char) (coarseTime >> 24 );
655 headerSWF[ i ].acquisitionTime[1] = (unsigned char) (coarseTime >> 16 );
656 headerSWF[ i ].acquisitionTime[2] = (unsigned char) (coarseTime >> 8 );
657 headerSWF[ i ].acquisitionTime[3] = (unsigned char) (coarseTime );
658 headerSWF[ i ].acquisitionTime[4] = (unsigned char) (fineTime >> 8 );
659 headerSWF[ i ].acquisitionTime[5] = (unsigned char) (fineTime );
660 #else
674 headerSWF[ i ].acquisitionTime[0] = (unsigned char) (time_management_regs->coarse_time>>24);
661 headerSWF[ i ].acquisitionTime[0] = (unsigned char) (time_management_regs->coarse_time>>24);
675 headerSWF[ i ].acquisitionTime[1] = (unsigned char) (time_management_regs->coarse_time>>16);
662 headerSWF[ i ].acquisitionTime[1] = (unsigned char) (time_management_regs->coarse_time>>16);
676 headerSWF[ i ].acquisitionTime[2] = (unsigned char) (time_management_regs->coarse_time>>8);
663 headerSWF[ i ].acquisitionTime[2] = (unsigned char) (time_management_regs->coarse_time>>8);
677 headerSWF[ i ].acquisitionTime[3] = (unsigned char) (time_management_regs->coarse_time);
664 headerSWF[ i ].acquisitionTime[3] = (unsigned char) (time_management_regs->coarse_time);
678 headerSWF[ i ].acquisitionTime[4] = (unsigned char) (time_management_regs->fine_time>>8);
665 headerSWF[ i ].acquisitionTime[4] = (unsigned char) (time_management_regs->fine_time>>8);
679 headerSWF[ i ].acquisitionTime[5] = (unsigned char) (time_management_regs->fine_time);
666 headerSWF[ i ].acquisitionTime[5] = (unsigned char) (time_management_regs->fine_time);
667 #endif
680 headerSWF[ i ].time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
668 headerSWF[ i ].time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
681 headerSWF[ i ].time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
669 headerSWF[ i ].time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
682 headerSWF[ i ].time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
670 headerSWF[ i ].time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
683 headerSWF[ i ].time[3] = (unsigned char) (time_management_regs->coarse_time);
671 headerSWF[ i ].time[3] = (unsigned char) (time_management_regs->coarse_time);
684 headerSWF[ i ].time[4] = (unsigned char) (time_management_regs->fine_time>>8);
672 headerSWF[ i ].time[4] = (unsigned char) (time_management_regs->fine_time>>8);
685 headerSWF[ i ].time[5] = (unsigned char) (time_management_regs->fine_time);
673 headerSWF[ i ].time[5] = (unsigned char) (time_management_regs->fine_time);
686 // SEND PACKET
674 // SEND PACKET
687 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_SWF, ACTION_MSG_SPW_IOCTL_SEND_SIZE);
675 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_SWF, ACTION_MSG_SPW_IOCTL_SEND_SIZE);
688 if (status != RTEMS_SUCCESSFUL) {
676 if (status != RTEMS_SUCCESSFUL) {
689 printf("%d-%d, ERR %d\n", sid, i, (int) status);
677 printf("%d-%d, ERR %d\n", sid, i, (int) status);
690 ret = LFR_DEFAULT;
678 ret = LFR_DEFAULT;
691 }
679 }
692 rtems_task_wake_after(TIME_BETWEEN_TWO_SWF_PACKETS); // 300 ms between each packet => 7 * 3 = 21 packets => 6.3 seconds
680 rtems_task_wake_after(TIME_BETWEEN_TWO_SWF_PACKETS); // 300 ms between each packet => 7 * 3 = 21 packets => 6.3 seconds
693 }
681 }
694
682
695 return ret;
683 return ret;
696 }
684 }
697
685
698 int send_waveform_CWF(volatile int *waveform, unsigned int sid,
686 int send_waveform_CWF(volatile int *waveform, unsigned int sid,
699 Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id)
687 Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id)
700 {
688 {
701 /** This function sends CWF CCSDS packets (F2, F1 or F0).
689 /** This function sends CWF CCSDS packets (F2, F1 or F0).
702 *
690 *
703 * @param waveform points to the buffer containing the data that will be send.
691 * @param waveform points to the buffer containing the data that will be send.
704 * @param sid is the source identifier of the data that will be sent.
692 * @param sid is the source identifier of the data that will be sent.
705 * @param headerCWF points to a table of headers that have been prepared for the data transmission.
693 * @param headerCWF points to a table of headers that have been prepared for the data transmission.
706 * @param queue_id is the id of the rtems queue to which spw_ioctl_pkt_send structures will be send. The structures
694 * @param queue_id is the id of the rtems queue to which spw_ioctl_pkt_send structures will be send. The structures
707 * contain information to setup the transmission of the data packets.
695 * contain information to setup the transmission of the data packets.
708 *
696 *
709 * One group of 2048 samples is sent as 7 consecutive packets, 6 packets containing 340 blocks and 8 packets containing 8 blocks.
697 * One group of 2048 samples is sent as 7 consecutive packets, 6 packets containing 340 blocks and 8 packets containing 8 blocks.
710 *
698 *
711 */
699 */
712
700
713 unsigned int i;
701 unsigned int i;
714 int ret;
702 int ret;
703 unsigned char *coarseTimePtr;
704 unsigned char *fineTimePtr;
715 rtems_status_code status;
705 rtems_status_code status;
716 spw_ioctl_pkt_send spw_ioctl_send_CWF;
706 spw_ioctl_pkt_send spw_ioctl_send_CWF;
717
707
718 spw_ioctl_send_CWF.hlen = TM_HEADER_LEN + 4 + 10; // + 4 is for the protocole extra header, + 10 is for the auxiliary header
708 spw_ioctl_send_CWF.hlen = TM_HEADER_LEN + 4 + 10; // + 4 is for the protocole extra header, + 10 is for the auxiliary header
719 spw_ioctl_send_CWF.options = 0;
709 spw_ioctl_send_CWF.options = 0;
720
710
721 ret = LFR_DEFAULT;
711 ret = LFR_DEFAULT;
722
712
723 for (i=0; i<7; i++) // send waveform
713 for (i=0; i<7; i++) // send waveform
724 {
714 {
725 int coarseTime = 0x00;
715 int coarseTime = 0x00;
726 int fineTime = 0x00;
716 int fineTime = 0x00;
727 #ifdef VHDL_DEV
717 #ifdef VHDL_DEV
728 spw_ioctl_send_CWF.data = (char*) &waveform[ (i * 340 * NB_WORDS_SWF_BLK) + TIME_OFFSET];
718 spw_ioctl_send_CWF.data = (char*) &waveform[ (i * BLK_NR_CWF * NB_WORDS_SWF_BLK) + TIME_OFFSET];
729 #else
719 #else
730 spw_ioctl_send_CWF.data = (char*) &waveform[ (i * 340 * NB_WORDS_SWF_BLK) ];
720 spw_ioctl_send_CWF.data = (char*) &waveform[ (i * BLK_NR_CWF * NB_WORDS_SWF_BLK) ];
731 #endif
721 #endif
732 spw_ioctl_send_CWF.hdr = (char*) &headerCWF[ i ];
722 spw_ioctl_send_CWF.hdr = (char*) &headerCWF[ i ];
733 // BUILD THE DATA
723 // BUILD THE DATA
734 if (i==6) {
724 spw_ioctl_send_CWF.dlen = BLK_NR_CWF * NB_BYTES_SWF_BLK;
735 spw_ioctl_send_CWF.dlen = 8 * NB_BYTES_SWF_BLK;
736 }
737 else {
738 spw_ioctl_send_CWF.dlen = 340 * NB_BYTES_SWF_BLK;
739 }
740 // SET PACKET SEQUENCE COUNTER
725 // SET PACKET SEQUENCE COUNTER
741 increment_seq_counter_source_id( headerCWF[ i ].packetSequenceControl, sid );
726 increment_seq_counter_source_id( headerCWF[ i ].packetSequenceControl, sid );
742 // SET PACKET TIME
727 // SET PACKET TIME
728 #ifdef VHDL_DEV
729 coarseTimePtr = (unsigned char *) &waveform;
730 fineTimePtr = (unsigned char *) &waveform[1];
731 headerCWF[ i ].acquisitionTime[0] = coarseTimePtr[2];
732 headerCWF[ i ].acquisitionTime[1] = coarseTimePtr[3];
733 headerCWF[ i ].acquisitionTime[2] = coarseTimePtr[0];
734 headerCWF[ i ].acquisitionTime[3] = coarseTimePtr[1];
735 headerCWF[ i ].acquisitionTime[4] = fineTimePtr[0];
736 headerCWF[ i ].acquisitionTime[5] = fineTimePtr[1];
737 #else
743 coarseTime = time_management_regs->coarse_time;
738 coarseTime = time_management_regs->coarse_time;
744 fineTime = time_management_regs->fine_time;
739 fineTime = time_management_regs->fine_time;
745 headerCWF[ i ].acquisitionTime[0] = (unsigned char) (coarseTime>>24);
740 headerCWF[ i ].acquisitionTime[0] = (unsigned char) (coarseTime>>24);
746 headerCWF[ i ].acquisitionTime[1] = (unsigned char) (coarseTime>>16);
741 headerCWF[ i ].acquisitionTime[1] = (unsigned char) (coarseTime>>16);
747 headerCWF[ i ].acquisitionTime[2] = (unsigned char) (coarseTime>>8);
742 headerCWF[ i ].acquisitionTime[2] = (unsigned char) (coarseTime>>8);
748 headerCWF[ i ].acquisitionTime[3] = (unsigned char) (coarseTime);
743 headerCWF[ i ].acquisitionTime[3] = (unsigned char) (coarseTime);
749 headerCWF[ i ].acquisitionTime[4] = (unsigned char) (fineTime>>8);
744 headerCWF[ i ].acquisitionTime[4] = (unsigned char) (fineTime>>8);
750 headerCWF[ i ].acquisitionTime[5] = (unsigned char) (fineTime);
745 headerCWF[ i ].acquisitionTime[5] = (unsigned char) (fineTime);
746 #endif
747
751 headerCWF[ i ].time[0] = (unsigned char) (coarseTime>>24);
748 headerCWF[ i ].time[0] = (unsigned char) (coarseTime>>24);
752 headerCWF[ i ].time[1] = (unsigned char) (coarseTime>>16);
749 headerCWF[ i ].time[1] = (unsigned char) (coarseTime>>16);
753 headerCWF[ i ].time[2] = (unsigned char) (coarseTime>>8);
750 headerCWF[ i ].time[2] = (unsigned char) (coarseTime>>8);
754 headerCWF[ i ].time[3] = (unsigned char) (coarseTime);
751 headerCWF[ i ].time[3] = (unsigned char) (coarseTime);
755 headerCWF[ i ].time[4] = (unsigned char) (fineTime>>8);
752 headerCWF[ i ].time[4] = (unsigned char) (fineTime>>8);
756 headerCWF[ i ].time[5] = (unsigned char) (fineTime);
753 headerCWF[ i ].time[5] = (unsigned char) (fineTime);
757 // SEND PACKET
754 // SEND PACKET
758 if (sid == SID_NORM_CWF_LONG_F3)
755 if (sid == SID_NORM_CWF_LONG_F3)
759 {
756 {
760 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_CWF, sizeof(spw_ioctl_send_CWF));
757 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_CWF, sizeof(spw_ioctl_send_CWF));
761 if (status != RTEMS_SUCCESSFUL) {
758 if (status != RTEMS_SUCCESSFUL) {
762 printf("%d-%d, ERR %d\n", sid, i, (int) status);
759 printf("%d-%d, ERR %d\n", sid, i, (int) status);
763 ret = LFR_DEFAULT;
760 ret = LFR_DEFAULT;
764 }
761 }
765 rtems_task_wake_after(TIME_BETWEEN_TWO_CWF3_PACKETS);
762 rtems_task_wake_after(TIME_BETWEEN_TWO_CWF3_PACKETS);
766 }
763 }
767 else
764 else
768 {
765 {
769 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_CWF, sizeof(spw_ioctl_send_CWF));
766 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_CWF, sizeof(spw_ioctl_send_CWF));
770 if (status != RTEMS_SUCCESSFUL) {
767 if (status != RTEMS_SUCCESSFUL) {
771 printf("%d-%d, ERR %d\n", sid, i, (int) status);
768 printf("%d-%d, ERR %d\n", sid, i, (int) status);
772 ret = LFR_DEFAULT;
769 ret = LFR_DEFAULT;
773 }
770 }
774 }
771 }
775 }
772 }
776
773
777 return ret;
774 return ret;
778 }
775 }
779
776
780 int send_waveform_CWF3_light(volatile int *waveform, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id)
777 int send_waveform_CWF3_light(volatile int *waveform, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id)
781 {
778 {
782 /** This function sends CWF_F3 CCSDS packets without the b1, b2 and b3 data.
779 /** This function sends CWF_F3 CCSDS packets without the b1, b2 and b3 data.
783 *
780 *
784 * @param waveform points to the buffer containing the data that will be send.
781 * @param waveform points to the buffer containing the data that will be send.
785 * @param headerCWF points to a table of headers that have been prepared for the data transmission.
782 * @param headerCWF points to a table of headers that have been prepared for the data transmission.
786 * @param queue_id is the id of the rtems queue to which spw_ioctl_pkt_send structures will be send. The structures
783 * @param queue_id is the id of the rtems queue to which spw_ioctl_pkt_send structures will be send. The structures
787 * contain information to setup the transmission of the data packets.
784 * contain information to setup the transmission of the data packets.
788 *
785 *
789 * By default, CWF_F3 packet are send without the b1, b2 and b3 data. This function rebuilds a data buffer
786 * By default, CWF_F3 packet are send without the b1, b2 and b3 data. This function rebuilds a data buffer
790 * from the incoming data and sends it in 7 packets, 6 containing 340 blocks and 1 one containing 8 blocks.
787 * from the incoming data and sends it in 7 packets, 6 containing 340 blocks and 1 one containing 8 blocks.
791 *
788 *
792 */
789 */
793
790
794 unsigned int i;
791 unsigned int i;
795 int ret;
792 int ret;
793 unsigned char *coarseTimePtr;
794 unsigned char *fineTimePtr;
796 rtems_status_code status;
795 rtems_status_code status;
797 spw_ioctl_pkt_send spw_ioctl_send_CWF;
796 spw_ioctl_pkt_send spw_ioctl_send_CWF;
798 char *sample;
797 char *sample;
799
798
800 spw_ioctl_send_CWF.hlen = TM_HEADER_LEN + 4 + 10; // + 4 is for the protocole extra header, + 10 is for the auxiliary header
799 spw_ioctl_send_CWF.hlen = TM_HEADER_LEN + 4 + 10; // + 4 is for the protocole extra header, + 10 is for the auxiliary header
801 spw_ioctl_send_CWF.options = 0;
800 spw_ioctl_send_CWF.options = 0;
802
801
803 ret = LFR_DEFAULT;
802 ret = LFR_DEFAULT;
804
803
805 //**********************
804 //**********************
806 // BUILD CWF3_light DATA
805 // BUILD CWF3_light DATA
807 for ( i=0; i< 2048; i++)
806 for ( i=0; i< NB_SAMPLES_PER_SNAPSHOT; i++)
808 {
807 {
809 #ifdef VHDL_DEV
808 #ifdef VHDL_DEV
810 sample = (char*) &waveform[ (i * NB_WORDS_SWF_BLK) + TIME_OFFSET ];
809 sample = (char*) &waveform[ (i * NB_WORDS_SWF_BLK) + TIME_OFFSET ];
810 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + TIME_OFFSET_IN_BYTES ] = sample[ 0 ];
811 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 1 + TIME_OFFSET_IN_BYTES ] = sample[ 1 ];
812 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 2 + TIME_OFFSET_IN_BYTES ] = sample[ 2 ];
813 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 3 + TIME_OFFSET_IN_BYTES ] = sample[ 3 ];
814 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 4 + TIME_OFFSET_IN_BYTES ] = sample[ 4 ];
815 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 5 + TIME_OFFSET_IN_BYTES ] = sample[ 5 ];
811 #else
816 #else
812 sample = (char*) &waveform[ i * NB_WORDS_SWF_BLK ];
817 sample = (char*) &waveform[ i * NB_WORDS_SWF_BLK ];
813 #endif
814 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) ] = sample[ 0 ];
818 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) ] = sample[ 0 ];
815 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 1 ] = sample[ 1 ];
819 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 1 ] = sample[ 1 ];
816 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 2 ] = sample[ 2 ];
820 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 2 ] = sample[ 2 ];
817 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 3 ] = sample[ 3 ];
821 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 3 ] = sample[ 3 ];
818 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 4 ] = sample[ 4 ];
822 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 4 ] = sample[ 4 ];
819 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 5 ] = sample[ 5 ];
823 wf_cont_f3_light[ (i * NB_BYTES_CWF3_LIGHT_BLK) + 5 ] = sample[ 5 ];
824 #endif
820 }
825 }
821
826
822 //*********************
827 //*********************
823 // SEND CWF3_light DATA
828 // SEND CWF3_light DATA
824
829
825 for (i=0; i<7; i++) // send waveform
830 for (i=0; i<7; i++) // send waveform
826 {
831 {
827 int coarseTime = 0x00;
832 int coarseTime = 0x00;
828 int fineTime = 0x00;
833 int fineTime = 0x00;
829
834
830 spw_ioctl_send_CWF.data = (char*) &wf_cont_f3_light[ (i * 340 * NB_BYTES_CWF3_LIGHT_BLK) ];
835 #ifdef VHDL_DEV
836 spw_ioctl_send_CWF.data = (char*) &wf_cont_f3_light[ (i * BLK_NR_CWF_SHORT_F3 * NB_BYTES_CWF3_LIGHT_BLK) + TIME_OFFSET_IN_BYTES];
837 #else
838 spw_ioctl_send_CWF.data = (char*) &wf_cont_f3_light[ (i * BLK_NR_CWF_SHORT_F3 * NB_BYTES_CWF3_LIGHT_BLK) ];
839 #endif
831 spw_ioctl_send_CWF.hdr = (char*) &headerCWF[ i ];
840 spw_ioctl_send_CWF.hdr = (char*) &headerCWF[ i ];
832 // BUILD THE DATA
841 // BUILD THE DATA
833 if ( i == WFRM_INDEX_OF_LAST_PACKET ) {
842 spw_ioctl_send_CWF.dlen = BLK_NR_CWF_SHORT_F3 * NB_BYTES_CWF3_LIGHT_BLK;
834 spw_ioctl_send_CWF.dlen = 8 * NB_BYTES_CWF3_LIGHT_BLK;
835 }
836 else {
837 spw_ioctl_send_CWF.dlen = 340 * NB_BYTES_CWF3_LIGHT_BLK;
838 }
839 // SET PACKET SEQUENCE COUNTER
843 // SET PACKET SEQUENCE COUNTER
840 increment_seq_counter_source_id( headerCWF[ i ].packetSequenceControl, SID_NORM_CWF_F3 );
844 increment_seq_counter_source_id( headerCWF[ i ].packetSequenceControl, SID_NORM_CWF_F3 );
841 // SET PACKET TIME
845 // SET PACKET TIME
846 #ifdef VHDL_DEV
847 coarseTimePtr = (unsigned char *) &waveform;
848 fineTimePtr = (unsigned char *) &waveform[1];
849 headerCWF[ i ].acquisitionTime[0] = coarseTimePtr[2];
850 headerCWF[ i ].acquisitionTime[1] = coarseTimePtr[3];
851 headerCWF[ i ].acquisitionTime[2] = coarseTimePtr[0];
852 headerCWF[ i ].acquisitionTime[3] = coarseTimePtr[1];
853 headerCWF[ i ].acquisitionTime[4] = fineTimePtr[0];
854 headerCWF[ i ].acquisitionTime[5] = fineTimePtr[1];
855 #else
842 coarseTime = time_management_regs->coarse_time;
856 coarseTime = time_management_regs->coarse_time;
843 fineTime = time_management_regs->fine_time;
857 fineTime = time_management_regs->fine_time;
844 headerCWF[ i ].acquisitionTime[0] = (unsigned char) (coarseTime>>24);
858 headerCWF[ i ].acquisitionTime[0] = (unsigned char) (coarseTime>>24);
845 headerCWF[ i ].acquisitionTime[1] = (unsigned char) (coarseTime>>16);
859 headerCWF[ i ].acquisitionTime[1] = (unsigned char) (coarseTime>>16);
846 headerCWF[ i ].acquisitionTime[2] = (unsigned char) (coarseTime>>8);
860 headerCWF[ i ].acquisitionTime[2] = (unsigned char) (coarseTime>>8);
847 headerCWF[ i ].acquisitionTime[3] = (unsigned char) (coarseTime);
861 headerCWF[ i ].acquisitionTime[3] = (unsigned char) (coarseTime);
848 headerCWF[ i ].acquisitionTime[4] = (unsigned char) (fineTime>>8);
862 headerCWF[ i ].acquisitionTime[4] = (unsigned char) (fineTime>>8);
849 headerCWF[ i ].acquisitionTime[5] = (unsigned char) (fineTime);
863 headerCWF[ i ].acquisitionTime[5] = (unsigned char) (fineTime);
864 #endif
850 headerCWF[ i ].time[0] = (unsigned char) (coarseTime>>24);
865 headerCWF[ i ].time[0] = (unsigned char) (coarseTime>>24);
851 headerCWF[ i ].time[1] = (unsigned char) (coarseTime>>16);
866 headerCWF[ i ].time[1] = (unsigned char) (coarseTime>>16);
852 headerCWF[ i ].time[2] = (unsigned char) (coarseTime>>8);
867 headerCWF[ i ].time[2] = (unsigned char) (coarseTime>>8);
853 headerCWF[ i ].time[3] = (unsigned char) (coarseTime);
868 headerCWF[ i ].time[3] = (unsigned char) (coarseTime);
854 headerCWF[ i ].time[4] = (unsigned char) (fineTime>>8);
869 headerCWF[ i ].time[4] = (unsigned char) (fineTime>>8);
855 headerCWF[ i ].time[5] = (unsigned char) (fineTime);
870 headerCWF[ i ].time[5] = (unsigned char) (fineTime);
856 // SEND PACKET
871 // SEND PACKET
857 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_CWF, sizeof(spw_ioctl_send_CWF));
872 status = rtems_message_queue_send( queue_id, &spw_ioctl_send_CWF, sizeof(spw_ioctl_send_CWF));
858 if (status != RTEMS_SUCCESSFUL) {
873 if (status != RTEMS_SUCCESSFUL) {
859 printf("%d-%d, ERR %d\n", SID_NORM_CWF_F3, i, (int) status);
874 printf("%d-%d, ERR %d\n", SID_NORM_CWF_F3, i, (int) status);
860 ret = LFR_DEFAULT;
875 ret = LFR_DEFAULT;
861 }
876 }
862 rtems_task_wake_after(TIME_BETWEEN_TWO_CWF3_PACKETS);
877 rtems_task_wake_after(TIME_BETWEEN_TWO_CWF3_PACKETS);
863 }
878 }
864
879
865 return ret;
880 return ret;
866 }
881 }
867
882
883 void compute_acquisition_time( unsigned int *coarseTime, unsigned int *fineTime, unsigned int sid, unsigned char pa_lfr_pkt_nr )
884 {
885 unsigned long long int acquisitionTimeAsLong;
886 unsigned char acquisitionTime[6];
887 float deltaT = 0.;
888
889 acquisitionTime[0] = (unsigned char) ( *coarseTime >> 8 );
890 acquisitionTime[1] = (unsigned char) ( *coarseTime );
891 acquisitionTime[2] = (unsigned char) ( *coarseTime >> 24 );
892 acquisitionTime[3] = (unsigned char) ( *coarseTime >> 16 );
893 acquisitionTime[4] = (unsigned char) ( *fineTime >> 24 );
894 acquisitionTime[5] = (unsigned char) ( *fineTime >> 16 );
895
896 acquisitionTimeAsLong = ( (unsigned long long int) acquisitionTime[0] << 40 )
897 + ( (unsigned long long int) acquisitionTime[1] << 32 )
898 + ( acquisitionTime[2] << 24 )
899 + ( acquisitionTime[3] << 16 )
900 + ( acquisitionTime[4] << 8 )
901 + ( acquisitionTime[5] );
902
903 switch( sid )
904 {
905 case SID_NORM_SWF_F0:
906 deltaT = ( (float ) (pa_lfr_pkt_nr) ) * BLK_NR_304 * 65536. / 24576. ;
907 break;
908
909 case SID_NORM_SWF_F1:
910 deltaT = ( (float ) (pa_lfr_pkt_nr) ) * BLK_NR_304 * 65536. / 4096. ;
911 break;
912
913 case SID_NORM_SWF_F2:
914 deltaT = ( (float ) (pa_lfr_pkt_nr) ) * BLK_NR_304 * 65536. / 256. ;
915 break;
916
917 default:
918 deltaT = 0.;
919 break;
920 }
921
922 acquisitionTimeAsLong = acquisitionTimeAsLong + (unsigned long long int) deltaT;
923
924 *coarseTime = (unsigned int) (acquisitionTimeAsLong >> 16);
925 *fineTime = (unsigned int) (acquisitionTimeAsLong & 0xffff);
926 }
868
927
869 //**************
928 //**************
870 // wfp registers
929 // wfp registers
871 void set_wfp_data_shaping()
930 void set_wfp_data_shaping()
872 {
931 {
873 /** This function sets the data_shaping register of the waveform picker module.
932 /** This function sets the data_shaping register of the waveform picker module.
874 *
933 *
875 * The value is read from one field of the parameter_dump_packet structure:\n
934 * The value is read from one field of the parameter_dump_packet structure:\n
876 * bw_sp0_sp1_r0_r1
935 * bw_sp0_sp1_r0_r1
877 *
936 *
878 */
937 */
879
938
880 unsigned char data_shaping;
939 unsigned char data_shaping;
881
940
882 // get the parameters for the data shaping [BW SP0 SP1 R0 R1] in sy_lfr_common1 and configure the register
941 // get the parameters for the data shaping [BW SP0 SP1 R0 R1] in sy_lfr_common1 and configure the register
883 // waveform picker : [R1 R0 SP1 SP0 BW]
942 // waveform picker : [R1 R0 SP1 SP0 BW]
884
943
885 data_shaping = parameter_dump_packet.bw_sp0_sp1_r0_r1;
944 data_shaping = parameter_dump_packet.bw_sp0_sp1_r0_r1;
886
945
887 #ifdef GSA
946 #ifdef GSA
888 #else
947 #else
889 waveform_picker_regs->data_shaping =
948 waveform_picker_regs->data_shaping =
890 ( (data_shaping & 0x10) >> 4 ) // BW
949 ( (data_shaping & 0x10) >> 4 ) // BW
891 + ( (data_shaping & 0x08) >> 2 ) // SP0
950 + ( (data_shaping & 0x08) >> 2 ) // SP0
892 + ( (data_shaping & 0x04) ) // SP1
951 + ( (data_shaping & 0x04) ) // SP1
893 + ( (data_shaping & 0x02) << 2 ) // R0
952 + ( (data_shaping & 0x02) << 2 ) // R0
894 + ( (data_shaping & 0x01) << 4 ); // R1
953 + ( (data_shaping & 0x01) << 4 ); // R1
895 #endif
954 #endif
896 }
955 }
897
956
898 char set_wfp_delta_snapshot()
957 char set_wfp_delta_snapshot()
899 {
958 {
900 /** This function sets the delta_snapshot register of the waveform picker module.
959 /** This function sets the delta_snapshot register of the waveform picker module.
901 *
960 *
902 * The value is read from two (unsigned char) of the parameter_dump_packet structure:
961 * The value is read from two (unsigned char) of the parameter_dump_packet structure:
903 * - sy_lfr_n_swf_p[0]
962 * - sy_lfr_n_swf_p[0]
904 * - sy_lfr_n_swf_p[1]
963 * - sy_lfr_n_swf_p[1]
905 *
964 *
906 */
965 */
907
966
908 char ret;
967 char ret;
909 unsigned int delta_snapshot;
968 unsigned int delta_snapshot;
910 unsigned int aux;
969 unsigned int aux;
911
970
912 aux = 0;
971 aux = 0;
913 ret = LFR_DEFAULT;
972 ret = LFR_DEFAULT;
914
973
915 delta_snapshot = parameter_dump_packet.sy_lfr_n_swf_p[0]*256
974 delta_snapshot = parameter_dump_packet.sy_lfr_n_swf_p[0]*256
916 + parameter_dump_packet.sy_lfr_n_swf_p[1];
975 + parameter_dump_packet.sy_lfr_n_swf_p[1];
917
976
918 #ifdef GSA
977 #ifdef GSA
919 #else
978 #else
920 if ( delta_snapshot < MIN_DELTA_SNAPSHOT )
979 if ( delta_snapshot < MIN_DELTA_SNAPSHOT )
921 {
980 {
922 aux = MIN_DELTA_SNAPSHOT;
981 aux = MIN_DELTA_SNAPSHOT;
923 ret = LFR_DEFAULT;
982 ret = LFR_DEFAULT;
924 }
983 }
925 else
984 else
926 {
985 {
927 aux = delta_snapshot ;
986 aux = delta_snapshot ;
928 ret = LFR_SUCCESSFUL;
987 ret = LFR_SUCCESSFUL;
929 }
988 }
930 waveform_picker_regs->delta_snapshot = aux - 1; // max 2 bytes
989 waveform_picker_regs->delta_snapshot = aux - 1; // max 2 bytes
931 #endif
990 #endif
932
991
933 return ret;
992 return ret;
934 }
993 }
935
994
936 #ifdef VHDL_DEV
995 #ifdef VHDL_DEV
937 void set_wfp_burst_enable_register( unsigned char mode )
996 void set_wfp_burst_enable_register( unsigned char mode )
938 {
997 {
939 /** This function sets the waveform picker burst_enable register depending on the mode.
998 /** This function sets the waveform picker burst_enable register depending on the mode.
940 *
999 *
941 * @param mode is the LFR mode to launch.
1000 * @param mode is the LFR mode to launch.
942 *
1001 *
943 * The burst bits shall be before the enable bits.
1002 * The burst bits shall be before the enable bits.
944 *
1003 *
945 */
1004 */
946
1005
947 // [0000 0000] burst f2, f1, f0 enable f3 f2 f1 f0
1006 // [0000 0000] burst f2, f1, f0 enable f3 f2 f1 f0
948 // the burst bits shall be set first, before the enable bits
1007 // the burst bits shall be set first, before the enable bits
949 switch(mode) {
1008 switch(mode) {
950 case(LFR_MODE_NORMAL):
1009 case(LFR_MODE_NORMAL):
951 waveform_picker_regs->run_burst_enable = 0x00; // [0000 0000] no burst enable
1010 waveform_picker_regs->run_burst_enable = 0x00; // [0000 0000] no burst enable
952 waveform_picker_regs->run_burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
1011 waveform_picker_regs->run_burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
953 break;
1012 break;
954 case(LFR_MODE_BURST):
1013 case(LFR_MODE_BURST):
955 waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled
1014 waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled
956 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x04; // [0100] enable f2
1015 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x04; // [0100] enable f2
957 break;
1016 break;
958 case(LFR_MODE_SBM1):
1017 case(LFR_MODE_SBM1):
959 waveform_picker_regs->run_burst_enable = 0x20; // [0010 0000] f1 burst enabled
1018 waveform_picker_regs->run_burst_enable = 0x20; // [0010 0000] f1 burst enabled
960 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1019 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
961 break;
1020 break;
962 case(LFR_MODE_SBM2):
1021 case(LFR_MODE_SBM2):
963 waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled
1022 waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled
964 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1023 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
965 break;
1024 break;
966 default:
1025 default:
967 waveform_picker_regs->run_burst_enable = 0x00; // [0000 0000] no burst enabled, no waveform enabled
1026 waveform_picker_regs->run_burst_enable = 0x00; // [0000 0000] no burst enabled, no waveform enabled
968 break;
1027 break;
969 }
1028 }
970 }
1029 }
971 #else
1030 #else
972 void set_wfp_burst_enable_register( unsigned char mode )
1031 void set_wfp_burst_enable_register( unsigned char mode )
973 {
1032 {
974 /** This function sets the waveform picker burst_enable register depending on the mode.
1033 /** This function sets the waveform picker burst_enable register depending on the mode.
975 *
1034 *
976 * @param mode is the LFR mode to launch.
1035 * @param mode is the LFR mode to launch.
977 *
1036 *
978 * The burst bits shall be before the enable bits.
1037 * The burst bits shall be before the enable bits.
979 *
1038 *
980 */
1039 */
981
1040
982 // [0000 0000] burst f2, f1, f0 enable f3 f2 f1 f0
1041 // [0000 0000] burst f2, f1, f0 enable f3 f2 f1 f0
983 // the burst bits shall be set first, before the enable bits
1042 // the burst bits shall be set first, before the enable bits
984 switch(mode) {
1043 switch(mode) {
985 case(LFR_MODE_NORMAL):
1044 case(LFR_MODE_NORMAL):
986 waveform_picker_regs->burst_enable = 0x00; // [0000 0000] no burst enable
1045 waveform_picker_regs->burst_enable = 0x00; // [0000 0000] no burst enable
987 waveform_picker_regs->burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
1046 waveform_picker_regs->burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
988 break;
1047 break;
989 case(LFR_MODE_BURST):
1048 case(LFR_MODE_BURST):
990 waveform_picker_regs->burst_enable = 0x40; // [0100 0000] f2 burst enabled
1049 waveform_picker_regs->burst_enable = 0x40; // [0100 0000] f2 burst enabled
991 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x04; // [0100] enable f2
1050 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x04; // [0100] enable f2
992 break;
1051 break;
993 case(LFR_MODE_SBM1):
1052 case(LFR_MODE_SBM1):
994 waveform_picker_regs->burst_enable = 0x20; // [0010 0000] f1 burst enabled
1053 waveform_picker_regs->burst_enable = 0x20; // [0010 0000] f1 burst enabled
995 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1054 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
996 break;
1055 break;
997 case(LFR_MODE_SBM2):
1056 case(LFR_MODE_SBM2):
998 waveform_picker_regs->burst_enable = 0x40; // [0100 0000] f2 burst enabled
1057 waveform_picker_regs->burst_enable = 0x40; // [0100 0000] f2 burst enabled
999 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1058 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1000 break;
1059 break;
1001 default:
1060 default:
1002 waveform_picker_regs->burst_enable = 0x00; // [0000 0000] no burst enabled, no waveform enabled
1061 waveform_picker_regs->burst_enable = 0x00; // [0000 0000] no burst enabled, no waveform enabled
1003 break;
1062 break;
1004 }
1063 }
1005 }
1064 }
1006 #endif
1065 #endif
1007
1066
1008 void reset_wfp_burst_enable()
1067 void reset_wfp_burst_enable()
1009 {
1068 {
1010 /** This function resets the waveform picker burst_enable register.
1069 /** This function resets the waveform picker burst_enable register.
1011 *
1070 *
1012 * The burst bits [f2 f1 f0] and the enable bits [f3 f2 f1 f0] are set to 0.
1071 * The burst bits [f2 f1 f0] and the enable bits [f3 f2 f1 f0] are set to 0.
1013 *
1072 *
1014 */
1073 */
1015
1074
1016 #ifdef VHDL_DEV
1075 #ifdef VHDL_DEV
1017 waveform_picker_regs->run_burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1076 waveform_picker_regs->run_burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1018 #else
1077 #else
1019 waveform_picker_regs->burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1078 waveform_picker_regs->burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1020 #endif
1079 #endif
1021 }
1080 }
1022
1081
1023 void reset_wfp_status()
1082 void reset_wfp_status()
1024 {
1083 {
1025 /** This function resets the waveform picker status register.
1084 /** This function resets the waveform picker status register.
1026 *
1085 *
1027 * All status bits are set to 0 [new_err full_err full].
1086 * All status bits are set to 0 [new_err full_err full].
1028 *
1087 *
1029 */
1088 */
1030
1089
1031 #ifdef GSA
1090 #ifdef GSA
1032 #else
1091 #else
1033 waveform_picker_regs->status = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1092 waveform_picker_regs->status = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1034 #endif
1093 #endif
1035 }
1094 }
1036
1095
1037 #ifdef VHDL_DEV
1096 #ifdef VHDL_DEV
1038 void reset_waveform_picker_regs()
1097 void reset_waveform_picker_regs()
1039 {
1098 {
1040 /** This function resets the waveform picker module registers.
1099 /** This function resets the waveform picker module registers.
1041 *
1100 *
1042 * The registers affected by this function are located at the following offset addresses:
1101 * The registers affected by this function are located at the following offset addresses:
1043 * - 0x00 data_shaping
1102 * - 0x00 data_shaping
1044 * - 0x04 run_burst_enable
1103 * - 0x04 run_burst_enable
1045 * - 0x08 addr_data_f0
1104 * - 0x08 addr_data_f0
1046 * - 0x0C addr_data_f1
1105 * - 0x0C addr_data_f1
1047 * - 0x10 addr_data_f2
1106 * - 0x10 addr_data_f2
1048 * - 0x14 addr_data_f3
1107 * - 0x14 addr_data_f3
1049 * - 0x18 status
1108 * - 0x18 status
1050 * - 0x1C delta_snapshot
1109 * - 0x1C delta_snapshot
1051 * - 0x20 delta_f0
1110 * - 0x20 delta_f0
1052 * - 0x24 delta_f0_2
1111 * - 0x24 delta_f0_2
1053 * - 0x28 delta_f1
1112 * - 0x28 delta_f1
1054 * - 0x2c delta_f2
1113 * - 0x2c delta_f2
1055 * - 0x30 nb_data_by_buffer
1114 * - 0x30 nb_data_by_buffer
1056 * - 0x34 nb_snapshot_param
1115 * - 0x34 nb_snapshot_param
1057 * - 0x38 start_date
1116 * - 0x38 start_date
1058 * - 0x3c nb_word_in_buffer
1117 * - 0x3c nb_word_in_buffer
1059 *
1118 *
1060 */
1119 */
1061 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1120 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1062 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1121 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1063 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1122 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1064 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1123 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1065 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1124 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1066 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1125 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1067 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1126 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1068 waveform_picker_regs->status = 0x00; // 0x18
1127 waveform_picker_regs->status = 0x00; // 0x18
1069 // waveform_picker_regs->delta_snapshot = 0x12800; // 0x1c 296 * 256 = 75776
1128 //
1070 waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c 16 * 256 = 4096
1129 // waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c *** 4096 = 16 * 256
1071 //waveform_picker_regs->delta_snapshot = 0x2000; // 0x1c 32 * 256 = 8192
1130 // waveform_picker_regs->delta_f0 = 0xc0b; // 0x20 *** 3083 = 4096 - 1013
1072 waveform_picker_regs->delta_f0 = 0xbf5; // 0x20 *** 1013
1131 // waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1132 // waveform_picker_regs->delta_f1 = 0xc40; // 0x28 *** 3136 = 4096 - 960
1133 // waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 3072 = 12 * 256
1134 //
1135 waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c *** 4096 = 16 * 256
1136 waveform_picker_regs->delta_f0 = 0x1; // 0x20 ***
1073 waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1137 waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1074 waveform_picker_regs->delta_f1 = 0xbc0; // 0x28 *** 960
1138 waveform_picker_regs->delta_f1 = 0x1; // 0x28 ***
1075 // waveform_picker_regs->delta_f2 = 0x12200; // 0x2c *** 290 * 256 = 74240
1139 waveform_picker_regs->delta_f2 = 0x1; // 0x2c ***
1076 waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 12 * 256 = 3072
1140 // 2048
1077 waveform_picker_regs->nb_data_by_buffer = 0x7ff; // 0x30 *** 2048 -1 => nb samples -1
1141 // waveform_picker_regs->nb_data_by_buffer = 0x7ff; // 0x30 *** 2048 -1 => nb samples -1
1078 waveform_picker_regs->snapshot_param = 0x800; // 0x34 *** 2048 => nb samples
1142 // waveform_picker_regs->snapshot_param = 0x800; // 0x34 *** 2048 => nb samples
1143 // waveform_picker_regs->start_date = 0x00; // 0x38
1144 // waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1145 // 2352 = 7 * 336
1146 waveform_picker_regs->nb_data_by_buffer = 0x92f; // 0x30 *** 2352 - 1 => nb samples -1
1147 waveform_picker_regs->snapshot_param = 0x930; // 0x34 *** 2352 => nb samples
1079 waveform_picker_regs->start_date = 0x00; // 0x38
1148 waveform_picker_regs->start_date = 0x00; // 0x38
1080 waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1149 waveform_picker_regs->nb_word_in_buffer = 0x1b92; // 0x3c *** 2352 * 3 + 2 = 7058
1081 }
1150 }
1082 #else
1151 #else
1083 void reset_waveform_picker_regs()
1152 void reset_waveform_picker_regs()
1084 {
1153 {
1085 /** This function resets the waveform picker module registers.
1154 /** This function resets the waveform picker module registers.
1086 *
1155 *
1087 * The registers affected by this function are located at the following offset addresses:
1156 * The registers affected by this function are located at the following offset addresses:
1088 * - 0x00 data_shaping
1157 * - 0x00 data_shaping
1089 * - 0x04 burst_enable
1158 * - 0x04 burst_enable
1090 * - 0x08 addr_data_f0
1159 * - 0x08 addr_data_f0
1091 * - 0x0C addr_data_f1
1160 * - 0x0C addr_data_f1
1092 * - 0x10 addr_data_f2
1161 * - 0x10 addr_data_f2
1093 * - 0x14 addr_data_f3
1162 * - 0x14 addr_data_f3
1094 * - 0x18 status
1163 * - 0x18 status
1095 * - 0x1C delta_snapshot
1164 * - 0x1C delta_snapshot
1096 * - 0x20 delta_f2_f1
1165 * - 0x20 delta_f2_f1
1097 * - 0x24 delta_f2_f0
1166 * - 0x24 delta_f2_f0
1098 * - 0x28 nb_burst
1167 * - 0x28 nb_burst
1099 * - 0x2C nb_snapshot
1168 * - 0x2C nb_snapshot
1100 *
1169 *
1101 */
1170 */
1102
1171
1103 reset_wfp_burst_enable();
1172 reset_wfp_burst_enable();
1104 reset_wfp_status();
1173 reset_wfp_status();
1105 // set buffer addresses
1174 // set buffer addresses
1106 waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0);
1175 waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0);
1107 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
1176 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
1108 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
1177 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
1109 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a);
1178 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a);
1110 // set other parameters
1179 // set other parameters
1111 set_wfp_data_shaping();
1180 set_wfp_data_shaping();
1112 set_wfp_delta_snapshot(); // time in seconds between two snapshots
1181 set_wfp_delta_snapshot(); // time in seconds between two snapshots
1113 waveform_picker_regs->delta_f2_f1 = 0xffff; // 0x16800 => 92160 (max 4 bytes)
1182 waveform_picker_regs->delta_f2_f1 = 0xffff; // 0x16800 => 92160 (max 4 bytes)
1114 waveform_picker_regs->delta_f2_f0 = 0x17c00; // 97 280 (max 5 bytes)
1183 waveform_picker_regs->delta_f2_f0 = 0x17c00; // 97 280 (max 5 bytes)
1115 // waveform_picker_regs->nb_burst_available = 0x180; // max 3 bytes, size of the buffer in burst (1 burst = 16 x 4 octets)
1184 // waveform_picker_regs->nb_burst_available = 0x180; // max 3 bytes, size of the buffer in burst (1 burst = 16 x 4 octets)
1116 // // 3 * 2048 / 16 = 384
1185 // // 3 * 2048 / 16 = 384
1117 // waveform_picker_regs->nb_snapshot_param = 0x7ff; // max 3 octets, 2048 - 1
1186 // waveform_picker_regs->nb_snapshot_param = 0x7ff; // max 3 octets, 2048 - 1
1118 waveform_picker_regs->nb_burst_available = 0x1b9; // max 3 bytes, size of the buffer in burst (1 burst = 16 x 4 octets)
1187 waveform_picker_regs->nb_burst_available = 0x1b9; // max 3 bytes, size of the buffer in burst (1 burst = 16 x 4 octets)
1119 // 3 * 2352 / 16 = 441
1188 // 3 * 2352 / 16 = 441
1120 waveform_picker_regs->nb_snapshot_param = 0x944; // max 3 octets, 2372 - 1
1189 waveform_picker_regs->nb_snapshot_param = 0x944; // max 3 octets, 2372 - 1
1121 }
1190 }
1122 #endif
1191 #endif
1123
1192
1124 //*****************
1193 //*****************
1125 // local parameters
1194 // local parameters
1126 void set_local_nb_interrupt_f0_MAX( void )
1195 void set_local_nb_interrupt_f0_MAX( void )
1127 {
1196 {
1128 /** This function sets the value of the nb_interrupt_f0_MAX local parameter.
1197 /** This function sets the value of the nb_interrupt_f0_MAX local parameter.
1129 *
1198 *
1130 * This parameter is used for the SM validation only.\n
1199 * This parameter is used for the SM validation only.\n
1131 * The software waits param_local.local_nb_interrupt_f0_MAX interruptions from the spectral matrices
1200 * The software waits param_local.local_nb_interrupt_f0_MAX interruptions from the spectral matrices
1132 * module before launching a basic processing.
1201 * module before launching a basic processing.
1133 *
1202 *
1134 */
1203 */
1135
1204
1136 param_local.local_nb_interrupt_f0_MAX = ( (parameter_dump_packet.sy_lfr_n_asm_p[0]) * 256
1205 param_local.local_nb_interrupt_f0_MAX = ( (parameter_dump_packet.sy_lfr_n_asm_p[0]) * 256
1137 + parameter_dump_packet.sy_lfr_n_asm_p[1] ) * 100;
1206 + parameter_dump_packet.sy_lfr_n_asm_p[1] ) * 100;
1138 }
1207 }
1139
1208
1140 void increment_seq_counter_source_id( unsigned char *packet_sequence_control, unsigned int sid )
1209 void increment_seq_counter_source_id( unsigned char *packet_sequence_control, unsigned int sid )
1141 {
1210 {
1142 unsigned short *sequence_cnt;
1211 unsigned short *sequence_cnt;
1143 unsigned short segmentation_grouping_flag;
1212 unsigned short segmentation_grouping_flag;
1144 unsigned short new_packet_sequence_control;
1213 unsigned short new_packet_sequence_control;
1145
1214
1146 if ( (sid ==SID_NORM_SWF_F0) || (sid ==SID_NORM_SWF_F1) || (sid ==SID_NORM_SWF_F2)
1215 if ( (sid ==SID_NORM_SWF_F0) || (sid ==SID_NORM_SWF_F1) || (sid ==SID_NORM_SWF_F2)
1147 || (sid ==SID_NORM_CWF_F3) || (sid==SID_NORM_CWF_LONG_F3) || (sid ==SID_BURST_CWF_F2) )
1216 || (sid ==SID_NORM_CWF_F3) || (sid==SID_NORM_CWF_LONG_F3) || (sid ==SID_BURST_CWF_F2) )
1148 {
1217 {
1149 sequence_cnt = &sequenceCounters_SCIENCE_NORMAL_BURST;
1218 sequence_cnt = &sequenceCounters_SCIENCE_NORMAL_BURST;
1150 }
1219 }
1151 else if ( (sid ==SID_SBM1_CWF_F1) || (sid ==SID_SBM2_CWF_F2) )
1220 else if ( (sid ==SID_SBM1_CWF_F1) || (sid ==SID_SBM2_CWF_F2) )
1152 {
1221 {
1153 sequence_cnt = &sequenceCounters_SCIENCE_SBM1_SBM2;
1222 sequence_cnt = &sequenceCounters_SCIENCE_SBM1_SBM2;
1154 }
1223 }
1155 else
1224 else
1156 {
1225 {
1157 sequence_cnt = NULL;
1226 sequence_cnt = NULL;
1158 PRINTF1("in increment_seq_counter_source_id *** ERR apid_destid %d not known\n", sid)
1227 PRINTF1("in increment_seq_counter_source_id *** ERR apid_destid %d not known\n", sid)
1159 }
1228 }
1160
1229
1161 if (sequence_cnt != NULL)
1230 if (sequence_cnt != NULL)
1162 {
1231 {
1163 segmentation_grouping_flag = (packet_sequence_control[ 0 ] & 0xc0) << 8;
1232 segmentation_grouping_flag = (packet_sequence_control[ 0 ] & 0xc0) << 8;
1164 *sequence_cnt = (*sequence_cnt) & 0x3fff;
1233 *sequence_cnt = (*sequence_cnt) & 0x3fff;
1165
1234
1166 new_packet_sequence_control = segmentation_grouping_flag | *sequence_cnt ;
1235 new_packet_sequence_control = segmentation_grouping_flag | *sequence_cnt ;
1167
1236
1168 packet_sequence_control[0] = (unsigned char) (new_packet_sequence_control >> 8);
1237 packet_sequence_control[0] = (unsigned char) (new_packet_sequence_control >> 8);
1169 packet_sequence_control[1] = (unsigned char) (new_packet_sequence_control );
1238 packet_sequence_control[1] = (unsigned char) (new_packet_sequence_control );
1170
1239
1171 // increment the sequence counter for the next packet
1240 // increment the sequence counter for the next packet
1172 if ( *sequence_cnt < SEQ_CNT_MAX)
1241 if ( *sequence_cnt < SEQ_CNT_MAX)
1173 {
1242 {
1174 *sequence_cnt = *sequence_cnt + 1;
1243 *sequence_cnt = *sequence_cnt + 1;
1175 }
1244 }
1176 else
1245 else
1177 {
1246 {
1178 *sequence_cnt = 0;
1247 *sequence_cnt = 0;
1179 }
1248 }
1180 }
1249 }
1181 }
1250 }
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