@@ -1,58 +1,69 | |||
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1 | 1 | #ifndef FSW_MISC_H_INCLUDED |
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2 | 2 | #define FSW_MISC_H_INCLUDED |
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3 | 3 | |
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4 | 4 | #include <rtems.h> |
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5 | 5 | #include <stdio.h> |
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6 | 6 | #include <grspw.h> |
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7 | 7 | #include <grlib_regs.h> |
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8 | 8 | |
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9 | 9 | #include "fsw_params.h" |
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10 | 10 | #include "fsw_spacewire.h" |
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11 | 11 | #include "lfr_cpu_usage_report.h" |
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12 | 12 | |
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13 | enum lfr_reset_cause_t{ | |
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14 | UNKNOWN_CAUSE, | |
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15 | POWER_ON, | |
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16 | TC_RESET, | |
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17 | WATCHDOG, | |
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18 | ERROR_RESET, | |
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19 | UNEXP_RESET | |
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20 | }; | |
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21 | ||
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22 | #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0 | |
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23 | ||
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13 | 24 | rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic |
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14 | 25 | rtems_id HK_id; // id of the HK rate monotonic period |
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15 | 26 | |
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16 | 27 | void configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider, |
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17 | 28 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ); |
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18 | 29 | void timer_start( gptimer_regs_t *gptimer_regs, unsigned char timer ); |
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19 | 30 | void timer_stop( gptimer_regs_t *gptimer_regs, unsigned char timer ); |
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20 | 31 | void timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider); |
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21 | 32 | |
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22 | 33 | // SERIAL LINK |
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23 | 34 | int send_console_outputs_on_apbuart_port( void ); |
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24 | 35 | int enable_apbuart_transmitter( void ); |
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25 | 36 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value); |
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26 | 37 | |
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27 | 38 | // RTEMS TASKS |
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28 | 39 | rtems_task stat_task( rtems_task_argument argument ); |
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29 | 40 | rtems_task hous_task( rtems_task_argument argument ); |
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30 | 41 | rtems_task dumb_task( rtems_task_argument unused ); |
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31 | 42 | |
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32 | 43 | void init_housekeeping_parameters( void ); |
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33 | 44 | void increment_seq_counter(unsigned short *packetSequenceControl); |
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34 | 45 | void getTime( unsigned char *time); |
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35 | 46 | unsigned long long int getTimeAsUnsignedLongLongInt( ); |
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36 | 47 | void send_dumb_hk( void ); |
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37 | 48 | void get_temperatures( unsigned char *temperatures ); |
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38 | 49 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ); |
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39 | 50 | void get_cpu_load( unsigned char *resource_statistics ); |
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40 | 51 | void set_hk_lfr_sc_potential_flag( bool state ); |
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41 | 52 | void set_hk_lfr_mag_fields_flag( bool state ); |
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42 | 53 | void set_hk_lfr_calib_enable( bool state ); |
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43 | ||
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54 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ); | |
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44 | 55 | |
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45 | 56 | extern int sched_yield( void ); |
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46 | 57 | extern void rtems_cpu_usage_reset(); |
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47 | 58 | extern ring_node *current_ring_node_f3; |
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48 | 59 | extern ring_node *ring_node_to_send_cwf_f3; |
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49 | 60 | extern ring_node waveform_ring_f3[]; |
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50 | 61 | extern unsigned short sequenceCounterHK; |
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51 | 62 | |
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52 | 63 | extern unsigned char hk_lfr_q_sd_fifo_size_max; |
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53 | 64 | extern unsigned char hk_lfr_q_rv_fifo_size_max; |
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54 | 65 | extern unsigned char hk_lfr_q_p0_fifo_size_max; |
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55 | 66 | extern unsigned char hk_lfr_q_p1_fifo_size_max; |
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56 | 67 | extern unsigned char hk_lfr_q_p2_fifo_size_max; |
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57 | 68 | |
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58 | 69 | #endif // FSW_MISC_H_INCLUDED |
@@ -1,564 +1,571 | |||
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1 | 1 | /** General usage functions and RTEMS tasks. |
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2 | 2 | * |
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3 | 3 | * @file |
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4 | 4 | * @author P. LEROY |
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5 | 5 | * |
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6 | 6 | */ |
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7 | 7 | |
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8 | 8 | #include "fsw_misc.h" |
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9 | 9 | |
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10 | 10 | void configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider, |
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11 | 11 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) |
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12 | 12 | { |
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13 | 13 | /** This function configures a GPTIMER timer instantiated in the VHDL design. |
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14 | 14 | * |
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15 | 15 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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16 | 16 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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17 | 17 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
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18 | 18 | * @param interrupt_level is the interrupt level that the timer drives. |
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19 | 19 | * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. |
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20 | 20 | * |
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21 | 21 | * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 |
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22 | 22 | * |
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23 | 23 | */ |
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24 | 24 | |
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25 | 25 | rtems_status_code status; |
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26 | 26 | rtems_isr_entry old_isr_handler; |
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27 | 27 | |
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28 | 28 | gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register |
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29 | 29 | |
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30 | 30 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels |
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31 | 31 | if (status!=RTEMS_SUCCESSFUL) |
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32 | 32 | { |
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33 | 33 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") |
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34 | 34 | } |
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35 | 35 | |
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36 | 36 | timer_set_clock_divider( gptimer_regs, timer, clock_divider); |
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37 | 37 | } |
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38 | 38 | |
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39 | 39 | void timer_start(gptimer_regs_t *gptimer_regs, unsigned char timer) |
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40 | 40 | { |
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41 | 41 | /** This function starts a GPTIMER timer. |
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42 | 42 | * |
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43 | 43 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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44 | 44 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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45 | 45 | * |
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46 | 46 | */ |
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47 | 47 | |
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48 | 48 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any |
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49 | 49 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register |
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50 | 50 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer |
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51 | 51 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart |
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52 | 52 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable |
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53 | 53 | } |
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54 | 54 | |
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55 | 55 | void timer_stop(gptimer_regs_t *gptimer_regs, unsigned char timer) |
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56 | 56 | { |
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57 | 57 | /** This function stops a GPTIMER timer. |
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58 | 58 | * |
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59 | 59 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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60 | 60 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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61 | 61 | * |
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62 | 62 | */ |
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63 | 63 | |
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64 | 64 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer |
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65 | 65 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable |
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66 | 66 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any |
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67 | 67 | } |
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68 | 68 | |
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69 | 69 | void timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider) |
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70 | 70 | { |
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71 | 71 | /** This function sets the clock divider of a GPTIMER timer. |
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72 | 72 | * |
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73 | 73 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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74 | 74 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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75 | 75 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
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76 | 76 | * |
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77 | 77 | */ |
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78 | 78 | |
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79 | 79 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz |
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80 | 80 | } |
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81 | 81 | |
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82 | 82 | int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port |
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83 | 83 | { |
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84 | 84 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
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85 | 85 | |
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86 | 86 | apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE; |
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87 | 87 | |
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88 | 88 | return 0; |
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89 | 89 | } |
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90 | 90 | |
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91 | 91 | int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register |
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92 | 92 | { |
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93 | 93 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
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94 | 94 | |
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95 | 95 | apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE; |
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96 | 96 | |
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97 | 97 | return 0; |
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98 | 98 | } |
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99 | 99 | |
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100 | 100 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) |
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101 | 101 | { |
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102 | 102 | /** This function sets the scaler reload register of the apbuart module |
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103 | 103 | * |
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104 | 104 | * @param regs is the address of the apbuart registers in memory |
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105 | 105 | * @param value is the value that will be stored in the scaler register |
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106 | 106 | * |
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107 | 107 | * The value shall be set by the software to get data on the serial interface. |
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108 | 108 | * |
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109 | 109 | */ |
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110 | 110 | |
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111 | 111 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; |
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112 | 112 | |
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113 | 113 | apbuart_regs->scaler = value; |
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114 | 114 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) |
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115 | 115 | } |
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116 | 116 | |
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117 | 117 | //************ |
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118 | 118 | // RTEMS TASKS |
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119 | 119 | |
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120 | 120 | rtems_task stat_task(rtems_task_argument argument) |
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121 | 121 | { |
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122 | 122 | int i; |
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123 | 123 | int j; |
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124 | 124 | i = 0; |
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125 | 125 | j = 0; |
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126 | 126 | BOOT_PRINTF("in STAT *** \n") |
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127 | 127 | while(1){ |
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128 | 128 | rtems_task_wake_after(1000); |
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129 | 129 | PRINTF1("%d\n", j) |
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130 | 130 | if (i == CPU_USAGE_REPORT_PERIOD) { |
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131 | 131 | // #ifdef PRINT_TASK_STATISTICS |
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132 | 132 | // rtems_cpu_usage_report(); |
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133 | 133 | // rtems_cpu_usage_reset(); |
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134 | 134 | // #endif |
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135 | 135 | i = 0; |
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136 | 136 | } |
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137 | 137 | else i++; |
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138 | 138 | j++; |
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139 | 139 | } |
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140 | 140 | } |
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141 | 141 | |
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142 | 142 | rtems_task hous_task(rtems_task_argument argument) |
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143 | 143 | { |
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144 | 144 | rtems_status_code status; |
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145 | 145 | rtems_status_code spare_status; |
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146 | 146 | rtems_id queue_id; |
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147 | 147 | rtems_rate_monotonic_period_status period_status; |
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148 | 148 | |
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149 | 149 | status = get_message_queue_id_send( &queue_id ); |
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150 | 150 | if (status != RTEMS_SUCCESSFUL) |
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151 | 151 | { |
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152 | 152 | PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status) |
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153 | 153 | } |
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154 | 154 | |
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155 | 155 | BOOT_PRINTF("in HOUS ***\n") |
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156 | 156 | |
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157 | 157 | if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) { |
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158 | 158 | status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id ); |
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159 | 159 | if( status != RTEMS_SUCCESSFUL ) { |
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160 | 160 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ) |
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161 | 161 | } |
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162 | 162 | } |
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163 | 163 | |
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164 | 164 | status = rtems_rate_monotonic_cancel(HK_id); |
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165 | 165 | if( status != RTEMS_SUCCESSFUL ) { |
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166 | 166 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ) |
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167 | 167 | } |
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168 | 168 | else { |
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169 | 169 | DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n") |
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170 | 170 | } |
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171 | 171 | |
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172 | 172 | // startup phase |
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173 | 173 | status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks ); |
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174 | 174 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); |
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175 | 175 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) |
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176 | 176 | while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway |
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177 | 177 | { |
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178 | 178 | if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization |
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179 | 179 | { |
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180 | 180 | break; // break if LFR is synchronized |
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181 | 181 | } |
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182 | 182 | else |
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183 | 183 | { |
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184 | 184 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); |
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185 | 185 | // sched_yield(); |
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186 | 186 | status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms |
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187 | 187 | } |
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188 | 188 | } |
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189 | 189 | status = rtems_rate_monotonic_cancel(HK_id); |
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190 | 190 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) |
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191 | 191 | |
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192 | set_hk_lfr_reset_cause( POWER_ON ); | |
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193 | ||
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192 | 194 | while(1){ // launch the rate monotonic task |
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193 | 195 | status = rtems_rate_monotonic_period( HK_id, HK_PERIOD ); |
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194 | 196 | if ( status != RTEMS_SUCCESSFUL ) { |
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195 | 197 | PRINTF1( "in HOUS *** ERR period: %d\n", status); |
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196 | 198 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 ); |
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197 | 199 | } |
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198 | 200 | else { |
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199 | 201 | housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8); |
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200 | 202 | housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK ); |
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201 | 203 | increment_seq_counter( &sequenceCounterHK ); |
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202 | 204 | |
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203 | 205 | housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); |
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204 | 206 | housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); |
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205 | 207 | housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); |
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206 | 208 | housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); |
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207 | 209 | housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); |
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208 | 210 | housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time); |
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209 | 211 | |
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210 | 212 | spacewire_update_statistics(); |
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211 | 213 | |
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212 | 214 | housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max; |
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213 | 215 | housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max; |
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214 | 216 | housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max; |
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215 | 217 | housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max; |
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216 | 218 | housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max; |
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217 | 219 | |
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218 | 220 | housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare; |
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219 | 221 | housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters; |
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220 | 222 | get_temperatures( housekeeping_packet.hk_lfr_temp_scm ); |
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221 | 223 | get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 ); |
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222 | 224 | get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load ); |
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223 | 225 | |
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224 | 226 | // SEND PACKET |
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225 | 227 | status = rtems_message_queue_send( queue_id, &housekeeping_packet, |
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226 | 228 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); |
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227 | 229 | if (status != RTEMS_SUCCESSFUL) { |
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228 | 230 | PRINTF1("in HOUS *** ERR send: %d\n", status) |
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229 | 231 | } |
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230 | 232 | } |
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231 | 233 | } |
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232 | 234 | |
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233 | 235 | PRINTF("in HOUS *** deleting task\n") |
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234 | 236 | |
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235 | 237 | status = rtems_task_delete( RTEMS_SELF ); // should not return |
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236 | 238 | printf( "rtems_task_delete returned with status of %d.\n", status ); |
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237 | 239 | return; |
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238 | 240 | } |
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239 | 241 | |
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240 | 242 | rtems_task dumb_task( rtems_task_argument unused ) |
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241 | 243 | { |
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242 | 244 | /** This RTEMS taks is used to print messages without affecting the general behaviour of the software. |
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243 | 245 | * |
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244 | 246 | * @param unused is the starting argument of the RTEMS task |
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245 | 247 | * |
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246 | 248 | * The DUMB taks waits for RTEMS events and print messages depending on the incoming events. |
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247 | 249 | * |
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248 | 250 | */ |
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249 | 251 | |
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250 | 252 | unsigned int i; |
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251 | 253 | unsigned int intEventOut; |
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252 | 254 | unsigned int coarse_time = 0; |
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253 | 255 | unsigned int fine_time = 0; |
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254 | 256 | rtems_event_set event_out; |
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255 | 257 | |
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256 | 258 | char *DumbMessages[12] = {"in DUMB *** default", // RTEMS_EVENT_0 |
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257 | 259 | "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1 |
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258 | 260 | "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2 |
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259 | 261 | "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3 |
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260 | 262 | "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4 |
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261 | 263 | "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5 |
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262 | 264 | "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6 |
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263 | 265 | "ready for dump", // RTEMS_EVENT_7 |
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264 | 266 | "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8 |
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265 | 267 | "tick", // RTEMS_EVENT_9 |
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266 | 268 | "VHDL ERR *** waveform picker", // RTEMS_EVENT_10 |
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267 | 269 | "VHDL ERR *** unexpected ready matrix values" // RTEMS_EVENT_11 |
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268 | 270 | }; |
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269 | 271 | |
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270 | 272 | BOOT_PRINTF("in DUMB *** \n") |
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271 | 273 | |
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272 | 274 | while(1){ |
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273 | 275 | rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 |
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274 | 276 | | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7 |
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275 | 277 | | RTEMS_EVENT_8 | RTEMS_EVENT_9, |
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276 | 278 | RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT |
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277 | 279 | intEventOut = (unsigned int) event_out; |
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278 | 280 | for ( i=0; i<32; i++) |
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279 | 281 | { |
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280 | 282 | if ( ((intEventOut >> i) & 0x0001) != 0) |
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281 | 283 | { |
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282 | 284 | coarse_time = time_management_regs->coarse_time; |
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283 | 285 | fine_time = time_management_regs->fine_time; |
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284 | 286 | printf("in DUMB *** coarse: %x, fine: %x, %s\n", coarse_time, fine_time, DumbMessages[i]); |
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285 | 287 | if (i==8) |
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286 | 288 | { |
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287 | 289 | } |
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288 | 290 | if (i==10) |
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289 | 291 | { |
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290 | 292 | } |
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291 | 293 | } |
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292 | 294 | } |
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293 | 295 | } |
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294 | 296 | } |
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295 | 297 | |
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296 | 298 | //***************************** |
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297 | 299 | // init housekeeping parameters |
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298 | 300 | |
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299 | 301 | void init_housekeeping_parameters( void ) |
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300 | 302 | { |
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301 | 303 | /** This function initialize the housekeeping_packet global variable with default values. |
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302 | 304 | * |
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303 | 305 | */ |
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304 | 306 | |
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305 | 307 | unsigned int i = 0; |
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306 | 308 | unsigned char *parameters; |
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307 | 309 | unsigned char sizeOfHK; |
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308 | 310 | |
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309 | 311 | sizeOfHK = sizeof( Packet_TM_LFR_HK_t ); |
|
310 | 312 | |
|
311 | 313 | parameters = (unsigned char*) &housekeeping_packet; |
|
312 | 314 | |
|
313 | 315 | for(i = 0; i< sizeOfHK; i++) |
|
314 | 316 | { |
|
315 | 317 | parameters[i] = 0x00; |
|
316 | 318 | } |
|
317 | 319 | |
|
318 | 320 | housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; |
|
319 | 321 | housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; |
|
320 | 322 | housekeeping_packet.reserved = DEFAULT_RESERVED; |
|
321 | 323 | housekeeping_packet.userApplication = CCSDS_USER_APP; |
|
322 | 324 | housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8); |
|
323 | 325 | housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK); |
|
324 | 326 | housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; |
|
325 | 327 | housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; |
|
326 | 328 | housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); |
|
327 | 329 | housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); |
|
328 | 330 | housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; |
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329 | 331 | housekeeping_packet.serviceType = TM_TYPE_HK; |
|
330 | 332 | housekeeping_packet.serviceSubType = TM_SUBTYPE_HK; |
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331 | 333 | housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND; |
|
332 | 334 | housekeeping_packet.sid = SID_HK; |
|
333 | 335 | |
|
334 | 336 | // init status word |
|
335 | 337 | housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0; |
|
336 | 338 | housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1; |
|
337 | 339 | // init software version |
|
338 | 340 | housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1; |
|
339 | 341 | housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2; |
|
340 | 342 | housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3; |
|
341 | 343 | housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4; |
|
342 | 344 | // init fpga version |
|
343 | 345 | parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION); |
|
344 | 346 | housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1 |
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345 | 347 | housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2 |
|
346 | 348 | housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3 |
|
347 | 349 | |
|
348 | 350 | housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND; |
|
349 | 351 | housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV; |
|
350 | 352 | housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0; |
|
351 | 353 | housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1; |
|
352 | 354 | housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2; |
|
353 | 355 | } |
|
354 | 356 | |
|
355 | 357 | void increment_seq_counter( unsigned short *packetSequenceControl ) |
|
356 | 358 | { |
|
357 | 359 | /** This function increment the sequence counter passes in argument. |
|
358 | 360 | * |
|
359 | 361 | * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0. |
|
360 | 362 | * |
|
361 | 363 | */ |
|
362 | 364 | |
|
363 | 365 | unsigned short segmentation_grouping_flag; |
|
364 | 366 | unsigned short sequence_cnt; |
|
365 | 367 | |
|
366 | 368 | segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6 |
|
367 | 369 | sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111] |
|
368 | 370 | |
|
369 | 371 | if ( sequence_cnt < SEQ_CNT_MAX) |
|
370 | 372 | { |
|
371 | 373 | sequence_cnt = sequence_cnt + 1; |
|
372 | 374 | } |
|
373 | 375 | else |
|
374 | 376 | { |
|
375 | 377 | sequence_cnt = 0; |
|
376 | 378 | } |
|
377 | 379 | |
|
378 | 380 | *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ; |
|
379 | 381 | } |
|
380 | 382 | |
|
381 | 383 | void getTime( unsigned char *time) |
|
382 | 384 | { |
|
383 | 385 | /** This function write the current local time in the time buffer passed in argument. |
|
384 | 386 | * |
|
385 | 387 | */ |
|
386 | 388 | |
|
387 | 389 | time[0] = (unsigned char) (time_management_regs->coarse_time>>24); |
|
388 | 390 | time[1] = (unsigned char) (time_management_regs->coarse_time>>16); |
|
389 | 391 | time[2] = (unsigned char) (time_management_regs->coarse_time>>8); |
|
390 | 392 | time[3] = (unsigned char) (time_management_regs->coarse_time); |
|
391 | 393 | time[4] = (unsigned char) (time_management_regs->fine_time>>8); |
|
392 | 394 | time[5] = (unsigned char) (time_management_regs->fine_time); |
|
393 | 395 | } |
|
394 | 396 | |
|
395 | 397 | unsigned long long int getTimeAsUnsignedLongLongInt( ) |
|
396 | 398 | { |
|
397 | 399 | /** This function write the current local time in the time buffer passed in argument. |
|
398 | 400 | * |
|
399 | 401 | */ |
|
400 | 402 | unsigned long long int time; |
|
401 | 403 | |
|
402 | 404 | time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 ) |
|
403 | 405 | + time_management_regs->fine_time; |
|
404 | 406 | |
|
405 | 407 | return time; |
|
406 | 408 | } |
|
407 | 409 | |
|
408 | 410 | void send_dumb_hk( void ) |
|
409 | 411 | { |
|
410 | 412 | Packet_TM_LFR_HK_t dummy_hk_packet; |
|
411 | 413 | unsigned char *parameters; |
|
412 | 414 | unsigned int i; |
|
413 | 415 | rtems_id queue_id; |
|
414 | 416 | |
|
415 | 417 | dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; |
|
416 | 418 | dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; |
|
417 | 419 | dummy_hk_packet.reserved = DEFAULT_RESERVED; |
|
418 | 420 | dummy_hk_packet.userApplication = CCSDS_USER_APP; |
|
419 | 421 | dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8); |
|
420 | 422 | dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK); |
|
421 | 423 | dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; |
|
422 | 424 | dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; |
|
423 | 425 | dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); |
|
424 | 426 | dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); |
|
425 | 427 | dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; |
|
426 | 428 | dummy_hk_packet.serviceType = TM_TYPE_HK; |
|
427 | 429 | dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK; |
|
428 | 430 | dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND; |
|
429 | 431 | dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); |
|
430 | 432 | dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); |
|
431 | 433 | dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); |
|
432 | 434 | dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); |
|
433 | 435 | dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); |
|
434 | 436 | dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time); |
|
435 | 437 | dummy_hk_packet.sid = SID_HK; |
|
436 | 438 | |
|
437 | 439 | // init status word |
|
438 | 440 | dummy_hk_packet.lfr_status_word[0] = 0xff; |
|
439 | 441 | dummy_hk_packet.lfr_status_word[1] = 0xff; |
|
440 | 442 | // init software version |
|
441 | 443 | dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1; |
|
442 | 444 | dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2; |
|
443 | 445 | dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3; |
|
444 | 446 | dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4; |
|
445 | 447 | // init fpga version |
|
446 | 448 | parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0); |
|
447 | 449 | dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1 |
|
448 | 450 | dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2 |
|
449 | 451 | dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3 |
|
450 | 452 | |
|
451 | 453 | parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load; |
|
452 | 454 | |
|
453 | 455 | for (i=0; i<100; i++) |
|
454 | 456 | { |
|
455 | 457 | parameters[i] = 0xff; |
|
456 | 458 | } |
|
457 | 459 | |
|
458 | 460 | get_message_queue_id_send( &queue_id ); |
|
459 | 461 | |
|
460 | 462 | rtems_message_queue_send( queue_id, &dummy_hk_packet, |
|
461 | 463 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); |
|
462 | 464 | } |
|
463 | 465 | |
|
464 | 466 | void get_temperatures( unsigned char *temperatures ) |
|
465 | 467 | { |
|
466 | 468 | unsigned char* temp_scm_ptr; |
|
467 | 469 | unsigned char* temp_pcb_ptr; |
|
468 | 470 | unsigned char* temp_fpga_ptr; |
|
469 | 471 | |
|
470 | 472 | // SEL1 SEL0 |
|
471 | 473 | // 0 0 => PCB |
|
472 | 474 | // 0 1 => FPGA |
|
473 | 475 | // 1 0 => SCM |
|
474 | 476 | |
|
475 | 477 | temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm; |
|
476 | 478 | temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb; |
|
477 | 479 | temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga; |
|
478 | 480 | |
|
479 | 481 | temperatures[0] = temp_scm_ptr[2]; |
|
480 | 482 | temperatures[1] = temp_scm_ptr[3]; |
|
481 | 483 | temperatures[2] = temp_pcb_ptr[2]; |
|
482 | 484 | temperatures[3] = temp_pcb_ptr[3]; |
|
483 | 485 | temperatures[4] = temp_fpga_ptr[2]; |
|
484 | 486 | temperatures[5] = temp_fpga_ptr[3]; |
|
485 | 487 | } |
|
486 | 488 | |
|
487 | 489 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ) |
|
488 | 490 | { |
|
489 | 491 | unsigned char* v_ptr; |
|
490 | 492 | unsigned char* e1_ptr; |
|
491 | 493 | unsigned char* e2_ptr; |
|
492 | 494 | |
|
493 | 495 | v_ptr = (unsigned char *) &waveform_picker_regs->v; |
|
494 | 496 | e1_ptr = (unsigned char *) &waveform_picker_regs->e1; |
|
495 | 497 | e2_ptr = (unsigned char *) &waveform_picker_regs->e2; |
|
496 | 498 | |
|
497 | 499 | spacecraft_potential[0] = v_ptr[2]; |
|
498 | 500 | spacecraft_potential[1] = v_ptr[3]; |
|
499 | 501 | spacecraft_potential[2] = e1_ptr[2]; |
|
500 | 502 | spacecraft_potential[3] = e1_ptr[3]; |
|
501 | 503 | spacecraft_potential[4] = e2_ptr[2]; |
|
502 | 504 | spacecraft_potential[5] = e2_ptr[3]; |
|
503 | 505 | } |
|
504 | 506 | |
|
505 | 507 | void get_cpu_load( unsigned char *resource_statistics ) |
|
506 | 508 | { |
|
507 | 509 | unsigned char cpu_load; |
|
508 | 510 | |
|
509 | 511 | cpu_load = lfr_rtems_cpu_usage_report(); |
|
510 | 512 | |
|
511 | 513 | // HK_LFR_CPU_LOAD |
|
512 | 514 | resource_statistics[0] = cpu_load; |
|
513 | 515 | |
|
514 | 516 | // HK_LFR_CPU_LOAD_MAX |
|
515 | 517 | if (cpu_load > resource_statistics[1]) |
|
516 | 518 | { |
|
517 | 519 | resource_statistics[1] = cpu_load; |
|
518 | 520 | } |
|
519 | 521 | |
|
520 | 522 | // CPU_LOAD_AVE |
|
521 | 523 | resource_statistics[2] = 0; |
|
522 | 524 | |
|
523 | 525 | #ifndef PRINT_TASK_STATISTICS |
|
524 | 526 | rtems_cpu_usage_reset(); |
|
525 | 527 | #endif |
|
526 | 528 | |
|
527 | 529 | } |
|
528 | 530 | |
|
529 | 531 | void set_hk_lfr_sc_potential_flag( bool state ) |
|
530 | 532 | { |
|
531 | 533 | if (state == true) |
|
532 | 534 | { |
|
533 | 535 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000] |
|
534 | 536 | } |
|
535 | 537 | else |
|
536 | 538 | { |
|
537 | 539 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111] |
|
538 | 540 | } |
|
539 | 541 | } |
|
540 | 542 | |
|
541 | 543 | void set_hk_lfr_mag_fields_flag( bool state ) |
|
542 | 544 | { |
|
543 | 545 | if (state == true) |
|
544 | 546 | { |
|
545 | 547 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x20; // [0010 0000] |
|
546 | 548 | } |
|
547 | 549 | else |
|
548 | 550 | { |
|
549 | 551 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xd7; // [1101 1111] |
|
550 | 552 | } |
|
551 | 553 | } |
|
552 | 554 | |
|
553 | 555 | void set_hk_lfr_calib_enable( bool state ) |
|
554 | 556 | { |
|
555 | 557 | if (state == true) |
|
556 | 558 | { |
|
557 | 559 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000] |
|
558 | 560 | } |
|
559 | 561 | else |
|
560 | 562 | { |
|
561 | 563 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111] |
|
562 | 564 | } |
|
563 | 565 | } |
|
564 | 566 | |
|
567 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ) | |
|
568 | { | |
|
569 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | |
|
570 | | (lfr_reset_cause & 0x07 ); // [0000 0111] | |
|
571 | } |
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