@@ -1,14 +1,14 | |||||
1 |
cmake_minimum_required (VERSION 3. |
|
1 | cmake_minimum_required (VERSION 3.5) | |
2 | project (LFR_FSW) |
|
2 | project (LFR_FSW) | |
3 |
|
3 | |||
4 | if(NOT CMAKE_BUILD_TYPE) |
|
4 | if(NOT CMAKE_BUILD_TYPE) | |
5 | set(CMAKE_BUILD_TYPE "Release" CACHE STRING |
|
5 | set(CMAKE_BUILD_TYPE "Release" CACHE STRING | |
6 | "Choose the type of build, options are: Debug Release RelWithDebInfo MinSizeRel." FORCE) |
|
6 | "Choose the type of build, options are: Debug Release RelWithDebInfo MinSizeRel." FORCE) | |
7 | endif(NOT CMAKE_BUILD_TYPE) |
|
7 | endif(NOT CMAKE_BUILD_TYPE) | |
8 |
|
8 | |||
9 | set(LFR_BP_SRC ${CMAKE_CURRENT_SOURCE_DIR}/LFR_basic-parameters/basic_parameters.c) |
|
9 | set(LFR_BP_SRC ${CMAKE_CURRENT_SOURCE_DIR}/LFR_basic-parameters/basic_parameters.c) | |
10 |
|
10 | |||
11 | SET(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} "${CMAKE_CURRENT_LIST_DIR}/sparc") |
|
11 | SET(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} "${CMAKE_CURRENT_LIST_DIR}/sparc") | |
12 |
|
12 | |||
13 | add_subdirectory(libgcov) |
|
13 | add_subdirectory(libgcov) | |
14 | add_subdirectory(src) |
|
14 | add_subdirectory(src) |
@@ -1,117 +1,112 | |||||
1 | #ifndef TC_HANDLER_H_INCLUDED |
|
1 | #ifndef TC_HANDLER_H_INCLUDED | |
2 | #define TC_HANDLER_H_INCLUDED |
|
2 | #define TC_HANDLER_H_INCLUDED | |
3 |
|
3 | |||
4 | #include <rtems.h> |
|
4 | #include <rtems.h> | |
5 | #include <leon.h> |
|
5 | #include <leon.h> | |
6 |
|
6 | |||
7 | #include "tc_load_dump_parameters.h" |
|
7 | #include "tc_load_dump_parameters.h" | |
8 | #include "tc_acceptance.h" |
|
8 | #include "tc_acceptance.h" | |
9 | #include "tm_lfr_tc_exe.h" |
|
9 | #include "tm_lfr_tc_exe.h" | |
10 | #include "wf_handler.h" |
|
10 | #include "wf_handler.h" | |
11 | #include "fsw_processing.h" |
|
11 | #include "fsw_processing.h" | |
12 |
|
12 | |||
13 | #include "lfr_cpu_usage_report.h" |
|
13 | #include "lfr_cpu_usage_report.h" | |
14 |
|
14 | |||
15 | #define MAX_DELTA_COARSE_TIME 3 |
|
15 | #define MAX_DELTA_COARSE_TIME 3 | |
16 | #define NB_SCIENCE_TASKS 10 |
|
16 | #define NB_SCIENCE_TASKS 10 | |
17 | #define NB_ASM_TASKS 6 |
|
17 | #define NB_ASM_TASKS 6 | |
18 | #define STATUS_0 0 |
|
18 | #define STATUS_0 0 | |
19 | #define STATUS_1 1 |
|
19 | #define STATUS_1 1 | |
20 | #define STATUS_2 2 |
|
20 | #define STATUS_2 2 | |
21 | #define STATUS_3 3 |
|
21 | #define STATUS_3 3 | |
22 | #define STATUS_4 4 |
|
22 | #define STATUS_4 4 | |
23 | #define STATUS_5 5 |
|
23 | #define STATUS_5 5 | |
24 | #define STATUS_6 6 |
|
24 | #define STATUS_6 6 | |
25 | #define STATUS_7 7 |
|
25 | #define STATUS_7 7 | |
26 | #define STATUS_8 8 |
|
26 | #define STATUS_8 8 | |
27 | #define STATUS_9 9 |
|
27 | #define STATUS_9 9 | |
28 |
|
28 | |||
29 | #define CAL_F0 625. |
|
29 | #define CAL_F0 625. | |
30 | #define CAL_F1 10000. |
|
30 | #define CAL_F1 10000. | |
31 | #define CAL_W0 (2. * pi * CAL_F0) |
|
31 | #define CAL_W0 (2. * pi * CAL_F0) | |
32 | #define CAL_W1 (2. * pi * CAL_F1) |
|
32 | #define CAL_W1 (2. * pi * CAL_F1) | |
33 | #define CAL_A0 1. |
|
33 | #define CAL_A0 1. | |
34 | #define CAL_A1 2. |
|
34 | #define CAL_A1 2. | |
35 | #define CAL_FS 160256.410 |
|
35 | #define CAL_FS 160256.410 | |
36 | #define CAL_SCALE_FACTOR (0.250 / 0.000654) // 191, 500 mVpp, 2 sinus waves => 500 mVpp each, amplitude = 250 mV |
|
36 | #define CAL_SCALE_FACTOR (0.250 / 0.000654) // 191, 500 mVpp, 2 sinus waves => 500 mVpp each, amplitude = 250 mV | |
37 | #define CAL_NB_PTS 256 |
|
37 | #define CAL_NB_PTS 256 | |
38 | #define CAL_DATA_MASK 0xfff |
|
38 | #define CAL_DATA_MASK 0xfff | |
39 | #define CAL_F_DIVISOR 38 // 25 MHz => 160 256 (39 - 1) |
|
39 | #define CAL_F_DIVISOR 38 // 25 MHz => 160 256 (39 - 1) | |
40 | #define CAL_F_DIVISOR_MIN 38 |
|
40 | #define CAL_F_DIVISOR_MIN 38 | |
41 | #define CAL_F_DIVISOR_MAX (38*2*2*2*2) |
|
41 | #define CAL_F_DIVISOR_MAX (38*2*2*2*2) | |
42 | // INTERLEAVED MODE |
|
42 | // INTERLEAVED MODE | |
43 | #define CAL_FS_INTER 240384.615 |
|
43 | #define CAL_FS_INTER 240384.615 | |
44 | #define CAL_NB_PTS_INTER 384 |
|
44 | #define CAL_NB_PTS_INTER 384 | |
45 | #define CAL_DATA_MASK_INTER 0x3f |
|
45 | #define CAL_DATA_MASK_INTER 0x3f | |
46 | #define CAL_DATA_SHIFT_INTER 12 |
|
46 | #define CAL_DATA_SHIFT_INTER 12 | |
47 | #define BYTES_FOR_2_SAMPLES 3 // one need 3 bytes = 24 bits to store 3 samples of 12 bits in interleaved mode |
|
47 | #define BYTES_FOR_2_SAMPLES 3 // one need 3 bytes = 24 bits to store 3 samples of 12 bits in interleaved mode | |
48 | #define STEPS_FOR_STORAGE_INTER 128 |
|
48 | #define STEPS_FOR_STORAGE_INTER 128 | |
49 | #define CAL_F_DIVISOR_INTER 26 // 25 MHz => 240 384 |
|
49 | #define CAL_F_DIVISOR_INTER 26 // 25 MHz => 240 384 | |
50 |
|
50 | |||
51 | extern unsigned int lastValidEnterModeTime; |
|
51 | extern unsigned int lastValidEnterModeTime; | |
52 | extern unsigned char oneTcLfrUpdateTimeReceived; |
|
52 | extern unsigned char oneTcLfrUpdateTimeReceived; | |
53 |
|
53 | |||
54 | //**** |
|
|||
55 | // ISR |
|
|||
56 | rtems_isr commutation_isr1( rtems_vector_number vector ); |
|
|||
57 | rtems_isr commutation_isr2( rtems_vector_number vector ); |
|
|||
58 |
|
||||
59 | //*********** |
|
54 | //*********** | |
60 | // RTEMS TASK |
|
55 | // RTEMS TASK | |
61 | rtems_task actn_task( rtems_task_argument unused ); |
|
56 | rtems_task actn_task( rtems_task_argument unused ); | |
62 |
|
57 | |||
63 | //*********** |
|
58 | //*********** | |
64 | // TC ACTIONS |
|
59 | // TC ACTIONS | |
65 | int action_reset( ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time ); |
|
60 | int action_reset( ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time ); | |
66 | int action_enter_mode(ccsdsTelecommandPacket_t *TC, rtems_id queue_id); |
|
61 | int action_enter_mode(ccsdsTelecommandPacket_t *TC, rtems_id queue_id); | |
67 | int action_update_info( ccsdsTelecommandPacket_t *TC, rtems_id queue_id ); |
|
62 | int action_update_info( ccsdsTelecommandPacket_t *TC, rtems_id queue_id ); | |
68 | int action_enable_calibration( ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time ); |
|
63 | int action_enable_calibration( ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time ); | |
69 | int action_disable_calibration( ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time ); |
|
64 | int action_disable_calibration( ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time ); | |
70 | int action_update_time( ccsdsTelecommandPacket_t *TC); |
|
65 | int action_update_time( ccsdsTelecommandPacket_t *TC); | |
71 |
|
66 | |||
72 | // mode transition |
|
67 | // mode transition | |
73 | int check_mode_value( unsigned char requestedMode ); |
|
68 | int check_mode_value( unsigned char requestedMode ); | |
74 | int check_mode_transition( unsigned char requestedMode ); |
|
69 | int check_mode_transition( unsigned char requestedMode ); | |
75 | void update_last_valid_transition_date( unsigned int transitionCoarseTime ); |
|
70 | void update_last_valid_transition_date( unsigned int transitionCoarseTime ); | |
76 | int check_transition_date( unsigned int transitionCoarseTime ); |
|
71 | int check_transition_date( unsigned int transitionCoarseTime ); | |
77 | int stop_spectral_matrices( void ); |
|
72 | int stop_spectral_matrices( void ); | |
78 | int stop_current_mode( void ); |
|
73 | int stop_current_mode( void ); | |
79 | int enter_mode_standby(void ); |
|
74 | int enter_mode_standby(void ); | |
80 | int enter_mode_normal( unsigned int transitionCoarseTime ); |
|
75 | int enter_mode_normal( unsigned int transitionCoarseTime ); | |
81 | int enter_mode_burst( unsigned int transitionCoarseTime ); |
|
76 | int enter_mode_burst( unsigned int transitionCoarseTime ); | |
82 | int enter_mode_sbm1( unsigned int transitionCoarseTime ); |
|
77 | int enter_mode_sbm1( unsigned int transitionCoarseTime ); | |
83 | int enter_mode_sbm2( unsigned int transitionCoarseTime ); |
|
78 | int enter_mode_sbm2( unsigned int transitionCoarseTime ); | |
84 | int restart_science_tasks( unsigned char lfrRequestedMode ); |
|
79 | int restart_science_tasks( unsigned char lfrRequestedMode ); | |
85 | int restart_asm_tasks(unsigned char lfrRequestedMode ); |
|
80 | int restart_asm_tasks(unsigned char lfrRequestedMode ); | |
86 | int suspend_science_tasks(void); |
|
81 | int suspend_science_tasks(void); | |
87 | int suspend_asm_tasks( void ); |
|
82 | int suspend_asm_tasks( void ); | |
88 | void launch_waveform_picker( unsigned char mode , unsigned int transitionCoarseTime ); |
|
83 | void launch_waveform_picker( unsigned char mode , unsigned int transitionCoarseTime ); | |
89 | void launch_spectral_matrix( void ); |
|
84 | void launch_spectral_matrix( void ); | |
90 | void set_sm_irq_onNewMatrix( unsigned char value ); |
|
85 | void set_sm_irq_onNewMatrix( unsigned char value ); | |
91 | void set_sm_irq_onError( unsigned char value ); |
|
86 | void set_sm_irq_onError( unsigned char value ); | |
92 |
|
87 | |||
93 | // other functions |
|
88 | // other functions | |
94 | void updateLFRCurrentMode(unsigned char requestedMode); |
|
89 | void updateLFRCurrentMode(unsigned char requestedMode); | |
95 | void set_lfr_soft_reset( unsigned char value ); |
|
90 | void set_lfr_soft_reset( unsigned char value ); | |
96 | void reset_lfr( void ); |
|
91 | void reset_lfr( void ); | |
97 | // CALIBRATION |
|
92 | // CALIBRATION | |
98 | void setCalibrationPrescaler( unsigned int prescaler ); |
|
93 | void setCalibrationPrescaler( unsigned int prescaler ); | |
99 | void setCalibrationDivisor( unsigned int divisionFactor ); |
|
94 | void setCalibrationDivisor( unsigned int divisionFactor ); | |
100 | void setCalibrationData( void ); |
|
95 | void setCalibrationData( void ); | |
101 | void setCalibrationReload( bool state); |
|
96 | void setCalibrationReload( bool state); | |
102 | void setCalibrationEnable( bool state ); |
|
97 | void setCalibrationEnable( bool state ); | |
103 | void setCalibrationInterleaved( bool state ); |
|
98 | void setCalibrationInterleaved( bool state ); | |
104 | void setCalibration( bool state ); |
|
99 | void setCalibration( bool state ); | |
105 | void configureCalibration( bool interleaved ); |
|
100 | void configureCalibration( bool interleaved ); | |
106 | // |
|
101 | // | |
107 | void update_last_TC_exe( ccsdsTelecommandPacket_t *TC , unsigned char *time ); |
|
102 | void update_last_TC_exe( ccsdsTelecommandPacket_t *TC , unsigned char *time ); | |
108 | void update_last_TC_rej(ccsdsTelecommandPacket_t *TC , unsigned char *time ); |
|
103 | void update_last_TC_rej(ccsdsTelecommandPacket_t *TC , unsigned char *time ); | |
109 | void close_action( ccsdsTelecommandPacket_t *TC, int result, rtems_id queue_id ); |
|
104 | void close_action( ccsdsTelecommandPacket_t *TC, int result, rtems_id queue_id ); | |
110 |
|
105 | |||
111 | extern rtems_status_code get_message_queue_id_send( rtems_id *queue_id ); |
|
106 | extern rtems_status_code get_message_queue_id_send( rtems_id *queue_id ); | |
112 | extern rtems_status_code get_message_queue_id_recv( rtems_id *queue_id ); |
|
107 | extern rtems_status_code get_message_queue_id_recv( rtems_id *queue_id ); | |
113 |
|
108 | |||
114 | #endif // TC_HANDLER_H_INCLUDED |
|
109 | #endif // TC_HANDLER_H_INCLUDED | |
115 |
|
110 | |||
116 |
|
111 | |||
117 |
|
112 |
@@ -1,20 +1,20 | |||||
1 |
cmake_minimum_required(VERSION 3. |
|
1 | cmake_minimum_required(VERSION 3.5) | |
2 | project(libgcov C) |
|
2 | project(libgcov C) | |
3 | include(sparc-rtems) |
|
3 | include(sparc-rtems) | |
4 | include(cppcheck) |
|
4 | include(cppcheck) | |
5 |
|
5 | |||
6 | set(LIB_GCOV_SOURCES |
|
6 | set(LIB_GCOV_SOURCES | |
7 | gcov-io.c |
|
7 | gcov-io.c | |
8 | gcov-io.h |
|
8 | gcov-io.h | |
9 | gcov-iov.h |
|
9 | gcov-iov.h | |
10 | libgcov.c |
|
10 | libgcov.c | |
11 | ) |
|
11 | ) | |
12 | if(Coverage) |
|
12 | if(Coverage) | |
13 |
|
|
13 | add_definitions(-DGCOV_USE_EXIT) | |
14 | add_definitions(-DGCOV_ENABLED) |
|
14 | add_definitions(-DGCOV_ENABLED) | |
15 | endif() |
|
15 | endif() | |
16 | add_library(gcov STATIC ${LIB_GCOV_SOURCES}) |
|
16 | add_library(gcov STATIC ${LIB_GCOV_SOURCES}) | |
17 |
|
17 | |||
18 | add_custom_target(gcovr |
|
18 | add_custom_target(gcovr | |
19 | COMMAND gcovr --exclude='.*gcov.*' --gcov-executable=${rtems_dir}/bin/sparc-rtems-gcov --object-directory ${CMAKE_BINARY_DIR} -r ${CMAKE_SOURCE_DIR} --html --html-details -o ${CMAKE_CURRENT_BINARY_DIR}/gcov.html && xdg-open ${CMAKE_CURRENT_BINARY_DIR}/gcov.html |
|
19 | COMMAND gcovr --exclude='.*gcov.*' --gcov-executable=${rtems_dir}/bin/sparc-rtems-gcov --object-directory ${CMAKE_BINARY_DIR} -r ${CMAKE_SOURCE_DIR} --html --html-details -o ${CMAKE_CURRENT_BINARY_DIR}/gcov.html && xdg-open ${CMAKE_CURRENT_BINARY_DIR}/gcov.html | |
20 | ) |
|
20 | ) |
@@ -1,39 +1,39 | |||||
1 | set(rtems_dir /opt/rtems-4.10/) |
|
1 | set(rtems_dir /opt/rtems-4.10/) | |
2 |
|
2 | |||
3 | set(CMAKE_SYSTEM_NAME rtems) |
|
3 | set(CMAKE_SYSTEM_NAME rtems) | |
4 | set(CMAKE_C_COMPILER ${rtems_dir}/bin/sparc-rtems-gcc) |
|
4 | set(CMAKE_C_COMPILER ${rtems_dir}/bin/sparc-rtems-gcc) | |
5 | set(CMAKE_CXX_COMPILER ${rtems_dir}/bin/sparc-rtems-g++) |
|
5 | set(CMAKE_CXX_COMPILER ${rtems_dir}/bin/sparc-rtems-g++) | |
6 | set(CMAKE_LINKER ${rtems_dir}/bin/sparc-rtems-g++) |
|
6 | set(CMAKE_LINKER ${rtems_dir}/bin/sparc-rtems-g++) | |
7 | SET(CMAKE_EXE_LINKER_FLAGS "-static") |
|
7 | SET(CMAKE_EXE_LINKER_FLAGS "-static") | |
8 | option(fix-b2bst "Activate -mfix-b2bst switch to mitigate \"LEON3FT Stale Cache Entry After Store with Data Tag Parity Error\" errata, GRLIB-TN-0009" ON) |
|
8 | option(fix-b2bst "Activate -mfix-b2bst switch to mitigate \"LEON3FT Stale Cache Entry After Store with Data Tag Parity Error\" errata, GRLIB-TN-0009" ON) | |
9 |
|
9 | |||
10 | option(Coverage "Enables code coverage" OFF) |
|
10 | option(Coverage "Enables code coverage" OFF) | |
11 |
|
11 | |||
12 |
|
12 | |||
13 | set(CMAKE_C_FLAGS_RELEASE "-O2") |
|
13 | set(CMAKE_C_FLAGS_RELEASE "-O2") | |
14 | set(CMAKE_C_FLAGS_DEBUG "-O2 -g -fno-inline") |
|
14 | set(CMAKE_C_FLAGS_DEBUG "-O2 -g3 -fno-inline") | |
15 |
|
15 | |||
16 |
|
16 | |||
17 | if(fix-b2bst) |
|
17 | if(fix-b2bst) | |
18 | set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -mfix-b2bst") |
|
18 | set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -mfix-b2bst") | |
19 | set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -mfix-b2bst") |
|
19 | set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -mfix-b2bst") | |
20 | endif() |
|
20 | endif() | |
21 |
|
21 | |||
22 |
|
22 | |||
23 | set(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <FLAGS> -Xlinker -Map=<TARGET>.map <CMAKE_CXX_LINK_FLAGS> <LINK_FLAGS> <OBJECTS> -o <TARGET> <LINK_LIBRARIES>") |
|
23 | set(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <FLAGS> -Xlinker -Map=<TARGET>.map <CMAKE_CXX_LINK_FLAGS> <LINK_FLAGS> <OBJECTS> -o <TARGET> <LINK_LIBRARIES>") | |
24 |
|
24 | |||
25 | include_directories("${rtems_dir}/sparc-rtems/leon3/lib/include") |
|
25 | include_directories("${rtems_dir}/sparc-rtems/leon3/lib/include") | |
26 |
|
26 | |||
27 | function (check_b2bst target bin) |
|
27 | function (check_b2bst target bin) | |
28 | add_custom_command(TARGET ${target} |
|
28 | add_custom_command(TARGET ${target} | |
29 | POST_BUILD |
|
29 | POST_BUILD | |
30 | COMMAND ${rtems_dir}/bin/sparc-rtems-objdump -d ${bin}/${target} | ${CMAKE_SOURCE_DIR}/sparc/leon3ft-b2bst-scan.tcl |
|
30 | COMMAND ${rtems_dir}/bin/sparc-rtems-objdump -d ${bin}/${target} | ${CMAKE_SOURCE_DIR}/sparc/leon3ft-b2bst-scan.tcl | |
31 | ) |
|
31 | ) | |
32 | endfunction() |
|
32 | endfunction() | |
33 |
|
33 | |||
34 | function (build_srec target bin rev) |
|
34 | function (build_srec target bin rev) | |
35 | add_custom_command(TARGET ${target} |
|
35 | add_custom_command(TARGET ${target} | |
36 | POST_BUILD |
|
36 | POST_BUILD | |
37 | COMMAND ${rtems_dir}/bin/sparc-rtems-objcopy -j .data -F srec ${bin}/${target} RpwLfrApp_XXXX_data_rev-${rev}.srec && ${rtems_dir}/bin/sparc-rtems-objcopy -j .text -F srec ${bin}/${target} RpwLfrApp_XXXX_text_rev-${rev}.srec |
|
37 | COMMAND ${rtems_dir}/bin/sparc-rtems-objcopy -j .data -F srec ${bin}/${target} RpwLfrApp_XXXX_data_rev-${rev}.srec && ${rtems_dir}/bin/sparc-rtems-objcopy -j .text -F srec ${bin}/${target} RpwLfrApp_XXXX_text_rev-${rev}.srec | |
38 | ) |
|
38 | ) | |
39 | endfunction() |
|
39 | endfunction() |
@@ -1,130 +1,136 | |||||
1 |
cmake_minimum_required (VERSION 3. |
|
1 | cmake_minimum_required (VERSION 3.5) | |
2 | project (fsw) |
|
2 | project (fsw) | |
3 |
|
3 | |||
4 | include(sparc-rtems) |
|
4 | include(sparc-rtems) | |
5 | include(cppcheck) |
|
5 | include(cppcheck) | |
6 |
|
6 | |||
7 | include_directories("../header" |
|
7 | include_directories("../header" | |
8 |
|
|
8 | "../header/lfr_common_headers" | |
9 |
|
|
9 | "../header/processing" | |
10 |
|
|
10 | "../LFR_basic-parameters" | |
11 |
|
|
11 | "../src") | |
12 |
|
12 | |||
13 | set(SOURCES wf_handler.c |
|
13 | set(SOURCES wf_handler.c | |
14 |
|
|
14 | tc_handler.c | |
15 |
|
|
15 | fsw_misc.c | |
16 |
|
|
16 | fsw_init.c | |
17 |
|
|
17 | fsw_globals.c | |
18 |
|
|
18 | fsw_spacewire.c | |
19 |
|
|
19 | tc_load_dump_parameters.c | |
20 |
|
|
20 | tm_lfr_tc_exe.c | |
21 |
|
|
21 | tc_acceptance.c | |
22 |
|
|
22 | processing/fsw_processing.c | |
23 |
|
|
23 | processing/avf0_prc0.c | |
24 |
|
|
24 | processing/avf1_prc1.c | |
25 |
|
|
25 | processing/avf2_prc2.c | |
26 |
|
|
26 | lfr_cpu_usage_report.c | |
27 |
|
|
27 | ${LFR_BP_SRC} | |
28 |
|
|
28 | ../header/wf_handler.h | |
29 |
|
|
29 | ../header/tc_handler.h | |
30 |
|
|
30 | ../header/grlib_regs.h | |
31 |
|
|
31 | ../header/fsw_misc.h | |
32 |
|
|
32 | ../header/fsw_init.h | |
33 |
|
|
33 | ../header/fsw_spacewire.h | |
34 |
|
|
34 | ../header/tc_load_dump_parameters.h | |
35 |
|
|
35 | ../header/tm_lfr_tc_exe.h | |
36 |
|
|
36 | ../header/tc_acceptance.h | |
37 |
|
|
37 | ../header/processing/fsw_processing.h | |
38 |
|
|
38 | ../header/processing/avf0_prc0.h | |
39 |
|
|
39 | ../header/processing/avf1_prc1.h | |
40 |
|
|
40 | ../header/processing/avf2_prc2.h | |
41 |
|
|
41 | ../header/fsw_params_wf_handler.h | |
42 |
|
|
42 | ../header/lfr_cpu_usage_report.h | |
43 |
|
|
43 | ../header/lfr_common_headers/ccsds_types.h | |
44 |
|
|
44 | ../header/lfr_common_headers/fsw_params.h | |
45 |
|
|
45 | ../header/lfr_common_headers/fsw_params_nb_bytes.h | |
46 |
|
|
46 | ../header/lfr_common_headers/fsw_params_processing.h | |
47 |
|
|
47 | ../header/lfr_common_headers/tm_byte_positions.h | |
48 |
|
|
48 | ../LFR_basic-parameters/basic_parameters.h | |
49 |
|
|
49 | ../LFR_basic-parameters/basic_parameters_params.h | |
50 |
|
|
50 | ../header/GscMemoryLPP.hpp | |
51 | ) |
|
51 | ) | |
52 |
|
52 | |||
53 |
|
53 | |||
54 | option(FSW_verbose "Enable verbose LFR" OFF) |
|
54 | option(FSW_verbose "Enable verbose LFR" OFF) | |
55 | option(FSW_boot_messages "Enable LFR boot messages" OFF) |
|
55 | option(FSW_boot_messages "Enable LFR boot messages" OFF) | |
56 | option(FSW_debug_messages "Enable LFR debug messages" OFF) |
|
56 | option(FSW_debug_messages "Enable LFR debug messages" OFF) | |
57 | option(FSW_cpu_usage_report "Enable LFR cpu usage report" OFF) |
|
57 | option(FSW_cpu_usage_report "Enable LFR cpu usage report" OFF) | |
58 | option(FSW_stack_report "Enable LFR stack report" OFF) |
|
58 | option(FSW_stack_report "Enable LFR stack report" OFF) | |
59 | option(FSW_vhdl_dev "?" OFF) |
|
59 | option(FSW_vhdl_dev "?" OFF) | |
60 | option(FSW_lpp_dpu_destid "Set to debug at LPP" OFF) |
|
60 | option(FSW_lpp_dpu_destid "Set to debug at LPP" OFF) | |
61 | option(FSW_debug_watchdog "Enable debug watchdog" OFF) |
|
61 | option(FSW_debug_watchdog "Enable debug watchdog" OFF) | |
62 | option(FSW_debug_tch "?" OFF) |
|
62 | option(FSW_debug_tch "?" OFF) | |
63 | option(FSW_Instrument_Scrubbing "Enable scrubbing counter" OFF) |
|
63 | option(FSW_Instrument_Scrubbing "Enable scrubbing counter" OFF) | |
|
64 | option(FSW_Enable_Dead_Code "Enable dead code compilation, this is used to hide by default unused code." OFF) | |||
64 |
|
65 | |||
65 | set(SW_VERSION_N1 "3" CACHE STRING "Choose N1 FSW Version." FORCE) |
|
66 | set(SW_VERSION_N1 "3" CACHE STRING "Choose N1 FSW Version." FORCE) | |
66 | set(SW_VERSION_N2 "2" CACHE STRING "Choose N2 FSW Version." FORCE) |
|
67 | set(SW_VERSION_N2 "2" CACHE STRING "Choose N2 FSW Version." FORCE) | |
67 | set(SW_VERSION_N3 "0" CACHE STRING "Choose N3 FSW Version." FORCE) |
|
68 | set(SW_VERSION_N3 "0" CACHE STRING "Choose N3 FSW Version." FORCE) | |
68 | set(SW_VERSION_N4 "22" CACHE STRING "Choose N4 FSW Version." FORCE) |
|
69 | set(SW_VERSION_N4 "22" CACHE STRING "Choose N4 FSW Version." FORCE) | |
69 |
|
70 | |||
70 | if(FSW_verbose) |
|
71 | if(FSW_verbose) | |
71 |
|
|
72 | add_definitions(-DPRINT_MESSAGES_ON_CONSOLE) | |
72 | endif() |
|
73 | endif() | |
73 | if(FSW_boot_messages) |
|
74 | if(FSW_boot_messages) | |
74 |
|
|
75 | add_definitions(-DBOOT_MESSAGES) | |
75 | endif() |
|
76 | endif() | |
76 | if(FSW_debug_messages) |
|
77 | if(FSW_debug_messages) | |
77 |
|
|
78 | add_definitions(-DDEBUG_MESSAGES) | |
78 | endif() |
|
79 | endif() | |
79 | if(FSW_cpu_usage_report) |
|
80 | if(FSW_cpu_usage_report) | |
80 |
|
|
81 | add_definitions(-DPRINT_TASK_STATISTICS) | |
81 | endif() |
|
82 | endif() | |
82 | if(FSW_stack_report) |
|
83 | if(FSW_stack_report) | |
83 |
|
|
84 | add_definitions(-DPRINT_STACK_REPORT) | |
84 | endif() |
|
85 | endif() | |
85 | if(FSW_vhdl_dev) |
|
86 | if(FSW_vhdl_dev) | |
86 |
|
|
87 | add_definitions(-DVHDL_DEV) | |
87 | endif() |
|
88 | endif() | |
88 | if(FSW_lpp_dpu_destid) |
|
89 | if(FSW_lpp_dpu_destid) | |
89 |
|
|
90 | add_definitions(-DLPP_DPU_DESTID) | |
90 | endif() |
|
91 | endif() | |
91 | if(FSW_debug_watchdog) |
|
92 | if(FSW_debug_watchdog) | |
92 |
|
|
93 | add_definitions(-DDEBUG_WATCHDOG) | |
93 | endif() |
|
94 | endif() | |
94 | if(FSW_debug_tch) |
|
95 | if(FSW_debug_tch) | |
95 |
|
|
96 | add_definitions(-DDEBUG_TCH) | |
96 | endif() |
|
97 | endif() | |
97 |
|
98 | |||
|
99 | if(FSW_Enable_Dead_Code) | |||
|
100 | add_definitions(-DENABLE_DEAD_CODE) | |||
|
101 | endif() | |||
|
102 | ||||
|
103 | ||||
98 |
|
104 | |||
99 |
|
105 | |||
100 | add_definitions(-DMSB_FIRST_TCH) |
|
106 | add_definitions(-DMSB_FIRST_TCH) | |
101 |
|
107 | |||
102 | add_definitions(-DSWVERSION=-1-0) |
|
108 | add_definitions(-DSWVERSION=-1-0) | |
103 | add_definitions(-DSW_VERSION_N1=${SW_VERSION_N1}) |
|
109 | add_definitions(-DSW_VERSION_N1=${SW_VERSION_N1}) | |
104 | add_definitions(-DSW_VERSION_N2=${SW_VERSION_N2}) |
|
110 | add_definitions(-DSW_VERSION_N2=${SW_VERSION_N2}) | |
105 | add_definitions(-DSW_VERSION_N3=${SW_VERSION_N3}) |
|
111 | add_definitions(-DSW_VERSION_N3=${SW_VERSION_N3}) | |
106 | add_definitions(-DSW_VERSION_N4=${SW_VERSION_N4}) |
|
112 | add_definitions(-DSW_VERSION_N4=${SW_VERSION_N4}) | |
107 |
|
113 | |||
108 | add_executable(fsw ${SOURCES}) |
|
114 | add_executable(fsw ${SOURCES}) | |
109 |
|
115 | |||
110 | if(FSW_Instrument_Scrubbing) |
|
116 | if(FSW_Instrument_Scrubbing) | |
111 | add_definitions(-DENABLE_SCRUBBING_COUNTER) |
|
117 | add_definitions(-DENABLE_SCRUBBING_COUNTER) | |
112 | endif() |
|
118 | endif() | |
113 |
|
119 | |||
114 | if(Coverage) |
|
120 | if(Coverage) | |
115 | target_link_libraries(fsw gcov) |
|
121 | target_link_libraries(fsw gcov) | |
116 | SET_TARGET_PROPERTIES(fsw PROPERTIES COMPILE_FLAGS "-fprofile-arcs -ftest-coverage") |
|
122 | SET_TARGET_PROPERTIES(fsw PROPERTIES COMPILE_FLAGS "-fprofile-arcs -ftest-coverage") | |
117 | endif() |
|
123 | endif() | |
118 |
|
124 | |||
119 |
|
125 | |||
120 | if(fix-b2bst) |
|
126 | if(fix-b2bst) | |
121 | check_b2bst(fsw ${CMAKE_CURRENT_BINARY_DIR}) |
|
127 | check_b2bst(fsw ${CMAKE_CURRENT_BINARY_DIR}) | |
122 | endif() |
|
128 | endif() | |
123 |
|
129 | |||
124 | if(NOT FSW_lpp_dpu_destid) |
|
130 | if(NOT FSW_lpp_dpu_destid) | |
125 | build_srec(fsw ${CMAKE_CURRENT_BINARY_DIR} "${SW_VERSION_N1}-${SW_VERSION_N2}-${SW_VERSION_N3}-${SW_VERSION_N4}") |
|
131 | build_srec(fsw ${CMAKE_CURRENT_BINARY_DIR} "${SW_VERSION_N1}-${SW_VERSION_N2}-${SW_VERSION_N3}-${SW_VERSION_N4}") | |
126 | endif() |
|
132 | endif() | |
127 |
|
133 | |||
128 |
|
134 | |||
129 | #add_test_cppcheck(fsw STYLE UNUSED_FUNCTIONS POSSIBLE_ERROR MISSING_INCLUDE) |
|
135 | #add_test_cppcheck(fsw STYLE UNUSED_FUNCTIONS POSSIBLE_ERROR MISSING_INCLUDE) | |
130 |
|
136 |
@@ -1,1109 +1,1111 | |||||
1 | /*------------------------------------------------------------------------------ |
|
1 | /*------------------------------------------------------------------------------ | |
2 | -- Solar Orbiter's Low Frequency Receiver Flight Software (LFR FSW), |
|
2 | -- Solar Orbiter's Low Frequency Receiver Flight Software (LFR FSW), | |
3 | -- This file is a part of the LFR FSW |
|
3 | -- This file is a part of the LFR FSW | |
4 | -- Copyright (C) 2012-2018, Plasma Physics Laboratory - CNRS |
|
4 | -- Copyright (C) 2012-2018, Plasma Physics Laboratory - CNRS | |
5 | -- |
|
5 | -- | |
6 | -- This program is free software; you can redistribute it and/or modify |
|
6 | -- This program is free software; you can redistribute it and/or modify | |
7 | -- it under the terms of the GNU General Public License as published by |
|
7 | -- it under the terms of the GNU General Public License as published by | |
8 | -- the Free Software Foundation; either version 2 of the License, or |
|
8 | -- the Free Software Foundation; either version 2 of the License, or | |
9 | -- (at your option) any later version. |
|
9 | -- (at your option) any later version. | |
10 | -- |
|
10 | -- | |
11 | -- This program is distributed in the hope that it will be useful, |
|
11 | -- This program is distributed in the hope that it will be useful, | |
12 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | -- GNU General Public License for more details. |
|
14 | -- GNU General Public License for more details. | |
15 | -- |
|
15 | -- | |
16 | -- You should have received a copy of the GNU General Public License |
|
16 | -- You should have received a copy of the GNU General Public License | |
17 | -- along with this program; if not, write to the Free Software |
|
17 | -- along with this program; if not, write to the Free Software | |
18 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | -------------------------------------------------------------------------------*/ |
|
19 | -------------------------------------------------------------------------------*/ | |
20 | /*-- Author : Paul Leroy |
|
20 | /*-- Author : Paul Leroy | |
21 | -- Contact : Alexis Jeandet |
|
21 | -- Contact : Alexis Jeandet | |
22 | -- Mail : alexis.jeandet@lpp.polytechnique.fr |
|
22 | -- Mail : alexis.jeandet@lpp.polytechnique.fr | |
23 | ----------------------------------------------------------------------------*/ |
|
23 | ----------------------------------------------------------------------------*/ | |
24 |
|
24 | |||
25 | /** General usage functions and RTEMS tasks. |
|
25 | /** General usage functions and RTEMS tasks. | |
26 | * |
|
26 | * | |
27 | * @file |
|
27 | * @file | |
28 | * @author P. LEROY |
|
28 | * @author P. LEROY | |
29 | * |
|
29 | * | |
30 | */ |
|
30 | */ | |
31 |
|
31 | |||
32 | #include "fsw_misc.h" |
|
32 | #include "fsw_misc.h" | |
33 |
|
33 | |||
34 | int16_t hk_lfr_sc_v_f3_as_int16 = 0; |
|
34 | int16_t hk_lfr_sc_v_f3_as_int16 = 0; | |
35 | int16_t hk_lfr_sc_e1_f3_as_int16 = 0; |
|
35 | int16_t hk_lfr_sc_e1_f3_as_int16 = 0; | |
36 | int16_t hk_lfr_sc_e2_f3_as_int16 = 0; |
|
36 | int16_t hk_lfr_sc_e2_f3_as_int16 = 0; | |
37 |
|
37 | |||
38 | void timer_configure(unsigned char timer, unsigned int clock_divider, |
|
38 | void timer_configure(unsigned char timer, unsigned int clock_divider, | |
39 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) |
|
39 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) | |
40 | { |
|
40 | { | |
41 | /** This function configures a GPTIMER timer instantiated in the VHDL design. |
|
41 | /** This function configures a GPTIMER timer instantiated in the VHDL design. | |
42 | * |
|
42 | * | |
43 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
43 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
44 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
44 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
45 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
|
45 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. | |
46 | * @param interrupt_level is the interrupt level that the timer drives. |
|
46 | * @param interrupt_level is the interrupt level that the timer drives. | |
47 | * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. |
|
47 | * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. | |
48 | * |
|
48 | * | |
49 | * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 |
|
49 | * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 | |
50 | * |
|
50 | * | |
51 | */ |
|
51 | */ | |
52 |
|
52 | |||
53 | rtems_status_code status; |
|
53 | rtems_status_code status; | |
54 | rtems_isr_entry old_isr_handler; |
|
54 | rtems_isr_entry old_isr_handler; | |
55 |
|
55 | |||
56 | old_isr_handler = NULL; |
|
56 | old_isr_handler = NULL; | |
57 |
|
57 | |||
58 | gptimer_regs->timer[timer].ctrl = INIT_CHAR; // reset the control register |
|
58 | gptimer_regs->timer[timer].ctrl = INIT_CHAR; // reset the control register | |
59 |
|
59 | |||
60 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels |
|
60 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels | |
61 | if (status!=RTEMS_SUCCESSFUL) |
|
61 | if (status!=RTEMS_SUCCESSFUL) | |
62 | { |
|
62 | { | |
63 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") |
|
63 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") | |
64 | } |
|
64 | } | |
65 |
|
65 | |||
66 | timer_set_clock_divider( timer, clock_divider); |
|
66 | timer_set_clock_divider( timer, clock_divider); | |
67 | } |
|
67 | } | |
68 |
|
68 | |||
|
69 | #ifdef ENABLE_DEAD_CODE | |||
69 | void timer_start(unsigned char timer) |
|
70 | void timer_start(unsigned char timer) | |
70 | { |
|
71 | { | |
71 | /** This function starts a GPTIMER timer. |
|
72 | /** This function starts a GPTIMER timer. | |
72 | * |
|
73 | * | |
73 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
74 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
74 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
75 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
75 | * |
|
76 | * | |
76 | */ |
|
77 | */ | |
77 |
|
78 | |||
78 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ; |
|
79 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ; | |
79 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_LD; |
|
80 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_LD; | |
80 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_EN; |
|
81 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_EN; | |
81 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_RS; |
|
82 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_RS; | |
82 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_IE; |
|
83 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_IE; | |
83 | } |
|
84 | } | |
|
85 | #endif | |||
84 |
|
86 | |||
85 | void timer_stop(unsigned char timer) |
|
87 | void timer_stop(unsigned char timer) | |
86 | { |
|
88 | { | |
87 | /** This function stops a GPTIMER timer. |
|
89 | /** This function stops a GPTIMER timer. | |
88 | * |
|
90 | * | |
89 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
91 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
90 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
92 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
91 | * |
|
93 | * | |
92 | */ |
|
94 | */ | |
93 |
|
95 | |||
94 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_EN_MASK; |
|
96 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_EN_MASK; | |
95 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_IE_MASK; |
|
97 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_IE_MASK; | |
96 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ; |
|
98 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ; | |
97 | } |
|
99 | } | |
98 |
|
100 | |||
99 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider) |
|
101 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider) | |
100 | { |
|
102 | { | |
101 | /** This function sets the clock divider of a GPTIMER timer. |
|
103 | /** This function sets the clock divider of a GPTIMER timer. | |
102 | * |
|
104 | * | |
103 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
105 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
104 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
106 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
105 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
|
107 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. | |
106 | * |
|
108 | * | |
107 | */ |
|
109 | */ | |
108 |
|
110 | |||
109 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz |
|
111 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz | |
110 | } |
|
112 | } | |
111 |
|
113 | |||
112 | // WATCHDOG, this ISR should never be triggered. |
|
114 | // WATCHDOG, this ISR should never be triggered. | |
113 |
|
115 | |||
114 | rtems_isr watchdog_isr( rtems_vector_number vector ) |
|
116 | rtems_isr watchdog_isr( rtems_vector_number vector ) | |
115 | { |
|
117 | { | |
116 | rtems_status_code status_code; |
|
118 | rtems_status_code status_code; | |
117 |
|
119 | |||
118 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 ); |
|
120 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 ); | |
119 |
|
121 | |||
120 | PRINTF("watchdog_isr *** this is the end, exit(0)\n"); |
|
122 | PRINTF("watchdog_isr *** this is the end, exit(0)\n"); | |
121 |
|
123 | |||
122 | exit(0); |
|
124 | exit(0); | |
123 | } |
|
125 | } | |
124 |
|
126 | |||
125 | void watchdog_configure(void) |
|
127 | void watchdog_configure(void) | |
126 | { |
|
128 | { | |
127 | /** This function configure the watchdog. |
|
129 | /** This function configure the watchdog. | |
128 | * |
|
130 | * | |
129 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
131 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
130 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
132 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
131 | * |
|
133 | * | |
132 | * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB. |
|
134 | * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB. | |
133 | * |
|
135 | * | |
134 | */ |
|
136 | */ | |
135 |
|
137 | |||
136 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration |
|
138 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration | |
137 |
|
139 | |||
138 | timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr ); |
|
140 | timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr ); | |
139 |
|
141 | |||
140 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt |
|
142 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt | |
141 | } |
|
143 | } | |
142 |
|
144 | |||
143 | void watchdog_stop(void) |
|
145 | void watchdog_stop(void) | |
144 | { |
|
146 | { | |
145 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line |
|
147 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line | |
146 | timer_stop( TIMER_WATCHDOG ); |
|
148 | timer_stop( TIMER_WATCHDOG ); | |
147 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt |
|
149 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt | |
148 | } |
|
150 | } | |
149 |
|
151 | |||
150 | void watchdog_reload(void) |
|
152 | void watchdog_reload(void) | |
151 | { |
|
153 | { | |
152 | /** This function reloads the watchdog timer counter with the timer reload value. |
|
154 | /** This function reloads the watchdog timer counter with the timer reload value. | |
153 | * |
|
155 | * | |
154 | * @param void |
|
156 | * @param void | |
155 | * |
|
157 | * | |
156 | * @return void |
|
158 | * @return void | |
157 | * |
|
159 | * | |
158 | */ |
|
160 | */ | |
159 |
|
161 | |||
160 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD; |
|
162 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD; | |
161 | } |
|
163 | } | |
162 |
|
164 | |||
163 | void watchdog_start(void) |
|
165 | void watchdog_start(void) | |
164 | { |
|
166 | { | |
165 | /** This function starts the watchdog timer. |
|
167 | /** This function starts the watchdog timer. | |
166 | * |
|
168 | * | |
167 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
169 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
168 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
170 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
169 | * |
|
171 | * | |
170 | */ |
|
172 | */ | |
171 |
|
173 | |||
172 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); |
|
174 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); | |
173 |
|
175 | |||
174 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_CLEAR_IRQ; |
|
176 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_CLEAR_IRQ; | |
175 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD; |
|
177 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD; | |
176 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_EN; |
|
178 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_EN; | |
177 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_IE; |
|
179 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_IE; | |
178 |
|
180 | |||
179 | LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG ); |
|
181 | LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG ); | |
180 |
|
182 | |||
181 | } |
|
183 | } | |
182 |
|
184 | |||
183 | int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register |
|
185 | int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register | |
184 | { |
|
186 | { | |
185 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
|
187 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; | |
186 |
|
188 | |||
187 | apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE; |
|
189 | apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE; | |
188 |
|
190 | |||
189 | return 0; |
|
191 | return 0; | |
190 | } |
|
192 | } | |
191 |
|
193 | |||
192 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) |
|
194 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) | |
193 | { |
|
195 | { | |
194 | /** This function sets the scaler reload register of the apbuart module |
|
196 | /** This function sets the scaler reload register of the apbuart module | |
195 | * |
|
197 | * | |
196 | * @param regs is the address of the apbuart registers in memory |
|
198 | * @param regs is the address of the apbuart registers in memory | |
197 | * @param value is the value that will be stored in the scaler register |
|
199 | * @param value is the value that will be stored in the scaler register | |
198 | * |
|
200 | * | |
199 | * The value shall be set by the software to get data on the serial interface. |
|
201 | * The value shall be set by the software to get data on the serial interface. | |
200 | * |
|
202 | * | |
201 | */ |
|
203 | */ | |
202 |
|
204 | |||
203 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; |
|
205 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; | |
204 |
|
206 | |||
205 | apbuart_regs->scaler = value; |
|
207 | apbuart_regs->scaler = value; | |
206 |
|
208 | |||
207 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) |
|
209 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) | |
208 | } |
|
210 | } | |
209 |
|
211 | |||
210 | /** |
|
212 | /** | |
211 | * @brief load_task starts and keeps the watchdog alive. |
|
213 | * @brief load_task starts and keeps the watchdog alive. | |
212 | * @param argument |
|
214 | * @param argument | |
213 | * @return |
|
215 | * @return | |
214 | */ |
|
216 | */ | |
215 |
|
217 | |||
216 | rtems_task load_task(rtems_task_argument argument) |
|
218 | rtems_task load_task(rtems_task_argument argument) | |
217 | { |
|
219 | { | |
218 | BOOT_PRINTF("in LOAD *** \n") |
|
220 | BOOT_PRINTF("in LOAD *** \n") | |
219 |
|
221 | |||
220 | rtems_status_code status; |
|
222 | rtems_status_code status; | |
221 | unsigned int i; |
|
223 | unsigned int i; | |
222 | unsigned int j; |
|
224 | unsigned int j; | |
223 | rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic |
|
225 | rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic | |
224 | rtems_id watchdog_period_id; // id of the watchdog rate monotonic period |
|
226 | rtems_id watchdog_period_id; // id of the watchdog rate monotonic period | |
225 |
|
227 | |||
226 | watchdog_period_id = RTEMS_ID_NONE; |
|
228 | watchdog_period_id = RTEMS_ID_NONE; | |
227 |
|
229 | |||
228 | name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' ); |
|
230 | name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' ); | |
229 |
|
231 | |||
230 | status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id ); |
|
232 | status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id ); | |
231 | if( status != RTEMS_SUCCESSFUL ) { |
|
233 | if( status != RTEMS_SUCCESSFUL ) { | |
232 | PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status ) |
|
234 | PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status ) | |
233 | } |
|
235 | } | |
234 |
|
236 | |||
235 | i = 0; |
|
237 | i = 0; | |
236 | j = 0; |
|
238 | j = 0; | |
237 |
|
239 | |||
238 | watchdog_configure(); |
|
240 | watchdog_configure(); | |
239 |
|
241 | |||
240 | watchdog_start(); |
|
242 | watchdog_start(); | |
241 |
|
243 | |||
242 | set_sy_lfr_watchdog_enabled( true ); |
|
244 | set_sy_lfr_watchdog_enabled( true ); | |
243 |
|
245 | |||
244 | while(1){ |
|
246 | while(1){ | |
245 | status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD ); |
|
247 | status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD ); | |
246 | watchdog_reload(); |
|
248 | watchdog_reload(); | |
247 | i = i + 1; |
|
249 | i = i + 1; | |
248 | if ( i == WATCHDOG_LOOP_PRINTF ) |
|
250 | if ( i == WATCHDOG_LOOP_PRINTF ) | |
249 | { |
|
251 | { | |
250 | i = 0; |
|
252 | i = 0; | |
251 | j = j + 1; |
|
253 | j = j + 1; | |
252 | PRINTF1("%d\n", j) |
|
254 | PRINTF1("%d\n", j) | |
253 | } |
|
255 | } | |
254 | #ifdef DEBUG_WATCHDOG |
|
256 | #ifdef DEBUG_WATCHDOG | |
255 | if (j == WATCHDOG_LOOP_DEBUG ) |
|
257 | if (j == WATCHDOG_LOOP_DEBUG ) | |
256 | { |
|
258 | { | |
257 | status = rtems_task_delete(RTEMS_SELF); |
|
259 | status = rtems_task_delete(RTEMS_SELF); | |
258 | } |
|
260 | } | |
259 | #endif |
|
261 | #endif | |
260 | } |
|
262 | } | |
261 | } |
|
263 | } | |
262 |
|
264 | |||
263 | /** |
|
265 | /** | |
264 | * @brief hous_task produces and sends HK each seconds |
|
266 | * @brief hous_task produces and sends HK each seconds | |
265 | * @param argument |
|
267 | * @param argument | |
266 | * @return |
|
268 | * @return | |
267 | */ |
|
269 | */ | |
268 | rtems_task hous_task(rtems_task_argument argument) |
|
270 | rtems_task hous_task(rtems_task_argument argument) | |
269 | { |
|
271 | { | |
270 | rtems_status_code status; |
|
272 | rtems_status_code status; | |
271 | rtems_status_code spare_status; |
|
273 | rtems_status_code spare_status; | |
272 | rtems_id queue_id; |
|
274 | rtems_id queue_id; | |
273 | rtems_rate_monotonic_period_status period_status; |
|
275 | rtems_rate_monotonic_period_status period_status; | |
274 | bool isSynchronized; |
|
276 | bool isSynchronized; | |
275 |
|
277 | |||
276 | queue_id = RTEMS_ID_NONE; |
|
278 | queue_id = RTEMS_ID_NONE; | |
277 | memset(&period_status, 0, sizeof(rtems_rate_monotonic_period_status)); |
|
279 | memset(&period_status, 0, sizeof(rtems_rate_monotonic_period_status)); | |
278 | isSynchronized = false; |
|
280 | isSynchronized = false; | |
279 |
|
281 | |||
280 | status = get_message_queue_id_send( &queue_id ); |
|
282 | status = get_message_queue_id_send( &queue_id ); | |
281 | if (status != RTEMS_SUCCESSFUL) |
|
283 | if (status != RTEMS_SUCCESSFUL) | |
282 | { |
|
284 | { | |
283 | PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status) |
|
285 | PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status) | |
284 | } |
|
286 | } | |
285 |
|
287 | |||
286 | BOOT_PRINTF("in HOUS ***\n"); |
|
288 | BOOT_PRINTF("in HOUS ***\n"); | |
287 |
|
289 | |||
288 | if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) { |
|
290 | if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) { | |
289 | status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id ); |
|
291 | status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id ); | |
290 | if( status != RTEMS_SUCCESSFUL ) { |
|
292 | if( status != RTEMS_SUCCESSFUL ) { | |
291 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ); |
|
293 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ); | |
292 | } |
|
294 | } | |
293 | } |
|
295 | } | |
294 |
|
296 | |||
295 | status = rtems_rate_monotonic_cancel(HK_id); |
|
297 | status = rtems_rate_monotonic_cancel(HK_id); | |
296 | if( status != RTEMS_SUCCESSFUL ) { |
|
298 | if( status != RTEMS_SUCCESSFUL ) { | |
297 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ); |
|
299 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ); | |
298 | } |
|
300 | } |