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1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 d4a9a4d748d56d86427bfe03a6777fae4cfe3ae1 header/lfr_common_headers
2 7c46de6059673d3239fcc7103e16510727f35923 header/lfr_common_headers
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1 #ifndef GRLIB_REGS_H_INCLUDED
1 #ifndef GRLIB_REGS_H_INCLUDED
2 #define GRLIB_REGS_H_INCLUDED
2 #define GRLIB_REGS_H_INCLUDED
3
3
4 #define NB_GPTIMER 3
4 #define NB_GPTIMER 3
5
5
6 struct apbuart_regs_str{
6 struct apbuart_regs_str{
7 volatile unsigned int data;
7 volatile unsigned int data;
8 volatile unsigned int status;
8 volatile unsigned int status;
9 volatile unsigned int ctrl;
9 volatile unsigned int ctrl;
10 volatile unsigned int scaler;
10 volatile unsigned int scaler;
11 volatile unsigned int fifoDebug;
11 volatile unsigned int fifoDebug;
12 };
12 };
13
13
14 struct grgpio_regs_str{
14 struct grgpio_regs_str{
15 volatile int io_port_data_register;
15 volatile int io_port_data_register;
16 int io_port_output_register;
16 int io_port_output_register;
17 int io_port_direction_register;
17 int io_port_direction_register;
18 int interrupt_mak_register;
18 int interrupt_mak_register;
19 int interrupt_polarity_register;
19 int interrupt_polarity_register;
20 int interrupt_edge_register;
20 int interrupt_edge_register;
21 int bypass_register;
21 int bypass_register;
22 int reserved;
22 int reserved;
23 // 0x20-0x3c interrupt map register(s)
23 // 0x20-0x3c interrupt map register(s)
24 };
24 };
25
25
26 typedef struct {
26 typedef struct {
27 volatile unsigned int counter;
27 volatile unsigned int counter;
28 volatile unsigned int reload;
28 volatile unsigned int reload;
29 volatile unsigned int ctrl;
29 volatile unsigned int ctrl;
30 volatile unsigned int unused;
30 volatile unsigned int unused;
31 } timer_regs_t;
31 } timer_regs_t;
32
32
33 //*************
33 //*************
34 //*************
34 //*************
35 // GPTIMER_REGS
35 // GPTIMER_REGS
36
36
37 #define GPTIMER_CLEAR_IRQ 0x00000010 // clear pending IRQ if any
37 #define GPTIMER_CLEAR_IRQ 0x00000010 // clear pending IRQ if any
38 #define GPTIMER_LD 0x00000004 // LD load value from the reload register
38 #define GPTIMER_LD 0x00000004 // LD load value from the reload register
39 #define GPTIMER_EN 0x00000001 // EN enable the timer
39 #define GPTIMER_EN 0x00000001 // EN enable the timer
40 #define GPTIMER_EN_MASK 0xfffffffe // EN enable the timer
40 #define GPTIMER_EN_MASK 0xfffffffe // EN enable the timer
41 #define GPTIMER_RS 0x00000002 // RS restart
41 #define GPTIMER_RS 0x00000002 // RS restart
42 #define GPTIMER_IE 0x00000008 // IE interrupt enable
42 #define GPTIMER_IE 0x00000008 // IE interrupt enable
43 #define GPTIMER_IE_MASK 0xffffffef // IE interrupt enable
43 #define GPTIMER_IE_MASK 0xffffffef // IE interrupt enable
44
44
45 typedef struct {
45 typedef struct {
46 volatile unsigned int scaler_value;
46 volatile unsigned int scaler_value;
47 volatile unsigned int scaler_reload;
47 volatile unsigned int scaler_reload;
48 volatile unsigned int conf;
48 volatile unsigned int conf;
49 volatile unsigned int unused0;
49 volatile unsigned int unused0;
50 timer_regs_t timer[NB_GPTIMER];
50 timer_regs_t timer[NB_GPTIMER];
51 } gptimer_regs_t;
51 } gptimer_regs_t;
52
52
53 //*********************
53 //*********************
54 //*********************
54 //*********************
55 // TIME_MANAGEMENT_REGS
55 // TIME_MANAGEMENT_REGS
56
56
57 #define VAL_SOFTWARE_RESET 0x02 // [0010] software reset
57 #define VAL_SOFTWARE_RESET 0x02 // [0010] software reset
58 #define VAL_LFR_SYNCHRONIZED 0x80000000
58 #define VAL_LFR_SYNCHRONIZED 0x80000000
59 #define BIT_SYNCHRONIZATION 31
59 #define BIT_SYNCHRONIZATION 31
60 #define COARSE_TIME_MASK 0x7fffffff
60 #define COARSE_TIME_MASK 0x7fffffff
61 #define SYNC_BIT_MASK 0x7f
61 #define SYNC_BIT_MASK 0x7f
62 #define SYNC_BIT 0x80
62 #define SYNC_BIT 0x80
63 #define BIT_CAL_RELOAD 0x00000010
63 #define BIT_CAL_RELOAD 0x00000010
64 #define MASK_CAL_RELOAD 0xffffffef // [1110 1111]
64 #define MASK_CAL_RELOAD 0xffffffef // [1110 1111]
65 #define BIT_CAL_ENABLE 0x00000040
65 #define BIT_CAL_ENABLE 0x00000040
66 #define MASK_CAL_ENABLE 0xffffffbf // [1011 1111]
66 #define MASK_CAL_ENABLE 0xffffffbf // [1011 1111]
67 #define BIT_SET_INTERLEAVED 0x00000020 // [0010 0000]
67 #define BIT_SET_INTERLEAVED 0x00000020 // [0010 0000]
68 #define MASK_SET_INTERLEAVED 0xffffffdf // [1101 1111]
68 #define MASK_SET_INTERLEAVED 0xffffffdf // [1101 1111]
69 #define BIT_SOFT_RESET 0x00000004 // [0100]
69 #define BIT_SOFT_RESET 0x00000004 // [0100]
70 #define MASK_SOFT_RESET 0xfffffffb // [1011]
70 #define MASK_SOFT_RESET 0xfffffffb // [1011]
71
71
72 typedef struct {
72 typedef struct {
73 volatile int ctrl; // bit 0 forces the load of the coarse_time_load value and resets the fine_time
73 volatile int ctrl; // bit 0 forces the load of the coarse_time_load value and resets the fine_time
74 // bit 1 is the soft reset for the time management module
74 // bit 1 is the soft reset for the time management module
75 // bit 2 is the soft reset for the waveform picker and the spectral matrix modules, set to 1 after HW reset
75 // bit 2 is the soft reset for the waveform picker and the spectral matrix modules, set to 1 after HW reset
76 volatile int coarse_time_load;
76 volatile int coarse_time_load;
77 volatile int coarse_time;
77 volatile int coarse_time;
78 volatile int fine_time;
78 volatile int fine_time;
79 // TEMPERATURES
79 // TEMPERATURES
80 volatile int temp_pcb; // SEL1 = 0 SEL0 = 0
80 volatile int temp_pcb; // SEL1 = 0 SEL0 = 0
81 volatile int temp_fpga; // SEL1 = 0 SEL0 = 1
81 volatile int temp_fpga; // SEL1 = 0 SEL0 = 1
82 volatile int temp_scm; // SEL1 = 1 SEL0 = 0
82 volatile int temp_scm; // SEL1 = 1 SEL0 = 0
83 // CALIBRATION
83 // CALIBRATION
84 volatile unsigned int calDACCtrl;
84 volatile unsigned int calDACCtrl;
85 volatile unsigned int calPrescaler;
85 volatile unsigned int calPrescaler;
86 volatile unsigned int calDivisor;
86 volatile unsigned int calDivisor;
87 volatile unsigned int calDataPtr;
87 volatile unsigned int calDataPtr;
88 volatile unsigned int calData;
88 volatile unsigned int calData;
89 } time_management_regs_t;
89 } time_management_regs_t;
90
90
91 //*********************
91 //*********************
92 //*********************
92 //*********************
93 // WAVEFORM_PICKER_REGS
93 // WAVEFORM_PICKER_REGS
94
94
95 #define BITS_WFP_STATUS_F3 0xc0 // [1100 0000] check the f3 full bits
95 #define BITS_WFP_STATUS_F3 0xc0 // [1100 0000] check the f3 full bits
96 #define BIT_WFP_BUF_F3_0 0x40 // [0100 0000] f3 buffer 0 is full
96 #define BIT_WFP_BUF_F3_0 0x40 // [0100 0000] f3 buffer 0 is full
97 #define BIT_WFP_BUF_F3_1 0x80 // [1000 0000] f3 buffer 1 is full
97 #define BIT_WFP_BUF_F3_1 0x80 // [1000 0000] f3 buffer 1 is full
98 #define RST_WFP_F3_0 0x00008840 // [1000 1000 0100 0000]
98 #define RST_WFP_F3_0 0x00008840 // [1000 1000 0100 0000]
99 #define RST_WFP_F3_1 0x00008880 // [1000 1000 1000 0000]
99 #define RST_WFP_F3_1 0x00008880 // [1000 1000 1000 0000]
100
100
101 #define BITS_WFP_STATUS_F2 0x30 // [0011 0000] get the status bits for f2
101 #define BITS_WFP_STATUS_F2 0x30 // [0011 0000] get the status bits for f2
102 #define SHIFT_WFP_STATUS_F2 4
102 #define SHIFT_WFP_STATUS_F2 4
103 #define BIT_WFP_BUF_F2_0 0x10 // [0001 0000] f2 buffer 0 is full
103 #define BIT_WFP_BUF_F2_0 0x10 // [0001 0000] f2 buffer 0 is full
104 #define BIT_WFP_BUF_F2_1 0x20 // [0010 0000] f2 buffer 1 is full
104 #define BIT_WFP_BUF_F2_1 0x20 // [0010 0000] f2 buffer 1 is full
105 #define RST_WFP_F2_0 0x00004410 // [0100 0100 0001 0000]
105 #define RST_WFP_F2_0 0x00004410 // [0100 0100 0001 0000]
106 #define RST_WFP_F2_1 0x00004420 // [0100 0100 0010 0000]
106 #define RST_WFP_F2_1 0x00004420 // [0100 0100 0010 0000]
107
107
108 #define BITS_WFP_STATUS_F1 0x0c // [0000 1100] check the f1 full bits
108 #define BITS_WFP_STATUS_F1 0x0c // [0000 1100] check the f1 full bits
109 #define BIT_WFP_BUF_F1_0 0x04 // [0000 0100] f1 buffer 0 is full
109 #define BIT_WFP_BUF_F1_0 0x04 // [0000 0100] f1 buffer 0 is full
110 #define BIT_WFP_BUF_F1_1 0x08 // [0000 1000] f1 buffer 1 is full
110 #define BIT_WFP_BUF_F1_1 0x08 // [0000 1000] f1 buffer 1 is full
111 #define RST_WFP_F1_0 0x00002204 // [0010 0010 0000 0100] f1 bits = 0
111 #define RST_WFP_F1_0 0x00002204 // [0010 0010 0000 0100] f1 bits = 0
112 #define RST_WFP_F1_1 0x00002208 // [0010 0010 0000 1000] f1 bits = 0
112 #define RST_WFP_F1_1 0x00002208 // [0010 0010 0000 1000] f1 bits = 0
113
113
114 #define BITS_WFP_STATUS_F0 0x03 // [0000 0011] check the f0 full bits
114 #define BITS_WFP_STATUS_F0 0x03 // [0000 0011] check the f0 full bits
115 #define RST_WFP_F0_0 0x00001101 // [0001 0001 0000 0001]
115 #define RST_WFP_F0_0 0x00001101 // [0001 0001 0000 0001]
116 #define RST_WFP_F0_1 0x00001102 // [0001 0001 0000 0010]
116 #define RST_WFP_F0_1 0x00001102 // [0001 0001 0000 0010]
117
117
118 #define BIT_WFP_BUFFER_0 0x01
118 #define BIT_WFP_BUFFER_0 0x01
119 #define BIT_WFP_BUFFER_1 0x02
119 #define BIT_WFP_BUFFER_1 0x02
120
120
121 #define RST_BITS_RUN_BURST_EN 0x80 // [1000 0000] burst f2, f1, f0 enable f3, f2, f1, f0
121 #define RST_BITS_RUN_BURST_EN 0x80 // [1000 0000] burst f2, f1, f0 enable f3, f2, f1, f0
122 #define BITS_WFP_ENABLE_ALL 0x0f // [0000 1111] enable f3, f2, f1, f0
123 #define BITS_WFP_ENABLE_BURST 0x0c // [0000 1100] enable f3, f2
122 #define RUN_BURST_ENABLE_SBM2 0x60 // [0110 0000] enable f2 and f1 burst
124 #define RUN_BURST_ENABLE_SBM2 0x60 // [0110 0000] enable f2 and f1 burst
123 #define RUN_BURST_ENABLE_BURST 0x40 // [0100 0000] f2 burst enabled
125 #define RUN_BURST_ENABLE_BURST 0x40 // [0100 0000] f2 burst enabled
124
126
125 #define DFLT_WFP_NB_DATA_BY_BUFFER 0xa7f // 0x30 *** 2688 - 1 => nb samples -1
127 #define DFLT_WFP_NB_DATA_BY_BUFFER 0xa7f // 0x30 *** 2688 - 1 => nb samples -1
126 #define DFLT_WFP_SNAPSHOT_PARAM 0xa80 // 0x34 *** 2688 => nb samples
128 #define DFLT_WFP_SNAPSHOT_PARAM 0xa80 // 0x34 *** 2688 => nb samples
127 #define DFLT_WFP_BUFFER_LENGTH 0x1f8 // buffer length in burst = 3 * 2688 / 16 = 504 = 0x1f8
129 #define DFLT_WFP_BUFFER_LENGTH 0x1f8 // buffer length in burst = 3 * 2688 / 16 = 504 = 0x1f8
128 #define DFLT_WFP_DELTA_F0_2 0x30 // 48 = 11 0000, max 7 bits
130 #define DFLT_WFP_DELTA_F0_2 0x30 // 48 = 11 0000, max 7 bits
129
131
130 // PDB >= 0.1.28, 0x80000f54
132 // PDB >= 0.1.28, 0x80000f54
131 typedef struct{
133 typedef struct{
132 int data_shaping; // 0x00 00 *** R2 R1 R0 SP1 SP0 BW
134 int data_shaping; // 0x00 00 *** R2 R1 R0 SP1 SP0 BW
133 int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
135 int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
134 int addr_data_f0_0; // 0x08
136 int addr_data_f0_0; // 0x08
135 int addr_data_f0_1; // 0x0c
137 int addr_data_f0_1; // 0x0c
136 int addr_data_f1_0; // 0x10
138 int addr_data_f1_0; // 0x10
137 int addr_data_f1_1; // 0x14
139 int addr_data_f1_1; // 0x14
138 int addr_data_f2_0; // 0x18
140 int addr_data_f2_0; // 0x18
139 int addr_data_f2_1; // 0x1c
141 int addr_data_f2_1; // 0x1c
140 int addr_data_f3_0; // 0x20
142 int addr_data_f3_0; // 0x20
141 int addr_data_f3_1; // 0x24
143 int addr_data_f3_1; // 0x24
142 volatile int status; // 0x28
144 volatile int status; // 0x28
143 volatile int delta_snapshot; // 0x2c
145 volatile int delta_snapshot; // 0x2c
144 int delta_f0; // 0x30
146 int delta_f0; // 0x30
145 int delta_f0_2; // 0x34
147 int delta_f0_2; // 0x34
146 int delta_f1; // 0x38
148 int delta_f1; // 0x38
147 int delta_f2; // 0x3c
149 int delta_f2; // 0x3c
148 int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688
150 int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688
149 int snapshot_param; // 0x44
151 int snapshot_param; // 0x44
150 int start_date; // 0x48
152 int start_date; // 0x48
151 //
153 //
152 volatile unsigned int f0_0_coarse_time; // 0x4c
154 volatile unsigned int f0_0_coarse_time; // 0x4c
153 volatile unsigned int f0_0_fine_time; // 0x50
155 volatile unsigned int f0_0_fine_time; // 0x50
154 volatile unsigned int f0_1_coarse_time; // 0x54
156 volatile unsigned int f0_1_coarse_time; // 0x54
155 volatile unsigned int f0_1_fine_time; // 0x58
157 volatile unsigned int f0_1_fine_time; // 0x58
156 //
158 //
157 volatile unsigned int f1_0_coarse_time; // 0x5c
159 volatile unsigned int f1_0_coarse_time; // 0x5c
158 volatile unsigned int f1_0_fine_time; // 0x60
160 volatile unsigned int f1_0_fine_time; // 0x60
159 volatile unsigned int f1_1_coarse_time; // 0x64
161 volatile unsigned int f1_1_coarse_time; // 0x64
160 volatile unsigned int f1_1_fine_time; // 0x68
162 volatile unsigned int f1_1_fine_time; // 0x68
161 //
163 //
162 volatile unsigned int f2_0_coarse_time; // 0x6c
164 volatile unsigned int f2_0_coarse_time; // 0x6c
163 volatile unsigned int f2_0_fine_time; // 0x70
165 volatile unsigned int f2_0_fine_time; // 0x70
164 volatile unsigned int f2_1_coarse_time; // 0x74
166 volatile unsigned int f2_1_coarse_time; // 0x74
165 volatile unsigned int f2_1_fine_time; // 0x78
167 volatile unsigned int f2_1_fine_time; // 0x78
166 //
168 //
167 volatile unsigned int f3_0_coarse_time; // 0x7c => 0x7c + 0xf54 = 0xd0
169 volatile unsigned int f3_0_coarse_time; // 0x7c => 0x7c + 0xf54 = 0xd0
168 volatile unsigned int f3_0_fine_time; // 0x80
170 volatile unsigned int f3_0_fine_time; // 0x80
169 volatile unsigned int f3_1_coarse_time; // 0x84
171 volatile unsigned int f3_1_coarse_time; // 0x84
170 volatile unsigned int f3_1_fine_time; // 0x88
172 volatile unsigned int f3_1_fine_time; // 0x88
171 //
173 //
172 unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168
174 unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168
173 //
175 //
174 volatile unsigned int v; // 0x90
176 volatile unsigned int v; // 0x90
175 volatile unsigned int e1; // 0x94
177 volatile unsigned int e1; // 0x94
176 volatile unsigned int e2; // 0x98
178 volatile unsigned int e2; // 0x98
177 } waveform_picker_regs_0_1_18_t;
179 } waveform_picker_regs_0_1_18_t;
178
180
179 //*********************
181 //*********************
180 //*********************
182 //*********************
181 // SPECTRAL_MATRIX_REGS
183 // SPECTRAL_MATRIX_REGS
182
184
183 #define BITS_STATUS_F0 0x03 // [0011]
185 #define BITS_STATUS_F0 0x03 // [0011]
184 #define BITS_STATUS_F1 0x0c // [1100]
186 #define BITS_STATUS_F1 0x0c // [1100]
185 #define BITS_STATUS_F2 0x30 // [0011 0000]
187 #define BITS_STATUS_F2 0x30 // [0011 0000]
186 #define BITS_HK_AA_SM 0x780 // [0111 1000 0000]
188 #define BITS_HK_AA_SM 0x780 // [0111 1000 0000]
187 #define BITS_SM_ERR 0x7c0 // [0111 1100 0000]
189 #define BITS_SM_ERR 0x7c0 // [0111 1100 0000]
188 #define BITS_STATUS_REG 0x7ff // [0111 1111 1111]
190 #define BITS_STATUS_REG 0x7ff // [0111 1111 1111]
189 #define BIT_READY_0 0x1 // [01]
191 #define BIT_READY_0 0x1 // [01]
190 #define BIT_READY_1 0x2 // [10]
192 #define BIT_READY_1 0x2 // [10]
191 #define BIT_READY_0_1 0x3 // [11]
193 #define BIT_READY_0_1 0x3 // [11]
192 #define BIT_STATUS_F1_0 0x04 // [0100]
194 #define BIT_STATUS_F1_0 0x04 // [0100]
193 #define BIT_STATUS_F1_1 0x08 // [1000]
195 #define BIT_STATUS_F1_1 0x08 // [1000]
194 #define BIT_STATUS_F2_0 0x10 // [0001 0000]
196 #define BIT_STATUS_F2_0 0x10 // [0001 0000]
195 #define BIT_STATUS_F2_1 0x20 // [0010 0000]
197 #define BIT_STATUS_F2_1 0x20 // [0010 0000]
196 #define DEFAULT_MATRIX_LENGTH 0xc8 // 25 * 128 / 16 = 200 = 0xc8
198 #define DEFAULT_MATRIX_LENGTH 0xc8 // 25 * 128 / 16 = 200 = 0xc8
197 #define BIT_IRQ_ON_NEW_MATRIX 0x01
199 #define BIT_IRQ_ON_NEW_MATRIX 0x01
198 #define MASK_IRQ_ON_NEW_MATRIX 0xfffffffe
200 #define MASK_IRQ_ON_NEW_MATRIX 0xfffffffe
199 #define BIT_IRQ_ON_ERROR 0x02
201 #define BIT_IRQ_ON_ERROR 0x02
200 #define MASK_IRQ_ON_ERROR 0xfffffffd
202 #define MASK_IRQ_ON_ERROR 0xfffffffd
201
203
202 typedef struct {
204 typedef struct {
203 volatile int config; // 0x00
205 volatile int config; // 0x00
204 volatile int status; // 0x04
206 volatile int status; // 0x04
205 volatile int f0_0_address; // 0x08
207 volatile int f0_0_address; // 0x08
206 volatile int f0_1_address; // 0x0C
208 volatile int f0_1_address; // 0x0C
207 //
209 //
208 volatile int f1_0_address; // 0x10
210 volatile int f1_0_address; // 0x10
209 volatile int f1_1_address; // 0x14
211 volatile int f1_1_address; // 0x14
210 volatile int f2_0_address; // 0x18
212 volatile int f2_0_address; // 0x18
211 volatile int f2_1_address; // 0x1C
213 volatile int f2_1_address; // 0x1C
212 //
214 //
213 volatile unsigned int f0_0_coarse_time; // 0x20
215 volatile unsigned int f0_0_coarse_time; // 0x20
214 volatile unsigned int f0_0_fine_time; // 0x24
216 volatile unsigned int f0_0_fine_time; // 0x24
215 volatile unsigned int f0_1_coarse_time; // 0x28
217 volatile unsigned int f0_1_coarse_time; // 0x28
216 volatile unsigned int f0_1_fine_time; // 0x2C
218 volatile unsigned int f0_1_fine_time; // 0x2C
217 //
219 //
218 volatile unsigned int f1_0_coarse_time; // 0x30
220 volatile unsigned int f1_0_coarse_time; // 0x30
219 volatile unsigned int f1_0_fine_time; // 0x34
221 volatile unsigned int f1_0_fine_time; // 0x34
220 volatile unsigned int f1_1_coarse_time; // 0x38
222 volatile unsigned int f1_1_coarse_time; // 0x38
221 volatile unsigned int f1_1_fine_time; // 0x3C
223 volatile unsigned int f1_1_fine_time; // 0x3C
222 //
224 //
223 volatile unsigned int f2_0_coarse_time; // 0x40
225 volatile unsigned int f2_0_coarse_time; // 0x40
224 volatile unsigned int f2_0_fine_time; // 0x44
226 volatile unsigned int f2_0_fine_time; // 0x44
225 volatile unsigned int f2_1_coarse_time; // 0x48
227 volatile unsigned int f2_1_coarse_time; // 0x48
226 volatile unsigned int f2_1_fine_time; // 0x4C
228 volatile unsigned int f2_1_fine_time; // 0x4C
227 //
229 //
228 unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8
230 unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8
229 } spectral_matrix_regs_t;
231 } spectral_matrix_regs_t;
230
232
231 #endif // GRLIB_REGS_H_INCLUDED
233 #endif // GRLIB_REGS_H_INCLUDED
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@@ -1,371 +1,380
1 #ifndef FSW_PROCESSING_H_INCLUDED
1 #ifndef FSW_PROCESSING_H_INCLUDED
2 #define FSW_PROCESSING_H_INCLUDED
2 #define FSW_PROCESSING_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <grspw.h>
5 #include <grspw.h>
6 #include <math.h>
6 #include <math.h>
7 #include <stdlib.h> // abs() is in the stdlib
7 #include <stdlib.h> // abs() is in the stdlib
8 #include <stdio.h>
8 #include <stdio.h>
9 #include <math.h>
9 #include <math.h>
10 #include <grlib_regs.h>
10 #include <grlib_regs.h>
11
11
12 #include "fsw_params.h"
12 #include "fsw_params.h"
13
13
14 #define SBM_COEFF_PER_NORM_COEFF 2
14 #define SBM_COEFF_PER_NORM_COEFF 2
15 #define MAX_SRC_DATA 780 // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
15 #define MAX_SRC_DATA 780 // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
16 #define MAX_SRC_DATA_WITH_SPARE 143 // 13 bins * 11 Bytes
16 #define MAX_SRC_DATA_WITH_SPARE 143 // 13 bins * 11 Bytes
17
17
18 #define NODE_0 0
19 #define NODE_1 1
20 #define NODE_2 2
21 #define NODE_3 3
22 #define NODE_4 4
23 #define NODE_5 5
24 #define NODE_6 6
25 #define NODE_7 7
26
18 typedef struct ring_node_asm
27 typedef struct ring_node_asm
19 {
28 {
20 struct ring_node_asm *next;
29 struct ring_node_asm *next;
21 float matrix[ TOTAL_SIZE_SM ];
30 float matrix[ TOTAL_SIZE_SM ];
22 unsigned int status;
31 unsigned int status;
23 } ring_node_asm;
32 } ring_node_asm;
24
33
25 typedef struct
34 typedef struct
26 {
35 {
27 unsigned char targetLogicalAddress;
36 unsigned char targetLogicalAddress;
28 unsigned char protocolIdentifier;
37 unsigned char protocolIdentifier;
29 unsigned char reserved;
38 unsigned char reserved;
30 unsigned char userApplication;
39 unsigned char userApplication;
31 unsigned char packetID[BYTES_PER_PACKETID];
40 unsigned char packetID[BYTES_PER_PACKETID];
32 unsigned char packetSequenceControl[BYTES_PER_SEQ_CTRL];
41 unsigned char packetSequenceControl[BYTES_PER_SEQ_CTRL];
33 unsigned char packetLength[BYTES_PER_PKT_LEN];
42 unsigned char packetLength[BYTES_PER_PKT_LEN];
34 // DATA FIELD HEADER
43 // DATA FIELD HEADER
35 unsigned char spare1_pusVersion_spare2;
44 unsigned char spare1_pusVersion_spare2;
36 unsigned char serviceType;
45 unsigned char serviceType;
37 unsigned char serviceSubType;
46 unsigned char serviceSubType;
38 unsigned char destinationID;
47 unsigned char destinationID;
39 unsigned char time[BYTES_PER_TIME];
48 unsigned char time[BYTES_PER_TIME];
40 // AUXILIARY HEADER
49 // AUXILIARY HEADER
41 unsigned char sid;
50 unsigned char sid;
42 unsigned char pa_bia_status_info;
51 unsigned char pa_bia_status_info;
43 unsigned char sy_lfr_common_parameters_spare;
52 unsigned char sy_lfr_common_parameters_spare;
44 unsigned char sy_lfr_common_parameters;
53 unsigned char sy_lfr_common_parameters;
45 unsigned char acquisitionTime[BYTES_PER_TIME];
54 unsigned char acquisitionTime[BYTES_PER_TIME];
46 unsigned char pa_lfr_bp_blk_nr[BYTES_PER_BLKNR];
55 unsigned char pa_lfr_bp_blk_nr[BYTES_PER_BLKNR];
47 // SOURCE DATA
56 // SOURCE DATA
48 unsigned char data[ MAX_SRC_DATA ]; // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
57 unsigned char data[ MAX_SRC_DATA ]; // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
49 } bp_packet;
58 } bp_packet;
50
59
51 typedef struct
60 typedef struct
52 {
61 {
53 unsigned char targetLogicalAddress;
62 unsigned char targetLogicalAddress;
54 unsigned char protocolIdentifier;
63 unsigned char protocolIdentifier;
55 unsigned char reserved;
64 unsigned char reserved;
56 unsigned char userApplication;
65 unsigned char userApplication;
57 unsigned char packetID[BYTES_PER_PACKETID];
66 unsigned char packetID[BYTES_PER_PACKETID];
58 unsigned char packetSequenceControl[BYTES_PER_SEQ_CTRL];
67 unsigned char packetSequenceControl[BYTES_PER_SEQ_CTRL];
59 unsigned char packetLength[BYTES_PER_PKT_LEN];
68 unsigned char packetLength[BYTES_PER_PKT_LEN];
60 // DATA FIELD HEADER
69 // DATA FIELD HEADER
61 unsigned char spare1_pusVersion_spare2;
70 unsigned char spare1_pusVersion_spare2;
62 unsigned char serviceType;
71 unsigned char serviceType;
63 unsigned char serviceSubType;
72 unsigned char serviceSubType;
64 unsigned char destinationID;
73 unsigned char destinationID;
65 unsigned char time[BYTES_PER_TIME];
74 unsigned char time[BYTES_PER_TIME];
66 // AUXILIARY HEADER
75 // AUXILIARY HEADER
67 unsigned char sid;
76 unsigned char sid;
68 unsigned char pa_bia_status_info;
77 unsigned char pa_bia_status_info;
69 unsigned char sy_lfr_common_parameters_spare;
78 unsigned char sy_lfr_common_parameters_spare;
70 unsigned char sy_lfr_common_parameters;
79 unsigned char sy_lfr_common_parameters;
71 unsigned char acquisitionTime[BYTES_PER_TIME];
80 unsigned char acquisitionTime[BYTES_PER_TIME];
72 unsigned char source_data_spare;
81 unsigned char source_data_spare;
73 unsigned char pa_lfr_bp_blk_nr[BYTES_PER_BLKNR];
82 unsigned char pa_lfr_bp_blk_nr[BYTES_PER_BLKNR];
74 // SOURCE DATA
83 // SOURCE DATA
75 unsigned char data[ MAX_SRC_DATA_WITH_SPARE ]; // 13 bins * 11 Bytes
84 unsigned char data[ MAX_SRC_DATA_WITH_SPARE ]; // 13 bins * 11 Bytes
76 } bp_packet_with_spare; // only for TM_LFR_SCIENCE_NORMAL_BP1_F0 and F1
85 } bp_packet_with_spare; // only for TM_LFR_SCIENCE_NORMAL_BP1_F0 and F1
77
86
78 typedef struct asm_msg
87 typedef struct asm_msg
79 {
88 {
80 ring_node_asm *norm;
89 ring_node_asm *norm;
81 ring_node_asm *burst_sbm;
90 ring_node_asm *burst_sbm;
82 rtems_event_set event;
91 rtems_event_set event;
83 unsigned int coarseTimeNORM;
92 unsigned int coarseTimeNORM;
84 unsigned int fineTimeNORM;
93 unsigned int fineTimeNORM;
85 unsigned int coarseTimeSBM;
94 unsigned int coarseTimeSBM;
86 unsigned int fineTimeSBM;
95 unsigned int fineTimeSBM;
87 unsigned int numberOfSMInASMNORM;
96 unsigned int numberOfSMInASMNORM;
88 unsigned int numberOfSMInASMSBM;
97 unsigned int numberOfSMInASMSBM;
89 } asm_msg;
98 } asm_msg;
90
99
91 extern unsigned char thisIsAnASMRestart;
100 extern unsigned char thisIsAnASMRestart;
92
101
93 extern volatile int sm_f0[ ];
102 extern volatile int sm_f0[ ];
94 extern volatile int sm_f1[ ];
103 extern volatile int sm_f1[ ];
95 extern volatile int sm_f2[ ];
104 extern volatile int sm_f2[ ];
96 extern unsigned int acquisitionDurations[];
105 extern unsigned int acquisitionDurations[];
97
106
98 // parameters
107 // parameters
99 extern struct param_local_str param_local;
108 extern struct param_local_str param_local;
100 extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
109 extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
101
110
102 // registers
111 // registers
103 extern time_management_regs_t *time_management_regs;
112 extern time_management_regs_t *time_management_regs;
104 extern volatile spectral_matrix_regs_t *spectral_matrix_regs;
113 extern volatile spectral_matrix_regs_t *spectral_matrix_regs;
105
114
106 extern rtems_name misc_name[];
115 extern rtems_name misc_name[];
107 extern rtems_id Task_id[]; /* array of task ids */
116 extern rtems_id Task_id[]; /* array of task ids */
108
117
109 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel);
118 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel);
110 // ISR
119 // ISR
111 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
120 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
112
121
113 //******************
122 //******************
114 // Spectral Matrices
123 // Spectral Matrices
115 void reset_nb_sm( void );
124 void reset_nb_sm( void );
116 // SM
125 // SM
117 void SM_init_rings( void );
126 void SM_init_rings( void );
118 void SM_reset_current_ring_nodes( void );
127 void SM_reset_current_ring_nodes( void );
119 // ASM
128 // ASM
120 void ASM_generic_init_ring(ring_node_asm *ring, unsigned char nbNodes );
129 void ASM_generic_init_ring(ring_node_asm *ring, unsigned char nbNodes );
121
130
122 //*****************
131 //*****************
123 // Basic Parameters
132 // Basic Parameters
124
133
125 void BP_reset_current_ring_nodes( void );
134 void BP_reset_current_ring_nodes( void );
126 void BP_init_header(bp_packet *packet,
135 void BP_init_header(bp_packet *packet,
127 unsigned int apid, unsigned char sid,
136 unsigned int apid, unsigned char sid,
128 unsigned int packetLength , unsigned char blkNr);
137 unsigned int packetLength , unsigned char blkNr);
129 void BP_init_header_with_spare(bp_packet_with_spare *packet,
138 void BP_init_header_with_spare(bp_packet_with_spare *packet,
130 unsigned int apid, unsigned char sid,
139 unsigned int apid, unsigned char sid,
131 unsigned int packetLength, unsigned char blkNr );
140 unsigned int packetLength, unsigned char blkNr );
132 void BP_send( char *data,
141 void BP_send( char *data,
133 rtems_id queue_id,
142 rtems_id queue_id,
134 unsigned int nbBytesToSend , unsigned int sid );
143 unsigned int nbBytesToSend , unsigned int sid );
135 void BP_send_s1_s2(char *data,
144 void BP_send_s1_s2(char *data,
136 rtems_id queue_id,
145 rtems_id queue_id,
137 unsigned int nbBytesToSend, unsigned int sid );
146 unsigned int nbBytesToSend, unsigned int sid );
138
147
139 //******************
148 //******************
140 // general functions
149 // general functions
141 void reset_sm_status( void );
150 void reset_sm_status( void );
142 void reset_spectral_matrix_regs( void );
151 void reset_spectral_matrix_regs( void );
143 void set_time(unsigned char *time, unsigned char *timeInBuffer );
152 void set_time(unsigned char *time, unsigned char *timeInBuffer );
144 unsigned long long int get_acquisition_time( unsigned char *timePtr );
153 unsigned long long int get_acquisition_time( unsigned char *timePtr );
145 unsigned char getSID( rtems_event_set event );
154 unsigned char getSID( rtems_event_set event );
146
155
147 extern rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
156 extern rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
148 extern rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
157 extern rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
149
158
150 //***************************************
159 //***************************************
151 // DEFINITIONS OF STATIC INLINE FUNCTIONS
160 // DEFINITIONS OF STATIC INLINE FUNCTIONS
152 static inline void SM_average(float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
161 static inline void SM_average(float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
153 ring_node *ring_node_tab[],
162 ring_node *ring_node_tab[],
154 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
163 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
155 asm_msg *msgForMATR , unsigned char channel);
164 asm_msg *msgForMATR , unsigned char channel);
156
165
157 void ASM_patch( float *inputASM, float *outputASM );
166 void ASM_patch( float *inputASM, float *outputASM );
158
167
159 void extractReImVectors(float *inputASM, float *outputASM, unsigned int asmComponent );
168 void extractReImVectors(float *inputASM, float *outputASM, unsigned int asmComponent );
160
169
161 static inline void ASM_reorganize_and_divide(float *averaged_spec_mat, float *averaged_spec_mat_reorganized,
170 static inline void ASM_reorganize_and_divide(float *averaged_spec_mat, float *averaged_spec_mat_reorganized,
162 float divider );
171 float divider );
163
172
164 static inline void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat,
173 static inline void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat,
165 float divider,
174 float divider,
166 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage , unsigned char ASMIndexStart);
175 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage , unsigned char ASMIndexStart);
167
176
168 static inline void ASM_convert(volatile float *input_matrix, char *output_matrix);
177 static inline void ASM_convert(volatile float *input_matrix, char *output_matrix);
169
178
170 unsigned char acquisitionTimeIsValid(unsigned int coarseTime, unsigned int fineTime, unsigned char channel);
179 unsigned char acquisitionTimeIsValid(unsigned int coarseTime, unsigned int fineTime, unsigned char channel);
171
180
172 void SM_average( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
181 void SM_average( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
173 ring_node *ring_node_tab[],
182 ring_node *ring_node_tab[],
174 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
183 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
175 asm_msg *msgForMATR, unsigned char channel )
184 asm_msg *msgForMATR, unsigned char channel )
176 {
185 {
177 float sum;
186 float sum;
178 unsigned int i;
187 unsigned int i;
179 unsigned int k;
188 unsigned int k;
180 unsigned char incomingSMIsValid[NB_SM_BEFORE_AVF0_F1];
189 unsigned char incomingSMIsValid[NB_SM_BEFORE_AVF0_F1];
181 unsigned int numberOfValidSM;
190 unsigned int numberOfValidSM;
182 unsigned char isValid;
191 unsigned char isValid;
183
192
184 //**************
193 //**************
185 // PAS FILTERING
194 // PAS FILTERING
186 // check acquisitionTime of the incoming data
195 // check acquisitionTime of the incoming data
187 numberOfValidSM = 0;
196 numberOfValidSM = 0;
188 for (k=0; k<NB_SM_BEFORE_AVF0_F1; k++)
197 for (k=0; k<NB_SM_BEFORE_AVF0_F1; k++)
189 {
198 {
190 isValid = acquisitionTimeIsValid( ring_node_tab[k]->coarseTime, ring_node_tab[k]->fineTime, channel );
199 isValid = acquisitionTimeIsValid( ring_node_tab[k]->coarseTime, ring_node_tab[k]->fineTime, channel );
191 incomingSMIsValid[k] = isValid;
200 incomingSMIsValid[k] = isValid;
192 numberOfValidSM = numberOfValidSM + isValid;
201 numberOfValidSM = numberOfValidSM + isValid;
193 }
202 }
194
203
195 //************************
204 //************************
196 // AVERAGE SPECTRAL MATRIX
205 // AVERAGE SPECTRAL MATRIX
197 for(i=0; i<TOTAL_SIZE_SM; i++)
206 for(i=0; i<TOTAL_SIZE_SM; i++)
198 {
207 {
199 // sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ]
208 // sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ]
200 // + ( (int *) (ring_node_tab[1]->buffer_address) ) [ i ]
209 // + ( (int *) (ring_node_tab[1]->buffer_address) ) [ i ]
201 // + ( (int *) (ring_node_tab[2]->buffer_address) ) [ i ]
210 // + ( (int *) (ring_node_tab[2]->buffer_address) ) [ i ]
202 // + ( (int *) (ring_node_tab[3]->buffer_address) ) [ i ]
211 // + ( (int *) (ring_node_tab[3]->buffer_address) ) [ i ]
203 // + ( (int *) (ring_node_tab[4]->buffer_address) ) [ i ]
212 // + ( (int *) (ring_node_tab[4]->buffer_address) ) [ i ]
204 // + ( (int *) (ring_node_tab[5]->buffer_address) ) [ i ]
213 // + ( (int *) (ring_node_tab[5]->buffer_address) ) [ i ]
205 // + ( (int *) (ring_node_tab[6]->buffer_address) ) [ i ]
214 // + ( (int *) (ring_node_tab[6]->buffer_address) ) [ i ]
206 // + ( (int *) (ring_node_tab[7]->buffer_address) ) [ i ];
215 // + ( (int *) (ring_node_tab[7]->buffer_address) ) [ i ];
207
216
208 sum = ( incomingSMIsValid[0] * ((int *)(ring_node_tab[0]->buffer_address) )[ i ] )
217 sum = ( incomingSMIsValid[BYTE_0] * ((int *)(ring_node_tab[NODE_0]->buffer_address) )[ i ] )
209 + ( incomingSMIsValid[1] * ((int *)(ring_node_tab[1]->buffer_address) )[ i ] )
218 + ( incomingSMIsValid[BYTE_1] * ((int *)(ring_node_tab[NODE_1]->buffer_address) )[ i ] )
210 + ( incomingSMIsValid[2] * ((int *)(ring_node_tab[2]->buffer_address) )[ i ] )
219 + ( incomingSMIsValid[BYTE_2] * ((int *)(ring_node_tab[NODE_2]->buffer_address) )[ i ] )
211 + ( incomingSMIsValid[3] * ((int *)(ring_node_tab[3]->buffer_address) )[ i ] )
220 + ( incomingSMIsValid[BYTE_3] * ((int *)(ring_node_tab[NODE_3]->buffer_address) )[ i ] )
212 + ( incomingSMIsValid[4] * ((int *)(ring_node_tab[4]->buffer_address) )[ i ] )
221 + ( incomingSMIsValid[BYTE_4] * ((int *)(ring_node_tab[NODE_4]->buffer_address) )[ i ] )
213 + ( incomingSMIsValid[5] * ((int *)(ring_node_tab[5]->buffer_address) )[ i ] )
222 + ( incomingSMIsValid[BYTE_5] * ((int *)(ring_node_tab[NODE_5]->buffer_address) )[ i ] )
214 + ( incomingSMIsValid[6] * ((int *)(ring_node_tab[6]->buffer_address) )[ i ] )
223 + ( incomingSMIsValid[BYTE_6] * ((int *)(ring_node_tab[NODE_6]->buffer_address) )[ i ] )
215 + ( incomingSMIsValid[7] * ((int *)(ring_node_tab[7]->buffer_address) )[ i ] );
224 + ( incomingSMIsValid[BYTE_7] * ((int *)(ring_node_tab[NODE_7]->buffer_address) )[ i ] );
216
225
217 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
226 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
218 {
227 {
219 averaged_spec_mat_NORM[ i ] = sum;
228 averaged_spec_mat_NORM[ i ] = sum;
220 averaged_spec_mat_SBM[ i ] = sum;
229 averaged_spec_mat_SBM[ i ] = sum;
221 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
230 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
222 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
231 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
223 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
232 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
224 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
233 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
225 }
234 }
226 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
235 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
227 {
236 {
228 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
237 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
229 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
238 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
230 }
239 }
231 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
240 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
232 {
241 {
233 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
242 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
234 averaged_spec_mat_SBM[ i ] = sum;
243 averaged_spec_mat_SBM[ i ] = sum;
235 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
244 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
236 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
245 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
237 }
246 }
238 else
247 else
239 {
248 {
240 averaged_spec_mat_NORM[ i ] = sum;
249 averaged_spec_mat_NORM[ i ] = sum;
241 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
250 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
242 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
251 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
243 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
252 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
244 // PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
253 // PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
245 }
254 }
246 }
255 }
247
256
248 //*******************
257 //*******************
249 // UPDATE SM COUNTERS
258 // UPDATE SM COUNTERS
250 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
259 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
251 {
260 {
252 msgForMATR->numberOfSMInASMNORM = numberOfValidSM;
261 msgForMATR->numberOfSMInASMNORM = numberOfValidSM;
253 msgForMATR->numberOfSMInASMSBM = numberOfValidSM;
262 msgForMATR->numberOfSMInASMSBM = numberOfValidSM;
254 }
263 }
255 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
264 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
256 {
265 {
257 msgForMATR->numberOfSMInASMNORM = msgForMATR->numberOfSMInASMNORM + numberOfValidSM;
266 msgForMATR->numberOfSMInASMNORM = msgForMATR->numberOfSMInASMNORM + numberOfValidSM;
258 msgForMATR->numberOfSMInASMSBM = msgForMATR->numberOfSMInASMSBM + numberOfValidSM;
267 msgForMATR->numberOfSMInASMSBM = msgForMATR->numberOfSMInASMSBM + numberOfValidSM;
259 }
268 }
260 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
269 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
261 {
270 {
262 msgForMATR->numberOfSMInASMNORM = msgForMATR->numberOfSMInASMNORM + numberOfValidSM;
271 msgForMATR->numberOfSMInASMNORM = msgForMATR->numberOfSMInASMNORM + numberOfValidSM;
263 msgForMATR->numberOfSMInASMSBM = numberOfValidSM;
272 msgForMATR->numberOfSMInASMSBM = numberOfValidSM;
264 }
273 }
265 else
274 else
266 {
275 {
267 msgForMATR->numberOfSMInASMNORM = numberOfValidSM;
276 msgForMATR->numberOfSMInASMNORM = numberOfValidSM;
268 msgForMATR->numberOfSMInASMSBM = msgForMATR->numberOfSMInASMSBM + numberOfValidSM;
277 msgForMATR->numberOfSMInASMSBM = msgForMATR->numberOfSMInASMSBM + numberOfValidSM;
269 }
278 }
270 }
279 }
271
280
272 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
281 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
273 {
282 {
274 int frequencyBin;
283 int frequencyBin;
275 int asmComponent;
284 int asmComponent;
276 unsigned int offsetASM;
285 unsigned int offsetASM;
277 unsigned int offsetASMReorganized;
286 unsigned int offsetASMReorganized;
278
287
279 // BUILD DATA
288 // BUILD DATA
280 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
289 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
281 {
290 {
282 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
291 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
283 {
292 {
284 offsetASMReorganized =
293 offsetASMReorganized =
285 (frequencyBin * NB_VALUES_PER_SM)
294 (frequencyBin * NB_VALUES_PER_SM)
286 + asmComponent;
295 + asmComponent;
287 offsetASM =
296 offsetASM =
288 (asmComponent * NB_BINS_PER_SM)
297 (asmComponent * NB_BINS_PER_SM)
289 + frequencyBin;
298 + frequencyBin;
290 if ( divider != INIT_FLOAT )
299 if ( divider != INIT_FLOAT )
291 {
300 {
292 averaged_spec_mat_reorganized[offsetASMReorganized ] = averaged_spec_mat[ offsetASM ] / divider;
301 averaged_spec_mat_reorganized[offsetASMReorganized ] = averaged_spec_mat[ offsetASM ] / divider;
293 }
302 }
294 else
303 else
295 {
304 {
296 averaged_spec_mat_reorganized[offsetASMReorganized ] = INIT_FLOAT;
305 averaged_spec_mat_reorganized[offsetASMReorganized ] = INIT_FLOAT;
297 }
306 }
298 }
307 }
299 }
308 }
300 }
309 }
301
310
302 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
311 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
303 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
312 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
304 {
313 {
305 int frequencyBin;
314 int frequencyBin;
306 int asmComponent;
315 int asmComponent;
307 int offsetASM;
316 int offsetASM;
308 int offsetCompressed;
317 int offsetCompressed;
309 int k;
318 int k;
310
319
311 // BUILD DATA
320 // BUILD DATA
312 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
321 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
313 {
322 {
314 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
323 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
315 {
324 {
316 offsetCompressed = // NO TIME OFFSET
325 offsetCompressed = // NO TIME OFFSET
317 (frequencyBin * NB_VALUES_PER_SM)
326 (frequencyBin * NB_VALUES_PER_SM)
318 + asmComponent;
327 + asmComponent;
319 offsetASM = // NO TIME OFFSET
328 offsetASM = // NO TIME OFFSET
320 (asmComponent * NB_BINS_PER_SM)
329 (asmComponent * NB_BINS_PER_SM)
321 + ASMIndexStart
330 + ASMIndexStart
322 + (frequencyBin * nbBinsToAverage);
331 + (frequencyBin * nbBinsToAverage);
323 compressed_spec_mat[ offsetCompressed ] = 0;
332 compressed_spec_mat[ offsetCompressed ] = 0;
324 for ( k = 0; k < nbBinsToAverage; k++ )
333 for ( k = 0; k < nbBinsToAverage; k++ )
325 {
334 {
326 compressed_spec_mat[offsetCompressed ] =
335 compressed_spec_mat[offsetCompressed ] =
327 ( compressed_spec_mat[ offsetCompressed ]
336 ( compressed_spec_mat[ offsetCompressed ]
328 + averaged_spec_mat[ offsetASM + k ] );
337 + averaged_spec_mat[ offsetASM + k ] );
329 }
338 }
330 compressed_spec_mat[ offsetCompressed ] =
339 compressed_spec_mat[ offsetCompressed ] =
331 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
340 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
332 }
341 }
333 }
342 }
334 }
343 }
335
344
336 void ASM_convert( volatile float *input_matrix, char *output_matrix)
345 void ASM_convert( volatile float *input_matrix, char *output_matrix)
337 {
346 {
338 unsigned int frequencyBin;
347 unsigned int frequencyBin;
339 unsigned int asmComponent;
348 unsigned int asmComponent;
340 char * pt_char_input;
349 char * pt_char_input;
341 char * pt_char_output;
350 char * pt_char_output;
342 unsigned int offsetInput;
351 unsigned int offsetInput;
343 unsigned int offsetOutput;
352 unsigned int offsetOutput;