##// END OF EJS Templates
Bug 978 Mauvais nombre de FFT retiré lors du filtrage PAS
paul -
r350:d301b368f883 R3++ draft
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@@ -1,2 +1,2
1 1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 21ada91882790323b08a38518ed1af5a36fa4deb header/lfr_common_headers
2 f97721719ddb7e088956d5fd3cffb0f9587a041b header/lfr_common_headers
@@ -1,802 +1,830
1 1 /** Functions related to data processing.
2 2 *
3 3 * @file
4 4 * @author P. LEROY
5 5 *
6 6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 7 *
8 8 */
9 9
10 10 #include "fsw_processing.h"
11 11 #include "fsw_processing_globals.c"
12 12 #include "fsw_init.h"
13 13
14 14 unsigned int nb_sm_f0 = 0;
15 15 unsigned int nb_sm_f0_aux_f1= 0;
16 16 unsigned int nb_sm_f1 = 0;
17 17 unsigned int nb_sm_f0_aux_f2= 0;
18 18
19 19 typedef enum restartState_t
20 20 {
21 21 WAIT_FOR_F2,
22 22 WAIT_FOR_F1,
23 23 WAIT_FOR_F0
24 24 } restartState;
25 25
26 26 //************************
27 27 // spectral matrices rings
28 28 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ] = {0};
29 29 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ] = {0};
30 30 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ] = {0};
31 31 ring_node *current_ring_node_sm_f0 = NULL;
32 32 ring_node *current_ring_node_sm_f1 = NULL;
33 33 ring_node *current_ring_node_sm_f2 = NULL;
34 34 ring_node *ring_node_for_averaging_sm_f0= NULL;
35 35 ring_node *ring_node_for_averaging_sm_f1= NULL;
36 36 ring_node *ring_node_for_averaging_sm_f2= NULL;
37 37
38 38 //
39 39 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel)
40 40 {
41 41 ring_node *node;
42 42
43 43 node = NULL;
44 44 switch ( frequencyChannel ) {
45 45 case CHANNELF0:
46 46 node = ring_node_for_averaging_sm_f0;
47 47 break;
48 48 case CHANNELF1:
49 49 node = ring_node_for_averaging_sm_f1;
50 50 break;
51 51 case CHANNELF2:
52 52 node = ring_node_for_averaging_sm_f2;
53 53 break;
54 54 default:
55 55 break;
56 56 }
57 57
58 58 return node;
59 59 }
60 60
61 61 //***********************************************************
62 62 // Interrupt Service Routine for spectral matrices processing
63 63
64 64 void spectral_matrices_isr_f0( int statusReg )
65 65 {
66 66 unsigned char status;
67 67 rtems_status_code status_code;
68 68 ring_node *full_ring_node;
69 69
70 70 status = (unsigned char) (statusReg & BITS_STATUS_F0); // [0011] get the status_ready_matrix_f0_x bits
71 71
72 72 switch(status)
73 73 {
74 74 case 0:
75 75 break;
76 76 case BIT_READY_0_1:
77 77 // UNEXPECTED VALUE
78 78 spectral_matrix_regs->status = BIT_READY_0_1; // [0011]
79 79 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
80 80 break;
81 81 case BIT_READY_0:
82 82 full_ring_node = current_ring_node_sm_f0->previous;
83 83 full_ring_node->coarseTime = spectral_matrix_regs->f0_0_coarse_time;
84 84 full_ring_node->fineTime = spectral_matrix_regs->f0_0_fine_time;
85 85 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
86 86 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->buffer_address;
87 87 // if there are enough ring nodes ready, wake up an AVFx task
88 88 nb_sm_f0 = nb_sm_f0 + 1;
89 89 if (nb_sm_f0 == NB_SM_BEFORE_AVF0_F1)
90 90 {
91 91 ring_node_for_averaging_sm_f0 = full_ring_node;
92 92 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
93 93 {
94 94 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
95 95 }
96 96 nb_sm_f0 = 0;
97 97 }
98 98 spectral_matrix_regs->status = BIT_READY_0; // [0000 0001]
99 99 break;
100 100 case BIT_READY_1:
101 101 full_ring_node = current_ring_node_sm_f0->previous;
102 102 full_ring_node->coarseTime = spectral_matrix_regs->f0_1_coarse_time;
103 103 full_ring_node->fineTime = spectral_matrix_regs->f0_1_fine_time;
104 104 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
105 105 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
106 106 // if there are enough ring nodes ready, wake up an AVFx task
107 107 nb_sm_f0 = nb_sm_f0 + 1;
108 108 if (nb_sm_f0 == NB_SM_BEFORE_AVF0_F1)
109 109 {
110 110 ring_node_for_averaging_sm_f0 = full_ring_node;
111 111 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
112 112 {
113 113 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
114 114 }
115 115 nb_sm_f0 = 0;
116 116 }
117 117 spectral_matrix_regs->status = BIT_READY_1; // [0000 0010]
118 118 break;
119 119 default:
120 120 break;
121 121 }
122 122 }
123 123
124 124 void spectral_matrices_isr_f1( int statusReg )
125 125 {
126 126 rtems_status_code status_code;
127 127 unsigned char status;
128 128 ring_node *full_ring_node;
129 129
130 130 status = (unsigned char) ((statusReg & BITS_STATUS_F1) >> SHIFT_2_BITS); // [1100] get the status_ready_matrix_f1_x bits
131 131
132 132 switch(status)
133 133 {
134 134 case 0:
135 135 break;
136 136 case BIT_READY_0_1:
137 137 // UNEXPECTED VALUE
138 138 spectral_matrix_regs->status = BITS_STATUS_F1; // [1100]
139 139 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
140 140 break;
141 141 case BIT_READY_0:
142 142 full_ring_node = current_ring_node_sm_f1->previous;
143 143 full_ring_node->coarseTime = spectral_matrix_regs->f1_0_coarse_time;
144 144 full_ring_node->fineTime = spectral_matrix_regs->f1_0_fine_time;
145 145 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
146 146 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->buffer_address;
147 147 // if there are enough ring nodes ready, wake up an AVFx task
148 148 nb_sm_f1 = nb_sm_f1 + 1;
149 149 if (nb_sm_f1 == NB_SM_BEFORE_AVF0_F1)
150 150 {
151 151 ring_node_for_averaging_sm_f1 = full_ring_node;
152 152 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
153 153 {
154 154 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
155 155 }
156 156 nb_sm_f1 = 0;
157 157 }
158 158 spectral_matrix_regs->status = BIT_STATUS_F1_0; // [0000 0100]
159 159 break;
160 160 case BIT_READY_1:
161 161 full_ring_node = current_ring_node_sm_f1->previous;
162 162 full_ring_node->coarseTime = spectral_matrix_regs->f1_1_coarse_time;
163 163 full_ring_node->fineTime = spectral_matrix_regs->f1_1_fine_time;
164 164 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
165 165 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
166 166 // if there are enough ring nodes ready, wake up an AVFx task
167 167 nb_sm_f1 = nb_sm_f1 + 1;
168 168 if (nb_sm_f1 == NB_SM_BEFORE_AVF0_F1)
169 169 {
170 170 ring_node_for_averaging_sm_f1 = full_ring_node;
171 171 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
172 172 {
173 173 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
174 174 }
175 175 nb_sm_f1 = 0;
176 176 }
177 177 spectral_matrix_regs->status = BIT_STATUS_F1_1; // [1000 0000]
178 178 break;
179 179 default:
180 180 break;
181 181 }
182 182 }
183 183
184 184 void spectral_matrices_isr_f2( int statusReg )
185 185 {
186 186 unsigned char status;
187 187 rtems_status_code status_code;
188 188
189 189 status = (unsigned char) ((statusReg & BITS_STATUS_F2) >> SHIFT_4_BITS); // [0011 0000] get the status_ready_matrix_f2_x bits
190 190
191 191 switch(status)
192 192 {
193 193 case 0:
194 194 break;
195 195 case BIT_READY_0_1:
196 196 // UNEXPECTED VALUE
197 197 spectral_matrix_regs->status = BITS_STATUS_F2; // [0011 0000]
198 198 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
199 199 break;
200 200 case BIT_READY_0:
201 201 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
202 202 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
203 203 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_0_coarse_time;
204 204 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_0_fine_time;
205 205 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->buffer_address;
206 206 spectral_matrix_regs->status = BIT_STATUS_F2_0; // [0001 0000]
207 207 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
208 208 {
209 209 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
210 210 }
211 211 break;
212 212 case BIT_READY_1:
213 213 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
214 214 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
215 215 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_1_coarse_time;
216 216 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_1_fine_time;
217 217 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
218 218 spectral_matrix_regs->status = BIT_STATUS_F2_1; // [0010 0000]
219 219 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
220 220 {
221 221 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
222 222 }
223 223 break;
224 224 default:
225 225 break;
226 226 }
227 227 }
228 228
229 229 void spectral_matrix_isr_error_handler( int statusReg )
230 230 {
231 231 // STATUS REGISTER
232 232 // input_fifo_write(2) *** input_fifo_write(1) *** input_fifo_write(0)
233 233 // 10 9 8
234 234 // buffer_full ** [bad_component_err] ** f2_1 ** f2_0 ** f1_1 ** f1_0 ** f0_1 ** f0_0
235 235 // 7 6 5 4 3 2 1 0
236 236 // [bad_component_err] not defined in the last version of the VHDL code
237 237
238 238 rtems_status_code status_code;
239 239
240 240 //***************************************************
241 241 // the ASM status register is copied in the HK packet
242 242 housekeeping_packet.hk_lfr_vhdl_aa_sm = (unsigned char) ((statusReg & BITS_HK_AA_SM) >> SHIFT_7_BITS); // [0111 1000 0000]
243 243
244 244 if (statusReg & BITS_SM_ERR) // [0111 1100 0000]
245 245 {
246 246 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 );
247 247 }
248 248
249 249 spectral_matrix_regs->status = spectral_matrix_regs->status & BITS_SM_ERR;
250 250
251 251 }
252 252
253 253 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
254 254 {
255 255 // STATUS REGISTER
256 256 // input_fifo_write(2) *** input_fifo_write(1) *** input_fifo_write(0)
257 257 // 10 9 8
258 258 // buffer_full ** bad_component_err ** f2_1 ** f2_0 ** f1_1 ** f1_0 ** f0_1 ** f0_0
259 259 // 7 6 5 4 3 2 1 0
260 260
261 261 int statusReg;
262 262
263 263 static restartState state = WAIT_FOR_F2;
264 264
265 265 statusReg = spectral_matrix_regs->status;
266 266
267 267 if (thisIsAnASMRestart == 0)
268 268 { // this is not a restart sequence, process incoming matrices normally
269 269 spectral_matrices_isr_f0( statusReg );
270 270
271 271 spectral_matrices_isr_f1( statusReg );
272 272
273 273 spectral_matrices_isr_f2( statusReg );
274 274 }
275 275 else
276 276 { // a restart sequence has to be launched
277 277 switch (state) {
278 278 case WAIT_FOR_F2:
279 279 if ((statusReg & BITS_STATUS_F2) != INIT_CHAR) // [0011 0000] check the status_ready_matrix_f2_x bits
280 280 {
281 281 state = WAIT_FOR_F1;
282 282 }
283 283 break;
284 284 case WAIT_FOR_F1:
285 285 if ((statusReg & BITS_STATUS_F1) != INIT_CHAR) // [0000 1100] check the status_ready_matrix_f1_x bits
286 286 {
287 287 state = WAIT_FOR_F0;
288 288 }
289 289 break;
290 290 case WAIT_FOR_F0:
291 291 if ((statusReg & BITS_STATUS_F0) != INIT_CHAR) // [0000 0011] check the status_ready_matrix_f0_x bits
292 292 {
293 293 state = WAIT_FOR_F2;
294 294 thisIsAnASMRestart = 0;
295 295 }
296 296 break;
297 297 default:
298 298 break;
299 299 }
300 300 reset_sm_status();
301 301 }
302 302
303 303 spectral_matrix_isr_error_handler( statusReg );
304 304
305 305 }
306 306
307 307 //******************
308 308 // Spectral Matrices
309 309
310 310 void reset_nb_sm( void )
311 311 {
312 312 nb_sm_f0 = 0;
313 313 nb_sm_f0_aux_f1 = 0;
314 314 nb_sm_f0_aux_f2 = 0;
315 315
316 316 nb_sm_f1 = 0;
317 317 }
318 318
319 319 void SM_init_rings( void )
320 320 {
321 321 init_ring( sm_ring_f0, NB_RING_NODES_SM_F0, sm_f0, TOTAL_SIZE_SM );
322 322 init_ring( sm_ring_f1, NB_RING_NODES_SM_F1, sm_f1, TOTAL_SIZE_SM );
323 323 init_ring( sm_ring_f2, NB_RING_NODES_SM_F2, sm_f2, TOTAL_SIZE_SM );
324 324
325 325 DEBUG_PRINTF1("sm_ring_f0 @%x\n", (unsigned int) sm_ring_f0)
326 326 DEBUG_PRINTF1("sm_ring_f1 @%x\n", (unsigned int) sm_ring_f1)
327 327 DEBUG_PRINTF1("sm_ring_f2 @%x\n", (unsigned int) sm_ring_f2)
328 328 DEBUG_PRINTF1("sm_f0 @%x\n", (unsigned int) sm_f0)
329 329 DEBUG_PRINTF1("sm_f1 @%x\n", (unsigned int) sm_f1)
330 330 DEBUG_PRINTF1("sm_f2 @%x\n", (unsigned int) sm_f2)
331 331 }
332 332
333 333 void ASM_generic_init_ring( ring_node_asm *ring, unsigned char nbNodes )
334 334 {
335 335 unsigned char i;
336 336
337 337 ring[ nbNodes - 1 ].next
338 338 = (ring_node_asm*) &ring[ 0 ];
339 339
340 340 for(i=0; i<nbNodes-1; i++)
341 341 {
342 342 ring[ i ].next = (ring_node_asm*) &ring[ i + 1 ];
343 343 }
344 344 }
345 345
346 346 void SM_reset_current_ring_nodes( void )
347 347 {
348 348 current_ring_node_sm_f0 = sm_ring_f0[0].next;
349 349 current_ring_node_sm_f1 = sm_ring_f1[0].next;
350 350 current_ring_node_sm_f2 = sm_ring_f2[0].next;
351 351
352 352 ring_node_for_averaging_sm_f0 = NULL;
353 353 ring_node_for_averaging_sm_f1 = NULL;
354 354 ring_node_for_averaging_sm_f2 = NULL;
355 355 }
356 356
357 357 //*****************
358 358 // Basic Parameters
359 359
360 360 void BP_init_header( bp_packet *packet,
361 361 unsigned int apid, unsigned char sid,
362 362 unsigned int packetLength, unsigned char blkNr )
363 363 {
364 364 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
365 365 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
366 366 packet->reserved = INIT_CHAR;
367 367 packet->userApplication = CCSDS_USER_APP;
368 368 packet->packetID[0] = (unsigned char) (apid >> SHIFT_1_BYTE);
369 369 packet->packetID[1] = (unsigned char) (apid);
370 370 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
371 371 packet->packetSequenceControl[1] = INIT_CHAR;
372 372 packet->packetLength[0] = (unsigned char) (packetLength >> SHIFT_1_BYTE);
373 373 packet->packetLength[1] = (unsigned char) (packetLength);
374 374 // DATA FIELD HEADER
375 375 packet->spare1_pusVersion_spare2 = SPARE1_PUSVERSION_SPARE2;
376 376 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
377 377 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE_3; // service subtype
378 378 packet->destinationID = TM_DESTINATION_ID_GROUND;
379 379 packet->time[BYTE_0] = INIT_CHAR;
380 380 packet->time[BYTE_1] = INIT_CHAR;
381 381 packet->time[BYTE_2] = INIT_CHAR;
382 382 packet->time[BYTE_3] = INIT_CHAR;
383 383 packet->time[BYTE_4] = INIT_CHAR;
384 384 packet->time[BYTE_5] = INIT_CHAR;
385 385 // AUXILIARY DATA HEADER
386 386 packet->sid = sid;
387 387 packet->pa_bia_status_info = INIT_CHAR;
388 388 packet->sy_lfr_common_parameters_spare = INIT_CHAR;
389 389 packet->sy_lfr_common_parameters = INIT_CHAR;
390 390 packet->acquisitionTime[BYTE_0] = INIT_CHAR;
391 391 packet->acquisitionTime[BYTE_1] = INIT_CHAR;
392 392 packet->acquisitionTime[BYTE_2] = INIT_CHAR;
393 393 packet->acquisitionTime[BYTE_3] = INIT_CHAR;
394 394 packet->acquisitionTime[BYTE_4] = INIT_CHAR;
395 395 packet->acquisitionTime[BYTE_5] = INIT_CHAR;
396 396 packet->pa_lfr_bp_blk_nr[0] = INIT_CHAR; // BLK_NR MSB
397 397 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
398 398 }
399 399
400 400 void BP_init_header_with_spare( bp_packet_with_spare *packet,
401 401 unsigned int apid, unsigned char sid,
402 402 unsigned int packetLength , unsigned char blkNr)
403 403 {
404 404 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
405 405 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
406 406 packet->reserved = INIT_CHAR;
407 407 packet->userApplication = CCSDS_USER_APP;
408 408 packet->packetID[0] = (unsigned char) (apid >> SHIFT_1_BYTE);
409 409 packet->packetID[1] = (unsigned char) (apid);
410 410 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
411 411 packet->packetSequenceControl[1] = INIT_CHAR;
412 412 packet->packetLength[0] = (unsigned char) (packetLength >> SHIFT_1_BYTE);
413 413 packet->packetLength[1] = (unsigned char) (packetLength);
414 414 // DATA FIELD HEADER
415 415 packet->spare1_pusVersion_spare2 = SPARE1_PUSVERSION_SPARE2;
416 416 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
417 417 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE_3; // service subtype
418 418 packet->destinationID = TM_DESTINATION_ID_GROUND;
419 419 // AUXILIARY DATA HEADER
420 420 packet->sid = sid;
421 421 packet->pa_bia_status_info = INIT_CHAR;
422 422 packet->sy_lfr_common_parameters_spare = INIT_CHAR;
423 423 packet->sy_lfr_common_parameters = INIT_CHAR;
424 424 packet->time[BYTE_0] = INIT_CHAR;
425 425 packet->time[BYTE_1] = INIT_CHAR;
426 426 packet->time[BYTE_2] = INIT_CHAR;
427 427 packet->time[BYTE_3] = INIT_CHAR;
428 428 packet->time[BYTE_4] = INIT_CHAR;
429 429 packet->time[BYTE_5] = INIT_CHAR;
430 430 packet->source_data_spare = INIT_CHAR;
431 431 packet->pa_lfr_bp_blk_nr[0] = INIT_CHAR; // BLK_NR MSB
432 432 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
433 433 }
434 434
435 435 void BP_send(char *data, rtems_id queue_id, unsigned int nbBytesToSend, unsigned int sid )
436 436 {
437 437 rtems_status_code status;
438 438
439 439 // SEND PACKET
440 440 status = rtems_message_queue_send( queue_id, data, nbBytesToSend);
441 441 if (status != RTEMS_SUCCESSFUL)
442 442 {
443 443 PRINTF1("ERR *** in BP_send *** ERR %d\n", (int) status)
444 444 }
445 445 }
446 446
447 447 void BP_send_s1_s2(char *data, rtems_id queue_id, unsigned int nbBytesToSend, unsigned int sid )
448 448 {
449 449 /** This function is used to send the BP paquets when needed.
450 450 *
451 451 * @param transitionCoarseTime is the requested transition time contained in the TC_LFR_ENTER_MODE
452 452 *
453 453 * @return void
454 454 *
455 455 * SBM1 and SBM2 paquets are sent depending on the type of the LFR mode transition.
456 456 * BURST paquets are sent everytime.
457 457 *
458 458 */
459 459
460 460 rtems_status_code status;
461 461
462 462 // SEND PACKET
463 463 // before lastValidTransitionDate, the data are drops even if they are ready
464 464 // this guarantees that no SBM packets will be received before the requested enter mode time
465 465 if ( time_management_regs->coarse_time >= lastValidEnterModeTime)
466 466 {
467 467 status = rtems_message_queue_send( queue_id, data, nbBytesToSend);
468 468 if (status != RTEMS_SUCCESSFUL)
469 469 {
470 470 PRINTF1("ERR *** in BP_send *** ERR %d\n", (int) status)
471 471 }
472 472 }
473 473 }
474 474
475 475 //******************
476 476 // general functions
477 477
478 478 void reset_sm_status( void )
479 479 {
480 480 // error
481 481 // 10 --------------- 9 ---------------- 8 ---------------- 7 ---------
482 482 // input_fif0_write_2 input_fifo_write_1 input_fifo_write_0 buffer_full
483 483 // ---------- 5 -- 4 -- 3 -- 2 -- 1 -- 0 --
484 484 // ready bits f2_1 f2_0 f1_1 f1_1 f0_1 f0_0
485 485
486 486 spectral_matrix_regs->status = BITS_STATUS_REG; // [0111 1111 1111]
487 487 }
488 488
489 489 void reset_spectral_matrix_regs( void )
490 490 {
491 491 /** This function resets the spectral matrices module registers.
492 492 *
493 493 * The registers affected by this function are located at the following offset addresses:
494 494 *
495 495 * - 0x00 config
496 496 * - 0x04 status
497 497 * - 0x08 matrixF0_Address0
498 498 * - 0x10 matrixFO_Address1
499 499 * - 0x14 matrixF1_Address
500 500 * - 0x18 matrixF2_Address
501 501 *
502 502 */
503 503
504 504 set_sm_irq_onError( 0 );
505 505
506 506 set_sm_irq_onNewMatrix( 0 );
507 507
508 508 reset_sm_status();
509 509
510 510 // F1
511 511 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->previous->buffer_address;
512 512 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
513 513 // F2
514 514 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->previous->buffer_address;
515 515 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
516 516 // F3
517 517 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address;
518 518 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
519 519
520 520 spectral_matrix_regs->matrix_length = DEFAULT_MATRIX_LENGTH; // 25 * 128 / 16 = 200 = 0xc8
521 521 }
522 522
523 523 void set_time( unsigned char *time, unsigned char * timeInBuffer )
524 524 {
525 525 time[BYTE_0] = timeInBuffer[BYTE_0];
526 526 time[BYTE_1] = timeInBuffer[BYTE_1];
527 527 time[BYTE_2] = timeInBuffer[BYTE_2];
528 528 time[BYTE_3] = timeInBuffer[BYTE_3];
529 529 time[BYTE_4] = timeInBuffer[BYTE_6];
530 530 time[BYTE_5] = timeInBuffer[BYTE_7];
531 531 }
532 532
533 533 unsigned long long int get_acquisition_time( unsigned char *timePtr )
534 534 {
535 535 unsigned long long int acquisitionTimeAslong;
536 536 acquisitionTimeAslong = INIT_CHAR;
537 537 acquisitionTimeAslong =
538 538 ( (unsigned long long int) (timePtr[BYTE_0] & SYNC_BIT_MASK) << SHIFT_5_BYTES ) // [0111 1111] mask the synchronization bit
539 539 + ( (unsigned long long int) timePtr[BYTE_1] << SHIFT_4_BYTES )
540 540 + ( (unsigned long long int) timePtr[BYTE_2] << SHIFT_3_BYTES )
541 541 + ( (unsigned long long int) timePtr[BYTE_3] << SHIFT_2_BYTES )
542 542 + ( (unsigned long long int) timePtr[BYTE_6] << SHIFT_1_BYTE )
543 543 + ( (unsigned long long int) timePtr[BYTE_7] );
544 544 return acquisitionTimeAslong;
545 545 }
546 546
547 547 unsigned char getSID( rtems_event_set event )
548 548 {
549 549 unsigned char sid;
550 550
551 551 rtems_event_set eventSetBURST;
552 552 rtems_event_set eventSetSBM;
553 553
554 554 sid = 0;
555 555
556 556 //******
557 557 // BURST
558 558 eventSetBURST = RTEMS_EVENT_BURST_BP1_F0
559 559 | RTEMS_EVENT_BURST_BP1_F1
560 560 | RTEMS_EVENT_BURST_BP2_F0
561 561 | RTEMS_EVENT_BURST_BP2_F1;
562 562
563 563 //****
564 564 // SBM
565 565 eventSetSBM = RTEMS_EVENT_SBM_BP1_F0
566 566 | RTEMS_EVENT_SBM_BP1_F1
567 567 | RTEMS_EVENT_SBM_BP2_F0
568 568 | RTEMS_EVENT_SBM_BP2_F1;
569 569
570 570 if (event & eventSetBURST)
571 571 {
572 572 sid = SID_BURST_BP1_F0;
573 573 }
574 574 else if (event & eventSetSBM)
575 575 {
576 576 sid = SID_SBM1_BP1_F0;
577 577 }
578 578 else
579 579 {
580 580 sid = 0;
581 581 }
582 582
583 583 return sid;
584 584 }
585 585
586 586 void extractReImVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
587 587 {
588 588 unsigned int i;
589 589 float re;
590 590 float im;
591 591
592 592 for (i=0; i<NB_BINS_PER_SM; i++){
593 593 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + (i * SM_BYTES_PER_VAL) ];
594 594 im = inputASM[ (asmComponent*NB_BINS_PER_SM) + (i * SM_BYTES_PER_VAL) + 1];
595 595 outputASM[ ( asmComponent *NB_BINS_PER_SM) + i] = re;
596 596 outputASM[ ((asmComponent+1)*NB_BINS_PER_SM) + i] = im;
597 597 }
598 598 }
599 599
600 600 void copyReVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
601 601 {
602 602 unsigned int i;
603 603 float re;
604 604
605 605 for (i=0; i<NB_BINS_PER_SM; i++){
606 606 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i];
607 607 outputASM[ (asmComponent*NB_BINS_PER_SM) + i] = re;
608 608 }
609 609 }
610 610
611 611 void ASM_patch( float *inputASM, float *outputASM )
612 612 {
613 613 extractReImVectors( inputASM, outputASM, ASM_COMP_B1B2); // b1b2
614 614 extractReImVectors( inputASM, outputASM, ASM_COMP_B1B3 ); // b1b3
615 615 extractReImVectors( inputASM, outputASM, ASM_COMP_B1E1 ); // b1e1
616 616 extractReImVectors( inputASM, outputASM, ASM_COMP_B1E2 ); // b1e2
617 617 extractReImVectors( inputASM, outputASM, ASM_COMP_B2B3 ); // b2b3
618 618 extractReImVectors( inputASM, outputASM, ASM_COMP_B2E1 ); // b2e1
619 619 extractReImVectors( inputASM, outputASM, ASM_COMP_B2E2 ); // b2e2
620 620 extractReImVectors( inputASM, outputASM, ASM_COMP_B3E1 ); // b3e1
621 621 extractReImVectors( inputASM, outputASM, ASM_COMP_B3E2 ); // b3e2
622 622 extractReImVectors( inputASM, outputASM, ASM_COMP_E1E2 ); // e1e2
623 623
624 624 copyReVectors(inputASM, outputASM, ASM_COMP_B1B1 ); // b1b1
625 625 copyReVectors(inputASM, outputASM, ASM_COMP_B2B2 ); // b2b2
626 626 copyReVectors(inputASM, outputASM, ASM_COMP_B3B3); // b3b3
627 627 copyReVectors(inputASM, outputASM, ASM_COMP_E1E1); // e1e1
628 628 copyReVectors(inputASM, outputASM, ASM_COMP_E2E2); // e2e2
629 629 }
630 630
631 631 void ASM_compress_reorganize_and_divide_mask(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
632 632 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage,
633 633 unsigned char ASMIndexStart,
634 634 unsigned char channel )
635 635 {
636 636 //*************
637 637 // input format
638 638 // component0[0 .. 127] component1[0 .. 127] .. component24[0 .. 127]
639 639 //**************
640 640 // output format
641 641 // matr0[0 .. 24] matr1[0 .. 24] .. matr127[0 .. 24]
642 642 //************
643 643 // compression
644 644 // matr0[0 .. 24] matr1[0 .. 24] .. matr11[0 .. 24] => f0 NORM
645 645 // matr0[0 .. 24] matr1[0 .. 24] .. matr22[0 .. 24] => f0 BURST, SBM
646 646
647 647 int frequencyBin;
648 648 int asmComponent;
649 649 int offsetASM;
650 650 int offsetCompressed;
651 651 int offsetFBin;
652 652 int fBinMask;
653 653 int k;
654 654
655 655 // BUILD DATA
656 656 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
657 657 {
658 658 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
659 659 {
660 660 offsetCompressed = // NO TIME OFFSET
661 661 (frequencyBin * NB_VALUES_PER_SM)
662 662 + asmComponent;
663 663 offsetASM = // NO TIME OFFSET
664 664 (asmComponent * NB_BINS_PER_SM)
665 665 + ASMIndexStart
666 666 + (frequencyBin * nbBinsToAverage);
667 667 offsetFBin = ASMIndexStart
668 668 + (frequencyBin * nbBinsToAverage);
669 669 compressed_spec_mat[ offsetCompressed ] = 0;
670 670 for ( k = 0; k < nbBinsToAverage; k++ )
671 671 {
672 672 fBinMask = getFBinMask( offsetFBin + k, channel );
673 673 compressed_spec_mat[offsetCompressed ] = compressed_spec_mat[ offsetCompressed ]
674 674 + (averaged_spec_mat[ offsetASM + k ] * fBinMask);
675 675 }
676 676 if (divider != 0)
677 677 {
678 678 compressed_spec_mat[ offsetCompressed ] = compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
679 679 }
680 680 else
681 681 {
682 682 compressed_spec_mat[ offsetCompressed ] = INIT_FLOAT;
683 683 }
684 684 }
685 685 }
686 686
687 687 }
688 688
689 689 int getFBinMask( int index, unsigned char channel )
690 690 {
691 691 unsigned int indexInChar;
692 692 unsigned int indexInTheChar;
693 693 int fbin;
694 694 unsigned char *sy_lfr_fbins_fx_word1;
695 695
696 696 sy_lfr_fbins_fx_word1 = parameter_dump_packet.sy_lfr_fbins_f0_word1;
697 697
698 698 switch(channel)
699 699 {
700 700 case CHANNELF0:
701 701 sy_lfr_fbins_fx_word1 = fbins_masks.merged_fbins_mask_f0;
702 702 break;
703 703 case CHANNELF1:
704 704 sy_lfr_fbins_fx_word1 = fbins_masks.merged_fbins_mask_f1;
705 705 break;
706 706 case CHANNELF2:
707 707 sy_lfr_fbins_fx_word1 = fbins_masks.merged_fbins_mask_f2;
708 708 break;
709 709 default:
710 710 PRINTF("ERR *** in getFBinMask, wrong frequency channel")
711 711 }
712 712
713 713 indexInChar = index >> SHIFT_3_BITS;
714 714 indexInTheChar = index - (indexInChar * BITS_PER_BYTE);
715 715
716 716 fbin = (int) ((sy_lfr_fbins_fx_word1[ BYTES_PER_MASK - 1 - indexInChar] >> indexInTheChar) & 1);
717 717
718 718 return fbin;
719 719 }
720 720
721 721 unsigned char acquisitionTimeIsValid( unsigned int coarseTime, unsigned int fineTime, unsigned char channel)
722 722 {
723 u_int64_t acquisitionTime;
723 u_int64_t acquisitionTimeStart;
724 u_int64_t acquisitionTimeStop;
724 725 u_int64_t timecodeReference;
725 726 u_int64_t offsetInFineTime;
726 727 u_int64_t shiftInFineTime;
727 728 u_int64_t tBadInFineTime;
728 729 u_int64_t acquisitionTimeRangeMin;
729 730 u_int64_t acquisitionTimeRangeMax;
730 731 unsigned char pasFilteringIsEnabled;
731 732 unsigned char ret;
732 733
733 734 pasFilteringIsEnabled = (filterPar.spare_sy_lfr_pas_filter_enabled & 1); // [0000 0001]
734 735 ret = 1;
735 736
736 737 // compute acquisition time from caoarseTime and fineTime
737 acquisitionTime = ( ((u_int64_t)coarseTime) << SHIFT_2_BYTES )
738 acquisitionTimeStart = ( ((u_int64_t)coarseTime) << SHIFT_2_BYTES )
738 739 + (u_int64_t) fineTime;
740 switch(channel)
741 {
742 case CHANNELF0:
743 acquisitionTimeStop = acquisitionTimeStart + FINETIME_PER_SM_F0;
744 break;
745 case CHANNELF1:
746 acquisitionTimeStop = acquisitionTimeStart + FINETIME_PER_SM_F1;
747 break;
748 case CHANNELF2:
749 acquisitionTimeStop = acquisitionTimeStart + FINETIME_PER_SM_F2;
750 break;
751 }
739 752
740 753 // compute the timecode reference
741 754 timecodeReference = (u_int64_t) ( (floor( ((double) coarseTime) / ((double) filterPar.sy_lfr_pas_filter_modulus) )
742 755 * ((double) filterPar.sy_lfr_pas_filter_modulus)) * CONST_65536 );
743 756
744 757 // compute the acquitionTime range
745 758 offsetInFineTime = ((double) filterPar.sy_lfr_pas_filter_offset) * CONST_65536;
746 759 shiftInFineTime = ((double) filterPar.sy_lfr_pas_filter_shift) * CONST_65536;
747 760 tBadInFineTime = ((double) filterPar.sy_lfr_pas_filter_tbad) * CONST_65536;
748 761
749 762 acquisitionTimeRangeMin =
750 763 timecodeReference
751 764 + offsetInFineTime
752 765 + shiftInFineTime
753 766 - acquisitionDurations[channel];
754 767 acquisitionTimeRangeMax =
755 768 timecodeReference
756 769 + offsetInFineTime
757 770 + shiftInFineTime
758 771 + tBadInFineTime;
759 772
760 if ( (acquisitionTime >= acquisitionTimeRangeMin)
761 && (acquisitionTime <= acquisitionTimeRangeMax)
773 if ( (acquisitionTimeStart >= acquisitionTimeRangeMin)
774 && (acquisitionTimeStart <= acquisitionTimeRangeMax)
762 775 && (pasFilteringIsEnabled == 1) )
763 776 {
764 777 ret = 0; // the acquisition time is INSIDE the range, the matrix shall be ignored
765 778 }
766 779 else
767 780 {
768 781 ret = 1; // the acquisition time is OUTSIDE the range, the matrix can be used for the averaging
769 782 }
770 783
784 // the last sample of the data used to compute the matrix shall not be INSIDE the range, test it now, it depends on the channel
785 if (ret == 1)
786 {
787 if ( (acquisitionTimeStop >= acquisitionTimeRangeMin)
788 && (acquisitionTimeStop <= acquisitionTimeRangeMax)
789 && (pasFilteringIsEnabled == 1) )
790 {
791 ret = 0; // the acquisition time is INSIDE the range, the matrix shall be ignored
792 }
793 else
794 {
795 ret = 1; // the acquisition time is OUTSIDE the range, the matrix can be used for the averaging
796 }
797 }
798
771 799 // printf("coarseTime = %x, fineTime = %x\n",
772 800 // coarseTime,
773 801 // fineTime);
774 802
775 803 // printf("[ret = %d] *** acquisitionTime = %f, Reference = %f",
776 804 // ret,
777 805 // acquisitionTime / 65536.,
778 806 // timecodeReference / 65536.);
779 807
780 808 // printf(", Min = %f, Max = %f\n",
781 809 // acquisitionTimeRangeMin / 65536.,
782 810 // acquisitionTimeRangeMax / 65536.);
783 811
784 812 return ret;
785 813 }
786 814
787 815 void init_kcoeff_sbm_from_kcoeff_norm(float *input_kcoeff, float *output_kcoeff, unsigned char nb_bins_norm)
788 816 {
789 817 unsigned char bin;
790 818 unsigned char kcoeff;
791 819
792 820 for (bin=0; bin<nb_bins_norm; bin++)
793 821 {
794 822 for (kcoeff=0; kcoeff<NB_K_COEFF_PER_BIN; kcoeff++)
795 823 {
796 824 output_kcoeff[ ( (bin * NB_K_COEFF_PER_BIN) + kcoeff ) * SBM_COEFF_PER_NORM_COEFF ]
797 825 = input_kcoeff[ (bin*NB_K_COEFF_PER_BIN) + kcoeff ];
798 826 output_kcoeff[ ( ( (bin * NB_K_COEFF_PER_BIN ) + kcoeff) * SBM_COEFF_PER_NORM_COEFF ) + 1 ]
799 827 = input_kcoeff[ (bin*NB_K_COEFF_PER_BIN) + kcoeff ];
800 828 }
801 829 }
802 830 }
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