HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/LFR_FSW Commit - r253:cc5f75e74b54

Snapshot resynchro rewritten, drift is measured one snapshot in two...

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r253:cc5f75e74b54 R3a

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r253:cc5f75e74b54

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header/GscMemoryLPP.hpp +3 -3

             #ifndef GSCMEMORY_HPP_
             #define GSCMEMORY_HPP_
             #ifndef LEON3
             #define LEON3
             #endif
             #define REGS_ADDR_PLUGANDPLAY   0xFFFFF000
             #define ASR16_REG_ADDRESS       0x90400040  // Ancillary State Register 16 = Register protection control register (FT only)
             #define DEVICEID_LEON3      0x003
             #define DEVICEID_LEON3FT    0x053
             #define VENDORID_GAISLER    0x01
             // CCR
             #define POS_ITE             12
             #define COUNTER_FIELD_ITE   0x00003000      // 0000 0000 0000 0000 0011 0000 0000 0000
             #define COUNTER_MASK_ITE    0xffffcfff      // 1111 1111 1111 1111 1100 1111 1111 1111
             #define POS_IDE             10
             #define COUNTER_FIELD_IDE   0x00000c00      // 0000 0000 0000 0000 0000 1100 0000 0000
             #define COUNTER_MASK_IDE    0xfffff3ff      // 1111 1111 1111 1111 1111 0011 1111 1111
             //
             #define POS_DTE             8
             #define COUNTER_FIELD_DTE   0x00000300      // 0000 0000 0000 0000 0000 0011 0000 0000
             #define COUNTER_MASK_DTE    0xfffffcff      // 1111 1111 1111 1111 1111 1100 1111 1111
             #define POS_DDE             6
             #define COUNTER_FIELD_DDE   0x000000c0      // 0000 0000 0000 0000 0000 0000 1100 0000
             #define COUNTER_MASK_DDE    0xffffff3f      // 1111 1111 1111 1111 1111 1111 0011 1111
             // ASR16
             #define POS_FPRF            27
             #define COUNTER_FIELD_FPRF  0x38000000      // 0011 1000 0000 0000 0000 0000 0000 0000
             #define COUNTER_MASK_FPRF   0xc7ffffff      // 1100 0111 1111 1111 1111 1111 1111 1111
             #define POS_IURF            11
             #define COUNTER_FIELD_IURF  0x00003800      // 0000 0000 0000 0000 0011 1000 0000 0000
             #define COUNTER_MASK_IURF   0xffffc7ff      // 1111 1111 1111 1111 1100 0111 1111 1111
             volatile unsigned int *asr16Ptr = (volatile unsigned int *) ASR16_REG_ADDRESS;
             static inline void flushCache()
             {
                 /**
                 * Flush the data cache and the instruction cache.
                 *
                 * @param void
                 *
                 * @return void
                 */
                 asm("flush");
             }
             //***************************
             // CCR Cache control register
             static unsigned int CCR_getValue()
             {
                 unsigned int cacheControlRegister = 0;
                 __asm__ __volatile__("lda [%%g0] 2, %0" : "=r"(cacheControlRegister) : );
                 return cacheControlRegister;
             }
             static void CCR_setValue(unsigned int cacheControlRegister)
             {
                 __asm__ __volatile__("sta %0, [%%g0] 2" : : "r"(cacheControlRegister));
             }
             static void CCR_resetCacheControlRegister()
             {
                 unsigned int cacheControlRegister;
                 cacheControlRegister = 0x00;
                 CCR_setValue(cacheControlRegister);
             }
             static void CCR_enableInstructionCache()
             {
                 // [1:0] Instruction Cache state (ICS)
                 // Indicates the current data cache state according to the following: X0 = disabled, 01 = frozen, 11 = enabled.
                 unsigned int cacheControlRegister;
                 cacheControlRegister = CCR_getValue();
                 cacheControlRegister = (cacheControlRegister | 0x3);
                 CCR_setValue(cacheControlRegister);
             }
             static void CCR_enableDataCache()
             {
                 // [3:2] Data Cache state (DCS)
                 // Indicates the current data cache state according to the following: X0 = disabled, 01 = frozen, 11 = enabled.
                 unsigned int cacheControlRegister;
                 cacheControlRegister = CCR_getValue();
                 cacheControlRegister = (cacheControlRegister | 0xc);
                 CCR_setValue(cacheControlRegister);
             }
             static void CCR_faultTolerantScheme()
             {
                 // [20:19] FT scheme (FT) - “00” = no FT, “01” = 4-bit checking implemented
                 unsigned int cacheControlRegister;
                 unsigned int *plugAndPlayRegister;
                 unsigned int vendorId;
                 unsigned int deviceId;
                 plugAndPlayRegister = (unsigned int*) REGS_ADDR_PLUGANDPLAY;
                 vendorId = ( (*plugAndPlayRegister) & 0xff000000 ) >> 24;
                 deviceId = ( (*plugAndPlayRegister) & 0x00fff000 ) >> 12;
                 if( (vendorId == VENDORID_GAISLER) & (deviceId ==DEVICEID_LEON3FT) )
                 {
-                    PRINTF("in faultTolerantScheme *** Leon3FT detected, configure the CCR FT bits");
+                    PRINTF("in faultTolerantScheme *** Leon3FT detected, configure the CCR FT bits\n");
                     cacheControlRegister = CCR_getValue();
                     cacheControlRegister = (cacheControlRegister | 0xc);
                     CCR_setValue(cacheControlRegister);
                 }
                 else
                 {
                     PRINTF("in faultTolerantScheme *** not a Leon3FT, no need to configure the CCR FT bits\n");
                     PRINTF2("                       *** vendorID = 0x%x, deviceId = 0x%x\n", vendorId, deviceId);
                 }
             }
             static void CCR_enableInstructionBurstFetch()
             {
                 // [16] Instruction burst fetch (IB). This bit enables burst fill during instruction fetch.
                 unsigned int cacheControlRegister;
                 cacheControlRegister = CCR_getValue();
                 // set the bit IB to 1
                 cacheControlRegister = (cacheControlRegister | 0x10000);
                 CCR_setValue(cacheControlRegister);
             }
             static void CCR_getInstructionAndDataErrorCounters( unsigned int* instructionErrorCounter, unsigned int* dataErrorCounter )
             {
                 // [13:12] Instruction Tag Errors (ITE) - Number of detected parity errors in the instruction tag cache.
                 // Only available if fault-tolerance is enabled (FT field in this register is non-zero).
                 // [11:10] Instruction Data Errors (IDE) - Number of detected parity errors in the instruction data cache.
                 // Only available if fault-tolerance is enabled (FT field in this register is non-zero).
                 unsigned int cacheControlRegister;
                 unsigned int iTE;
                 unsigned int iDE;
                 unsigned int dTE;
                 unsigned int dDE;
                 cacheControlRegister = CCR_getValue();
                 iTE = (cacheControlRegister & COUNTER_FIELD_ITE) >> POS_ITE;
                 iDE = (cacheControlRegister & COUNTER_FIELD_IDE) >> POS_IDE;
                 dTE = (cacheControlRegister & COUNTER_FIELD_DTE) >> POS_DTE;
                 dDE = (cacheControlRegister & COUNTER_FIELD_DDE) >> POS_DDE;
                 *instructionErrorCounter = iTE + iDE;
                 *dataErrorCounter        = dTE + dDE;
                 // reset counters
                 cacheControlRegister = cacheControlRegister
                         & COUNTER_FIELD_ITE
                         & COUNTER_FIELD_IDE
                         & COUNTER_FIELD_DTE
                         & COUNTER_FIELD_DDE;
                 CCR_setValue(cacheControlRegister);
             }
             //*******************************************
             // ASR16 Register protection control register
-            static unsigned int ASR16_get_FPRF_IURF_ErrorCounters( unsigned int* fprfErrorCounter, unsigned int* iurfErrorCounter)
+            static void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int* fprfErrorCounter, unsigned int* iurfErrorCounter)
             {
                 /** This function is used to retrieve the integer unit register file error counter and the floating point unit
                  *  register file error counter
                  *
                  * @return void
                  *
                  * [29:27] FP RF error counter - Number of detected parity errors in the FP register file.
                  * [13:11] IU RF error counter - Number of detected parity errors in the IU register file.
                  *
                  */
                 unsigned int asr16;
                 asr16 = *asr16Ptr;
                 *fprfErrorCounter = ( asr16 & COUNTER_FIELD_FPRF ) >> POS_FPRF;
                 *iurfErrorCounter = ( asr16 & COUNTER_FIELD_IURF ) >> POS_IURF;
                 // reset the counter to 0
-                asr16 = asr16Ptr
+                asr16 = asr16
                         & COUNTER_MASK_FPRF
                         & COUNTER_FIELD_IURF;
                 *asr16Ptr = asr16;
             }
             #endif /* GSCMEMORY_HPP_ */

header/fsw_spacewire.h +1 -1

             #ifndef FSW_SPACEWIRE_H_INCLUDED
             #define FSW_SPACEWIRE_H_INCLUDED
             #include <rtems.h>
             #include <grspw.h>
             #include <fcntl.h>      // for  O_RDWR
             #include <unistd.h>     // for the read call
             #include <sys/ioctl.h>  // for the ioctl call
             #include <errno.h>
             #include "fsw_params.h"
             #include "tc_handler.h"
             #include "fsw_init.h"
             extern spw_stats spacewire_stats;
             extern spw_stats spacewire_stats_backup;
             extern rtems_name timecode_timer_name;
             extern rtems_id timecode_timer_id;
             // RTEMS TASK
             rtems_task spiq_task( rtems_task_argument argument );
             rtems_task recv_task( rtems_task_argument unused );
             rtems_task send_task( rtems_task_argument argument );
             rtems_task wtdg_task( rtems_task_argument argument );
             int spacewire_open_link( void );
             int spacewire_start_link( int fd );
             int spacewire_stop_and_start_link( int fd );
             int spacewire_configure_link(int fd );
-            int spacewire_reset_link( void );
+            int spacewire_several_connect_attemps( void );
             void spacewire_set_NP( unsigned char val, unsigned int regAddr ); // No Port force
             void spacewire_set_RE( unsigned char val, unsigned int regAddr ); // RMAP Enable
             void spacewire_compute_stats_offsets( void );
             void spacewire_update_statistics( void );
             void increase_unsigned_char_counter( unsigned char *counter );
             void init_header_cwf( Header_TM_LFR_SCIENCE_CWF_t *header );
             void init_header_swf( Header_TM_LFR_SCIENCE_SWF_t *header );
             void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header );
             int spw_send_waveform_CWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
             int spw_send_waveform_SWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_SWF_t *header );
             int spw_send_waveform_CWF3_light( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
             void spw_send_asm_f0( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
             void spw_send_asm_f1( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
             void spw_send_asm_f2( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
             void spw_send_k_dump( ring_node *ring_node_to_send );
             rtems_timer_service_routine timecode_timer_routine( rtems_id timer_id, void *user_data );
             unsigned int check_timecode_and_previous_timecode_coherency(unsigned char currentTimecodeCtr);
             unsigned int check_timecode_and_internal_time_coherency(unsigned char timecode, unsigned char internalTime);
             void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc );
             void (*grspw_timecode_callback) ( void *pDev, void *regs, int minor, unsigned int tc );
             #endif // FSW_SPACEWIRE_H_INCLUDED

python_scripts/LFRControlPlugin_reload_fsw.py +1 -1

             # LOAD FSW USING LINK 1
             SpwPlugin0.StarDundeeSelectLinkNumber( 1 )
             dsu3plugin0.openFile("/opt/DEV_PLE/FSW-qt/bin/fsw")
             #dsu3plugin0.openFile("/opt/LFR/LFR-FSW/2.0.2.3/fsw")
             dsu3plugin0.loadFile()
             dsu3plugin0.run()
             # START SENDING TIMECODES AT 1 Hz
-            SpwPlugin0.StarDundeeStartTimecodes( 1 )
+            #SpwPlugin0.StarDundeeStartTimecodes( 1 )
             # it is possible to change the time code frequency
             #RMAPPlugin0.changeTimecodeFrequency(2)

src/fsw_init.c +2 -3

             /** This is the RTEMS initialization module.
              *
              * @file
              * @author P. LEROY
              *
              * This module contains two very different information:
              * - specific instructions to configure the compilation of the RTEMS executive
              * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
              *
              */
             //*************************
             // GPL reminder to be added
             //*************************
             #include <rtems.h>
             /* configuration information */
             #define CONFIGURE_INIT
             #include <bsp.h> /* for device driver prototypes */
             /* configuration information */
             #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
             #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
             #define CONFIGURE_MAXIMUM_TASKS 20
             #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
             #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
             #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
             #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
             #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
             #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
             #define CONFIGURE_MAXIMUM_DRIVERS 16
             #define CONFIGURE_MAXIMUM_PERIODS 5
             #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [wtdg] [spacewire_reset_link]
             #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
             #ifdef PRINT_STACK_REPORT
                 #define CONFIGURE_STACK_CHECKER_ENABLED
             #endif
             #include <rtems/confdefs.h>
             /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
             #ifdef RTEMS_DRVMGR_STARTUP
                 #ifdef LEON3
                 /* Add Timer and UART Driver */
                     #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
                         #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
                     #endif
                     #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
                         #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
                     #endif
                 #endif
                 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW   /* GRSPW Driver */
                 #include <drvmgr/drvmgr_confdefs.h>
             #endif
             #include "fsw_init.h"
             #include "fsw_config.c"
             #include "GscMemoryLPP.hpp"
             void initCache()
             {
                 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
                 // These should only be read and written using 32-bit LDA/STA instructions.
                 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
                 // The table below shows the register addresses:
                 //      0x00 Cache control register
                 //      0x04 Reserved
                 //      0x08 Instruction cache configuration register
                 //      0x0C Data cache configuration register
                 // Cache Control Register Leon3 / Leon3FT
                 // 31..30  29   28  27..24  23  22  21  20..19  18  17  16
                 //         RFT  PS  TB      DS  FD  FI  FT          ST  IB
                 // 15  14  13..12  11..10  9..8  7..6  5   4   3..2  1..0
                 // IP  DP  ITE     IDE     DTE   DDE   DF  IF  DCS   ICS
                 unsigned int cacheControlRegister;
                 cacheControlRegister = CCR_getValue();
                 PRINTF1("(0) cacheControlRegister = %x\n", cacheControlRegister);
                 CCR_resetCacheControlRegister();
                 CCR_enableInstructionCache();       // ICS bits
                 CCR_enableDataCache();              // DCS bits
                 CCR_enableInstructionBurstFetch();  // IB  bit
                 cacheControlRegister = CCR_getValue();
                 PRINTF1("(1) cacheControlRegister = %x\n", cacheControlRegister);
                 CCR_faultTolerantScheme();
-                // FT activation
+                PRINTF("\n");
             }
             rtems_task Init( rtems_task_argument ignored )
             {
                 /** This is the RTEMS INIT taks, it is the first task launched by the system.
                  *
                  * @param unused is the starting argument of the RTEMS task
                  *
                  * The INIT task create and run all other RTEMS tasks.
                  *
                  */
                 //***********
                 // INIT CACHE
                 unsigned char *vhdlVersion;
                 reset_lfr();
                 reset_local_time();
                 rtems_cpu_usage_reset();
                 rtems_status_code status;
                 rtems_status_code status_spw;
                 rtems_isr_entry  old_isr_handler;
                 // UART settings
-                send_console_outputs_on_apbuart_port();
+                enable_apbuart_transmitter();
                 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
-                enable_apbuart_transmitter();
                 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
                 PRINTF("\n\n\n\n\n")
                 initCache();
                 PRINTF("*************************\n")
                 PRINTF("** LFR Flight Software **\n")
                 PRINTF1("** %d.", SW_VERSION_N1)
                 PRINTF1("%d."   , SW_VERSION_N2)
                 PRINTF1("%d."   , SW_VERSION_N3)
                 PRINTF1("%d            **\n", SW_VERSION_N4)
                 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
                 PRINTF("** VHDL                **\n")
                 PRINTF1("** %d.", vhdlVersion[1])
                 PRINTF1("%d."   , vhdlVersion[2])
                 PRINTF1("%d              **\n", vhdlVersion[3])
                 PRINTF("*************************\n")
                 PRINTF("\n\n")
                 init_parameter_dump();
                 init_kcoefficients_dump();
                 init_local_mode_parameters();
                 init_housekeeping_parameters();
                 init_k_coefficients_prc0();
                 init_k_coefficients_prc1();
                 init_k_coefficients_prc2();
                 pa_bia_status_info = 0x00;
                 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE  );
                 // waveform picker initialization
                 WFP_init_rings();  LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG );    // initialize the waveform rings
                 WFP_reset_current_ring_nodes();
                 reset_waveform_picker_regs();
                 // spectral matrices initialization
                 SM_init_rings();            // initialize spectral matrices rings
                 SM_reset_current_ring_nodes();
                 reset_spectral_matrix_regs();
                 // configure calibration
                 configureCalibration( false );   // true means interleaved mode, false is for normal mode
                 updateLFRCurrentMode();
                 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
                 create_names();                             // create all names
                 status = create_timecode_timer();           // create the timer used by timecode_irq_handler
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
                 }
                 status = create_message_queues();           // create message queues
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
                 }
                 status = create_all_tasks();                // create all tasks
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
                 }
                 // **************************
                 // <SPACEWIRE INITIALIZATION>
                 grspw_timecode_callback = &timecode_irq_handler;
                 status_spw = spacewire_open_link();     // (1) open the link
                 if ( status_spw != RTEMS_SUCCESSFUL )
                 {
                     PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
                 }
                 if ( status_spw == RTEMS_SUCCESSFUL )   // (2) configure the link
                 {
                     status_spw = spacewire_configure_link( fdSPW );
                     if ( status_spw != RTEMS_SUCCESSFUL )
                     {
                         PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
                     }
                 }
                 if ( status_spw == RTEMS_SUCCESSFUL)    // (3) start the link
                 {
                     status_spw = spacewire_start_link( fdSPW );
                     if (  status_spw != RTEMS_SUCCESSFUL )
                     {
                         PRINTF1("in INIT *** ERR spacewire_start_link code %d\n",  status_spw )
                     }
                 }
                 // </SPACEWIRE INITIALIZATION>
                 // ***************************
                 status = start_all_tasks();     // start all tasks
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
                 }
                 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
                 status = start_recv_send_tasks();
                 if ( status != RTEMS_SUCCESSFUL )
                 {
                     PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n",  status )
                 }
                 // suspend science tasks, they will be restarted later depending on the mode
                 status = suspend_science_tasks();   // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
                 }
                 // configure IRQ handling for the waveform picker unit
                 status = rtems_interrupt_catch( waveforms_isr,
                                                IRQ_SPARC_WAVEFORM_PICKER,
                                                &old_isr_handler) ;
                 // configure IRQ handling for the spectral matrices unit
                 status = rtems_interrupt_catch( spectral_matrices_isr,
                                                IRQ_SPARC_SPECTRAL_MATRIX,
                                                &old_isr_handler) ;
                 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
                 if ( status_spw != RTEMS_SUCCESSFUL )
                 {
                     status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
                     if ( status != RTEMS_SUCCESSFUL ) {
                         PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n",  status )
                     }
                 }
                 BOOT_PRINTF("delete INIT\n")
                 set_hk_lfr_sc_potential_flag( true );
                 status = rtems_task_delete(RTEMS_SELF);
             }
             void init_local_mode_parameters( void )
             {
                 /** This function initialize the param_local global variable with default values.
                  *
                  */
                 unsigned int i;
                 // LOCAL PARAMETERS
                 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
                 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
                 BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX)
                 // init sequence counters
                 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
                 {
                     sequenceCounters_TC_EXE[i] = 0x00;
                     sequenceCounters_TM_DUMP[i] = 0x00;
                 }
                 sequenceCounters_SCIENCE_NORMAL_BURST = 0x00;
                 sequenceCounters_SCIENCE_SBM1_SBM2 =    0x00;
                 sequenceCounterHK =                     TM_PACKET_SEQ_CTRL_STANDALONE << 8;
             }
             void reset_local_time( void )
             {
                 time_management_regs->ctrl = time_management_regs->ctrl | 0x02;  // [0010] software reset, coarse time = 0x80000000
             }
             void create_names( void ) // create all names for tasks and queues
             {
                 /** This function creates all RTEMS names used in the software for tasks and queues.
                  *
                  * @return RTEMS directive status codes:
                  * - RTEMS_SUCCESSFUL - successful completion
                  *
                  */
                 // task names
                 Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' );
                 Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' );
                 Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' );
                 Task_name[TASKID_LOAD] = rtems_build_name( 'L', 'O', 'A', 'D' );
                 Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' );
                 Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' );
                 Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' );
                 Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' );
                 Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' );
                 Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' );
                 Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' );
                 Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' );
                 Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' );
                 Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' );
                 Task_name[TASKID_WTDG] = rtems_build_name( 'W', 'T', 'D', 'G' );
                 Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' );
                 Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' );
                 Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' );
                 Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' );
                 // rate monotonic period names
                 name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' );
                 misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' );
                 misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' );
                 misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' );