@@ -1,131 +1,165 | |||
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1 | 1 | #ifndef FSW_MISC_H_INCLUDED |
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2 | 2 | #define FSW_MISC_H_INCLUDED |
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3 | 3 | |
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4 | 4 | #include <rtems.h> |
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5 | 5 | #include <stdio.h> |
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6 | 6 | #include <grspw.h> |
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7 | 7 | #include <grlib_regs.h> |
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8 | 8 | |
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9 | 9 | #include "fsw_params.h" |
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10 | 10 | #include "fsw_spacewire.h" |
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11 | 11 | #include "lfr_cpu_usage_report.h" |
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12 | 12 | |
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13 | 13 | #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0 |
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14 | 14 | #define WATCHDOG_LOOP_PRINTF 10 |
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15 | 15 | #define WATCHDOG_LOOP_DEBUG 3 |
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16 | 16 | |
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17 | 17 | #define DUMB_MESSAGE_NB 15 |
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18 | 18 | #define NB_RTEMS_EVENTS 32 |
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19 | 19 | #define EVENT_12 12 |
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20 | 20 | #define EVENT_13 13 |
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21 | 21 | #define EVENT_14 14 |
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22 | 22 | #define DUMB_MESSAGE_0 "in DUMB *** default" |
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23 | 23 | #define DUMB_MESSAGE_1 "in DUMB *** timecode_irq_handler" |
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24 | 24 | #define DUMB_MESSAGE_2 "in DUMB *** f3 buffer changed" |
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25 | 25 | #define DUMB_MESSAGE_3 "in DUMB *** in SMIQ *** Error sending event to AVF0" |
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26 | 26 | #define DUMB_MESSAGE_4 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ" |
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27 | 27 | #define DUMB_MESSAGE_5 "in DUMB *** waveforms_simulator_isr" |
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28 | 28 | #define DUMB_MESSAGE_6 "VHDL SM *** two buffers f0 ready" |
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29 | 29 | #define DUMB_MESSAGE_7 "ready for dump" |
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30 | 30 | #define DUMB_MESSAGE_8 "VHDL ERR *** spectral matrix" |
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31 | 31 | #define DUMB_MESSAGE_9 "tick" |
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32 | 32 | #define DUMB_MESSAGE_10 "VHDL ERR *** waveform picker" |
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33 | 33 | #define DUMB_MESSAGE_11 "VHDL ERR *** unexpected ready matrix values" |
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34 | 34 | #define DUMB_MESSAGE_12 "WATCHDOG timer" |
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35 | 35 | #define DUMB_MESSAGE_13 "TIMECODE timer" |
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36 | 36 | #define DUMB_MESSAGE_14 "TIMECODE ISR" |
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37 | 37 | |
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38 | 38 | enum lfr_reset_cause_t{ |
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39 | 39 | UNKNOWN_CAUSE, |
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40 | 40 | POWER_ON, |
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41 | 41 | TC_RESET, |
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42 | 42 | WATCHDOG, |
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43 | 43 | ERROR_RESET, |
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44 | 44 | UNEXP_RESET |
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45 | 45 | }; |
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46 | 46 | |
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47 | 47 | typedef struct{ |
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48 | 48 | unsigned char dpu_spw_parity; |
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49 | 49 | unsigned char dpu_spw_disconnect; |
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50 | 50 | unsigned char dpu_spw_escape; |
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51 | 51 | unsigned char dpu_spw_credit; |
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52 | 52 | unsigned char dpu_spw_write_sync; |
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53 | 53 | unsigned char timecode_erroneous; |
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54 | 54 | unsigned char timecode_missing; |
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55 | 55 | unsigned char timecode_invalid; |
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56 | 56 | unsigned char time_timecode_it; |
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57 | 57 | unsigned char time_not_synchro; |
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58 | 58 | unsigned char time_timecode_ctr; |
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59 | 59 | unsigned char ahb_correctable; |
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60 | 60 | } hk_lfr_le_t; |
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61 | 61 | |
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62 | 62 | typedef struct{ |
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63 | 63 | unsigned char dpu_spw_early_eop; |
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64 | 64 | unsigned char dpu_spw_invalid_addr; |
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65 | 65 | unsigned char dpu_spw_eep; |
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66 | 66 | unsigned char dpu_spw_rx_too_big; |
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67 | 67 | } hk_lfr_me_t; |
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68 | 68 | |
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69 | #define B00 23 | |
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70 | #define B01 23 | |
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71 | #define B02 0 | |
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72 | #define B10 1024 | |
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73 | #define B11 -1771 | |
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74 | #define B12 1024 | |
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75 | #define B20 1024 | |
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76 | #define B21 -1937 | |
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77 | #define B22 1024 | |
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78 | ||
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79 | #define A00 1 | |
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80 | #define A01 -28324 | |
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81 | #define A02 0 | |
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82 | #define A10 1 | |
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83 | #define A11 -1828 | |
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84 | #define A12 822 | |
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85 | #define A20 1 | |
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86 | #define A21 -1956 | |
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87 | #define A22 950 | |
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88 | ||
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89 | #define G0 15 | |
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90 | #define G1 10 | |
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91 | #define G2 10 | |
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92 | ||
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93 | #define NB_COEFFS 3 | |
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94 | #define COEFF0 0 | |
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95 | #define COEFF1 1 | |
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96 | #define COEFF2 2 | |
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97 | ||
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98 | typedef struct filter_ctx | |
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99 | { | |
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100 | int W[NB_COEFFS][NB_COEFFS]; | |
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101 | }filter_ctx; | |
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102 | ||
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69 | 103 | extern gptimer_regs_t *gptimer_regs; |
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70 | 104 | extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* ); |
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71 | 105 | extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* ); |
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72 | 106 | |
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73 | 107 | extern rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic |
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74 | 108 | extern rtems_id HK_id;// id of the HK rate monotonic period |
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75 | 109 | extern rtems_name name_avgv_rate_monotonic; // name of the AVGV rate monotonic |
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76 | 110 | extern rtems_id AVGV_id;// id of the AVGV rate monotonic period |
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77 | 111 | |
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78 | 112 | void timer_configure( unsigned char timer, unsigned int clock_divider, |
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79 | 113 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ); |
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80 | 114 | void timer_start( unsigned char timer ); |
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81 | 115 | void timer_stop( unsigned char timer ); |
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82 | 116 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider); |
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83 | 117 | |
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84 | 118 | // WATCHDOG |
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85 | 119 | rtems_isr watchdog_isr( rtems_vector_number vector ); |
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86 | 120 | void watchdog_configure(void); |
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87 | 121 | void watchdog_stop(void); |
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88 | 122 | void watchdog_reload(void); |
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89 | 123 | void watchdog_start(void); |
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90 | 124 | |
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91 | 125 | // SERIAL LINK |
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92 | 126 | int send_console_outputs_on_apbuart_port( void ); |
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93 | 127 | int enable_apbuart_transmitter( void ); |
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94 | 128 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value); |
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95 | 129 | |
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96 | 130 | // RTEMS TASKS |
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97 | 131 | rtems_task load_task( rtems_task_argument argument ); |
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98 | 132 | rtems_task hous_task( rtems_task_argument argument ); |
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99 | 133 | rtems_task avgv_task( rtems_task_argument argument ); |
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100 | 134 | rtems_task dumb_task( rtems_task_argument unused ); |
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101 | 135 | |
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102 | 136 | void init_housekeeping_parameters( void ); |
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103 | 137 | void increment_seq_counter(unsigned short *packetSequenceControl); |
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104 | 138 | void getTime( unsigned char *time); |
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105 | 139 | unsigned long long int getTimeAsUnsignedLongLongInt( ); |
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106 | 140 | void send_dumb_hk( void ); |
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107 | 141 | void get_temperatures( unsigned char *temperatures ); |
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108 | 142 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ); |
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109 | 143 | void get_cpu_load( unsigned char *resource_statistics ); |
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110 | 144 | void set_hk_lfr_sc_potential_flag( bool state ); |
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111 | 145 | void set_sy_lfr_pas_filter_enabled( bool state ); |
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112 | 146 | void set_sy_lfr_watchdog_enabled( bool state ); |
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113 | 147 | void set_hk_lfr_calib_enable( bool state ); |
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114 | 148 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ); |
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115 | 149 | void hk_lfr_le_me_he_update(); |
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116 | 150 | void set_hk_lfr_time_not_synchro(); |
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117 | 151 | |
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118 | 152 | extern int sched_yield( void ); |
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119 | 153 | extern void rtems_cpu_usage_reset(); |
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120 | 154 | extern ring_node *current_ring_node_f3; |
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121 | 155 | extern ring_node *ring_node_to_send_cwf_f3; |
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122 | 156 | extern ring_node waveform_ring_f3[]; |
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123 | 157 | extern unsigned short sequenceCounterHK; |
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124 | 158 | |
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125 | 159 | extern unsigned char hk_lfr_q_sd_fifo_size_max; |
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126 | 160 | extern unsigned char hk_lfr_q_rv_fifo_size_max; |
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127 | 161 | extern unsigned char hk_lfr_q_p0_fifo_size_max; |
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128 | 162 | extern unsigned char hk_lfr_q_p1_fifo_size_max; |
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129 | 163 | extern unsigned char hk_lfr_q_p2_fifo_size_max; |
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130 | 164 | |
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131 | 165 | #endif // FSW_MISC_H_INCLUDED |
@@ -1,107 +1,107 | |||
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1 | 1 | cmake_minimum_required (VERSION 2.6) |
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2 | 2 | project (fsw) |
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3 | 3 | |
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4 | 4 | include(sparc-rtems) |
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5 | 5 | include(cppcheck) |
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6 | 6 | |
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7 | 7 | include_directories("../header" |
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8 | 8 | "../header/lfr_common_headers" |
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9 | 9 | "../header/processing" |
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10 | 10 | "../LFR_basic-parameters" |
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11 | 11 | "../src") |
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12 | 12 | |
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13 | 13 | set(SOURCES wf_handler.c |
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14 | 14 | tc_handler.c |
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15 | 15 | fsw_misc.c |
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16 | 16 | fsw_init.c |
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17 | 17 | fsw_globals.c |
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18 | 18 | fsw_spacewire.c |
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19 | 19 | tc_load_dump_parameters.c |
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20 | 20 | tm_lfr_tc_exe.c |
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21 | 21 | tc_acceptance.c |
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22 | 22 | processing/fsw_processing.c |
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23 | 23 | processing/avf0_prc0.c |
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24 | 24 | processing/avf1_prc1.c |
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25 | 25 | processing/avf2_prc2.c |
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26 | 26 | lfr_cpu_usage_report.c |
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27 | 27 | ${LFR_BP_SRC} |
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28 | 28 | ../header/wf_handler.h |
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29 | 29 | ../header/tc_handler.h |
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30 | 30 | ../header/grlib_regs.h |
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31 | 31 | ../header/fsw_misc.h |
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32 | 32 | ../header/fsw_init.h |
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33 | 33 | ../header/fsw_spacewire.h |
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34 | 34 | ../header/tc_load_dump_parameters.h |
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35 | 35 | ../header/tm_lfr_tc_exe.h |
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36 | 36 | ../header/tc_acceptance.h |
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37 | 37 | ../header/processing/fsw_processing.h |
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38 | 38 | ../header/processing/avf0_prc0.h |
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39 | 39 | ../header/processing/avf1_prc1.h |
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40 | 40 | ../header/processing/avf2_prc2.h |
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41 | 41 | ../header/fsw_params_wf_handler.h |
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42 | 42 | ../header/lfr_cpu_usage_report.h |
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43 | 43 | ../header/lfr_common_headers/ccsds_types.h |
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44 | 44 | ../header/lfr_common_headers/fsw_params.h |
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45 | 45 | ../header/lfr_common_headers/fsw_params_nb_bytes.h |
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46 | 46 | ../header/lfr_common_headers/fsw_params_processing.h |
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47 | 47 | ../header/lfr_common_headers/tm_byte_positions.h |
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48 | 48 | ../LFR_basic-parameters/basic_parameters.h |
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49 | 49 | ../LFR_basic-parameters/basic_parameters_params.h |
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50 | 50 | ../header/GscMemoryLPP.hpp |
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51 | 51 | ) |
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52 | 52 | |
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53 | 53 | |
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54 | 54 | option(FSW_verbose "Enable verbose LFR" OFF) |
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55 | 55 | option(FSW_boot_messages "Enable LFR boot messages" OFF) |
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56 | 56 | option(FSW_debug_messages "Enable LFR debug messages" OFF) |
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57 | 57 | option(FSW_cpu_usage_report "Enable LFR cpu usage report" OFF) |
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58 | 58 | option(FSW_stack_report "Enable LFR stack report" OFF) |
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59 | 59 | option(FSW_vhdl_dev "?" OFF) |
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60 | 60 | option(FSW_lpp_dpu_destid "Set to debug at LPP" ON) |
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61 | 61 | option(FSW_debug_watchdog "Enable debug watchdog" OFF) |
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62 | 62 | option(FSW_debug_tch "?" OFF) |
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63 | 63 | |
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64 | 64 | set(SW_VERSION_N1 "3" CACHE STRING "Choose N1 FSW Version." FORCE) |
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65 | 65 | set(SW_VERSION_N2 "2" CACHE STRING "Choose N2 FSW Version." FORCE) |
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66 | 66 | set(SW_VERSION_N3 "0" CACHE STRING "Choose N3 FSW Version." FORCE) |
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67 |
set(SW_VERSION_N4 " |
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67 | set(SW_VERSION_N4 "10" CACHE STRING "Choose N4 FSW Version." FORCE) | |
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68 | 68 | |
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69 | 69 | if(FSW_verbose) |
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70 | 70 | add_definitions(-DPRINT_MESSAGES_ON_CONSOLE) |
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71 | 71 | endif() |
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72 | 72 | if(FSW_boot_messages) |
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73 | 73 | add_definitions(-DBOOT_MESSAGES) |
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74 | 74 | endif() |
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75 | 75 | if(FSW_debug_messages) |
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76 | 76 | add_definitions(-DDEBUG_MESSAGES) |
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77 | 77 | endif() |
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78 | 78 | if(FSW_cpu_usage_report) |
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79 | 79 | add_definitions(-DPRINT_TASK_STATISTICS) |
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80 | 80 | endif() |
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81 | 81 | if(FSW_stack_report) |
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82 | 82 | add_definitions(-DPRINT_STACK_REPORT) |
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83 | 83 | endif() |
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84 | 84 | if(FSW_vhdl_dev) |
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85 | 85 | add_definitions(-DVHDL_DEV) |
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86 | 86 | endif() |
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87 | 87 | if(FSW_lpp_dpu_destid) |
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88 | 88 | add_definitions(-DLPP_DPU_DESTID) |
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89 | 89 | endif() |
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90 | 90 | if(FSW_debug_watchdog) |
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91 | 91 | add_definitions(-DDEBUG_WATCHDOG) |
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92 | 92 | endif() |
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93 | 93 | if(FSW_debug_tch) |
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94 | 94 | add_definitions(-DDEBUG_TCH) |
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95 | 95 | endif() |
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96 | 96 | |
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97 | 97 | add_definitions(-DMSB_FIRST_TCH) |
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98 | 98 | |
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99 | 99 | add_definitions(-DSWVERSION=-1-0) |
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100 | 100 | add_definitions(-DSW_VERSION_N1=${SW_VERSION_N1}) |
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101 | 101 | add_definitions(-DSW_VERSION_N2=${SW_VERSION_N2}) |
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102 | 102 | add_definitions(-DSW_VERSION_N3=${SW_VERSION_N3}) |
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103 | 103 | add_definitions(-DSW_VERSION_N4=${SW_VERSION_N4}) |
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104 | 104 | |
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105 | 105 | add_executable(fsw ${SOURCES}) |
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106 | 106 | add_test_cppcheck(fsw STYLE UNUSED_FUNCTIONS POSSIBLE_ERROR MISSING_INCLUDE) |
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107 | 107 |
@@ -1,1023 +1,1035 | |||
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1 | 1 | /** General usage functions and RTEMS tasks. |
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2 | 2 | * |
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3 | 3 | * @file |
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4 | 4 | * @author P. LEROY |
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5 | 5 | * |
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6 | 6 | */ |
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7 | 7 | |
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8 | 8 | #include "fsw_misc.h" |
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9 | 9 | |
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10 | 10 | int16_t hk_lfr_sc_v_f3_as_int16 = 0; |
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11 | 11 | int16_t hk_lfr_sc_e1_f3_as_int16 = 0; |
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12 | 12 | int16_t hk_lfr_sc_e2_f3_as_int16 = 0; |
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13 | 13 | |
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14 | 14 | void timer_configure(unsigned char timer, unsigned int clock_divider, |
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15 | 15 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) |
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16 | 16 | { |
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17 | 17 | /** This function configures a GPTIMER timer instantiated in the VHDL design. |
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18 | 18 | * |
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19 | 19 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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20 | 20 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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21 | 21 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
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22 | 22 | * @param interrupt_level is the interrupt level that the timer drives. |
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23 | 23 | * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. |
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24 | 24 | * |
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25 | 25 | * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 |
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26 | 26 | * |
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27 | 27 | */ |
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28 | 28 | |
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29 | 29 | rtems_status_code status; |
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30 | 30 | rtems_isr_entry old_isr_handler; |
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31 | 31 | |
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32 | 32 | old_isr_handler = NULL; |
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33 | 33 | |
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34 | 34 | gptimer_regs->timer[timer].ctrl = INIT_CHAR; // reset the control register |
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35 | 35 | |
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36 | 36 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels |
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37 | 37 | if (status!=RTEMS_SUCCESSFUL) |
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38 | 38 | { |
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39 | 39 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") |
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40 | 40 | } |
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41 | 41 | |
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42 | 42 | timer_set_clock_divider( timer, clock_divider); |
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43 | 43 | } |
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44 | 44 | |
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45 | 45 | void timer_start(unsigned char timer) |
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46 | 46 | { |
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47 | 47 | /** This function starts a GPTIMER timer. |
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48 | 48 | * |
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49 | 49 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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50 | 50 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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51 | 51 | * |
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52 | 52 | */ |
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53 | 53 | |
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54 | 54 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ; |
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55 | 55 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_LD; |
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56 | 56 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_EN; |
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57 | 57 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_RS; |
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58 | 58 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_IE; |
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59 | 59 | } |
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60 | 60 | |
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61 | 61 | void timer_stop(unsigned char timer) |
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62 | 62 | { |
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63 | 63 | /** This function stops a GPTIMER timer. |
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64 | 64 | * |
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65 | 65 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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66 | 66 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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67 | 67 | * |
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68 | 68 | */ |
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69 | 69 | |
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70 | 70 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_EN_MASK; |
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71 | 71 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_IE_MASK; |
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72 | 72 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ; |
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73 | 73 | } |
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74 | 74 | |
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75 | 75 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider) |
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76 | 76 | { |
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77 | 77 | /** This function sets the clock divider of a GPTIMER timer. |
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78 | 78 | * |
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79 | 79 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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80 | 80 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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81 | 81 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
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82 | 82 | * |
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83 | 83 | */ |
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84 | 84 | |
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85 | 85 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz |
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86 | 86 | } |
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87 | 87 | |
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88 | 88 | // WATCHDOG |
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89 | 89 | |
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90 | 90 | rtems_isr watchdog_isr( rtems_vector_number vector ) |
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91 | 91 | { |
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92 | 92 | rtems_status_code status_code; |
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93 | 93 | |
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94 | 94 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 ); |
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95 | 95 | |
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96 | 96 | PRINTF("watchdog_isr *** this is the end, exit(0)\n"); |
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97 | 97 | |
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98 | 98 | exit(0); |
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99 | 99 | } |
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100 | 100 | |
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101 | 101 | void watchdog_configure(void) |
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102 | 102 | { |
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103 | 103 | /** This function configure the watchdog. |
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104 | 104 | * |
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105 | 105 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
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106 | 106 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
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107 | 107 | * |
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108 | 108 | * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB. |
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109 | 109 | * |
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110 | 110 | */ |
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111 | 111 | |
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112 | 112 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration |
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113 | 113 | |
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114 | 114 | timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr ); |
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115 | 115 | |
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116 | 116 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt |
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117 | 117 | } |
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118 | 118 | |
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119 | 119 | void watchdog_stop(void) |
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120 | 120 | { |
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121 | 121 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line |
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122 | 122 | timer_stop( TIMER_WATCHDOG ); |
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123 | 123 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt |
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124 | 124 | } |
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125 | 125 | |
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126 | 126 | void watchdog_reload(void) |
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127 | 127 | { |
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128 | 128 | /** This function reloads the watchdog timer counter with the timer reload value. |
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129 | 129 | * |
|
130 | 130 | * @param void |
|
131 | 131 | * |
|
132 | 132 | * @return void |
|
133 | 133 | * |
|
134 | 134 | */ |
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135 | 135 | |
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136 | 136 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD; |
|
137 | 137 | } |
|
138 | 138 | |
|
139 | 139 | void watchdog_start(void) |
|
140 | 140 | { |
|
141 | 141 | /** This function starts the watchdog timer. |
|
142 | 142 | * |
|
143 | 143 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
144 | 144 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
145 | 145 | * |
|
146 | 146 | */ |
|
147 | 147 | |
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148 | 148 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); |
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149 | 149 | |
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150 | 150 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_CLEAR_IRQ; |
|
151 | 151 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD; |
|
152 | 152 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_EN; |
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153 | 153 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_IE; |
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154 | 154 | |
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155 | 155 | LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG ); |
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156 | 156 | |
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157 | 157 | } |
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158 | 158 | |
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159 | 159 | int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register |
|
160 | 160 | { |
|
161 | 161 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
|
162 | 162 | |
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163 | 163 | apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE; |
|
164 | 164 | |
|
165 | 165 | return 0; |
|
166 | 166 | } |
|
167 | 167 | |
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168 | 168 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) |
|
169 | 169 | { |
|
170 | 170 | /** This function sets the scaler reload register of the apbuart module |
|
171 | 171 | * |
|
172 | 172 | * @param regs is the address of the apbuart registers in memory |
|
173 | 173 | * @param value is the value that will be stored in the scaler register |
|
174 | 174 | * |
|
175 | 175 | * The value shall be set by the software to get data on the serial interface. |
|
176 | 176 | * |
|
177 | 177 | */ |
|
178 | 178 | |
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179 | 179 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; |
|
180 | 180 | |
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181 | 181 | apbuart_regs->scaler = value; |
|
182 | 182 | |
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183 | 183 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) |
|
184 | 184 | } |
|
185 | 185 | |
|
186 | 186 | //************ |
|
187 | 187 | // RTEMS TASKS |
|
188 | 188 | |
|
189 | 189 | rtems_task load_task(rtems_task_argument argument) |
|
190 | 190 | { |
|
191 | 191 | BOOT_PRINTF("in LOAD *** \n") |
|
192 | 192 | |
|
193 | 193 | rtems_status_code status; |
|
194 | 194 | unsigned int i; |
|
195 | 195 | unsigned int j; |
|
196 | 196 | rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic |
|
197 | 197 | rtems_id watchdog_period_id; // id of the watchdog rate monotonic period |
|
198 | 198 | |
|
199 | 199 | watchdog_period_id = RTEMS_ID_NONE; |
|
200 | 200 | |
|
201 | 201 | name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' ); |
|
202 | 202 | |
|
203 | 203 | status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id ); |
|
204 | 204 | if( status != RTEMS_SUCCESSFUL ) { |
|
205 | 205 | PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status ) |
|
206 | 206 | } |
|
207 | 207 | |
|
208 | 208 | i = 0; |
|
209 | 209 | j = 0; |
|
210 | 210 | |
|
211 | 211 | watchdog_configure(); |
|
212 | 212 | |
|
213 | 213 | watchdog_start(); |
|
214 | 214 | |
|
215 | 215 | set_sy_lfr_watchdog_enabled( true ); |
|
216 | 216 | |
|
217 | 217 | while(1){ |
|
218 | 218 | status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD ); |
|
219 | 219 | watchdog_reload(); |
|
220 | 220 | i = i + 1; |
|
221 | 221 | if ( i == WATCHDOG_LOOP_PRINTF ) |
|
222 | 222 | { |
|
223 | 223 | i = 0; |
|
224 | 224 | j = j + 1; |
|
225 | 225 | PRINTF1("%d\n", j) |
|
226 | 226 | } |
|
227 | 227 | #ifdef DEBUG_WATCHDOG |
|
228 | 228 | if (j == WATCHDOG_LOOP_DEBUG ) |
|
229 | 229 | { |
|
230 | 230 | status = rtems_task_delete(RTEMS_SELF); |
|
231 | 231 | } |
|
232 | 232 | #endif |
|
233 | 233 | } |
|
234 | 234 | } |
|
235 | 235 | |
|
236 | 236 | rtems_task hous_task(rtems_task_argument argument) |
|
237 | 237 | { |
|
238 | 238 | rtems_status_code status; |
|
239 | 239 | rtems_status_code spare_status; |
|
240 | 240 | rtems_id queue_id; |
|
241 | 241 | rtems_rate_monotonic_period_status period_status; |
|
242 | 242 | bool isSynchronized; |
|
243 | 243 | |
|
244 | 244 | queue_id = RTEMS_ID_NONE; |
|
245 | 245 | memset(&period_status, 0, sizeof(rtems_rate_monotonic_period_status)); |
|
246 | 246 | isSynchronized = false; |
|
247 | 247 | |
|
248 | 248 | status = get_message_queue_id_send( &queue_id ); |
|
249 | 249 | if (status != RTEMS_SUCCESSFUL) |
|
250 | 250 | { |
|
251 | 251 | PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status) |
|
252 | 252 | } |
|
253 | 253 | |
|
254 | 254 | BOOT_PRINTF("in HOUS ***\n"); |
|
255 | 255 | |
|
256 | 256 | if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) { |
|
257 | 257 | status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id ); |
|
258 | 258 | if( status != RTEMS_SUCCESSFUL ) { |
|
259 | 259 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ); |
|
260 | 260 | } |
|
261 | 261 | } |
|
262 | 262 | |
|
263 | 263 | status = rtems_rate_monotonic_cancel(HK_id); |
|
264 | 264 | if( status != RTEMS_SUCCESSFUL ) { |
|
265 | 265 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ); |
|
266 | 266 | } |
|
267 | 267 | else { |
|
268 | 268 | DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n"); |
|
269 | 269 | } |
|
270 | 270 | |
|
271 | 271 | // startup phase |
|
272 | 272 | status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks ); |
|
273 | 273 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); |
|
274 | 274 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) |
|
275 | 275 | while( (period_status.state != RATE_MONOTONIC_EXPIRED) |
|
276 | 276 | && (isSynchronized == false) ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway |
|
277 | 277 | { |
|
278 | 278 | if ((time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) == INT32_ALL_0) // check time synchronization |
|
279 | 279 | { |
|
280 | 280 | isSynchronized = true; |
|
281 | 281 | } |
|
282 | 282 | else |
|
283 | 283 | { |
|
284 | 284 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); |
|
285 | 285 | |
|
286 | 286 | status = rtems_task_wake_after( HK_SYNC_WAIT ); // wait HK_SYNCH_WAIT 100 ms = 10 * 10 ms |
|
287 | 287 | } |
|
288 | 288 | } |
|
289 | 289 | status = rtems_rate_monotonic_cancel(HK_id); |
|
290 | 290 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) |
|
291 | 291 | |
|
292 | 292 | set_hk_lfr_reset_cause( POWER_ON ); |
|
293 | 293 | |
|
294 | 294 | while(1){ // launch the rate monotonic task |
|
295 | 295 | status = rtems_rate_monotonic_period( HK_id, HK_PERIOD ); |
|
296 | 296 | if ( status != RTEMS_SUCCESSFUL ) { |
|
297 | 297 | PRINTF1( "in HOUS *** ERR period: %d\n", status); |
|
298 | 298 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 ); |
|
299 | 299 | } |
|
300 | 300 | else { |
|
301 | 301 | housekeeping_packet.packetSequenceControl[BYTE_0] = (unsigned char) (sequenceCounterHK >> SHIFT_1_BYTE); |
|
302 | 302 | housekeeping_packet.packetSequenceControl[BYTE_1] = (unsigned char) (sequenceCounterHK ); |
|
303 | 303 | increment_seq_counter( &sequenceCounterHK ); |
|
304 | 304 | |
|
305 | 305 | housekeeping_packet.time[BYTE_0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES); |
|
306 | 306 | housekeeping_packet.time[BYTE_1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES); |
|
307 | 307 | housekeeping_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE); |
|
308 | 308 | housekeeping_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time); |
|
309 | 309 | housekeeping_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE); |
|
310 | 310 | housekeeping_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time); |
|
311 | 311 | |
|
312 | 312 | spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] ); |
|
313 | 313 | |
|
314 | 314 | spacewire_read_statistics(); |
|
315 | 315 | |
|
316 | 316 | update_hk_with_grspw_stats(); |
|
317 | 317 | |
|
318 | 318 | set_hk_lfr_time_not_synchro(); |
|
319 | 319 | |
|
320 | 320 | housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max; |
|
321 | 321 | housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max; |
|
322 | 322 | housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max; |
|
323 | 323 | housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max; |
|
324 | 324 | housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max; |
|
325 | 325 | |
|
326 | 326 | housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare; |
|
327 | 327 | housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters; |
|
328 | 328 | get_temperatures( housekeeping_packet.hk_lfr_temp_scm ); |
|
329 | 329 | get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 ); |
|
330 | 330 | get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load ); |
|
331 | 331 | |
|
332 | 332 | hk_lfr_le_me_he_update(); |
|
333 | 333 | |
|
334 | 334 | // SEND PACKET |
|
335 | 335 | status = rtems_message_queue_send( queue_id, &housekeeping_packet, |
|
336 | 336 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); |
|
337 | 337 | if (status != RTEMS_SUCCESSFUL) { |
|
338 | 338 | PRINTF1("in HOUS *** ERR send: %d\n", status) |
|
339 | 339 | } |
|
340 | 340 | } |
|
341 | 341 | } |
|
342 | 342 | |
|
343 | 343 | PRINTF("in HOUS *** deleting task\n") |
|
344 | 344 | |
|
345 | 345 | status = rtems_task_delete( RTEMS_SELF ); // should not return |
|
346 | 346 | |
|
347 | 347 | return; |
|
348 | 348 | } |
|
349 | 349 | |
|
350 | int filter( int x, filter_ctx* ctx ) | |
|
351 | { | |
|
352 | static const int b[NB_COEFFS][NB_COEFFS]={ {B00, B01, B02}, {B10, B11, B12}, {B20, B21, B22} }; | |
|
353 | static const int a[NB_COEFFS][NB_COEFFS]={ {A00, A01, A02}, {A10, A11, A12}, {A20, A21, A22} }; | |
|
354 | static const int g_pow2[NB_COEFFS]={G0, G1, G2}; | |
|
355 | ||
|
356 | int W; | |
|
357 | int i; | |
|
358 | ||
|
359 | W = INIT_INT; | |
|
360 | i = INIT_INT; | |
|
361 | ||
|
362 | //Direct-Form-II | |
|
363 | for ( i = 0; i < NB_COEFFS; i++ ) | |
|
364 | { | |
|
365 | x = x << g_pow2[ i ]; | |
|
366 | W = ( x - ( a[i][COEFF1] * ctx->W[i][COEFF0] ) | |
|
367 | - ( a[i][COEFF2] * ctx->W[i][COEFF1] ) ) >> g_pow2[ i ]; | |
|
368 | x = ( b[i][COEFF0] * W ) | |
|
369 | + ( b[i][COEFF1] * ctx->W[i][COEFF0] ) | |
|
370 | + ( b[i][COEFF2] * ctx->W[i][COEFF1] ); | |
|
371 | x =- ( x >> g_pow2[i] ); | |
|
372 | ctx->W[i][COEFF1] = ctx->W[i][COEFF0]; | |
|
373 | ctx->W[i][COEFF0] = W; | |
|
374 | } | |
|
375 | return x; | |
|
376 | } | |
|
377 | ||
|
350 | 378 | rtems_task avgv_task(rtems_task_argument argument) |
|
351 | 379 | { |
|
352 | 380 | #define MOVING_AVERAGE 16 |
|
353 | 381 | rtems_status_code status; |
|
354 | 382 | static int32_t v[MOVING_AVERAGE] = {0}; |
|
355 | 383 | static int32_t e1[MOVING_AVERAGE] = {0}; |
|
356 | 384 | static int32_t e2[MOVING_AVERAGE] = {0}; |
|
357 | 385 | static int old_v = 0; |
|
358 | 386 | static int old_e1 = 0; |
|
359 | 387 | static int old_e2 = 0; |
|
360 | 388 | int32_t current_v; |
|
361 | 389 | int32_t current_e1; |
|
362 | 390 | int32_t current_e2; |
|
363 | 391 | int32_t average_v; |
|
364 | 392 | int32_t average_e1; |
|
365 | 393 | int32_t average_e2; |
|
366 | 394 | int32_t newValue_v; |
|
367 | 395 | int32_t newValue_e1; |
|
368 | 396 | int32_t newValue_e2; |
|
369 | 397 | unsigned char k; |
|
370 | 398 | unsigned char indexOfOldValue; |
|
371 | 399 | |
|
400 | static filter_ctx ctx_v = { { {0,0,0}, {0,0,0}, {0,0,0} } }; | |
|
401 | static filter_ctx ctx_e1 = { { {0,0,0}, {0,0,0}, {0,0,0} } }; | |
|
402 | static filter_ctx ctx_e2 = { { {0,0,0}, {0,0,0}, {0,0,0} } }; | |
|
403 | ||
|
372 | 404 | BOOT_PRINTF("in AVGV ***\n"); |
|
373 | 405 | |
|
374 | 406 | if (rtems_rate_monotonic_ident( name_avgv_rate_monotonic, &AVGV_id) != RTEMS_SUCCESSFUL) { |
|
375 | 407 | status = rtems_rate_monotonic_create( name_avgv_rate_monotonic, &AVGV_id ); |
|
376 | 408 | if( status != RTEMS_SUCCESSFUL ) { |
|
377 | 409 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ); |
|
378 | 410 | } |
|
379 | 411 | } |
|
380 | 412 | |
|
381 | 413 | status = rtems_rate_monotonic_cancel(AVGV_id); |
|
382 | 414 | if( status != RTEMS_SUCCESSFUL ) { |
|
383 | 415 | PRINTF1( "ERR *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id) ***code: %d\n", status ); |
|
384 | 416 | } |
|
385 | 417 | else { |
|
386 | 418 | DEBUG_PRINTF("OK *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id)\n"); |
|
387 | 419 | } |
|
388 | 420 | |
|
389 | 421 | // initialize values |
|
390 | 422 | indexOfOldValue = MOVING_AVERAGE - 1; |
|
391 | 423 | current_v = 0; |
|
392 | 424 | current_e1 = 0; |
|
393 | 425 | current_e2 = 0; |
|
394 | 426 | average_v = 0; |
|
395 | 427 | average_e1 = 0; |
|
396 | 428 | average_e2 = 0; |
|
397 | 429 | newValue_v = 0; |
|
398 | 430 | newValue_e1 = 0; |
|
399 | 431 | newValue_e2 = 0; |
|
400 | 432 | |
|
401 | 433 | k = INIT_CHAR; |
|
402 | 434 | |
|
403 | 435 | while(1) |
|
404 | 436 | { // launch the rate monotonic task |
|
405 | 437 | status = rtems_rate_monotonic_period( AVGV_id, AVGV_PERIOD ); |
|
406 | 438 | if ( status != RTEMS_SUCCESSFUL ) |
|
407 | 439 | { |
|
408 | 440 | PRINTF1( "in AVGV *** ERR period: %d\n", status); |
|
409 | 441 | } |
|
410 | 442 | else |
|
411 | 443 | { |
|
412 | 444 | current_v = waveform_picker_regs->v; |
|
413 | 445 | current_e1 = waveform_picker_regs->e1; |
|
414 | 446 | current_e2 = waveform_picker_regs->e2; |
|
415 | 447 | if ( (current_v != old_v) |
|
416 | 448 | || (current_e1 != old_e1) |
|
417 | 449 | || (current_e2 != old_e2)) |
|
418 | 450 | { |
|
419 | // get new values | |
|
420 |
|
|
|
421 |
|
|
|
422 | newValue_e2 = current_e2; | |
|
423 | ||
|
424 | // compute the moving average | |
|
425 | average_v = average_v + newValue_v - v[k]; | |
|
426 | average_e1 = average_e1 + newValue_e1 - e1[k]; | |
|
427 | average_e2 = average_e2 + newValue_e2 - e2[k]; | |
|
428 | ||
|
429 | // store new values in buffers | |
|
430 | v[k] = newValue_v; | |
|
431 | e1[k] = newValue_e1; | |
|
432 | e2[k] = newValue_e2; | |
|
433 | ||
|
434 | if (k == (MOVING_AVERAGE-1)) | |
|
435 | { | |
|
436 | k = 0; | |
|
437 | } | |
|
438 | else | |
|
439 | { | |
|
440 | k++; | |
|
441 | } | |
|
451 | average_v = filter( current_v, &ctx_v ); | |
|
452 | average_e1 = filter( current_e1, &ctx_e1 ); | |
|
453 | average_e2 = filter( current_e2, &ctx_e2 ); | |
|
442 | 454 | |
|
443 | 455 | //update int16 values |
|
444 | 456 | hk_lfr_sc_v_f3_as_int16 = (int16_t) (average_v / MOVING_AVERAGE ); |
|
445 | 457 | hk_lfr_sc_e1_f3_as_int16 = (int16_t) (average_e1 / MOVING_AVERAGE ); |
|
446 | 458 | hk_lfr_sc_e2_f3_as_int16 = (int16_t) (average_e2 / MOVING_AVERAGE ); |
|
447 | 459 | } |
|
448 | 460 | old_v = current_v; |
|
449 | 461 | old_e1 = current_e1; |
|
450 | 462 | old_e2 = current_e2; |
|
451 | 463 | } |
|
452 | 464 | } |
|
453 | 465 | |
|
454 | 466 | PRINTF("in AVGV *** deleting task\n"); |
|
455 | 467 | |
|
456 | 468 | status = rtems_task_delete( RTEMS_SELF ); // should not return |
|
457 | 469 | |
|
458 | 470 | return; |
|
459 | 471 | } |
|
460 | 472 | |
|
461 | 473 | rtems_task dumb_task( rtems_task_argument unused ) |
|
462 | 474 | { |
|
463 | 475 | /** This RTEMS taks is used to print messages without affecting the general behaviour of the software. |
|
464 | 476 | * |
|
465 | 477 | * @param unused is the starting argument of the RTEMS task |
|
466 | 478 | * |
|
467 | 479 | * The DUMB taks waits for RTEMS events and print messages depending on the incoming events. |
|
468 | 480 | * |
|
469 | 481 | */ |
|
470 | 482 | |
|
471 | 483 | unsigned int i; |
|
472 | 484 | unsigned int intEventOut; |
|
473 | 485 | unsigned int coarse_time = 0; |
|
474 | 486 | unsigned int fine_time = 0; |
|
475 | 487 | rtems_event_set event_out; |
|
476 | 488 | |
|
477 | 489 | event_out = EVENT_SETS_NONE_PENDING; |
|
478 | 490 | |
|
479 | 491 | BOOT_PRINTF("in DUMB *** \n") |
|
480 | 492 | |
|
481 | 493 | while(1){ |
|
482 | 494 | rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 |
|
483 | 495 | | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7 |
|
484 | 496 | | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13 |
|
485 | 497 | | RTEMS_EVENT_14, |
|
486 | 498 | RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT |
|
487 | 499 | intEventOut = (unsigned int) event_out; |
|
488 | 500 | for ( i=0; i<NB_RTEMS_EVENTS; i++) |
|
489 | 501 | { |
|
490 | 502 | if ( ((intEventOut >> i) & 1) != 0) |
|
491 | 503 | { |
|
492 | 504 | coarse_time = time_management_regs->coarse_time; |
|
493 | 505 | fine_time = time_management_regs->fine_time; |
|
494 | 506 | if (i==EVENT_12) |
|
495 | 507 | { |
|
496 | 508 | PRINTF1("%s\n", DUMB_MESSAGE_12) |
|
497 | 509 | } |
|
498 | 510 | if (i==EVENT_13) |
|
499 | 511 | { |
|
500 | 512 | PRINTF1("%s\n", DUMB_MESSAGE_13) |
|
501 | 513 | } |
|
502 | 514 | if (i==EVENT_14) |
|
503 | 515 | { |
|
504 | 516 | PRINTF1("%s\n", DUMB_MESSAGE_1) |
|
505 | 517 | } |
|
506 | 518 | } |
|
507 | 519 | } |
|
508 | 520 | } |
|
509 | 521 | } |
|
510 | 522 | |
|
511 | 523 | //***************************** |
|
512 | 524 | // init housekeeping parameters |
|
513 | 525 | |
|
514 | 526 | void init_housekeeping_parameters( void ) |
|
515 | 527 | { |
|
516 | 528 | /** This function initialize the housekeeping_packet global variable with default values. |
|
517 | 529 | * |
|
518 | 530 | */ |
|
519 | 531 | |
|
520 | 532 | unsigned int i = 0; |
|
521 | 533 | unsigned char *parameters; |
|
522 | 534 | unsigned char sizeOfHK; |
|
523 | 535 | |
|
524 | 536 | sizeOfHK = sizeof( Packet_TM_LFR_HK_t ); |
|
525 | 537 | |
|
526 | 538 | parameters = (unsigned char*) &housekeeping_packet; |
|
527 | 539 | |
|
528 | 540 | for(i = 0; i< sizeOfHK; i++) |
|
529 | 541 | { |
|
530 | 542 | parameters[i] = INIT_CHAR; |
|
531 | 543 | } |
|
532 | 544 | |
|
533 | 545 | housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; |
|
534 | 546 | housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; |
|
535 | 547 | housekeeping_packet.reserved = DEFAULT_RESERVED; |
|
536 | 548 | housekeeping_packet.userApplication = CCSDS_USER_APP; |
|
537 | 549 | housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE); |
|
538 | 550 | housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK); |
|
539 | 551 | housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; |
|
540 | 552 | housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; |
|
541 | 553 | housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE); |
|
542 | 554 | housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); |
|
543 | 555 | housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; |
|
544 | 556 | housekeeping_packet.serviceType = TM_TYPE_HK; |
|
545 | 557 | housekeeping_packet.serviceSubType = TM_SUBTYPE_HK; |
|
546 | 558 | housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND; |
|
547 | 559 | housekeeping_packet.sid = SID_HK; |
|
548 | 560 | |
|
549 | 561 | // init status word |
|
550 | 562 | housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0; |
|
551 | 563 | housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1; |
|
552 | 564 | // init software version |
|
553 | 565 | housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1; |
|
554 | 566 | housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2; |
|
555 | 567 | housekeeping_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3; |
|
556 | 568 | housekeeping_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4; |
|
557 | 569 | // init fpga version |
|
558 | 570 | parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION); |
|
559 | 571 | housekeeping_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1 |
|
560 | 572 | housekeeping_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2 |
|
561 | 573 | housekeeping_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3 |
|
562 | 574 | |
|
563 | 575 | housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND; |
|
564 | 576 | housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV; |
|
565 | 577 | housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0; |
|
566 | 578 | housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1; |
|
567 | 579 | housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2; |
|
568 | 580 | } |
|
569 | 581 | |
|
570 | 582 | void increment_seq_counter( unsigned short *packetSequenceControl ) |
|
571 | 583 | { |
|
572 | 584 | /** This function increment the sequence counter passes in argument. |
|
573 | 585 | * |
|
574 | 586 | * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0. |
|
575 | 587 | * |
|
576 | 588 | */ |
|
577 | 589 | |
|
578 | 590 | unsigned short segmentation_grouping_flag; |
|
579 | 591 | unsigned short sequence_cnt; |
|
580 | 592 | |
|
581 | 593 | segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << SHIFT_1_BYTE; // keep bits 7 downto 6 |
|
582 | 594 | sequence_cnt = (*packetSequenceControl) & SEQ_CNT_MASK; // [0011 1111 1111 1111] |
|
583 | 595 | |
|
584 | 596 | if ( sequence_cnt < SEQ_CNT_MAX) |
|
585 | 597 | { |
|
586 | 598 | sequence_cnt = sequence_cnt + 1; |
|
587 | 599 | } |
|
588 | 600 | else |
|
589 | 601 | { |
|
590 | 602 | sequence_cnt = 0; |
|
591 | 603 | } |
|
592 | 604 | |
|
593 | 605 | *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ; |
|
594 | 606 | } |
|
595 | 607 | |
|
596 | 608 | void getTime( unsigned char *time) |
|
597 | 609 | { |
|
598 | 610 | /** This function write the current local time in the time buffer passed in argument. |
|
599 | 611 | * |
|
600 | 612 | */ |
|
601 | 613 | |
|
602 | 614 | time[0] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_3_BYTES); |
|
603 | 615 | time[1] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_2_BYTES); |
|
604 | 616 | time[2] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_1_BYTE); |
|
605 | 617 | time[3] = (unsigned char) (time_management_regs->coarse_time); |
|
606 | 618 | time[4] = (unsigned char) (time_management_regs->fine_time>>SHIFT_1_BYTE); |
|
607 | 619 | time[5] = (unsigned char) (time_management_regs->fine_time); |
|
608 | 620 | } |
|
609 | 621 | |
|
610 | 622 | unsigned long long int getTimeAsUnsignedLongLongInt( ) |
|
611 | 623 | { |
|
612 | 624 | /** This function write the current local time in the time buffer passed in argument. |
|
613 | 625 | * |
|
614 | 626 | */ |
|
615 | 627 | unsigned long long int time; |
|
616 | 628 | |
|
617 | 629 | time = ( (unsigned long long int) (time_management_regs->coarse_time & COARSE_TIME_MASK) << SHIFT_2_BYTES ) |
|
618 | 630 | + time_management_regs->fine_time; |
|
619 | 631 | |
|
620 | 632 | return time; |
|
621 | 633 | } |
|
622 | 634 | |
|
623 | 635 | void send_dumb_hk( void ) |
|
624 | 636 | { |
|
625 | 637 | Packet_TM_LFR_HK_t dummy_hk_packet; |
|
626 | 638 | unsigned char *parameters; |
|
627 | 639 | unsigned int i; |
|
628 | 640 | rtems_id queue_id; |
|
629 | 641 | |
|
630 | 642 | queue_id = RTEMS_ID_NONE; |
|
631 | 643 | |
|
632 | 644 | dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; |
|
633 | 645 | dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; |
|
634 | 646 | dummy_hk_packet.reserved = DEFAULT_RESERVED; |
|
635 | 647 | dummy_hk_packet.userApplication = CCSDS_USER_APP; |
|
636 | 648 | dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE); |
|
637 | 649 | dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK); |
|
638 | 650 | dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; |
|
639 | 651 | dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; |
|
640 | 652 | dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE); |
|
641 | 653 | dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); |
|
642 | 654 | dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; |
|
643 | 655 | dummy_hk_packet.serviceType = TM_TYPE_HK; |
|
644 | 656 | dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK; |
|
645 | 657 | dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND; |
|
646 | 658 | dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES); |
|
647 | 659 | dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES); |
|
648 | 660 | dummy_hk_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE); |
|
649 | 661 | dummy_hk_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time); |
|
650 | 662 | dummy_hk_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE); |
|
651 | 663 | dummy_hk_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time); |
|
652 | 664 | dummy_hk_packet.sid = SID_HK; |
|
653 | 665 | |
|
654 | 666 | // init status word |
|
655 | 667 | dummy_hk_packet.lfr_status_word[0] = INT8_ALL_F; |
|
656 | 668 | dummy_hk_packet.lfr_status_word[1] = INT8_ALL_F; |
|
657 | 669 | // init software version |
|
658 | 670 | dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1; |
|
659 | 671 | dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2; |
|
660 | 672 | dummy_hk_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3; |
|
661 | 673 | dummy_hk_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4; |
|
662 | 674 | // init fpga version |
|
663 | 675 | parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + APB_OFFSET_VHDL_REV); |
|
664 | 676 | dummy_hk_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1 |
|
665 | 677 | dummy_hk_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2 |
|
666 | 678 | dummy_hk_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3 |
|
667 | 679 | |
|
668 | 680 | parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load; |
|
669 | 681 | |
|
670 | 682 | for (i=0; i<(BYTE_POS_HK_REACTION_WHEELS_FREQUENCY - BYTE_POS_HK_LFR_CPU_LOAD); i++) |
|
671 | 683 | { |
|
672 | 684 | parameters[i] = INT8_ALL_F; |
|
673 | 685 | } |
|
674 | 686 | |
|
675 | 687 | get_message_queue_id_send( &queue_id ); |
|
676 | 688 | |
|
677 | 689 | rtems_message_queue_send( queue_id, &dummy_hk_packet, |
|
678 | 690 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); |
|
679 | 691 | } |
|
680 | 692 | |
|
681 | 693 | void get_temperatures( unsigned char *temperatures ) |
|
682 | 694 | { |
|
683 | 695 | unsigned char* temp_scm_ptr; |
|
684 | 696 | unsigned char* temp_pcb_ptr; |
|
685 | 697 | unsigned char* temp_fpga_ptr; |
|
686 | 698 | |
|
687 | 699 | // SEL1 SEL0 |
|
688 | 700 | // 0 0 => PCB |
|
689 | 701 | // 0 1 => FPGA |
|
690 | 702 | // 1 0 => SCM |
|
691 | 703 | |
|
692 | 704 | temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm; |
|
693 | 705 | temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb; |
|
694 | 706 | temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga; |
|
695 | 707 | |
|
696 | 708 | temperatures[ BYTE_0 ] = temp_scm_ptr[ BYTE_2 ]; |
|
697 | 709 | temperatures[ BYTE_1 ] = temp_scm_ptr[ BYTE_3 ]; |
|
698 | 710 | temperatures[ BYTE_2 ] = temp_pcb_ptr[ BYTE_2 ]; |
|
699 | 711 | temperatures[ BYTE_3 ] = temp_pcb_ptr[ BYTE_3 ]; |
|
700 | 712 | temperatures[ BYTE_4 ] = temp_fpga_ptr[ BYTE_2 ]; |
|
701 | 713 | temperatures[ BYTE_5 ] = temp_fpga_ptr[ BYTE_3 ]; |
|
702 | 714 | } |
|
703 | 715 | |
|
704 | 716 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ) |
|
705 | 717 | { |
|
706 | 718 | unsigned char* v_ptr; |
|
707 | 719 | unsigned char* e1_ptr; |
|
708 | 720 | unsigned char* e2_ptr; |
|
709 | 721 | |
|
710 | 722 | v_ptr = (unsigned char *) &hk_lfr_sc_v_f3_as_int16; |
|
711 | 723 | e1_ptr = (unsigned char *) &hk_lfr_sc_e1_f3_as_int16; |
|
712 | 724 | e2_ptr = (unsigned char *) &hk_lfr_sc_e2_f3_as_int16; |
|
713 | 725 | |
|
714 | 726 | spacecraft_potential[BYTE_0] = v_ptr[0]; |
|
715 | 727 | spacecraft_potential[BYTE_1] = v_ptr[1]; |
|
716 | 728 | spacecraft_potential[BYTE_2] = e1_ptr[0]; |
|
717 | 729 | spacecraft_potential[BYTE_3] = e1_ptr[1]; |
|
718 | 730 | spacecraft_potential[BYTE_4] = e2_ptr[0]; |
|
719 | 731 | spacecraft_potential[BYTE_5] = e2_ptr[1]; |
|
720 | 732 | } |
|
721 | 733 | |
|
722 | 734 | void get_cpu_load( unsigned char *resource_statistics ) |
|
723 | 735 | { |
|
724 | 736 | unsigned char cpu_load; |
|
725 | 737 | |
|
726 | 738 | cpu_load = lfr_rtems_cpu_usage_report(); |
|
727 | 739 | |
|
728 | 740 | // HK_LFR_CPU_LOAD |
|
729 | 741 | resource_statistics[0] = cpu_load; |
|
730 | 742 | |
|
731 | 743 | // HK_LFR_CPU_LOAD_MAX |
|
732 | 744 | if (cpu_load > resource_statistics[1]) |
|
733 | 745 | { |
|
734 | 746 | resource_statistics[1] = cpu_load; |
|
735 | 747 | } |
|
736 | 748 | |
|
737 | 749 | // CPU_LOAD_AVE |
|
738 | 750 | resource_statistics[BYTE_2] = 0; |
|
739 | 751 | |
|
740 | 752 | #ifndef PRINT_TASK_STATISTICS |
|
741 | 753 | rtems_cpu_usage_reset(); |
|
742 | 754 | #endif |
|
743 | 755 | |
|
744 | 756 | } |
|
745 | 757 | |
|
746 | 758 | void set_hk_lfr_sc_potential_flag( bool state ) |
|
747 | 759 | { |
|
748 | 760 | if (state == true) |
|
749 | 761 | { |
|
750 | 762 | housekeeping_packet.lfr_status_word[1] = |
|
751 | 763 | housekeeping_packet.lfr_status_word[1] | STATUS_WORD_SC_POTENTIAL_FLAG_BIT; // [0100 0000] |
|
752 | 764 | } |
|
753 | 765 | else |
|
754 | 766 | { |
|
755 | 767 | housekeeping_packet.lfr_status_word[1] = |
|
756 | 768 | housekeeping_packet.lfr_status_word[1] & STATUS_WORD_SC_POTENTIAL_FLAG_MASK; // [1011 1111] |
|
757 | 769 | } |
|
758 | 770 | } |
|
759 | 771 | |
|
760 | 772 | void set_sy_lfr_pas_filter_enabled( bool state ) |
|
761 | 773 | { |
|
762 | 774 | if (state == true) |
|
763 | 775 | { |
|
764 | 776 | housekeeping_packet.lfr_status_word[1] = |
|
765 | 777 | housekeeping_packet.lfr_status_word[1] | STATUS_WORD_PAS_FILTER_ENABLED_BIT; // [0010 0000] |
|
766 | 778 | } |
|
767 | 779 | else |
|
768 | 780 | { |
|
769 | 781 | housekeeping_packet.lfr_status_word[1] = |
|
770 | 782 | housekeeping_packet.lfr_status_word[1] & STATUS_WORD_PAS_FILTER_ENABLED_MASK; // [1101 1111] |
|
771 | 783 | } |
|
772 | 784 | } |
|
773 | 785 | |
|
774 | 786 | void set_sy_lfr_watchdog_enabled( bool state ) |
|
775 | 787 | { |
|
776 | 788 | if (state == true) |
|
777 | 789 | { |
|
778 | 790 | housekeeping_packet.lfr_status_word[1] = |
|
779 | 791 | housekeeping_packet.lfr_status_word[1] | STATUS_WORD_WATCHDOG_BIT; // [0001 0000] |
|
780 | 792 | } |
|
781 | 793 | else |
|
782 | 794 | { |
|
783 | 795 | housekeeping_packet.lfr_status_word[1] = |
|
784 | 796 | housekeeping_packet.lfr_status_word[1] & STATUS_WORD_WATCHDOG_MASK; // [1110 1111] |
|
785 | 797 | } |
|
786 | 798 | } |
|
787 | 799 | |
|
788 | 800 | void set_hk_lfr_calib_enable( bool state ) |
|
789 | 801 | { |
|
790 | 802 | if (state == true) |
|
791 | 803 | { |
|
792 | 804 | housekeeping_packet.lfr_status_word[1] = |
|
793 | 805 | housekeeping_packet.lfr_status_word[1] | STATUS_WORD_CALIB_BIT; // [0000 1000] |
|
794 | 806 | } |
|
795 | 807 | else |
|
796 | 808 | { |
|
797 | 809 | housekeeping_packet.lfr_status_word[1] = |
|
798 | 810 | housekeeping_packet.lfr_status_word[1] & STATUS_WORD_CALIB_MASK; // [1111 0111] |
|
799 | 811 | } |
|
800 | 812 | } |
|
801 | 813 | |
|
802 | 814 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ) |
|
803 | 815 | { |
|
804 | 816 | housekeeping_packet.lfr_status_word[1] = |
|
805 | 817 | housekeeping_packet.lfr_status_word[1] & STATUS_WORD_RESET_CAUSE_MASK; // [1111 1000] |
|
806 | 818 | |
|
807 | 819 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] |
|
808 | 820 | | (lfr_reset_cause & STATUS_WORD_RESET_CAUSE_BITS ); // [0000 0111] |
|
809 | 821 | |
|
810 | 822 | } |
|
811 | 823 | |
|
812 | 824 | void increment_hk_counter( unsigned char newValue, unsigned char oldValue, unsigned int *counter ) |
|
813 | 825 | { |
|
814 | 826 | int delta; |
|
815 | 827 | |
|
816 | 828 | delta = 0; |
|
817 | 829 | |
|
818 | 830 | if (newValue >= oldValue) |
|
819 | 831 | { |
|
820 | 832 | delta = newValue - oldValue; |
|
821 | 833 | } |
|
822 | 834 | else |
|
823 | 835 | { |
|
824 | 836 | delta = (CONST_256 - oldValue) + newValue; |
|
825 | 837 | } |
|
826 | 838 | |
|
827 | 839 | *counter = *counter + delta; |
|
828 | 840 | } |
|
829 | 841 | |
|
830 | 842 | void hk_lfr_le_update( void ) |
|
831 | 843 | { |
|
832 | 844 | static hk_lfr_le_t old_hk_lfr_le = {0}; |
|
833 | 845 | hk_lfr_le_t new_hk_lfr_le; |
|
834 | 846 | unsigned int counter; |
|
835 | 847 | |
|
836 | 848 | counter = (((unsigned int) housekeeping_packet.hk_lfr_le_cnt[0]) * CONST_256) + housekeeping_packet.hk_lfr_le_cnt[1]; |
|
837 | 849 | |
|
838 | 850 | // DPU |
|
839 | 851 | new_hk_lfr_le.dpu_spw_parity = housekeeping_packet.hk_lfr_dpu_spw_parity; |
|
840 | 852 | new_hk_lfr_le.dpu_spw_disconnect= housekeeping_packet.hk_lfr_dpu_spw_disconnect; |
|
841 | 853 | new_hk_lfr_le.dpu_spw_escape = housekeeping_packet.hk_lfr_dpu_spw_escape; |
|
842 | 854 | new_hk_lfr_le.dpu_spw_credit = housekeeping_packet.hk_lfr_dpu_spw_credit; |
|
843 | 855 | new_hk_lfr_le.dpu_spw_write_sync= housekeeping_packet.hk_lfr_dpu_spw_write_sync; |
|
844 | 856 | // TIMECODE |
|
845 | 857 | new_hk_lfr_le.timecode_erroneous= housekeeping_packet.hk_lfr_timecode_erroneous; |
|
846 | 858 | new_hk_lfr_le.timecode_missing = housekeeping_packet.hk_lfr_timecode_missing; |
|
847 | 859 | new_hk_lfr_le.timecode_invalid = housekeeping_packet.hk_lfr_timecode_invalid; |
|
848 | 860 | // TIME |
|
849 | 861 | new_hk_lfr_le.time_timecode_it = housekeeping_packet.hk_lfr_time_timecode_it; |
|
850 | 862 | new_hk_lfr_le.time_not_synchro = housekeeping_packet.hk_lfr_time_not_synchro; |
|
851 | 863 | new_hk_lfr_le.time_timecode_ctr = housekeeping_packet.hk_lfr_time_timecode_ctr; |
|
852 | 864 | //AHB |
|
853 | 865 | new_hk_lfr_le.ahb_correctable = housekeeping_packet.hk_lfr_ahb_correctable; |
|
854 | 866 | // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver |
|
855 | 867 | // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver |
|
856 | 868 | |
|
857 | 869 | // update the le counter |
|
858 | 870 | // DPU |
|
859 | 871 | increment_hk_counter( new_hk_lfr_le.dpu_spw_parity, old_hk_lfr_le.dpu_spw_parity, &counter ); |
|
860 | 872 | increment_hk_counter( new_hk_lfr_le.dpu_spw_disconnect,old_hk_lfr_le.dpu_spw_disconnect, &counter ); |
|
861 | 873 | increment_hk_counter( new_hk_lfr_le.dpu_spw_escape, old_hk_lfr_le.dpu_spw_escape, &counter ); |
|
862 | 874 | increment_hk_counter( new_hk_lfr_le.dpu_spw_credit, old_hk_lfr_le.dpu_spw_credit, &counter ); |
|
863 | 875 | increment_hk_counter( new_hk_lfr_le.dpu_spw_write_sync,old_hk_lfr_le.dpu_spw_write_sync, &counter ); |
|
864 | 876 | // TIMECODE |
|
865 | 877 | increment_hk_counter( new_hk_lfr_le.timecode_erroneous,old_hk_lfr_le.timecode_erroneous, &counter ); |
|
866 | 878 | increment_hk_counter( new_hk_lfr_le.timecode_missing, old_hk_lfr_le.timecode_missing, &counter ); |
|
867 | 879 | increment_hk_counter( new_hk_lfr_le.timecode_invalid, old_hk_lfr_le.timecode_invalid, &counter ); |
|
868 | 880 | // TIME |
|
869 | 881 | increment_hk_counter( new_hk_lfr_le.time_timecode_it, old_hk_lfr_le.time_timecode_it, &counter ); |
|
870 | 882 | increment_hk_counter( new_hk_lfr_le.time_not_synchro, old_hk_lfr_le.time_not_synchro, &counter ); |
|
871 | 883 | increment_hk_counter( new_hk_lfr_le.time_timecode_ctr, old_hk_lfr_le.time_timecode_ctr, &counter ); |
|
872 | 884 | // AHB |
|
873 | 885 | increment_hk_counter( new_hk_lfr_le.ahb_correctable, old_hk_lfr_le.ahb_correctable, &counter ); |
|
874 | 886 | |
|
875 | 887 | // DPU |
|
876 | 888 | old_hk_lfr_le.dpu_spw_parity = new_hk_lfr_le.dpu_spw_parity; |
|
877 | 889 | old_hk_lfr_le.dpu_spw_disconnect= new_hk_lfr_le.dpu_spw_disconnect; |
|
878 | 890 | old_hk_lfr_le.dpu_spw_escape = new_hk_lfr_le.dpu_spw_escape; |
|
879 | 891 | old_hk_lfr_le.dpu_spw_credit = new_hk_lfr_le.dpu_spw_credit; |
|
880 | 892 | old_hk_lfr_le.dpu_spw_write_sync= new_hk_lfr_le.dpu_spw_write_sync; |
|
881 | 893 | // TIMECODE |
|
882 | 894 | old_hk_lfr_le.timecode_erroneous= new_hk_lfr_le.timecode_erroneous; |
|
883 | 895 | old_hk_lfr_le.timecode_missing = new_hk_lfr_le.timecode_missing; |
|
884 | 896 | old_hk_lfr_le.timecode_invalid = new_hk_lfr_le.timecode_invalid; |
|
885 | 897 | // TIME |
|
886 | 898 | old_hk_lfr_le.time_timecode_it = new_hk_lfr_le.time_timecode_it; |
|
887 | 899 | old_hk_lfr_le.time_not_synchro = new_hk_lfr_le.time_not_synchro; |
|
888 | 900 | old_hk_lfr_le.time_timecode_ctr = new_hk_lfr_le.time_timecode_ctr; |
|
889 | 901 | //AHB |
|
890 | 902 | old_hk_lfr_le.ahb_correctable = new_hk_lfr_le.ahb_correctable; |
|
891 | 903 | // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver |
|
892 | 904 | // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver |
|
893 | 905 | |
|
894 | 906 | // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers |
|
895 | 907 | // LE |
|
896 | 908 | housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((counter & BYTE0_MASK) >> SHIFT_1_BYTE); |
|
897 | 909 | housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (counter & BYTE1_MASK); |
|
898 | 910 | } |
|
899 | 911 | |
|
900 | 912 | void hk_lfr_me_update( void ) |
|
901 | 913 | { |
|
902 | 914 | static hk_lfr_me_t old_hk_lfr_me = {0}; |
|
903 | 915 | hk_lfr_me_t new_hk_lfr_me; |
|
904 | 916 | unsigned int counter; |
|
905 | 917 | |
|
906 | 918 | counter = (((unsigned int) housekeeping_packet.hk_lfr_me_cnt[0]) * CONST_256) + housekeeping_packet.hk_lfr_me_cnt[1]; |
|
907 | 919 | |
|
908 | 920 | // get the current values |
|
909 | 921 | new_hk_lfr_me.dpu_spw_early_eop = housekeeping_packet.hk_lfr_dpu_spw_early_eop; |
|
910 | 922 | new_hk_lfr_me.dpu_spw_invalid_addr = housekeeping_packet.hk_lfr_dpu_spw_invalid_addr; |
|
911 | 923 | new_hk_lfr_me.dpu_spw_eep = housekeeping_packet.hk_lfr_dpu_spw_eep; |
|
912 | 924 | new_hk_lfr_me.dpu_spw_rx_too_big = housekeeping_packet.hk_lfr_dpu_spw_rx_too_big; |
|
913 | 925 | |
|
914 | 926 | // update the me counter |
|
915 | 927 | increment_hk_counter( new_hk_lfr_me.dpu_spw_early_eop, old_hk_lfr_me.dpu_spw_early_eop, &counter ); |
|
916 | 928 | increment_hk_counter( new_hk_lfr_me.dpu_spw_invalid_addr, old_hk_lfr_me.dpu_spw_invalid_addr, &counter ); |
|
917 | 929 | increment_hk_counter( new_hk_lfr_me.dpu_spw_eep, old_hk_lfr_me.dpu_spw_eep, &counter ); |
|
918 | 930 | increment_hk_counter( new_hk_lfr_me.dpu_spw_rx_too_big, old_hk_lfr_me.dpu_spw_rx_too_big, &counter ); |
|
919 | 931 | |
|
920 | 932 | // store the counters for the next time |
|
921 | 933 | old_hk_lfr_me.dpu_spw_early_eop = new_hk_lfr_me.dpu_spw_early_eop; |
|
922 | 934 | old_hk_lfr_me.dpu_spw_invalid_addr = new_hk_lfr_me.dpu_spw_invalid_addr; |
|
923 | 935 | old_hk_lfr_me.dpu_spw_eep = new_hk_lfr_me.dpu_spw_eep; |
|
924 | 936 | old_hk_lfr_me.dpu_spw_rx_too_big = new_hk_lfr_me.dpu_spw_rx_too_big; |
|
925 | 937 | |
|
926 | 938 | // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers |
|
927 | 939 | // ME |
|
928 | 940 | housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((counter & BYTE0_MASK) >> SHIFT_1_BYTE); |
|
929 | 941 | housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (counter & BYTE1_MASK); |
|
930 | 942 | } |
|
931 | 943 | |
|
932 | 944 | void hk_lfr_le_me_he_update() |
|
933 | 945 | { |
|
934 | 946 | |
|
935 | 947 | unsigned int hk_lfr_he_cnt; |
|
936 | 948 | |
|
937 | 949 | hk_lfr_he_cnt = (((unsigned int) housekeeping_packet.hk_lfr_he_cnt[0]) * 256) + housekeeping_packet.hk_lfr_he_cnt[1]; |
|
938 | 950 | |
|
939 | 951 | //update the low severity error counter |
|
940 | 952 | hk_lfr_le_update( ); |
|
941 | 953 | |
|
942 | 954 | //update the medium severity error counter |
|
943 | 955 | hk_lfr_me_update(); |
|
944 | 956 | |
|
945 | 957 | //update the high severity error counter |
|
946 | 958 | hk_lfr_he_cnt = 0; |
|
947 | 959 | |
|
948 | 960 | // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers |
|
949 | 961 | // HE |
|
950 | 962 | housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & BYTE0_MASK) >> SHIFT_1_BYTE); |
|
951 | 963 | housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & BYTE1_MASK); |
|
952 | 964 | |
|
953 | 965 | } |
|
954 | 966 | |
|
955 | 967 | void set_hk_lfr_time_not_synchro() |
|
956 | 968 | { |
|
957 | 969 | static unsigned char synchroLost = 1; |
|
958 | 970 | int synchronizationBit; |
|
959 | 971 | |
|
960 | 972 | // get the synchronization bit |
|
961 | 973 | synchronizationBit = |
|
962 | 974 | (time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) >> BIT_SYNCHRONIZATION; // 1000 0000 0000 0000 |
|
963 | 975 | |
|
964 | 976 | switch (synchronizationBit) |
|
965 | 977 | { |
|
966 | 978 | case 0: |
|
967 | 979 | if (synchroLost == 1) |
|
968 | 980 | { |
|
969 | 981 | synchroLost = 0; |
|
970 | 982 | } |
|
971 | 983 | break; |
|
972 | 984 | case 1: |
|
973 | 985 | if (synchroLost == 0 ) |
|
974 | 986 | { |
|
975 | 987 | synchroLost = 1; |
|
976 | 988 | increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro); |
|
977 | 989 | update_hk_lfr_last_er_fields( RID_LE_LFR_TIME, CODE_NOT_SYNCHRO ); |
|
978 | 990 | } |
|
979 | 991 | break; |
|
980 | 992 | default: |
|
981 | 993 | PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit); |
|
982 | 994 | break; |
|
983 | 995 | } |
|
984 | 996 | |
|
985 | 997 | } |
|
986 | 998 | |
|
987 | 999 | void set_hk_lfr_ahb_correctable() // CRITICITY L |
|
988 | 1000 | { |
|
989 | 1001 | /** This function builds the error counter hk_lfr_ahb_correctable using the statistics provided |
|
990 | 1002 | * by the Cache Control Register (ASI 2, offset 0) and in the Register Protection Control Register (ASR16) on the |
|
991 | 1003 | * detected errors in the cache, in the integer unit and in the floating point unit. |
|
992 | 1004 | * |
|
993 | 1005 | * @param void |
|
994 | 1006 | * |
|
995 | 1007 | * @return void |
|
996 | 1008 | * |
|
997 | 1009 | * All errors are summed to set the value of the hk_lfr_ahb_correctable counter. |
|
998 | 1010 | * |
|
999 | 1011 | */ |
|
1000 | 1012 | |
|
1001 | 1013 | unsigned int ahb_correctable; |
|
1002 | 1014 | unsigned int instructionErrorCounter; |
|
1003 | 1015 | unsigned int dataErrorCounter; |
|
1004 | 1016 | unsigned int fprfErrorCounter; |
|
1005 | 1017 | unsigned int iurfErrorCounter; |
|
1006 | 1018 | |
|
1007 | 1019 | instructionErrorCounter = 0; |
|
1008 | 1020 | dataErrorCounter = 0; |
|
1009 | 1021 | fprfErrorCounter = 0; |
|
1010 | 1022 | iurfErrorCounter = 0; |
|
1011 | 1023 | |
|
1012 | 1024 | CCR_getInstructionAndDataErrorCounters( &instructionErrorCounter, &dataErrorCounter); |
|
1013 | 1025 | ASR16_get_FPRF_IURF_ErrorCounters( &fprfErrorCounter, &iurfErrorCounter); |
|
1014 | 1026 | |
|
1015 | 1027 | ahb_correctable = instructionErrorCounter |
|
1016 | 1028 | + dataErrorCounter |
|
1017 | 1029 | + fprfErrorCounter |
|
1018 | 1030 | + iurfErrorCounter |
|
1019 | 1031 | + housekeeping_packet.hk_lfr_ahb_correctable; |
|
1020 | 1032 | |
|
1021 | 1033 | housekeeping_packet.hk_lfr_ahb_correctable = (unsigned char) (ahb_correctable & INT8_ALL_F); // [1111 1111] |
|
1022 | 1034 | |
|
1023 | 1035 | } |
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