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ICD 4.1 taken into account
paul -
r283:c0251025dc7b R3_plus draft
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@@ -1,2 +1,2
1 1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 c3197ff831df5057bdd145a4efd94ded0618661f header/lfr_common_headers
2 81c3289ebd2a13e3b3147acdf60e34678378f905 header/lfr_common_headers
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@@ -1,124 +1,123
1 1 TEMPLATE = app
2 2 # CONFIG += console v8 sim
3 3 # CONFIG options =
4 4 # verbose
5 5 # boot_messages
6 6 # debug_messages
7 7 # cpu_usage_report
8 8 # stack_report
9 9 # vhdl_dev
10 10 # debug_tch
11 11 # lpp_dpu_destid /!\ REMOVE BEFORE DELIVERY TO LESIA /!\
12 12 # debug_watchdog
13 13 CONFIG += console verbose lpp_dpu_destid
14 14 CONFIG -= qt
15 15
16 16 include(./sparc.pri)
17 17
18 18 # flight software version
19 19 SWVERSION=-1-0
20 20 DEFINES += SW_VERSION_N1=3 # major
21 21 DEFINES += SW_VERSION_N2=1 # minor
22 22 DEFINES += SW_VERSION_N3=0 # patch
23 23 DEFINES += SW_VERSION_N4=0 # internal
24 24
25 25 # <GCOV>
26 26 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
27 27 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
28 28 # </GCOV>
29 29
30 30 # <CHANGE BEFORE FLIGHT>
31 31 contains( CONFIG, lpp_dpu_destid ) {
32 32 DEFINES += LPP_DPU_DESTID
33 33 }
34 34 # </CHANGE BEFORE FLIGHT>
35 35
36 36 contains( CONFIG, debug_tch ) {
37 37 DEFINES += DEBUG_TCH
38 38 }
39 39 DEFINES += MSB_FIRST_TCH
40 40
41 41 contains( CONFIG, vhdl_dev ) {
42 42 DEFINES += VHDL_DEV
43 43 }
44 44
45 45 contains( CONFIG, verbose ) {
46 46 DEFINES += PRINT_MESSAGES_ON_CONSOLE
47 47 }
48 48
49 49 contains( CONFIG, debug_messages ) {
50 50 DEFINES += DEBUG_MESSAGES
51 51 }
52 52
53 53 contains( CONFIG, cpu_usage_report ) {
54 54 DEFINES += PRINT_TASK_STATISTICS
55 55 }
56 56
57 57 contains( CONFIG, stack_report ) {
58 58 DEFINES += PRINT_STACK_REPORT
59 59 }
60 60
61 61 contains( CONFIG, boot_messages ) {
62 62 DEFINES += BOOT_MESSAGES
63 63 }
64 64
65 65 contains( CONFIG, debug_watchdog ) {
66 66 DEFINES += DEBUG_WATCHDOG
67 67 }
68 68
69 69 #doxygen.target = doxygen
70 70 #doxygen.commands = doxygen ../doc/Doxyfile
71 71 #QMAKE_EXTRA_TARGETS += doxygen
72 72
73 73 TARGET = fsw
74 74
75 75 INCLUDEPATH += \
76 76 $${PWD}/../src \
77 77 $${PWD}/../header \
78 78 $${PWD}/../header/lfr_common_headers \
79 79 $${PWD}/../header/processing \
80 80 $${PWD}/../LFR_basic-parameters
81 81
82 82 SOURCES += \
83 83 ../src/wf_handler.c \
84 84 ../src/tc_handler.c \
85 85 ../src/fsw_misc.c \
86 86 ../src/fsw_init.c \
87 87 ../src/fsw_globals.c \
88 88 ../src/fsw_spacewire.c \
89 89 ../src/tc_load_dump_parameters.c \
90 90 ../src/tm_lfr_tc_exe.c \
91 91 ../src/tc_acceptance.c \
92 92 ../src/processing/fsw_processing.c \
93 93 ../src/processing/avf0_prc0.c \
94 94 ../src/processing/avf1_prc1.c \
95 95 ../src/processing/avf2_prc2.c \
96 96 ../src/lfr_cpu_usage_report.c \
97 97 ../LFR_basic-parameters/basic_parameters.c
98 98
99 99 HEADERS += \
100 100 ../header/wf_handler.h \
101 101 ../header/tc_handler.h \
102 102 ../header/grlib_regs.h \
103 103 ../header/fsw_misc.h \
104 104 ../header/fsw_init.h \
105 105 ../header/fsw_spacewire.h \
106 106 ../header/tc_load_dump_parameters.h \
107 107 ../header/tm_lfr_tc_exe.h \
108 108 ../header/tc_acceptance.h \
109 109 ../header/processing/fsw_processing.h \
110 110 ../header/processing/avf0_prc0.h \
111 111 ../header/processing/avf1_prc1.h \
112 112 ../header/processing/avf2_prc2.h \
113 113 ../header/fsw_params_wf_handler.h \
114 114 ../header/lfr_cpu_usage_report.h \
115 115 ../header/lfr_common_headers/ccsds_types.h \
116 116 ../header/lfr_common_headers/fsw_params.h \
117 117 ../header/lfr_common_headers/fsw_params_nb_bytes.h \
118 118 ../header/lfr_common_headers/fsw_params_processing.h \
119 ../header/lfr_common_headers/TC_types.h \
120 119 ../header/lfr_common_headers/tm_byte_positions.h \
121 120 ../LFR_basic-parameters/basic_parameters.h \
122 121 ../LFR_basic-parameters/basic_parameters_params.h \
123 122 ../header/GscMemoryLPP.hpp
124 123
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@@ -1,54 +1,63
1 1 #ifndef FSW_INIT_H_INCLUDED
2 2 #define FSW_INIT_H_INCLUDED
3 3
4 4 #include <rtems.h>
5 5 #include <leon.h>
6 6
7 7 #include "fsw_params.h"
8 8 #include "fsw_misc.h"
9 9 #include "fsw_processing.h"
10 10
11 11 #include "tc_handler.h"
12 12 #include "wf_handler.h"
13 13 #include "fsw_spacewire.h"
14 14
15 15 #include "avf0_prc0.h"
16 16 #include "avf1_prc1.h"
17 17 #include "avf2_prc2.h"
18 18
19 19 extern rtems_name Task_name[20]; /* array of task names */
20 20 extern rtems_id Task_id[20]; /* array of task ids */
21 21 extern rtems_name timecode_timer_name;
22 22 extern rtems_id timecode_timer_id;
23 23 extern unsigned char pa_bia_status_info;
24 extern unsigned char cp_rpw_sc_rw_f_flags;
25 extern float cp_rpw_sc_rw1_f1;
26 extern float cp_rpw_sc_rw1_f2;
27 extern float cp_rpw_sc_rw2_f1;
28 extern float cp_rpw_sc_rw2_f2;
29 extern float cp_rpw_sc_rw3_f1;
30 extern float cp_rpw_sc_rw3_f2;
31 extern float cp_rpw_sc_rw4_f1;
32 extern float cp_rpw_sc_rw4_f2;
24 33
25 34 // RTEMS TASKS
26 35 rtems_task Init( rtems_task_argument argument);
27 36
28 37 // OTHER functions
29 38 void create_names( void );
30 39 int create_all_tasks( void );
31 40 int start_all_tasks( void );
32 41 //
33 42 rtems_status_code create_message_queues( void );
34 43 rtems_status_code create_timecode_timer( void );
35 44 rtems_status_code get_message_queue_id_send( rtems_id *queue_id );
36 45 rtems_status_code get_message_queue_id_recv( rtems_id *queue_id );
37 46 rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id );
38 47 rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
39 48 rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
40 49 void update_queue_max_count( rtems_id queue_id, unsigned char*fifo_size_max );
41 50 void init_ring(ring_node ring[], unsigned char nbNodes, volatile int buffer[], unsigned int bufferSize );
42 51 //
43 52 int start_recv_send_tasks( void );
44 53 //
45 54 void init_local_mode_parameters( void );
46 55 void reset_local_time( void );
47 56
48 57 extern void rtems_cpu_usage_report( void );
49 58 extern void rtems_cpu_usage_reset( void );
50 59 extern void rtems_stack_checker_report_usage( void );
51 60
52 61 extern int sched_yield( void );
53 62
54 63 #endif // FSW_INIT_H_INCLUDED
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@@ -1,332 +1,335
1 1 #ifndef FSW_PROCESSING_H_INCLUDED
2 2 #define FSW_PROCESSING_H_INCLUDED
3 3
4 4 #include <rtems.h>
5 5 #include <grspw.h>
6 6 #include <math.h>
7 7 #include <stdlib.h> // abs() is in the stdlib
8 8 #include <stdio.h>
9 9 #include <math.h>
10 10 #include <grlib_regs.h>
11 11
12 12 #include "fsw_params.h"
13 13
14 14 typedef struct ring_node_asm
15 15 {
16 16 struct ring_node_asm *next;
17 17 float matrix[ TOTAL_SIZE_SM ];
18 18 unsigned int status;
19 19 } ring_node_asm;
20 20
21 21 typedef struct
22 22 {
23 23 unsigned char targetLogicalAddress;
24 24 unsigned char protocolIdentifier;
25 25 unsigned char reserved;
26 26 unsigned char userApplication;
27 27 unsigned char packetID[2];
28 28 unsigned char packetSequenceControl[2];
29 29 unsigned char packetLength[2];
30 30 // DATA FIELD HEADER
31 31 unsigned char spare1_pusVersion_spare2;
32 32 unsigned char serviceType;
33 33 unsigned char serviceSubType;
34 34 unsigned char destinationID;
35 35 unsigned char time[6];
36 36 // AUXILIARY HEADER
37 37 unsigned char sid;
38 unsigned char biaStatusInfo;
38 unsigned char pa_bia_status_info;
39 39 unsigned char sy_lfr_common_parameters_spare;
40 40 unsigned char sy_lfr_common_parameters;
41 41 unsigned char acquisitionTime[6];
42 42 unsigned char pa_lfr_bp_blk_nr[2];
43 43 // SOURCE DATA
44 44 unsigned char data[ 780 ]; // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
45 45 } bp_packet;
46 46
47 47 typedef struct
48 48 {
49 49 unsigned char targetLogicalAddress;
50 50 unsigned char protocolIdentifier;
51 51 unsigned char reserved;
52 52 unsigned char userApplication;
53 53 unsigned char packetID[2];
54 54 unsigned char packetSequenceControl[2];
55 55 unsigned char packetLength[2];
56 56 // DATA FIELD HEADER
57 57 unsigned char spare1_pusVersion_spare2;
58 58 unsigned char serviceType;
59 59 unsigned char serviceSubType;
60 60 unsigned char destinationID;
61 61 unsigned char time[6];
62 62 // AUXILIARY HEADER
63 63 unsigned char sid;
64 unsigned char biaStatusInfo;
64 unsigned char pa_bia_status_info;
65 65 unsigned char sy_lfr_common_parameters_spare;
66 66 unsigned char sy_lfr_common_parameters;
67 67 unsigned char acquisitionTime[6];
68 68 unsigned char source_data_spare;
69 69 unsigned char pa_lfr_bp_blk_nr[2];
70 70 // SOURCE DATA
71 71 unsigned char data[ 143 ]; // 13 bins * 11 Bytes
72 72 } bp_packet_with_spare; // only for TM_LFR_SCIENCE_NORMAL_BP1_F0 and F1
73 73
74 74 typedef struct asm_msg
75 75 {
76 76 ring_node_asm *norm;
77 77 ring_node_asm *burst_sbm;
78 78 rtems_event_set event;
79 79 unsigned int coarseTimeNORM;
80 80 unsigned int fineTimeNORM;
81 81 unsigned int coarseTimeSBM;
82 82 unsigned int fineTimeSBM;
83 83 } asm_msg;
84 84
85 85 extern unsigned char thisIsAnASMRestart;
86 86
87 87 extern volatile int sm_f0[ ];
88 88 extern volatile int sm_f1[ ];
89 89 extern volatile int sm_f2[ ];
90 90
91 91 // parameters
92 92 extern struct param_local_str param_local;
93 93 extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
94 extern unsigned char rw_fbins_mask_f0[16];
95 extern unsigned char rw_fbins_mask_f1[16];
96 extern unsigned char rw_fbins_mask_f2[16];
94 97
95 98 // registers
96 99 extern time_management_regs_t *time_management_regs;
97 100 extern volatile spectral_matrix_regs_t *spectral_matrix_regs;
98 101
99 102 extern rtems_name misc_name[5];
100 103 extern rtems_id Task_id[20]; /* array of task ids */
101 104
102 105 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel);
103 106 // ISR
104 107 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
105 108
106 109 //******************
107 110 // Spectral Matrices
108 111 void reset_nb_sm( void );
109 112 // SM
110 113 void SM_init_rings( void );
111 114 void SM_reset_current_ring_nodes( void );
112 115 // ASM
113 116 void ASM_generic_init_ring(ring_node_asm *ring, unsigned char nbNodes );
114 117
115 118 //*****************
116 119 // Basic Parameters
117 120
118 121 void BP_reset_current_ring_nodes( void );
119 122 void BP_init_header(bp_packet *packet,
120 123 unsigned int apid, unsigned char sid,
121 124 unsigned int packetLength , unsigned char blkNr);
122 125 void BP_init_header_with_spare(bp_packet_with_spare *packet,
123 126 unsigned int apid, unsigned char sid,
124 127 unsigned int packetLength, unsigned char blkNr );
125 128 void BP_send( char *data,
126 129 rtems_id queue_id,
127 130 unsigned int nbBytesToSend , unsigned int sid );
128 131 void BP_send_s1_s2(char *data,
129 132 rtems_id queue_id,
130 133 unsigned int nbBytesToSend, unsigned int sid );
131 134
132 135 //******************
133 136 // general functions
134 137 void reset_sm_status( void );
135 138 void reset_spectral_matrix_regs( void );
136 139 void set_time(unsigned char *time, unsigned char *timeInBuffer );
137 140 unsigned long long int get_acquisition_time( unsigned char *timePtr );
138 141 unsigned char getSID( rtems_event_set event );
139 142
140 143 extern rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
141 144 extern rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
142 145
143 146 //***************************************
144 147 // DEFINITIONS OF STATIC INLINE FUNCTIONS
145 148 static inline void SM_average(float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
146 149 ring_node *ring_node_tab[],
147 150 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
148 151 asm_msg *msgForMATR );
149 152
150 153 static inline void SM_average_debug(float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
151 154 ring_node *ring_node_tab[],
152 155 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
153 156 asm_msg *msgForMATR );
154 157
155 158 void ASM_patch( float *inputASM, float *outputASM );
156 159
157 160 void extractReImVectors(float *inputASM, float *outputASM, unsigned int asmComponent );
158 161
159 162 static inline void ASM_reorganize_and_divide(float *averaged_spec_mat, float *averaged_spec_mat_reorganized,
160 163 float divider );
161 164
162 165 static inline void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat,
163 166 float divider,
164 167 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage , unsigned char ASMIndexStart);
165 168
166 169 static inline void ASM_convert(volatile float *input_matrix, char *output_matrix);
167 170
168 171 void SM_average( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
169 172 ring_node *ring_node_tab[],
170 173 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
171 174 asm_msg *msgForMATR )
172 175 {
173 176 float sum;
174 177 unsigned int i;
175 178
176 179 for(i=0; i<TOTAL_SIZE_SM; i++)
177 180 {
178 181 sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ]
179 182 + ( (int *) (ring_node_tab[1]->buffer_address) ) [ i ]
180 183 + ( (int *) (ring_node_tab[2]->buffer_address) ) [ i ]
181 184 + ( (int *) (ring_node_tab[3]->buffer_address) ) [ i ]
182 185 + ( (int *) (ring_node_tab[4]->buffer_address) ) [ i ]
183 186 + ( (int *) (ring_node_tab[5]->buffer_address) ) [ i ]
184 187 + ( (int *) (ring_node_tab[6]->buffer_address) ) [ i ]
185 188 + ( (int *) (ring_node_tab[7]->buffer_address) ) [ i ];
186 189
187 190 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
188 191 {
189 192 averaged_spec_mat_NORM[ i ] = sum;
190 193 averaged_spec_mat_SBM[ i ] = sum;
191 194 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
192 195 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
193 196 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
194 197 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
195 198 }
196 199 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
197 200 {
198 201 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
199 202 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
200 203 }
201 204 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
202 205 {
203 206 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
204 207 averaged_spec_mat_SBM[ i ] = sum;
205 208 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
206 209 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
207 210 }
208 211 else
209 212 {
210 213 averaged_spec_mat_NORM[ i ] = sum;
211 214 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
212 215 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
213 216 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
214 217 // PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
215 218 }
216 219 }
217 220 }
218 221
219 222 void SM_average_debug( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
220 223 ring_node *ring_node_tab[],
221 224 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
222 225 asm_msg *msgForMATR )
223 226 {
224 227 float sum;
225 228 unsigned int i;
226 229
227 230 for(i=0; i<TOTAL_SIZE_SM; i++)
228 231 {
229 232 sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ];
230 233 averaged_spec_mat_NORM[ i ] = sum;
231 234 averaged_spec_mat_SBM[ i ] = sum;
232 235 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
233 236 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
234 237 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
235 238 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
236 239 }
237 240 }
238 241
239 242 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
240 243 {
241 244 int frequencyBin;
242 245 int asmComponent;
243 246 unsigned int offsetASM;
244 247 unsigned int offsetASMReorganized;
245 248
246 249 // BUILD DATA
247 250 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
248 251 {
249 252 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
250 253 {
251 254 offsetASMReorganized =
252 255 frequencyBin * NB_VALUES_PER_SM
253 256 + asmComponent;
254 257 offsetASM =
255 258 asmComponent * NB_BINS_PER_SM
256 259 + frequencyBin;
257 260 averaged_spec_mat_reorganized[offsetASMReorganized ] =
258 261 averaged_spec_mat[ offsetASM ] / divider;
259 262 }
260 263 }
261 264 }
262 265
263 266 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
264 267 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
265 268 {
266 269 int frequencyBin;
267 270 int asmComponent;
268 271 int offsetASM;
269 272 int offsetCompressed;
270 273 int k;
271 274
272 275 // BUILD DATA
273 276 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
274 277 {
275 278 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
276 279 {
277 280 offsetCompressed = // NO TIME OFFSET
278 281 frequencyBin * NB_VALUES_PER_SM
279 282 + asmComponent;
280 283 offsetASM = // NO TIME OFFSET
281 284 asmComponent * NB_BINS_PER_SM
282 285 + ASMIndexStart
283 286 + frequencyBin * nbBinsToAverage;
284 287 compressed_spec_mat[ offsetCompressed ] = 0;
285 288 for ( k = 0; k < nbBinsToAverage; k++ )
286 289 {
287 290 compressed_spec_mat[offsetCompressed ] =
288 291 ( compressed_spec_mat[ offsetCompressed ]
289 292 + averaged_spec_mat[ offsetASM + k ] );
290 293 }
291 294 compressed_spec_mat[ offsetCompressed ] =
292 295 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
293 296 }
294 297 }
295 298 }
296 299
297 300 void ASM_convert( volatile float *input_matrix, char *output_matrix)
298 301 {
299 302 unsigned int frequencyBin;
300 303 unsigned int asmComponent;
301 304 char * pt_char_input;
302 305 char * pt_char_output;
303 306 unsigned int offsetInput;
304 307 unsigned int offsetOutput;
305 308
306 309 pt_char_input = (char*) &input_matrix;
307 310 pt_char_output = (char*) &output_matrix;
308 311
309 312 // convert all other data
310 313 for( frequencyBin=0; frequencyBin<NB_BINS_PER_SM; frequencyBin++)
311 314 {
312 315 for ( asmComponent=0; asmComponent<NB_VALUES_PER_SM; asmComponent++)
313 316 {
314 317 offsetInput = (frequencyBin*NB_VALUES_PER_SM) + asmComponent ;
315 318 offsetOutput = 2 * ( (frequencyBin*NB_VALUES_PER_SM) + asmComponent ) ;
316 319 pt_char_input = (char*) &input_matrix [ offsetInput ];
317 320 pt_char_output = (char*) &output_matrix[ offsetOutput ];
318 321 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
319 322 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
320 323 }
321 324 }
322 325 }
323 326
324 327 void ASM_compress_reorganize_and_divide_mask(float *averaged_spec_mat, float *compressed_spec_mat,
325 328 float divider,
326 329 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage , unsigned char ASMIndexStart, unsigned char channel);
327 330
328 331 int getFBinMask(int k, unsigned char channel);
329 332
330 333 void init_kcoeff_sbm_from_kcoeff_norm( float *input_kcoeff, float *output_kcoeff, unsigned char nb_bins_norm);
331 334
332 335 #endif // FSW_PROCESSING_H_INCLUDED
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@@ -1,76 +1,82
1 1 #ifndef TC_LOAD_DUMP_PARAMETERS_H
2 2 #define TC_LOAD_DUMP_PARAMETERS_H
3 3
4 4 #include <rtems.h>
5 5 #include <stdio.h>
6 6
7 7 #include "fsw_params.h"
8 8 #include "wf_handler.h"
9 9 #include "tm_lfr_tc_exe.h"
10 10 #include "fsw_misc.h"
11 11 #include "basic_parameters_params.h"
12 12 #include "avf0_prc0.h"
13 13
14 14 #define FLOAT_EQUAL_ZERO 0.001
15 15
16 16 extern unsigned short sequenceCounterParameterDump;
17 17 extern unsigned short sequenceCounters_TM_DUMP[];
18 18 extern float k_coeff_intercalib_f0_norm[ ];
19 19 extern float k_coeff_intercalib_f0_sbm[ ];
20 20 extern float k_coeff_intercalib_f1_norm[ ];
21 21 extern float k_coeff_intercalib_f1_sbm[ ];
22 22 extern float k_coeff_intercalib_f2[ ];
23 extern unsigned char rw_fbins_mask_f0[16];
24 extern unsigned char rw_fbins_mask_f1[16];
25 extern unsigned char rw_fbins_mask_f2[16];
23 26
24 27 int action_load_common_par( ccsdsTelecommandPacket_t *TC );
25 28 int action_load_normal_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
26 29 int action_load_burst_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
27 30 int action_load_sbm1_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
28 31 int action_load_sbm2_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
29 32 int action_load_kcoefficients(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
30 33 int action_load_fbins_mask(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
31 int action_load_pas_filter_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
34 int action_load_filter_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
32 35 int action_dump_kcoefficients(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
33 36 int action_dump_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
34 37
35 38 // NORMAL
36 39 int check_normal_par_consistency( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
37 40 int set_sy_lfr_n_swf_l( ccsdsTelecommandPacket_t *TC );
38 41 int set_sy_lfr_n_swf_p( ccsdsTelecommandPacket_t *TC );
39 42 int set_sy_lfr_n_asm_p( ccsdsTelecommandPacket_t *TC );
40 43 int set_sy_lfr_n_bp_p0( ccsdsTelecommandPacket_t *TC );
41 44 int set_sy_lfr_n_bp_p1( ccsdsTelecommandPacket_t *TC );
42 45 int set_sy_lfr_n_cwf_long_f3( ccsdsTelecommandPacket_t *TC );
43 46
44 47 // BURST
45 48 int set_sy_lfr_b_bp_p0( ccsdsTelecommandPacket_t *TC );
46 49 int set_sy_lfr_b_bp_p1( ccsdsTelecommandPacket_t *TC );
47 50
48 51 // SBM1
49 52 int set_sy_lfr_s1_bp_p0( ccsdsTelecommandPacket_t *TC );
50 53 int set_sy_lfr_s1_bp_p1( ccsdsTelecommandPacket_t *TC );
51 54
52 55 // SBM2
53 56 int set_sy_lfr_s2_bp_p0( ccsdsTelecommandPacket_t *TC );
54 57 int set_sy_lfr_s2_bp_p1( ccsdsTelecommandPacket_t *TC );
55 58
56 59 // TC_LFR_UPDATE_INFO
57 60 unsigned int check_update_info_hk_lfr_mode( unsigned char mode );
58 61 unsigned int check_update_info_hk_tds_mode( unsigned char mode );
59 62 unsigned int check_update_info_hk_thr_mode( unsigned char mode );
63 void getReactionWheelsFrequencies( ccsdsTelecommandPacket_t *TC );
64 void build_rw_fbins_mask( unsigned int channel );
65 void build_rw_fbins_masks();
60 66
61 67 // FBINS_MASK
62 68 int set_sy_lfr_fbins( ccsdsTelecommandPacket_t *TC );
63 69
64 70 // TC_LFR_LOAD_PARS_FILTER_PAR
65 71 int check_sy_lfr_pas_filter_parameters( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
66 72
67 73 // KCOEFFICIENTS
68 74 int set_sy_lfr_kcoeff(ccsdsTelecommandPacket_t *TC , rtems_id queue_id);
69 75 void copyFloatByChar( unsigned char *destination, unsigned char *source );
70 76
71 77 void init_parameter_dump( void );
72 78 void init_kcoefficients_dump( void );
73 79 void init_kcoefficients_dump_packet( Packet_TM_LFR_KCOEFFICIENTS_DUMP_t *kcoefficients_dump, unsigned char pkt_nr, unsigned char blk_nr );
74 80 void increment_seq_counter_destination_id_dump( unsigned char *packet_sequence_control, unsigned char destination_id );
75 81
76 82 #endif // TC_LOAD_DUMP_PARAMETERS_H
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@@ -1,81 +1,95
1 1 /** Global variables of the LFR flight software.
2 2 *
3 3 * @file
4 4 * @author P. LEROY
5 5 *
6 6 * Among global variables, there are:
7 7 * - RTEMS names and id.
8 8 * - APB configuration registers.
9 9 * - waveforms global buffers, used by the waveform picker hardware module to store data.
10 10 * - spectral matrices buffesr, used by the hardware module to store data.
11 11 * - variable related to LFR modes parameters.
12 12 * - the global HK packet buffer.
13 13 * - the global dump parameter buffer.
14 14 *
15 15 */
16 16
17 17 #include <rtems.h>
18 18 #include <grspw.h>
19 19
20 20 #include "ccsds_types.h"
21 21 #include "grlib_regs.h"
22 22 #include "fsw_params.h"
23 23 #include "fsw_params_wf_handler.h"
24 24
25 25 // RTEMS GLOBAL VARIABLES
26 26 rtems_name misc_name[5];
27 27 rtems_name Task_name[20]; /* array of task names */
28 28 rtems_id Task_id[20]; /* array of task ids */
29 29 rtems_name timecode_timer_name;
30 30 rtems_id timecode_timer_id;
31 31 int fdSPW = 0;
32 32 int fdUART = 0;
33 33 unsigned char lfrCurrentMode;
34 34 unsigned char pa_bia_status_info;
35 35 unsigned char thisIsAnASMRestart = 0;
36 36 unsigned char oneTcLfrUpdateTimeReceived = 0;
37 37
38 38 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes = 24584
39 39 // 97 * 256 = 24832 => delta = 248 bytes = 62 words
40 40 // WAVEFORMS GLOBAL VARIABLES // 2688 * 3 * 4 + 2 * 4 = 32256 + 8 bytes = 32264
41 41 // 127 * 256 = 32512 => delta = 248 bytes = 62 words
42 42 // F0 F1 F2 F3
43 43 volatile int wf_buffer_f0[ NB_RING_NODES_F0 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
44 44 volatile int wf_buffer_f1[ NB_RING_NODES_F1 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
45 45 volatile int wf_buffer_f2[ NB_RING_NODES_F2 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
46 46 volatile int wf_buffer_f3[ NB_RING_NODES_F3 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
47 47
48 48 //***********************************
49 49 // SPECTRAL MATRICES GLOBAL VARIABLES
50 50
51 51 // alignment constraints for the spectral matrices buffers => the first data after the time (8 bytes) shall be aligned on 0x00
52 52 volatile int sm_f0[ NB_RING_NODES_SM_F0 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
53 53 volatile int sm_f1[ NB_RING_NODES_SM_F1 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
54 54 volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
55 55
56 56 // APB CONFIGURATION REGISTERS
57 57 time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT;
58 58 gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER;
59 59 waveform_picker_regs_0_1_18_t *waveform_picker_regs = (waveform_picker_regs_0_1_18_t*) REGS_ADDR_WAVEFORM_PICKER;
60 60 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
61 61
62 62 // MODE PARAMETERS
63 63 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
64 64 struct param_local_str param_local;
65 65 unsigned int lastValidEnterModeTime;
66 66
67 67 // HK PACKETS
68 68 Packet_TM_LFR_HK_t housekeeping_packet;
69 unsigned char cp_rpw_sc_rw_f_flags;
69 70 // message queues occupancy
70 71 unsigned char hk_lfr_q_sd_fifo_size_max;
71 72 unsigned char hk_lfr_q_rv_fifo_size_max;
72 73 unsigned char hk_lfr_q_p0_fifo_size_max;
73 74 unsigned char hk_lfr_q_p1_fifo_size_max;
74 75 unsigned char hk_lfr_q_p2_fifo_size_max;
75 76 // sequence counters are incremented by APID (PID + CAT) and destination ID
76 77 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
77 78 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
78 79 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID];
79 80 unsigned short sequenceCounters_TM_DUMP[SEQ_CNT_NB_DEST_ID];
80 81 unsigned short sequenceCounterHK;
81 82 spw_stats grspw_stats;
83
84 // TC_LFR_UPDATE_INFO
85 float cp_rpw_sc_rw1_f1;
86 float cp_rpw_sc_rw1_f2;
87 float cp_rpw_sc_rw2_f1;
88 float cp_rpw_sc_rw2_f2;
89 float cp_rpw_sc_rw3_f1;
90 float cp_rpw_sc_rw3_f2;
91 float cp_rpw_sc_rw4_f1;
92 float cp_rpw_sc_rw4_f2;
93 unsigned char rw_fbins_mask_f0[16];
94 unsigned char rw_fbins_mask_f1[16];
95 unsigned char rw_fbins_mask_f2[16];
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@@ -1,917 +1,926
1 1 /** This is the RTEMS initialization module.
2 2 *
3 3 * @file
4 4 * @author P. LEROY
5 5 *
6 6 * This module contains two very different information:
7 7 * - specific instructions to configure the compilation of the RTEMS executive
8 8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
9 9 *
10 10 */
11 11
12 12 //*************************
13 13 // GPL reminder to be added
14 14 //*************************
15 15
16 16 #include <rtems.h>
17 17
18 18 /* configuration information */
19 19
20 20 #define CONFIGURE_INIT
21 21
22 22 #include <bsp.h> /* for device driver prototypes */
23 23
24 24 /* configuration information */
25 25
26 26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
27 27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
28 28
29 29 #define CONFIGURE_MAXIMUM_TASKS 20
30 30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
31 31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
32 32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
33 33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
34 34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
35 35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
36 36 #define CONFIGURE_MAXIMUM_DRIVERS 16
37 37 #define CONFIGURE_MAXIMUM_PERIODS 5
38 38 #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [link] [spacewire_reset_link]
39 39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
40 40 #ifdef PRINT_STACK_REPORT
41 41 #define CONFIGURE_STACK_CHECKER_ENABLED
42 42 #endif
43 43
44 44 #include <rtems/confdefs.h>
45 45
46 46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
47 47 #ifdef RTEMS_DRVMGR_STARTUP
48 48 #ifdef LEON3
49 49 /* Add Timer and UART Driver */
50 50 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
51 51 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
52 52 #endif
53 53 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
54 54 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
55 55 #endif
56 56 #endif
57 57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
58 58 #include <drvmgr/drvmgr_confdefs.h>
59 59 #endif
60 60
61 61 #include "fsw_init.h"
62 62 #include "fsw_config.c"
63 63 #include "GscMemoryLPP.hpp"
64 64
65 65 void initCache()
66 66 {
67 67 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
68 68 // These should only be read and written using 32-bit LDA/STA instructions.
69 69 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
70 70 // The table below shows the register addresses:
71 71 // 0x00 Cache control register
72 72 // 0x04 Reserved
73 73 // 0x08 Instruction cache configuration register
74 74 // 0x0C Data cache configuration register
75 75
76 76 // Cache Control Register Leon3 / Leon3FT
77 77 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
78 78 // RFT PS TB DS FD FI FT ST IB
79 79 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
80 80 // IP DP ITE IDE DTE DDE DF IF DCS ICS
81 81
82 82 unsigned int cacheControlRegister;
83 83
84 84 CCR_resetCacheControlRegister();
85 85 ASR16_resetRegisterProtectionControlRegister();
86 86
87 87 cacheControlRegister = CCR_getValue();
88 88 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
89 89 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
90 90
91 91 CCR_enableInstructionCache(); // ICS bits
92 92 CCR_enableDataCache(); // DCS bits
93 93 CCR_enableInstructionBurstFetch(); // IB bit
94 94
95 95 faultTolerantScheme();
96 96
97 97 cacheControlRegister = CCR_getValue();
98 98 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
99 99 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
100 100
101 101 PRINTF("\n");
102 102 }
103 103
104 104 rtems_task Init( rtems_task_argument ignored )
105 105 {
106 106 /** This is the RTEMS INIT taks, it is the first task launched by the system.
107 107 *
108 108 * @param unused is the starting argument of the RTEMS task
109 109 *
110 110 * The INIT task create and run all other RTEMS tasks.
111 111 *
112 112 */
113 113
114 114 //***********
115 115 // INIT CACHE
116 116
117 117 unsigned char *vhdlVersion;
118 118
119 119 reset_lfr();
120 120
121 121 reset_local_time();
122 122
123 123 rtems_cpu_usage_reset();
124 124
125 125 rtems_status_code status;
126 126 rtems_status_code status_spw;
127 127 rtems_isr_entry old_isr_handler;
128 128
129 129 // UART settings
130 130 enable_apbuart_transmitter();
131 131 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
132 132
133 133 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
134 134
135 135
136 136 PRINTF("\n\n\n\n\n")
137 137
138 138 initCache();
139 139
140 140 PRINTF("*************************\n")
141 141 PRINTF("** LFR Flight Software **\n")
142 142 PRINTF1("** %d.", SW_VERSION_N1)
143 143 PRINTF1("%d." , SW_VERSION_N2)
144 144 PRINTF1("%d." , SW_VERSION_N3)
145 145 PRINTF1("%d **\n", SW_VERSION_N4)
146 146
147 147 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
148 148 PRINTF("** VHDL **\n")
149 149 PRINTF1("** %d.", vhdlVersion[1])
150 150 PRINTF1("%d." , vhdlVersion[2])
151 151 PRINTF1("%d **\n", vhdlVersion[3])
152 152 PRINTF("*************************\n")
153 153 PRINTF("\n\n")
154 154
155 155 init_parameter_dump();
156 156 init_kcoefficients_dump();
157 157 init_local_mode_parameters();
158 158 init_housekeeping_parameters();
159 159 init_k_coefficients_prc0();
160 160 init_k_coefficients_prc1();
161 161 init_k_coefficients_prc2();
162 162 pa_bia_status_info = 0x00;
163 cp_rpw_sc_rw_f_flags = 0x00;
164 cp_rpw_sc_rw1_f1 = 0.0;
165 cp_rpw_sc_rw1_f2 = 0.0;
166 cp_rpw_sc_rw2_f1 = 0.0;
167 cp_rpw_sc_rw2_f2 = 0.0;
168 cp_rpw_sc_rw3_f1 = 0.0;
169 cp_rpw_sc_rw3_f2 = 0.0;
170 cp_rpw_sc_rw4_f1 = 0.0;
171 cp_rpw_sc_rw4_f2 = 0.0;
163 172 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
164 173
165 174 // waveform picker initialization
166 175 WFP_init_rings(); LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
167