@@ -1,6 +1,6 | |||||
1 | ############################################################################# |
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1 | ############################################################################# | |
2 | # Makefile for building: bin/fsw |
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2 | # Makefile for building: bin/fsw | |
3 |
# Generated by qmake (2.01a) (Qt 4.8.6) on: |
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3 | # Generated by qmake (2.01a) (Qt 4.8.6) on: Fri Oct 24 13:25:08 2014 | |
4 | # Project: fsw-qt.pro |
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4 | # Project: fsw-qt.pro | |
5 | # Template: app |
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5 | # Template: app | |
6 | # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro |
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6 | # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro |
@@ -16,6 +16,8 typedef struct ring_node | |||||
16 | int buffer_address; |
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16 | int buffer_address; | |
17 | struct ring_node *next; |
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17 | struct ring_node *next; | |
18 | unsigned int status; |
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18 | unsigned int status; | |
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19 | unsigned coarseTime; | |||
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20 | unsigned int fineTime; | |||
19 | } ring_node; |
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21 | } ring_node; | |
20 |
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22 | |||
21 | //************************ |
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23 | //************************ | |
@@ -122,7 +124,8 typedef struct ring_node | |||||
122 | #define REGS_ADDR_GRGPIO 0x80000b00 |
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124 | #define REGS_ADDR_GRGPIO 0x80000b00 | |
123 |
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125 | |||
124 | #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00 |
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126 | #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00 | |
125 | #define REGS_ADDR_WAVEFORM_PICKER 0x80000f50 |
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127 | //#define REGS_ADDR_WAVEFORM_PICKER 0x80000f50 | |
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128 | #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28 | |||
126 | #define REGS_ADDR_VHDL_VERSION 0x80000ff0 |
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129 | #define REGS_ADDR_VHDL_VERSION 0x80000ff0 | |
127 |
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130 | |||
128 | #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff |
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131 | #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff |
@@ -45,39 +45,50 typedef struct { | |||||
45 | volatile int fine_time; |
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45 | volatile int fine_time; | |
46 | } time_management_regs_t; |
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46 | } time_management_regs_t; | |
47 |
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47 | |||
48 | typedef struct { |
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48 | // PDB >= 0.1.28 | |
49 | volatile int data_shaping; // 0x00 00 *** R1 R0 SP1 SP0 BW |
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50 | volatile int burst_enable; // 0x04 01 *** burst f2, f1, f0 enable f3, f2, f1, f0 |
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51 | volatile int addr_data_f0; // 0x08 10 *** |
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52 | volatile int addr_data_f1; // 0x0c 11 *** |
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53 | volatile int addr_data_f2; // 0x10 100 *** |
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54 | volatile int addr_data_f3; // 0x14 101 *** |
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55 | volatile int status; // 0x18 110 *** |
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56 | volatile int delta_snapshot; // 0x1c 111 *** |
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57 | volatile int delta_f2_f1; // 0x20 0000 *** |
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58 | volatile int delta_f2_f0; // 0x24 0001 *** |
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59 | volatile int nb_burst_available;// 0x28 0010 *** |
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60 | volatile int nb_snapshot_param; // 0x2c 0011 *** |
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61 | } waveform_picker_regs_t; |
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62 |
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||||
63 | typedef struct{ |
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49 | typedef struct{ | |
64 | int data_shaping; // 0x00 00 *** R1 R0 SP1 SP0 BW |
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50 | int data_shaping; // 0x00 00 *** R1 R0 SP1 SP0 BW | |
65 | int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ] |
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51 | int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ] | |
66 | int addr_data_f0; // 0x08 |
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52 | int addr_data_f0_0; // 0x08 | |
67 | int addr_data_f1; // 0x0c |
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53 | int addr_data_f0_1; // 0x0c | |
68 |
int addr_data_f |
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54 | int addr_data_f1_0; // 0x10 | |
69 |
int addr_data_f |
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55 | int addr_data_f1_1; // 0x14 | |
70 | volatile int status; // 0x18 |
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56 | int addr_data_f2_0; // 0x18 | |
71 |
int |
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57 | int addr_data_f2_1; // 0x1c | |
72 |
int |
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58 | int addr_data_f3_0; // 0x20 | |
73 |
int |
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59 | int addr_data_f3_1; // 0x24 | |
74 |
int |
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60 | volatile int status; // 0x28 | |
75 |
int delta_ |
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61 | int delta_snapshot; // 0x2c | |
76 |
int |
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62 | int delta_f0; // 0x30 | |
77 | int snapshot_param; // 0x34 |
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63 | int delta_f0_2; // 0x34 | |
78 |
int |
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64 | int delta_f1; // 0x38 | |
79 | int nb_word_in_buffer; // 0x3c |
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65 | int delta_f2; // 0x3c | |
80 | } waveform_picker_regs_new_t; |
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66 | int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688 | |
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67 | int snapshot_param; // 0x44 | |||
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68 | int start_date; // 0x48 | |||
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69 | // | |||
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70 | volatile unsigned int f0_0_coarse_time; // 0x4c | |||
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71 | volatile unsigned int f0_0_fine_time; // 0x50 | |||
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72 | volatile unsigned int f0_1_coarse_time; // 0x54 | |||
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73 | volatile unsigned int f0_1_fine_time; // 0x58 | |||
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74 | // | |||
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75 | volatile unsigned int f1_0_coarse_time; // 0x5c | |||
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76 | volatile unsigned int f1_0_fine_time; // 0x60 | |||
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77 | volatile unsigned int f1_1_coarse_time; // 0x64 | |||
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78 | volatile unsigned int f1_1_fine_time; // 0x68 | |||
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79 | // | |||
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80 | volatile unsigned int f2_0_coarse_time; // 0x6c | |||
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81 | volatile unsigned int f2_0_fine_time; // 0x70 | |||
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82 | volatile unsigned int f2_1_coarse_time; // 0x74 | |||
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83 | volatile unsigned int f2_1_fine_time; // 0x78 | |||
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84 | // | |||
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85 | volatile unsigned int f3_0_coarse_time; // 0x7c | |||
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86 | volatile unsigned int f3_0_fine_time; // 0x80 | |||
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87 | volatile unsigned int f3_1_coarse_time; // 0x84 | |||
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88 | volatile unsigned int f3_1_fine_time; // 0x88 | |||
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89 | // | |||
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90 | unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168 | |||
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91 | } waveform_picker_regs_0_1_18_t; | |||
81 |
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92 | |||
82 | typedef struct { |
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93 | typedef struct { | |
83 | volatile int config; // 0x00 |
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94 | volatile int config; // 0x00 | |
@@ -90,20 +101,22 typedef struct { | |||||
90 | volatile int f2_0_address; // 0x18 |
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101 | volatile int f2_0_address; // 0x18 | |
91 | volatile int f2_1_address; // 0x1C |
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102 | volatile int f2_1_address; // 0x1C | |
92 | // |
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103 | // | |
93 |
volatile unsigned int f0_0_coarse_time; |
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104 | volatile unsigned int f0_0_coarse_time; // 0x20 | |
94 |
volatile unsigned int f0_0_fine_time; |
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105 | volatile unsigned int f0_0_fine_time; // 0x24 | |
95 |
volatile unsigned int f0_1_coarse_time; |
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106 | volatile unsigned int f0_1_coarse_time; // 0x28 | |
96 |
volatile unsigned int f0_1_fine_time; |
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107 | volatile unsigned int f0_1_fine_time; // 0x2C | |
97 | // |
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108 | // | |
98 |
volatile unsigned int f1_0_coarse_time; |
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109 | volatile unsigned int f1_0_coarse_time; // 0x30 | |
99 |
volatile unsigned int f1_0_fine_time; |
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110 | volatile unsigned int f1_0_fine_time; // 0x34 | |
100 |
volatile unsigned int f1_1_coarse_time; |
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111 | volatile unsigned int f1_1_coarse_time; // 0x38 | |
101 |
volatile unsigned int f1_1_time_time; |
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112 | volatile unsigned int f1_1_time_time; // 0x3C | |
102 | // |
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113 | // | |
103 |
volatile unsigned int f2_0_coarse_time; |
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114 | volatile unsigned int f2_0_coarse_time; // 0x40 | |
104 |
volatile unsigned int f2_0_fine_time; |
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115 | volatile unsigned int f2_0_fine_time; // 0x44 | |
105 |
volatile unsigned int f2_1_coarse_time; |
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116 | volatile unsigned int f2_1_coarse_time; // 0x48 | |
106 |
volatile unsigned int f2_1_fine_time; |
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117 | volatile unsigned int f2_1_fine_time; // 0x4C | |
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118 | // | |||
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119 | unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8 | |||
107 | } spectral_matrix_regs_t; |
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120 | } spectral_matrix_regs_t; | |
108 |
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121 | |||
109 | #endif // GRLIB_REGS_H_INCLUDED |
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122 | #endif // GRLIB_REGS_H_INCLUDED |
@@ -23,7 +23,7 extern volatile int wf_snap_f2[ ]; | |||||
23 | extern volatile int wf_cont_f3[ ]; |
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23 | extern volatile int wf_cont_f3[ ]; | |
24 | extern char wf_cont_f3_light[ ]; |
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24 | extern char wf_cont_f3_light[ ]; | |
25 |
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25 | |||
26 |
extern waveform_picker_regs_ |
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26 | extern waveform_picker_regs_0_1_18_t *waveform_picker_regs; | |
27 | extern time_management_regs_t *time_management_regs; |
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27 | extern time_management_regs_t *time_management_regs; | |
28 | extern Packet_TM_LFR_HK_t housekeeping_packet; |
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28 | extern Packet_TM_LFR_HK_t housekeeping_packet; | |
29 | extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet; |
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29 | extern Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet; |
@@ -52,10 +52,10 volatile int sm_f1[ NB_RING_NODES_SM_F1 | |||||
52 | volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100))); |
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52 | volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100))); | |
53 |
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53 | |||
54 | // APB CONFIGURATION REGISTERS |
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54 | // APB CONFIGURATION REGISTERS | |
55 | time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT; |
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55 | time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT; | |
56 | gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER; |
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56 | gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER; | |
57 |
waveform_picker_regs_ |
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57 | waveform_picker_regs_0_1_18_t *waveform_picker_regs = (waveform_picker_regs_0_1_18_t*) REGS_ADDR_WAVEFORM_PICKER; | |
58 | spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX; |
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58 | spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX; | |
59 |
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59 | |||
60 | // MODE PARAMETERS |
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60 | // MODE PARAMETERS | |
61 | Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet; |
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61 | Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet; |
@@ -601,6 +601,8 void reset_spectral_matrix_regs( void ) | |||||
601 | spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address; |
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601 | spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address; | |
602 | spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address; |
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602 | spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address; | |
603 | spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address; |
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603 | spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address; | |
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604 | ||||
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605 | spectral_matrix_regs->matrix_length = 0xc8; // 25 * 128 / 16 = 200 = 0xc8 | |||
604 | } |
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606 | } | |
605 |
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607 | |||
606 | void set_time( unsigned char *time, unsigned char * timeInBuffer ) |
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608 | void set_time( unsigned char *time, unsigned char * timeInBuffer ) |
@@ -530,8 +530,8 int enter_mode( unsigned char mode, unsi | |||||
530 | maxCount = 0; |
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530 | maxCount = 0; | |
531 | #endif |
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531 | #endif | |
532 | status = restart_science_tasks( mode ); |
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532 | status = restart_science_tasks( mode ); | |
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533 | launch_spectral_matrix( ); | |||
533 | launch_waveform_picker( mode, transitionCoarseTime ); |
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534 | launch_waveform_picker( mode, transitionCoarseTime ); | |
534 | launch_spectral_matrix( ); |
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535 | // launch_spectral_matrix_simu( ); |
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535 | // launch_spectral_matrix_simu( ); | |
536 | } |
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536 | } | |
537 | else if ( mode == LFR_MODE_STANDBY ) |
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537 | else if ( mode == LFR_MODE_STANDBY ) |
@@ -57,6 +57,192 void reset_extractSWF( void ) | |||||
57 | swf_f2_ready = false; |
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57 | swf_f2_ready = false; | |
58 | } |
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58 | } | |
59 |
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59 | |||
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60 | void change_f0_buffer( void ) | |||
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61 | { | |||
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62 | ring_node_to_send_swf_f0 = current_ring_node_f0; | |||
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63 | current_ring_node_f0 = current_ring_node_f0->next; | |||
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64 | if ( (waveform_picker_regs->status & 0x01) == 0x01) | |||
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65 | { | |||
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66 | ring_node_to_send_swf_f0->coarseTime = waveform_picker_regs->f0_0_coarse_time; | |||
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67 | ring_node_to_send_swf_f0->fineTime = waveform_picker_regs->f0_0_fine_time; | |||
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68 | waveform_picker_regs->addr_data_f0_0 = current_ring_node_f0->buffer_address; | |||
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69 | } | |||
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70 | else if ( (waveform_picker_regs->status & 0x02) == 0x02) | |||
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71 | { | |||
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72 | ring_node_to_send_swf_f0->coarseTime = waveform_picker_regs->f0_1_coarse_time; | |||
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73 | ring_node_to_send_swf_f0->fineTime = waveform_picker_regs->f0_1_fine_time; | |||
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74 | waveform_picker_regs->addr_data_f0_1 = current_ring_node_f0->buffer_address; | |||
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75 | } | |||
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76 | } | |||
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77 | ||||
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78 | void change_f1_buffer( ring_node *ring_node_to_send ) | |||
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79 | { | |||
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80 | ring_node_to_send = current_ring_node_f1; | |||
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81 | current_ring_node_f1 = current_ring_node_f1->next; | |||
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82 | if ( (waveform_picker_regs->status & 0x04) == 0x04) | |||
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83 | { | |||
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84 | ring_node_to_send->coarseTime = waveform_picker_regs->f1_0_coarse_time; | |||
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85 | ring_node_to_send->fineTime = waveform_picker_regs->f1_0_fine_time; | |||
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86 | waveform_picker_regs->addr_data_f1_0 = current_ring_node_f1->buffer_address; | |||
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87 | } | |||
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88 | else if ( (waveform_picker_regs->status & 0x08) == 0x08) | |||
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89 | { | |||
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90 | ring_node_to_send->coarseTime = waveform_picker_regs->f1_1_coarse_time; | |||
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91 | ring_node_to_send->fineTime = waveform_picker_regs->f1_1_fine_time; | |||
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92 | waveform_picker_regs->addr_data_f1_1 = current_ring_node_f1->buffer_address; | |||
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93 | } | |||
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94 | } | |||
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95 | ||||
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96 | void change_f2_buffer( ring_node *ring_node_to_send ) | |||
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97 | { | |||
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98 | ring_node_to_send = current_ring_node_f2; | |||
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99 | current_ring_node_f2 = current_ring_node_f2->next; | |||
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100 | if ( (waveform_picker_regs->status & 0x10) == 0x10) | |||
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101 | { | |||
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102 | ring_node_to_send->coarseTime = waveform_picker_regs->f2_0_coarse_time; | |||
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103 | ring_node_to_send->fineTime = waveform_picker_regs->f2_0_fine_time; | |||
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104 | waveform_picker_regs->addr_data_f2_0 = current_ring_node_f2->buffer_address; | |||
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105 | } | |||
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106 | else if ( (waveform_picker_regs->status & 0x20) == 0x20) | |||
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107 | { | |||
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108 | ring_node_to_send->coarseTime = waveform_picker_regs->f2_1_coarse_time; | |||
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109 | ring_node_to_send->fineTime = waveform_picker_regs->f2_1_fine_time; | |||
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110 | waveform_picker_regs->addr_data_f2_1 = current_ring_node_f2->buffer_address; | |||
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111 | } | |||
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112 | } | |||
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113 | ||||
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114 | void waveforms_isr_f3( void ) | |||
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115 | { | |||
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116 | rtems_status_code spare_status; | |||
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117 | ||||
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118 | if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_BURST) // in BURST the data are used to place v, e1 and e2 in the HK packet | |||
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119 | || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) ) | |||
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120 | { // in modes other than STANDBY and BURST, send the CWF_F3 data | |||
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121 | if ((waveform_picker_regs->status & 0x40) == 0x40){ // [0100 0000] f3 buffer 0 is full | |||
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122 | // (1) change the receiving buffer for the waveform picker | |||
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123 | ring_node_to_send_cwf_f3 = current_ring_node_f3; | |||
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124 | current_ring_node_f3 = current_ring_node_f3->next; | |||
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125 | waveform_picker_regs->addr_data_f3_0 = current_ring_node_f3->buffer_address; | |||
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126 | // (2) send an event for the waveforms transmission | |||
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127 | if (rtems_event_send( Task_id[TASKID_CWF3], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) { | |||
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128 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); | |||
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129 | } | |||
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130 | rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2); | |||
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131 | waveform_picker_regs->status = waveform_picker_regs->status & 0xffff77bf; // reset f3 bits to 0, [0111 0111 1011 1111] | |||
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132 | } | |||
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133 | else if ((waveform_picker_regs->status & 0x80) == 0x80){ // [1000 0000] f3 buffer 1 is full | |||
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134 | // (1) change the receiving buffer for the waveform picker | |||
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135 | ring_node_to_send_cwf_f3 = current_ring_node_f3; | |||
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136 | current_ring_node_f3 = current_ring_node_f3->next; | |||
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137 | waveform_picker_regs->addr_data_f3_1 = current_ring_node_f3->buffer_address; | |||
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138 | // (2) send an event for the waveforms transmission | |||
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139 | if (rtems_event_send( Task_id[TASKID_CWF3], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) { | |||
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140 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); | |||
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141 | } | |||
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142 | rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2); | |||
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143 | waveform_picker_regs->status = waveform_picker_regs->status & 0xffff777f; // reset f3 bits to 0, [0111 0111 0111 1111] | |||
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144 | } | |||
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145 | } | |||
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146 | } | |||
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147 | ||||
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148 | void waveforms_isr_normal( void ) | |||
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149 | { | |||
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150 | rtems_status_code status; | |||
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151 | ||||
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152 | if ( ( (waveform_picker_regs->status & 0x30) != 0x00 ) // [0011 0000] check the f2 full bits | |||
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153 | || ( (waveform_picker_regs->status & 0x0c) != 0x00 ) // [0000 1100] check the f1 full bits | |||
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154 | || ( (waveform_picker_regs->status & 0x03) != 0x00 )) // [0000 0011] check the f0 full bits | |||
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155 | { | |||
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156 | // change F0 ring node | |||
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157 | change_f0_buffer(); | |||
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158 | // change F1 ring node | |||
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159 | change_f1_buffer( ring_node_to_send_swf_f1 ); | |||
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160 | // change F2 ring node | |||
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161 | change_f2_buffer( ring_node_to_send_swf_f2 ); | |||
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162 | // | |||
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163 | status = rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ); | |||
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164 | if ( status != RTEMS_SUCCESSFUL) | |||
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165 | { | |||
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166 | status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); | |||
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167 | } | |||
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168 | // update status bits except f3 bits | |||
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169 | waveform_picker_regs->status = waveform_picker_regs->status & 0xffff00c0; // [1000 1000 1100 0000] | |||
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170 | } | |||
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171 | } | |||
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172 | ||||
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173 | void waveforms_isr_burst( void ) | |||
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174 | { | |||
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175 | rtems_status_code spare_status; | |||
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176 | ||||
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177 | if ( (waveform_picker_regs->status & 0x30) != 0 ){ // [0100] check the f2 full bit | |||
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178 | // (1) change the receiving buffer for the waveform picker | |||
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179 | change_f2_buffer( ring_node_to_send_cwf_f2 ); | |||
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180 | // (2) send an event for the waveforms transmission | |||
|
181 | if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_BURST ) != RTEMS_SUCCESSFUL) { | |||
|
182 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); | |||
|
183 | } | |||
|
184 | // update f2 status bits only | |||
|
185 | waveform_picker_regs->status = waveform_picker_regs->status & 0xffffbbcf; // [1011 1011 1100 1111] f2 bit = 0 | |||
|
186 | } | |||
|
187 | } | |||
|
188 | ||||
|
189 | void waveforms_isr_sbm1( void ) | |||
|
190 | { | |||
|
191 | rtems_status_code status; | |||
|
192 | rtems_status_code spare_status; | |||
|
193 | ||||
|
194 | //*** | |||
|
195 | // F1 | |||
|
196 | if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit | |||
|
197 | // (1) change the receiving buffer for the waveform picker | |||
|
198 | change_f1_buffer( ring_node_to_send_cwf_f1 ); | |||
|
199 | // (2) send an event for the the CWF1 task for transmission (and snapshot extraction if needed) | |||
|
200 | status = rtems_event_send( Task_id[TASKID_CWF1], RTEMS_EVENT_MODE_SBM1 ); | |||
|
201 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1 bits = 0 | |||
|
202 | } | |||
|
203 | ||||
|
204 | //*** | |||
|
205 | // F0 | |||
|
206 | if ( (waveform_picker_regs->status & 0x03) != 0x00 ) { // [0000 0011] one f0 buffer is full | |||
|
207 | swf_f0_ready = true; | |||
|
208 | change_f0_buffer(); | |||
|
209 | } | |||
|
210 | ||||
|
211 | //*** | |||
|
212 | // F2 | |||
|
213 | if ( (waveform_picker_regs->status & 0x04) == 0x04 ) { // [0100] check the f2 full bit | |||
|
214 | swf_f2_ready = true; | |||
|
215 | change_f2_buffer( ring_node_to_send_swf_f2 ); | |||
|
216 | if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) | |||
|
217 | { | |||
|
218 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); | |||
|
219 | } | |||
|
220 | } | |||
|
221 | } | |||
|
222 | ||||
|
223 | void waveforms_isr_sbm2( void ) | |||
|
224 | { | |||
|
225 | rtems_status_code status; | |||
|
226 | ||||
|
227 | if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit | |||
|
228 | // (1) change the receiving buffer for the waveform picker | |||
|
229 | change_f2_buffer( ring_node_to_send_cwf_f2 ); | |||
|
230 | // (2) send an event for the waveforms transmission | |||
|
231 | status = rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_SBM2 ); | |||
|
232 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0 | |||
|
233 | } | |||
|
234 | if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit | |||
|
235 | swf_f0_ready = true; | |||
|
236 | change_f0_buffer(); | |||
|
237 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffeee; // [1111 1110 1110 1110] f0 bits = 0 | |||
|
238 | } | |||
|
239 | if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit | |||
|
240 | swf_f1_ready = true; | |||
|
241 | change_f1_buffer( ring_node_to_send_swf_f1 ); | |||
|
242 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1, f0 bits = 0 | |||
|
243 | } | |||
|
244 | } | |||
|
245 | ||||
60 | rtems_isr waveforms_isr( rtems_vector_number vector ) |
|
246 | rtems_isr waveforms_isr( rtems_vector_number vector ) | |
61 | { |
|
247 | { | |
62 | /** This is the interrupt sub routine called by the waveform picker core. |
|
248 | /** This is the interrupt sub routine called by the waveform picker core. | |
@@ -67,24 +253,22 rtems_isr waveforms_isr( rtems_vector_nu | |||||
67 | * |
|
253 | * | |
68 | */ |
|
254 | */ | |
69 |
|
255 | |||
70 | rtems_status_code status; |
|
256 | // STATUS | |
|
257 | // new error error buffer full | |||
|
258 | // 15 14 13 12 11 10 9 8 | |||
|
259 | // f3 f2 f1 f0 f3 f2 f1 f0 | |||
|
260 | // | |||
|
261 | // ready buffer | |||
|
262 | // 7 6 5 4 3 2 1 0 | |||
|
263 | // f3_1 f3_0 f2_1 f2_0 f1_1 f1_0 f0_1 f0_0 | |||
|
264 | ||||
71 | rtems_status_code spare_status; |
|
265 | rtems_status_code spare_status; | |
72 |
|
266 | |||
73 | if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_BURST) // in BURST the data are used to place v, e1 and e2 in the HK packet |
|
267 | waveforms_isr_f3(); | |
74 | || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) ) |
|
268 | ||
75 | { // in modes other than STANDBY and BURST, send the CWF_F3 data |
|
269 | if ( (waveform_picker_regs->status & 0xff8) != 0x00) // [1000] check the error bits | |
76 | if ((waveform_picker_regs->status & 0x08) == 0x08){ // [1000] f3 is full |
|
270 | { | |
77 | // (1) change the receiving buffer for the waveform picker |
|
271 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); | |
78 | ring_node_to_send_cwf_f3 = current_ring_node_f3; |
|
|||
79 | current_ring_node_f3 = current_ring_node_f3->next; |
|
|||
80 | waveform_picker_regs->addr_data_f3 = current_ring_node_f3->buffer_address; |
|
|||
81 | // (2) send an event for the waveforms transmission |
|
|||
82 | if (rtems_event_send( Task_id[TASKID_CWF3], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) { |
|
|||
83 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); |
|
|||
84 | } |
|
|||
85 | rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2); |
|
|||
86 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff777; // reset f3 bits to 0, [1111 0111 0111 0111] |
|
|||
87 | } |
|
|||
88 | } |
|
272 | } | |
89 |
|
273 | |||
90 | switch(lfrCurrentMode) |
|
274 | switch(lfrCurrentMode) | |
@@ -97,91 +281,25 rtems_isr waveforms_isr( rtems_vector_nu | |||||
97 | //****** |
|
281 | //****** | |
98 | // NORMAL |
|
282 | // NORMAL | |
99 | case(LFR_MODE_NORMAL): |
|
283 | case(LFR_MODE_NORMAL): | |
100 | if ( (waveform_picker_regs->status & 0xff8) != 0x00) // [1000] check the error bits |
|
284 | waveforms_isr_normal(); | |
101 | { |
|
|||
102 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); |
|
|||
103 | } |
|
|||
104 | if ( (waveform_picker_regs->status & 0x07) == 0x07) // [0111] check the f2, f1, f0 full bits |
|
|||
105 | { |
|
|||
106 | // change F0 ring node |
|
|||
107 | ring_node_to_send_swf_f0 = current_ring_node_f0; |
|
|||
108 | current_ring_node_f0 = current_ring_node_f0->next; |
|
|||
109 | waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; |
|
|||
110 | // change F1 ring node |
|
|||
111 | ring_node_to_send_swf_f1 = current_ring_node_f1; |
|
|||
112 | current_ring_node_f1 = current_ring_node_f1->next; |
|
|||
113 | waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; |
|
|||
114 | // change F2 ring node |
|
|||
115 | ring_node_to_send_swf_f2 = current_ring_node_f2; |
|
|||
116 | current_ring_node_f2 = current_ring_node_f2->next; |
|
|||
117 | waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; |
|
|||
118 | // |
|
|||
119 | if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) |
|
|||
120 | { |
|
|||
121 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); |
|
|||
122 | } |
|
|||
123 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000] |
|
|||
124 | } |
|
|||
125 | break; |
|
285 | break; | |
126 |
|
286 | |||
127 | //****** |
|
287 | //****** | |
128 | // BURST |
|
288 | // BURST | |
129 | case(LFR_MODE_BURST): |
|
289 | case(LFR_MODE_BURST): | |
130 | if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit |
|
290 | waveforms_isr_burst(); | |
131 | // (1) change the receiving buffer for the waveform picker |
|
|||
132 | ring_node_to_send_cwf_f2 = current_ring_node_f2; |
|
|||
133 | current_ring_node_f2 = current_ring_node_f2->next; |
|
|||
134 | waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; |
|
|||
135 | // (2) send an event for the waveforms transmission |
|
|||
136 | if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_BURST ) != RTEMS_SUCCESSFUL) { |
|
|||
137 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); |
|
|||
138 | } |
|
|||
139 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0 |
|
|||
140 | } |
|
|||
141 | break; |
|
291 | break; | |
142 |
|
292 | |||
143 | //***** |
|
293 | //***** | |
144 | // SBM1 |
|
294 | // SBM1 | |
145 | case(LFR_MODE_SBM1): |
|
295 | case(LFR_MODE_SBM1): | |
146 | if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit |
|
296 | waveforms_isr_sbm1(); | |
147 | // (1) change the receiving buffer for the waveform picker |
|
|||
148 | ring_node_to_send_cwf_f1 = current_ring_node_f1; |
|
|||
149 | current_ring_node_f1 = current_ring_node_f1->next; |
|
|||
150 | waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; |
|
|||
151 | // (2) send an event for the the CWF1 task for transmission (and snapshot extraction if needed) |
|
|||
152 | status = rtems_event_send( Task_id[TASKID_CWF1], RTEMS_EVENT_MODE_SBM1 ); |
|
|||
153 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1 bits = 0 |
|
|||
154 | } |
|
|||
155 | if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit |
|
|||
156 | swf_f0_ready = true; |
|
|||
157 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffeee; // [1111 1110 1110 1110] f0 bits = 0 |
|
|||
158 | } |
|
|||
159 | if ( (waveform_picker_regs->status & 0x04) == 0x04 ) { // [0100] check the f2 full bit |
|
|||
160 | swf_f2_ready = true; |
|
|||
161 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bits = 0 |
|
|||
162 | } |
|
|||
163 | break; |
|
297 | break; | |
164 |
|
298 | |||
165 | //***** |
|
299 | //***** | |
166 | // SBM2 |
|
300 | // SBM2 | |
167 | case(LFR_MODE_SBM2): |
|
301 | case(LFR_MODE_SBM2): | |
168 | if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit |
|
302 | waveforms_isr_sbm2(); | |
169 | // (1) change the receiving buffer for the waveform picker |
|
|||
170 | ring_node_to_send_cwf_f2 = current_ring_node_f2; |
|
|||
171 | current_ring_node_f2 = current_ring_node_f2->next; |
|
|||
172 | waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; |
|
|||
173 | // (2) send an event for the waveforms transmission |
|
|||
174 | status = rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_SBM2 ); |
|
|||
175 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0 |
|
|||
176 | } |
|
|||
177 | if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit |
|
|||
178 | swf_f0_ready = true; |
|
|||
179 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffeee; // [1111 1110 1110 1110] f0 bits = 0 |
|
|||
180 | } |
|
|||
181 | if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit |
|
|||
182 | swf_f1_ready = true; |
|
|||
183 | waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1, f0 bits = 0 |
|
|||
184 | } |
|
|||
185 | break; |
|
303 | break; | |
186 |
|
304 | |||
187 | //******** |
|
305 | //******** | |
@@ -1146,10 +1264,14 void reset_waveform_picker_regs(void) | |||||
1146 |
|
1264 | |||
1147 | set_wfp_data_shaping(); // 0x00 *** R1 R0 SP1 SP0 BW |
|
1265 | set_wfp_data_shaping(); // 0x00 *** R1 R0 SP1 SP0 BW | |
1148 | reset_wfp_burst_enable(); // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ] |
|
1266 | reset_wfp_burst_enable(); // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ] | |
1149 | waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08 |
|
1267 | waveform_picker_regs->addr_data_f0_0 = current_ring_node_f0->buffer_address; // 0x08 | |
1150 |
waveform_picker_regs->addr_data_f1 = current_ring_node_f |
|
1268 | waveform_picker_regs->addr_data_f0_1 = current_ring_node_f0->buffer_address; // 0x0c | |
1151 |
waveform_picker_regs->addr_data_f |
|
1269 | waveform_picker_regs->addr_data_f1_0 = current_ring_node_f1->buffer_address; // 0x10 | |
1152 |
waveform_picker_regs->addr_data_f |
|
1270 | waveform_picker_regs->addr_data_f1_1 = current_ring_node_f1->buffer_address; // 0x14 | |
|
1271 | waveform_picker_regs->addr_data_f2_0 = current_ring_node_f2->buffer_address; // 0x18 | |||
|
1272 | waveform_picker_regs->addr_data_f2_1 = current_ring_node_f2->buffer_address; // 0x1c | |||
|
1273 | waveform_picker_regs->addr_data_f3_0 = current_ring_node_f3->buffer_address; // 0x20 | |||
|
1274 | waveform_picker_regs->addr_data_f3_1 = current_ring_node_f3->buffer_address; // 0x24 | |||
1153 | reset_wfp_status(); // 0x18 |
|
1275 | reset_wfp_status(); // 0x18 | |
1154 | // |
|
1276 | // | |
1155 | set_wfp_delta_snapshot(); // 0x1c |
|
1277 | set_wfp_delta_snapshot(); // 0x1c | |
@@ -1165,7 +1287,7 void reset_waveform_picker_regs(void) | |||||
1165 | waveform_picker_regs->nb_data_by_buffer = 0xa7f; // 0x30 *** 2688 - 1 => nb samples -1 |
|
1287 | waveform_picker_regs->nb_data_by_buffer = 0xa7f; // 0x30 *** 2688 - 1 => nb samples -1 | |
1166 | waveform_picker_regs->snapshot_param = 0xa80; // 0x34 *** 2688 => nb samples |
|
1288 | waveform_picker_regs->snapshot_param = 0xa80; // 0x34 *** 2688 => nb samples | |
1167 | waveform_picker_regs->start_date = 0x00; // 0x38 |
|
1289 | waveform_picker_regs->start_date = 0x00; // 0x38 | |
1168 |
waveform_picker_regs-> |
|
1290 | waveform_picker_regs->buffer_length = 0x1f8; // buffer length in burst = 3 * 2688 / 16 = 504 = 0x1f8 | |
1169 | } |
|
1291 | } | |
1170 |
|
1292 | |||
1171 | void set_wfp_data_shaping( void ) |
|
1293 | void set_wfp_data_shaping( void ) |
@@ -1,6 +1,6 | |||||
1 | ############################################################################# |
|
1 | ############################################################################# | |
2 | # Makefile for building: bin/timegen |
|
2 | # Makefile for building: bin/timegen | |
3 |
# Generated by qmake (2.01a) (Qt 4.8.6) on: |
|
3 | # Generated by qmake (2.01a) (Qt 4.8.6) on: Fri Oct 24 13:36:54 2014 | |
4 | # Project: timegen-qt.pro |
|
4 | # Project: timegen-qt.pro | |
5 | # Template: app |
|
5 | # Template: app | |
6 | # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ CONFIG+=debug -o Makefile timegen-qt.pro |
|
6 | # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ CONFIG+=debug -o Makefile timegen-qt.pro | |
@@ -10,7 +10,7 | |||||
10 |
|
10 | |||
11 | CC = sparc-rtems-gcc |
|
11 | CC = sparc-rtems-gcc | |
12 | CXX = sparc-rtems-g++ |
|
12 | CXX = sparc-rtems-g++ | |
13 |
DEFINES = -DSW_VERSION_N1=0 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4= |
|
13 | DEFINES = -DSW_VERSION_N1=0 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=1 -DPRINT_MESSAGES_ON_CONSOLE | |
14 | CFLAGS = -pipe -g -O3 -Wall $(DEFINES) |
|
14 | CFLAGS = -pipe -g -O3 -Wall $(DEFINES) | |
15 | CXXFLAGS = -pipe -O3 -Wall $(DEFINES) |
|
15 | CXXFLAGS = -pipe -O3 -Wall $(DEFINES) | |
16 | INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -Isrc -Iheader -Iheader/processing -Isrc/LFR_basic-parameters |
|
16 | INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -Isrc -Iheader -Iheader/processing -Isrc/LFR_basic-parameters |
1 | NO CONTENT: modified file, binary diff hidden |
|
NO CONTENT: modified file, binary diff hidden |
@@ -11,7 +11,7 SWVERSION=-1-0 | |||||
11 | DEFINES += SW_VERSION_N1=0 # major |
|
11 | DEFINES += SW_VERSION_N1=0 # major | |
12 | DEFINES += SW_VERSION_N2=0 # minor |
|
12 | DEFINES += SW_VERSION_N2=0 # minor | |
13 | DEFINES += SW_VERSION_N3=0 # patch |
|
13 | DEFINES += SW_VERSION_N3=0 # patch | |
14 |
DEFINES += SW_VERSION_N4= |
|
14 | DEFINES += SW_VERSION_N4=1 # internal | |
15 |
|
15 | |||
16 | contains( CONFIG, debug_tch ) { |
|
16 | contains( CONFIG, debug_tch ) { | |
17 | DEFINES += DEBUG_TCH |
|
17 | DEFINES += DEBUG_TCH |
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