##// END OF EJS Templates
3.2.0.11...
paul -
r361:3e73a8516099 R3++ draft
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@@ -1,165 +1,169
1 1 #ifndef FSW_MISC_H_INCLUDED
2 2 #define FSW_MISC_H_INCLUDED
3 3
4 4 #include <rtems.h>
5 5 #include <stdio.h>
6 6 #include <grspw.h>
7 7 #include <grlib_regs.h>
8 8
9 9 #include "fsw_params.h"
10 10 #include "fsw_spacewire.h"
11 11 #include "lfr_cpu_usage_report.h"
12 12
13 13 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
14 14 #define WATCHDOG_LOOP_PRINTF 10
15 15 #define WATCHDOG_LOOP_DEBUG 3
16 16
17 17 #define DUMB_MESSAGE_NB 15
18 18 #define NB_RTEMS_EVENTS 32
19 19 #define EVENT_12 12
20 20 #define EVENT_13 13
21 21 #define EVENT_14 14
22 22 #define DUMB_MESSAGE_0 "in DUMB *** default"
23 23 #define DUMB_MESSAGE_1 "in DUMB *** timecode_irq_handler"
24 24 #define DUMB_MESSAGE_2 "in DUMB *** f3 buffer changed"
25 25 #define DUMB_MESSAGE_3 "in DUMB *** in SMIQ *** Error sending event to AVF0"
26 26 #define DUMB_MESSAGE_4 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ"
27 27 #define DUMB_MESSAGE_5 "in DUMB *** waveforms_simulator_isr"
28 28 #define DUMB_MESSAGE_6 "VHDL SM *** two buffers f0 ready"
29 29 #define DUMB_MESSAGE_7 "ready for dump"
30 30 #define DUMB_MESSAGE_8 "VHDL ERR *** spectral matrix"
31 31 #define DUMB_MESSAGE_9 "tick"
32 32 #define DUMB_MESSAGE_10 "VHDL ERR *** waveform picker"
33 33 #define DUMB_MESSAGE_11 "VHDL ERR *** unexpected ready matrix values"
34 34 #define DUMB_MESSAGE_12 "WATCHDOG timer"
35 35 #define DUMB_MESSAGE_13 "TIMECODE timer"
36 36 #define DUMB_MESSAGE_14 "TIMECODE ISR"
37 37
38 38 enum lfr_reset_cause_t{
39 39 UNKNOWN_CAUSE,
40 40 POWER_ON,
41 41 TC_RESET,
42 42 WATCHDOG,
43 43 ERROR_RESET,
44 44 UNEXP_RESET
45 45 };
46 46
47 47 typedef struct{
48 48 unsigned char dpu_spw_parity;
49 49 unsigned char dpu_spw_disconnect;
50 50 unsigned char dpu_spw_escape;
51 51 unsigned char dpu_spw_credit;
52 52 unsigned char dpu_spw_write_sync;
53 53 unsigned char timecode_erroneous;
54 54 unsigned char timecode_missing;
55 55 unsigned char timecode_invalid;
56 56 unsigned char time_timecode_it;
57 57 unsigned char time_not_synchro;
58 58 unsigned char time_timecode_ctr;
59 59 unsigned char ahb_correctable;
60 60 } hk_lfr_le_t;
61 61
62 62 typedef struct{
63 63 unsigned char dpu_spw_early_eop;
64 64 unsigned char dpu_spw_invalid_addr;
65 65 unsigned char dpu_spw_eep;
66 66 unsigned char dpu_spw_rx_too_big;
67 67 } hk_lfr_me_t;
68 68
69 #define B00 23
70 #define B01 23
69 #define B00 65
70 #define B01 65
71 71 #define B02 0
72 #define B10 1024
73 #define B11 -1771
74 #define B12 1024
75 #define B20 1024
76 #define B21 -1937
77 #define B22 1024
72 #define B10 2048
73 #define B11 -3817
74 #define B12 2048
75 #define B20 2048
76 #define B21 -3987
77 #define B22 2048
78 78
79 79 #define A00 1
80 #define A01 -28324
80 #define A01 -1850
81 81 #define A02 0
82 82 #define A10 1
83 #define A11 -1828
84 #define A12 822
83 #define A11 -3787
84 #define A12 1758
85 85 #define A20 1
86 #define A21 -1956
87 #define A22 950
86 #define A21 -3974
87 #define A22 1943
88 88
89 #define G0 15
90 #define G1 10
91 #define G2 10
89 #define GAIN_B0 17
90 #define GAIN_B1 11
91 #define GAIN_B2 11
92
93 #define GAIN_A0 11
94 #define GAIN_A1 11
95 #define GAIN_A2 11
92 96
93 97 #define NB_COEFFS 3
94 98 #define COEFF0 0
95 99 #define COEFF1 1
96 100 #define COEFF2 2
97 101
98 102 typedef struct filter_ctx
99 103 {
100 104 int W[NB_COEFFS][NB_COEFFS];
101 105 }filter_ctx;
102 106
103 107 extern gptimer_regs_t *gptimer_regs;
104 108 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
105 109 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
106 110
107 111 extern rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
108 112 extern rtems_id HK_id;// id of the HK rate monotonic period
109 113 extern rtems_name name_avgv_rate_monotonic; // name of the AVGV rate monotonic
110 114 extern rtems_id AVGV_id;// id of the AVGV rate monotonic period
111 115
112 116 void timer_configure( unsigned char timer, unsigned int clock_divider,
113 117 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
114 118 void timer_start( unsigned char timer );
115 119 void timer_stop( unsigned char timer );
116 120 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
117 121
118 122 // WATCHDOG
119 123 rtems_isr watchdog_isr( rtems_vector_number vector );
120 124 void watchdog_configure(void);
121 125 void watchdog_stop(void);
122 126 void watchdog_reload(void);
123 127 void watchdog_start(void);
124 128
125 129 // SERIAL LINK
126 130 int send_console_outputs_on_apbuart_port( void );
127 131 int enable_apbuart_transmitter( void );
128 132 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
129 133
130 134 // RTEMS TASKS
131 135 rtems_task load_task( rtems_task_argument argument );
132 136 rtems_task hous_task( rtems_task_argument argument );
133 137 rtems_task avgv_task( rtems_task_argument argument );
134 138 rtems_task dumb_task( rtems_task_argument unused );
135 139
136 140 void init_housekeeping_parameters( void );
137 141 void increment_seq_counter(unsigned short *packetSequenceControl);
138 142 void getTime( unsigned char *time);
139 143 unsigned long long int getTimeAsUnsignedLongLongInt( );
140 144 void send_dumb_hk( void );
141 145 void get_temperatures( unsigned char *temperatures );
142 146 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
143 147 void get_cpu_load( unsigned char *resource_statistics );
144 148 void set_hk_lfr_sc_potential_flag( bool state );
145 149 void set_sy_lfr_pas_filter_enabled( bool state );
146 150 void set_sy_lfr_watchdog_enabled( bool state );
147 151 void set_hk_lfr_calib_enable( bool state );
148 152 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
149 153 void hk_lfr_le_me_he_update();
150 154 void set_hk_lfr_time_not_synchro();
151 155
152 156 extern int sched_yield( void );
153 157 extern void rtems_cpu_usage_reset();
154 158 extern ring_node *current_ring_node_f3;
155 159 extern ring_node *ring_node_to_send_cwf_f3;
156 160 extern ring_node waveform_ring_f3[];
157 161 extern unsigned short sequenceCounterHK;
158 162
159 163 extern unsigned char hk_lfr_q_sd_fifo_size_max;
160 164 extern unsigned char hk_lfr_q_rv_fifo_size_max;
161 165 extern unsigned char hk_lfr_q_p0_fifo_size_max;
162 166 extern unsigned char hk_lfr_q_p1_fifo_size_max;
163 167 extern unsigned char hk_lfr_q_p2_fifo_size_max;
164 168
165 169 #endif // FSW_MISC_H_INCLUDED
@@ -1,107 +1,107
1 1 cmake_minimum_required (VERSION 2.6)
2 2 project (fsw)
3 3
4 4 include(sparc-rtems)
5 5 include(cppcheck)
6 6
7 7 include_directories("../header"
8 8 "../header/lfr_common_headers"
9 9 "../header/processing"
10 10 "../LFR_basic-parameters"
11 11 "../src")
12 12
13 13 set(SOURCES wf_handler.c
14 14 tc_handler.c
15 15 fsw_misc.c
16 16 fsw_init.c
17 17 fsw_globals.c
18 18 fsw_spacewire.c
19 19 tc_load_dump_parameters.c
20 20 tm_lfr_tc_exe.c
21 21 tc_acceptance.c
22 22 processing/fsw_processing.c
23 23 processing/avf0_prc0.c
24 24 processing/avf1_prc1.c
25 25 processing/avf2_prc2.c
26 26 lfr_cpu_usage_report.c
27 27 ${LFR_BP_SRC}
28 28 ../header/wf_handler.h
29 29 ../header/tc_handler.h
30 30 ../header/grlib_regs.h
31 31 ../header/fsw_misc.h
32 32 ../header/fsw_init.h
33 33 ../header/fsw_spacewire.h
34 34 ../header/tc_load_dump_parameters.h
35 35 ../header/tm_lfr_tc_exe.h
36 36 ../header/tc_acceptance.h
37 37 ../header/processing/fsw_processing.h
38 38 ../header/processing/avf0_prc0.h
39 39 ../header/processing/avf1_prc1.h
40 40 ../header/processing/avf2_prc2.h
41 41 ../header/fsw_params_wf_handler.h
42 42 ../header/lfr_cpu_usage_report.h
43 43 ../header/lfr_common_headers/ccsds_types.h
44 44 ../header/lfr_common_headers/fsw_params.h
45 45 ../header/lfr_common_headers/fsw_params_nb_bytes.h
46 46 ../header/lfr_common_headers/fsw_params_processing.h
47 47 ../header/lfr_common_headers/tm_byte_positions.h
48 48 ../LFR_basic-parameters/basic_parameters.h
49 49 ../LFR_basic-parameters/basic_parameters_params.h
50 50 ../header/GscMemoryLPP.hpp
51 51 )
52 52
53 53
54 54 option(FSW_verbose "Enable verbose LFR" OFF)
55 55 option(FSW_boot_messages "Enable LFR boot messages" OFF)
56 56 option(FSW_debug_messages "Enable LFR debug messages" OFF)
57 57 option(FSW_cpu_usage_report "Enable LFR cpu usage report" OFF)
58 58 option(FSW_stack_report "Enable LFR stack report" OFF)
59 59 option(FSW_vhdl_dev "?" OFF)
60 60 option(FSW_lpp_dpu_destid "Set to debug at LPP" ON)
61 61 option(FSW_debug_watchdog "Enable debug watchdog" OFF)
62 62 option(FSW_debug_tch "?" OFF)
63 63
64 64 set(SW_VERSION_N1 "3" CACHE STRING "Choose N1 FSW Version." FORCE)
65 65 set(SW_VERSION_N2 "2" CACHE STRING "Choose N2 FSW Version." FORCE)
66 66 set(SW_VERSION_N3 "0" CACHE STRING "Choose N3 FSW Version." FORCE)
67 set(SW_VERSION_N4 "10" CACHE STRING "Choose N4 FSW Version." FORCE)
67 set(SW_VERSION_N4 "11" CACHE STRING "Choose N4 FSW Version." FORCE)
68 68
69 69 if(FSW_verbose)
70 70 add_definitions(-DPRINT_MESSAGES_ON_CONSOLE)
71 71 endif()
72 72 if(FSW_boot_messages)
73 73 add_definitions(-DBOOT_MESSAGES)
74 74 endif()
75 75 if(FSW_debug_messages)
76 76 add_definitions(-DDEBUG_MESSAGES)
77 77 endif()
78 78 if(FSW_cpu_usage_report)
79 79 add_definitions(-DPRINT_TASK_STATISTICS)
80 80 endif()
81 81 if(FSW_stack_report)
82 82 add_definitions(-DPRINT_STACK_REPORT)
83 83 endif()
84 84 if(FSW_vhdl_dev)
85 85 add_definitions(-DVHDL_DEV)
86 86 endif()
87 87 if(FSW_lpp_dpu_destid)
88 88 add_definitions(-DLPP_DPU_DESTID)
89 89 endif()
90 90 if(FSW_debug_watchdog)
91 91 add_definitions(-DDEBUG_WATCHDOG)
92 92 endif()
93 93 if(FSW_debug_tch)
94 94 add_definitions(-DDEBUG_TCH)
95 95 endif()
96 96
97 97 add_definitions(-DMSB_FIRST_TCH)
98 98
99 99 add_definitions(-DSWVERSION=-1-0)
100 100 add_definitions(-DSW_VERSION_N1=${SW_VERSION_N1})
101 101 add_definitions(-DSW_VERSION_N2=${SW_VERSION_N2})
102 102 add_definitions(-DSW_VERSION_N3=${SW_VERSION_N3})
103 103 add_definitions(-DSW_VERSION_N4=${SW_VERSION_N4})
104 104
105 105 add_executable(fsw ${SOURCES})
106 106 add_test_cppcheck(fsw STYLE UNUSED_FUNCTIONS POSSIBLE_ERROR MISSING_INCLUDE)
107 107
@@ -1,1035 +1,1036
1 1 /** General usage functions and RTEMS tasks.
2 2 *
3 3 * @file
4 4 * @author P. LEROY
5 5 *
6 6 */
7 7
8 8 #include "fsw_misc.h"
9 9
10 10 int16_t hk_lfr_sc_v_f3_as_int16 = 0;
11 11 int16_t hk_lfr_sc_e1_f3_as_int16 = 0;
12 12 int16_t hk_lfr_sc_e2_f3_as_int16 = 0;
13 13
14 14 void timer_configure(unsigned char timer, unsigned int clock_divider,
15 15 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
16 16 {
17 17 /** This function configures a GPTIMER timer instantiated in the VHDL design.
18 18 *
19 19 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
20 20 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
21 21 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
22 22 * @param interrupt_level is the interrupt level that the timer drives.
23 23 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
24 24 *
25 25 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
26 26 *
27 27 */
28 28
29 29 rtems_status_code status;
30 30 rtems_isr_entry old_isr_handler;
31 31
32 32 old_isr_handler = NULL;
33 33
34 34 gptimer_regs->timer[timer].ctrl = INIT_CHAR; // reset the control register
35 35
36 36 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
37 37 if (status!=RTEMS_SUCCESSFUL)
38 38 {
39 39 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
40 40 }
41 41
42 42 timer_set_clock_divider( timer, clock_divider);
43 43 }
44 44
45 45 void timer_start(unsigned char timer)
46 46 {
47 47 /** This function starts a GPTIMER timer.
48 48 *
49 49 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
50 50 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
51 51 *
52 52 */
53 53
54 54 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ;
55 55 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_LD;
56 56 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_EN;
57 57 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_RS;
58 58 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_IE;
59 59 }
60 60
61 61 void timer_stop(unsigned char timer)
62 62 {
63 63 /** This function stops a GPTIMER timer.
64 64 *
65 65 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
66 66 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
67 67 *
68 68 */
69 69
70 70 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_EN_MASK;
71 71 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_IE_MASK;
72 72 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ;
73 73 }
74 74
75 75 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
76 76 {
77 77 /** This function sets the clock divider of a GPTIMER timer.
78 78 *
79 79 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
80 80 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
81 81 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
82 82 *
83 83 */
84 84
85 85 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
86 86 }
87 87
88 88 // WATCHDOG
89 89
90 90 rtems_isr watchdog_isr( rtems_vector_number vector )
91 91 {
92 92 rtems_status_code status_code;
93 93
94 94 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
95 95
96 96 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
97 97
98 98 exit(0);
99 99 }
100 100
101 101 void watchdog_configure(void)
102 102 {
103 103 /** This function configure the watchdog.
104 104 *
105 105 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
106 106 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
107 107 *
108 108 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
109 109 *
110 110 */
111 111
112 112 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
113 113
114 114 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
115 115
116 116 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
117 117 }
118 118
119 119 void watchdog_stop(void)
120 120 {
121 121 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
122 122 timer_stop( TIMER_WATCHDOG );
123 123 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
124 124 }
125 125
126 126 void watchdog_reload(void)
127 127 {
128 128 /** This function reloads the watchdog timer counter with the timer reload value.
129 129 *
130 130 * @param void
131 131 *
132 132 * @return void
133 133 *
134 134 */
135 135
136 136 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD;
137 137 }
138 138
139 139 void watchdog_start(void)
140 140 {
141 141 /** This function starts the watchdog timer.
142 142 *
143 143 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
144 144 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
145 145 *
146 146 */
147 147
148 148 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
149 149
150 150 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_CLEAR_IRQ;
151 151 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD;
152 152 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_EN;
153 153 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_IE;
154 154
155 155 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
156 156
157 157 }
158 158
159 159 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
160 160 {
161 161 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
162 162
163 163 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
164 164
165 165 return 0;
166 166 }
167 167
168 168 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
169 169 {
170 170 /** This function sets the scaler reload register of the apbuart module
171 171 *
172 172 * @param regs is the address of the apbuart registers in memory
173 173 * @param value is the value that will be stored in the scaler register
174 174 *
175 175 * The value shall be set by the software to get data on the serial interface.
176 176 *
177 177 */
178 178
179 179 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
180 180
181 181 apbuart_regs->scaler = value;
182 182
183 183 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
184 184 }
185 185
186 186 //************
187 187 // RTEMS TASKS
188 188
189 189 rtems_task load_task(rtems_task_argument argument)
190 190 {
191 191 BOOT_PRINTF("in LOAD *** \n")
192 192
193 193 rtems_status_code status;
194 194 unsigned int i;
195 195 unsigned int j;
196 196 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
197 197 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
198 198
199 199 watchdog_period_id = RTEMS_ID_NONE;
200 200
201 201 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
202 202
203 203 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
204 204 if( status != RTEMS_SUCCESSFUL ) {
205 205 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
206 206 }
207 207
208 208 i = 0;
209 209 j = 0;
210 210
211 211 watchdog_configure();
212 212
213 213 watchdog_start();
214 214
215 215 set_sy_lfr_watchdog_enabled( true );
216 216
217 217 while(1){
218 218 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
219 219 watchdog_reload();
220 220 i = i + 1;
221 221 if ( i == WATCHDOG_LOOP_PRINTF )
222 222 {
223 223 i = 0;
224 224 j = j + 1;
225 225 PRINTF1("%d\n", j)
226 226 }
227 227 #ifdef DEBUG_WATCHDOG
228 228 if (j == WATCHDOG_LOOP_DEBUG )
229 229 {
230 230 status = rtems_task_delete(RTEMS_SELF);
231 231 }
232 232 #endif
233 233 }
234 234 }
235 235
236 236 rtems_task hous_task(rtems_task_argument argument)
237 237 {
238 238 rtems_status_code status;
239 239 rtems_status_code spare_status;
240 240 rtems_id queue_id;
241 241 rtems_rate_monotonic_period_status period_status;
242 242 bool isSynchronized;
243 243
244 244 queue_id = RTEMS_ID_NONE;
245 245 memset(&period_status, 0, sizeof(rtems_rate_monotonic_period_status));
246 246 isSynchronized = false;
247 247
248 248 status = get_message_queue_id_send( &queue_id );
249 249 if (status != RTEMS_SUCCESSFUL)
250 250 {
251 251 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
252 252 }
253 253
254 254 BOOT_PRINTF("in HOUS ***\n");
255 255
256 256 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
257 257 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
258 258 if( status != RTEMS_SUCCESSFUL ) {
259 259 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
260 260 }
261 261 }
262 262
263 263 status = rtems_rate_monotonic_cancel(HK_id);
264 264 if( status != RTEMS_SUCCESSFUL ) {
265 265 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
266 266 }
267 267 else {
268 268 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
269 269 }
270 270
271 271 // startup phase
272 272 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
273 273 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
274 274 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
275 275 while( (period_status.state != RATE_MONOTONIC_EXPIRED)
276 276 && (isSynchronized == false) ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
277 277 {
278 278 if ((time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) == INT32_ALL_0) // check time synchronization
279 279 {
280 280 isSynchronized = true;
281 281 }
282 282 else
283 283 {
284 284 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
285 285
286 286 status = rtems_task_wake_after( HK_SYNC_WAIT ); // wait HK_SYNCH_WAIT 100 ms = 10 * 10 ms
287 287 }
288 288 }
289 289 status = rtems_rate_monotonic_cancel(HK_id);
290 290 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
291 291
292 292 set_hk_lfr_reset_cause( POWER_ON );
293 293
294 294 while(1){ // launch the rate monotonic task
295 295 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
296 296 if ( status != RTEMS_SUCCESSFUL ) {
297 297 PRINTF1( "in HOUS *** ERR period: %d\n", status);
298 298 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
299 299 }
300 300 else {
301 301 housekeeping_packet.packetSequenceControl[BYTE_0] = (unsigned char) (sequenceCounterHK >> SHIFT_1_BYTE);
302 302 housekeeping_packet.packetSequenceControl[BYTE_1] = (unsigned char) (sequenceCounterHK );
303 303 increment_seq_counter( &sequenceCounterHK );
304 304
305 305 housekeeping_packet.time[BYTE_0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES);
306 306 housekeeping_packet.time[BYTE_1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES);
307 307 housekeeping_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE);
308 308 housekeeping_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time);
309 309 housekeeping_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE);
310 310 housekeeping_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time);
311 311
312 312 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
313 313
314 314 spacewire_read_statistics();
315 315
316 316 update_hk_with_grspw_stats();
317 317
318 318 set_hk_lfr_time_not_synchro();
319 319
320 320 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
321 321 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
322 322 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
323 323 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
324 324 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
325 325
326 326 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
327 327 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
328 328 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
329 329 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
330 330 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
331 331
332 332 hk_lfr_le_me_he_update();
333 333
334 334 // SEND PACKET
335 335 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
336 336 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
337 337 if (status != RTEMS_SUCCESSFUL) {
338 338 PRINTF1("in HOUS *** ERR send: %d\n", status)
339 339 }
340 340 }
341 341 }
342 342
343 343 PRINTF("in HOUS *** deleting task\n")
344 344
345 345 status = rtems_task_delete( RTEMS_SELF ); // should not return
346 346
347 347 return;
348 348 }
349 349
350 350 int filter( int x, filter_ctx* ctx )
351 351 {
352 352 static const int b[NB_COEFFS][NB_COEFFS]={ {B00, B01, B02}, {B10, B11, B12}, {B20, B21, B22} };
353 353 static const int a[NB_COEFFS][NB_COEFFS]={ {A00, A01, A02}, {A10, A11, A12}, {A20, A21, A22} };
354 static const int g_pow2[NB_COEFFS]={G0, G1, G2};
354 static const int b_gain[NB_COEFFS]={GAIN_B0, GAIN_B1, GAIN_B2};
355 static const int a_gain[NB_COEFFS]={GAIN_A0, GAIN_A1, GAIN_A2};
355 356
356 int W;
357 int_fast32_t W;
357 358 int i;
358 359
359 360 W = INIT_INT;
360 361 i = INIT_INT;
361 362
362 363 //Direct-Form-II
363 364 for ( i = 0; i < NB_COEFFS; i++ )
364 365 {
365 x = x << g_pow2[ i ];
366 x = x << a_gain[i];
366 367 W = ( x - ( a[i][COEFF1] * ctx->W[i][COEFF0] )
367 - ( a[i][COEFF2] * ctx->W[i][COEFF1] ) ) >> g_pow2[ i ];
368 - ( a[i][COEFF2] * ctx->W[i][COEFF1] ) ) >> a_gain[i];
368 369 x = ( b[i][COEFF0] * W )
369 370 + ( b[i][COEFF1] * ctx->W[i][COEFF0] )
370 371 + ( b[i][COEFF2] * ctx->W[i][COEFF1] );
371 x =- ( x >> g_pow2[i] );
372 ctx->W[i][COEFF1] = ctx->W[i][COEFF0];
373 ctx->W[i][COEFF0] = W;
372 x = x >> b_gain[i];
373 ctx->W[i][1] = ctx->W[i][0];
374 ctx->W[i][0] = W;
374 375 }
375 376 return x;
376 377 }
377 378
378 379 rtems_task avgv_task(rtems_task_argument argument)
379 380 {
380 381 #define MOVING_AVERAGE 16
381 382 rtems_status_code status;
382 383 static int32_t v[MOVING_AVERAGE] = {0};
383 384 static int32_t e1[MOVING_AVERAGE] = {0};
384 385 static int32_t e2[MOVING_AVERAGE] = {0};
385 386 static int old_v = 0;
386 387 static int old_e1 = 0;
387 388 static int old_e2 = 0;
388 389 int32_t current_v;
389 390 int32_t current_e1;
390 391 int32_t current_e2;
391 392 int32_t average_v;
392 393 int32_t average_e1;
393 394 int32_t average_e2;
394 395 int32_t newValue_v;
395 396 int32_t newValue_e1;
396 397 int32_t newValue_e2;
397 398 unsigned char k;
398 399 unsigned char indexOfOldValue;
399 400
400 401 static filter_ctx ctx_v = { { {0,0,0}, {0,0,0}, {0,0,0} } };
401 402 static filter_ctx ctx_e1 = { { {0,0,0}, {0,0,0}, {0,0,0} } };
402 403 static filter_ctx ctx_e2 = { { {0,0,0}, {0,0,0}, {0,0,0} } };
403 404
404 405 BOOT_PRINTF("in AVGV ***\n");
405 406
406 407 if (rtems_rate_monotonic_ident( name_avgv_rate_monotonic, &AVGV_id) != RTEMS_SUCCESSFUL) {
407 408 status = rtems_rate_monotonic_create( name_avgv_rate_monotonic, &AVGV_id );
408 409 if( status != RTEMS_SUCCESSFUL ) {
409 410 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
410 411 }
411 412 }
412 413
413 414 status = rtems_rate_monotonic_cancel(AVGV_id);
414 415 if( status != RTEMS_SUCCESSFUL ) {
415 416 PRINTF1( "ERR *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id) ***code: %d\n", status );
416 417 }
417 418 else {
418 419 DEBUG_PRINTF("OK *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id)\n");
419 420 }
420 421
421 422 // initialize values
422 423 indexOfOldValue = MOVING_AVERAGE - 1;
423 424 current_v = 0;
424 425 current_e1 = 0;
425 426 current_e2 = 0;
426 427 average_v = 0;
427 428 average_e1 = 0;
428 429 average_e2 = 0;
429 430 newValue_v = 0;
430 431 newValue_e1 = 0;
431 432 newValue_e2 = 0;
432 433
433 434 k = INIT_CHAR;
434 435
435 436 while(1)
436 437 { // launch the rate monotonic task
437 438 status = rtems_rate_monotonic_period( AVGV_id, AVGV_PERIOD );
438 439 if ( status != RTEMS_SUCCESSFUL )
439 440 {
440 441 PRINTF1( "in AVGV *** ERR period: %d\n", status);
441 442 }
442 443 else
443 444 {
444 445 current_v = waveform_picker_regs->v;
445 446 current_e1 = waveform_picker_regs->e1;
446 447 current_e2 = waveform_picker_regs->e2;
447 448 if ( (current_v != old_v)
448 449 || (current_e1 != old_e1)
449 450 || (current_e2 != old_e2))
450 451 {
451 452 average_v = filter( current_v, &ctx_v );
452 453 average_e1 = filter( current_e1, &ctx_e1 );
453 454 average_e2 = filter( current_e2, &ctx_e2 );
454 455
455 456 //update int16 values
456 457 hk_lfr_sc_v_f3_as_int16 = (int16_t) (average_v / MOVING_AVERAGE );
457 458 hk_lfr_sc_e1_f3_as_int16 = (int16_t) (average_e1 / MOVING_AVERAGE );
458 459 hk_lfr_sc_e2_f3_as_int16 = (int16_t) (average_e2 / MOVING_AVERAGE );
459 460 }
460 461 old_v = current_v;
461 462 old_e1 = current_e1;
462 463 old_e2 = current_e2;
463 464 }
464 465 }
465 466
466 467 PRINTF("in AVGV *** deleting task\n");
467 468
468 469 status = rtems_task_delete( RTEMS_SELF ); // should not return
469 470
470 471 return;
471 472 }
472 473
473 474 rtems_task dumb_task( rtems_task_argument unused )
474 475 {
475 476 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
476 477 *
477 478 * @param unused is the starting argument of the RTEMS task
478 479 *
479 480 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
480 481 *
481 482 */
482 483
483 484 unsigned int i;
484 485 unsigned int intEventOut;
485 486 unsigned int coarse_time = 0;
486 487 unsigned int fine_time = 0;
487 488 rtems_event_set event_out;
488 489
489 490 event_out = EVENT_SETS_NONE_PENDING;
490 491
491 492 BOOT_PRINTF("in DUMB *** \n")
492 493
493 494 while(1){
494 495 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
495 496 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
496 497 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
497 498 | RTEMS_EVENT_14,
498 499 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
499 500 intEventOut = (unsigned int) event_out;
500 501 for ( i=0; i<NB_RTEMS_EVENTS; i++)
501 502 {
502 503 if ( ((intEventOut >> i) & 1) != 0)
503 504 {
504 505 coarse_time = time_management_regs->coarse_time;
505 506 fine_time = time_management_regs->fine_time;
506 507 if (i==EVENT_12)
507 508 {
508 509 PRINTF1("%s\n", DUMB_MESSAGE_12)
509 510 }
510 511 if (i==EVENT_13)
511 512 {
512 513 PRINTF1("%s\n", DUMB_MESSAGE_13)
513 514 }
514 515 if (i==EVENT_14)
515 516 {
516 517 PRINTF1("%s\n", DUMB_MESSAGE_1)
517 518 }
518 519 }
519 520 }
520 521 }
521 522 }
522 523
523 524 //*****************************
524 525 // init housekeeping parameters
525 526
526 527 void init_housekeeping_parameters( void )
527 528 {
528 529 /** This function initialize the housekeeping_packet global variable with default values.
529 530 *
530 531 */
531 532
532 533 unsigned int i = 0;
533 534 unsigned char *parameters;
534 535 unsigned char sizeOfHK;
535 536
536 537 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
537 538
538 539 parameters = (unsigned char*) &housekeeping_packet;
539 540
540 541 for(i = 0; i< sizeOfHK; i++)
541 542 {
542 543 parameters[i] = INIT_CHAR;
543 544 }
544 545
545 546 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
546 547 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
547 548 housekeeping_packet.reserved = DEFAULT_RESERVED;
548 549 housekeeping_packet.userApplication = CCSDS_USER_APP;
549 550 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE);
550 551 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
551 552 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
552 553 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
553 554 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE);
554 555 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
555 556 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
556 557 housekeeping_packet.serviceType = TM_TYPE_HK;
557 558 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
558 559 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
559 560 housekeeping_packet.sid = SID_HK;
560 561
561 562 // init status word
562 563 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
563 564 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
564 565 // init software version
565 566 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
566 567 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
567 568 housekeeping_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3;
568 569 housekeeping_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4;
569 570 // init fpga version
570 571 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
571 572 housekeeping_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1
572 573 housekeeping_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2
573 574 housekeeping_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3
574 575
575 576 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
576 577 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
577 578 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
578 579 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
579 580 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
580 581 }
581 582
582 583 void increment_seq_counter( unsigned short *packetSequenceControl )
583 584 {
584 585 /** This function increment the sequence counter passes in argument.
585 586 *
586 587 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
587 588 *
588 589 */
589 590
590 591 unsigned short segmentation_grouping_flag;
591 592 unsigned short sequence_cnt;
592 593
593 594 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << SHIFT_1_BYTE; // keep bits 7 downto 6
594 595 sequence_cnt = (*packetSequenceControl) & SEQ_CNT_MASK; // [0011 1111 1111 1111]
595 596
596 597 if ( sequence_cnt < SEQ_CNT_MAX)
597 598 {
598 599 sequence_cnt = sequence_cnt + 1;
599 600 }
600 601 else
601 602 {
602 603 sequence_cnt = 0;
603 604 }
604 605
605 606 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
606 607 }
607 608
608 609 void getTime( unsigned char *time)
609 610 {
610 611 /** This function write the current local time in the time buffer passed in argument.
611 612 *
612 613 */
613 614
614 615 time[0] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_3_BYTES);
615 616 time[1] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_2_BYTES);
616 617 time[2] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_1_BYTE);
617 618 time[3] = (unsigned char) (time_management_regs->coarse_time