##// END OF EJS Templates
3.2.0.9...
paul -
r359:18c114e265c0 R3++ draft
parent child
Show More
@@ -1,235 +1,238
1 #ifndef GRLIB_REGS_H_INCLUDED
1 #ifndef GRLIB_REGS_H_INCLUDED
2 #define GRLIB_REGS_H_INCLUDED
2 #define GRLIB_REGS_H_INCLUDED
3
3
4 #define NB_GPTIMER 3
4 #define NB_GPTIMER 3
5
5
6 #include <stdint.h>
6 #include <stdint.h>
7
7
8 struct apbuart_regs_str{
8 struct apbuart_regs_str{
9 volatile unsigned int data;
9 volatile unsigned int data;
10 volatile unsigned int status;
10 volatile unsigned int status;
11 volatile unsigned int ctrl;
11 volatile unsigned int ctrl;
12 volatile unsigned int scaler;
12 volatile unsigned int scaler;
13 volatile unsigned int fifoDebug;
13 volatile unsigned int fifoDebug;
14 };
14 };
15
15
16 struct grgpio_regs_str{
16 struct grgpio_regs_str{
17 volatile int io_port_data_register;
17 volatile int io_port_data_register;
18 int io_port_output_register;
18 int io_port_output_register;
19 int io_port_direction_register;
19 int io_port_direction_register;
20 int interrupt_mak_register;
20 int interrupt_mak_register;
21 int interrupt_polarity_register;
21 int interrupt_polarity_register;
22 int interrupt_edge_register;
22 int interrupt_edge_register;
23 int bypass_register;
23 int bypass_register;
24 int reserved;
24 int reserved;
25 // 0x20-0x3c interrupt map register(s)
25 // 0x20-0x3c interrupt map register(s)
26 };
26 };
27
27
28 typedef struct {
28 typedef struct {
29 volatile unsigned int counter;
29 volatile unsigned int counter;
30 volatile unsigned int reload;
30 volatile unsigned int reload;
31 volatile unsigned int ctrl;
31 volatile unsigned int ctrl;
32 volatile unsigned int unused;
32 volatile unsigned int unused;
33 } timer_regs_t;
33 } timer_regs_t;
34
34
35 //*************
35 //*************
36 //*************
36 //*************
37 // GPTIMER_REGS
37 // GPTIMER_REGS
38
38
39 #define GPTIMER_CLEAR_IRQ 0x00000010 // clear pending IRQ if any
39 #define GPTIMER_CLEAR_IRQ 0x00000010 // clear pending IRQ if any
40 #define GPTIMER_LD 0x00000004 // LD load value from the reload register
40 #define GPTIMER_LD 0x00000004 // LD load value from the reload register
41 #define GPTIMER_EN 0x00000001 // EN enable the timer
41 #define GPTIMER_EN 0x00000001 // EN enable the timer
42 #define GPTIMER_EN_MASK 0xfffffffe // EN enable the timer
42 #define GPTIMER_EN_MASK 0xfffffffe // EN enable the timer
43 #define GPTIMER_RS 0x00000002 // RS restart
43 #define GPTIMER_RS 0x00000002 // RS restart
44 #define GPTIMER_IE 0x00000008 // IE interrupt enable
44 #define GPTIMER_IE 0x00000008 // IE interrupt enable
45 #define GPTIMER_IE_MASK 0xffffffef // IE interrupt enable
45 #define GPTIMER_IE_MASK 0xffffffef // IE interrupt enable
46
46
47 typedef struct {
47 typedef struct {
48 volatile unsigned int scaler_value;
48 volatile unsigned int scaler_value;
49 volatile unsigned int scaler_reload;
49 volatile unsigned int scaler_reload;
50 volatile unsigned int conf;
50 volatile unsigned int conf;
51 volatile unsigned int unused0;
51 volatile unsigned int unused0;
52 timer_regs_t timer[NB_GPTIMER];
52 timer_regs_t timer[NB_GPTIMER];
53 } gptimer_regs_t;
53 } gptimer_regs_t;
54
54
55 //*********************
55 //*********************
56 //*********************
56 //*********************
57 // TIME_MANAGEMENT_REGS
57 // TIME_MANAGEMENT_REGS
58
58
59 #define VAL_SOFTWARE_RESET 0x02 // [0010] software reset
59 #define VAL_SOFTWARE_RESET 0x02 // [0010] software reset
60 #define VAL_LFR_SYNCHRONIZED 0x80000000
60 #define VAL_LFR_SYNCHRONIZED 0x80000000
61 #define BIT_SYNCHRONIZATION 31
61 #define BIT_SYNCHRONIZATION 31
62 #define COARSE_TIME_MASK 0x7fffffff
62 #define COARSE_TIME_MASK 0x7fffffff
63 #define SYNC_BIT_MASK 0x7f
63 #define SYNC_BIT_MASK 0x7f
64 #define SYNC_BIT 0x80
64 #define SYNC_BIT 0x80
65 #define BIT_CAL_RELOAD 0x00000010
65 #define BIT_CAL_RELOAD 0x00000010
66 #define MASK_CAL_RELOAD 0xffffffef // [1110 1111]
66 #define MASK_CAL_RELOAD 0xffffffef // [1110 1111]
67 #define BIT_CAL_ENABLE 0x00000040
67 #define BIT_CAL_ENABLE 0x00000040
68 #define MASK_CAL_ENABLE 0xffffffbf // [1011 1111]
68 #define MASK_CAL_ENABLE 0xffffffbf // [1011 1111]
69 #define BIT_SET_INTERLEAVED 0x00000020 // [0010 0000]
69 #define BIT_SET_INTERLEAVED 0x00000020 // [0010 0000]
70 #define MASK_SET_INTERLEAVED 0xffffffdf // [1101 1111]
70 #define MASK_SET_INTERLEAVED 0xffffffdf // [1101 1111]
71 #define BIT_SOFT_RESET 0x00000004 // [0100]
71 #define BIT_SOFT_RESET 0x00000004 // [0100]
72 #define MASK_SOFT_RESET 0xfffffffb // [1011]
72 #define MASK_SOFT_RESET 0xfffffffb // [1011]
73
73
74 typedef struct {
74 typedef struct {
75 volatile int ctrl; // bit 0 forces the load of the coarse_time_load value and resets the fine_time
75 volatile int ctrl; // bit 0 forces the load of the coarse_time_load value and resets the fine_time
76 // bit 1 is the soft reset for the time management module
76 // bit 1 is the soft reset for the time management module
77 // bit 2 is the soft reset for the waveform picker and the spectral matrix modules, set to 1 after HW reset
77 // bit 2 is the soft reset for the waveform picker and the spectral matrix modules, set to 1 after HW reset
78 volatile int coarse_time_load;
78 volatile int coarse_time_load;
79 volatile int coarse_time;
79 volatile int coarse_time;
80 volatile int fine_time;
80 volatile int fine_time;
81 // TEMPERATURES
81 // TEMPERATURES
82 volatile int temp_pcb; // SEL1 = 0 SEL0 = 0
82 volatile int temp_pcb; // SEL1 = 0 SEL0 = 0
83 volatile int temp_fpga; // SEL1 = 0 SEL0 = 1
83 volatile int temp_fpga; // SEL1 = 0 SEL0 = 1
84 volatile int temp_scm; // SEL1 = 1 SEL0 = 0
84 volatile int temp_scm; // SEL1 = 1 SEL0 = 0
85 // CALIBRATION
85 // CALIBRATION
86 volatile unsigned int calDACCtrl;
86 volatile unsigned int calDACCtrl;
87 volatile unsigned int calPrescaler;
87 volatile unsigned int calPrescaler;
88 volatile unsigned int calDivisor;
88 volatile unsigned int calDivisor;
89 volatile unsigned int calDataPtr;
89 volatile unsigned int calDataPtr;
90 volatile unsigned int calData;
90 volatile unsigned int calData;
91 } time_management_regs_t;
91 } time_management_regs_t;
92
92
93 //*********************
93 //*********************
94 //*********************
94 //*********************
95 // WAVEFORM_PICKER_REGS
95 // WAVEFORM_PICKER_REGS
96
96
97 #define BITS_WFP_STATUS_F3 0xc0 // [1100 0000] check the f3 full bits
97 #define BITS_WFP_STATUS_F3 0xc0 // [1100 0000] check the f3 full bits
98 #define BIT_WFP_BUF_F3_0 0x40 // [0100 0000] f3 buffer 0 is full
98 #define BIT_WFP_BUF_F3_0 0x40 // [0100 0000] f3 buffer 0 is full
99 #define BIT_WFP_BUF_F3_1 0x80 // [1000 0000] f3 buffer 1 is full
99 #define BIT_WFP_BUF_F3_1 0x80 // [1000 0000] f3 buffer 1 is full
100 #define RST_WFP_F3_0 0x00008840 // [1000 1000 0100 0000]
100 #define RST_WFP_F3_0 0x00008840 // [1000 1000 0100 0000]
101 #define RST_WFP_F3_1 0x00008880 // [1000 1000 1000 0000]
101 #define RST_WFP_F3_1 0x00008880 // [1000 1000 1000 0000]
102
102
103 #define BITS_WFP_STATUS_F2 0x30 // [0011 0000] get the status bits for f2
103 #define BITS_WFP_STATUS_F2 0x30 // [0011 0000] get the status bits for f2
104 #define SHIFT_WFP_STATUS_F2 4
104 #define SHIFT_WFP_STATUS_F2 4
105 #define BIT_WFP_BUF_F2_0 0x10 // [0001 0000] f2 buffer 0 is full
105 #define BIT_WFP_BUF_F2_0 0x10 // [0001 0000] f2 buffer 0 is full
106 #define BIT_WFP_BUF_F2_1 0x20 // [0010 0000] f2 buffer 1 is full
106 #define BIT_WFP_BUF_F2_1 0x20 // [0010 0000] f2 buffer 1 is full
107 #define RST_WFP_F2_0 0x00004410 // [0100 0100 0001 0000]
107 #define RST_WFP_F2_0 0x00004410 // [0100 0100 0001 0000]
108 #define RST_WFP_F2_1 0x00004420 // [0100 0100 0010 0000]
108 #define RST_WFP_F2_1 0x00004420 // [0100 0100 0010 0000]
109
109
110 #define BITS_WFP_STATUS_F1 0x0c // [0000 1100] check the f1 full bits
110 #define BITS_WFP_STATUS_F1 0x0c // [0000 1100] check the f1 full bits
111 #define BIT_WFP_BUF_F1_0 0x04 // [0000 0100] f1 buffer 0 is full
111 #define BIT_WFP_BUF_F1_0 0x04 // [0000 0100] f1 buffer 0 is full
112 #define BIT_WFP_BUF_F1_1 0x08 // [0000 1000] f1 buffer 1 is full
112 #define BIT_WFP_BUF_F1_1 0x08 // [0000 1000] f1 buffer 1 is full
113 #define RST_WFP_F1_0 0x00002204 // [0010 0010 0000 0100] f1 bits = 0
113 #define RST_WFP_F1_0 0x00002204 // [0010 0010 0000 0100] f1 bits = 0
114 #define RST_WFP_F1_1 0x00002208 // [0010 0010 0000 1000] f1 bits = 0
114 #define RST_WFP_F1_1 0x00002208 // [0010 0010 0000 1000] f1 bits = 0
115
115
116 #define BITS_WFP_STATUS_F0 0x03 // [0000 0011] check the f0 full bits
116 #define BITS_WFP_STATUS_F0 0x03 // [0000 0011] check the f0 full bits
117 #define RST_WFP_F0_0 0x00001101 // [0001 0001 0000 0001]
117 #define RST_WFP_F0_0 0x00001101 // [0001 0001 0000 0001]
118 #define RST_WFP_F0_1 0x00001102 // [0001 0001 0000 0010]
118 #define RST_WFP_F0_1 0x00001102 // [0001 0001 0000 0010]
119
119
120 #define BIT_WFP_BUFFER_0 0x01
120 #define BIT_WFP_BUFFER_0 0x01
121 #define BIT_WFP_BUFFER_1 0x02
121 #define BIT_WFP_BUFFER_1 0x02
122
122
123 #define RST_BITS_RUN_BURST_EN 0x80 // [1000 0000] burst f2, f1, f0 enable f3, f2, f1, f0
123 #define RST_BITS_RUN_BURST_EN 0x80 // [1000 0000] burst f2, f1, f0 enable f3, f2, f1, f0
124 #define BITS_WFP_ENABLE_ALL 0x0f // [0000 1111] enable f3, f2, f1, f0
124 #define BITS_WFP_ENABLE_ALL 0x0f // [0000 1111] enable f3, f2, f1, f0
125 #define BITS_WFP_ENABLE_BURST 0x0c // [0000 1100] enable f3, f2
125 #define BITS_WFP_ENABLE_BURST 0x0c // [0000 1100] enable f3, f2
126 #define RUN_BURST_ENABLE_SBM2 0x60 // [0110 0000] enable f2 and f1 burst
126 #define RUN_BURST_ENABLE_SBM2 0x60 // [0110 0000] enable f2 and f1 burst
127 #define RUN_BURST_ENABLE_BURST 0x40 // [0100 0000] f2 burst enabled
127 #define RUN_BURST_ENABLE_BURST 0x40 // [0100 0000] f2 burst enabled
128
128
129 #define DFLT_WFP_NB_DATA_BY_BUFFER 0xa7f // 0x30 *** 2688 - 1 => nb samples -1
129 #define DFLT_WFP_NB_DATA_BY_BUFFER 0xa7f // 0x30 *** 2688 - 1 => nb samples -1
130 #define DFLT_WFP_SNAPSHOT_PARAM 0xa80 // 0x34 *** 2688 => nb samples
130 #define DFLT_WFP_SNAPSHOT_PARAM 0xa80 // 0x34 *** 2688 => nb samples
131 #define DFLT_WFP_BUFFER_LENGTH 0x1f8 // buffer length in burst = 3 * 2688 / 16 = 504 = 0x1f8
131 #define DFLT_WFP_BUFFER_LENGTH 0x1f8 // buffer length in burst = 3 * 2688 / 16 = 504 = 0x1f8
132 #define DFLT_WFP_DELTA_F0_2 0x30 // 48 = 11 0000, max 7 bits
132 #define DFLT_WFP_DELTA_F0_2 0x30 // 48 = 11 0000, max 7 bits
133
133
134 // PDB >= 0.1.28, 0x80000f54
134 // PDB >= 0.1.28, 0x80000f54
135 typedef struct{
135 typedef struct{
136 int data_shaping; // 0x00 00 *** R2 R1 R0 SP1 SP0 BW
136 int data_shaping; // 0x00 00 *** R2 R1 R0 SP1 SP0 BW
137 int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
137 int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
138 int addr_data_f0_0; // 0x08
138 int addr_data_f0_0; // 0x08
139 int addr_data_f0_1; // 0x0c
139 int addr_data_f0_1; // 0x0c
140 int addr_data_f1_0; // 0x10
140 int addr_data_f1_0; // 0x10
141 int addr_data_f1_1; // 0x14
141 int addr_data_f1_1; // 0x14
142 int addr_data_f2_0; // 0x18
142 int addr_data_f2_0; // 0x18
143 int addr_data_f2_1; // 0x1c
143 int addr_data_f2_1; // 0x1c
144 int addr_data_f3_0; // 0x20
144 int addr_data_f3_0; // 0x20
145 int addr_data_f3_1; // 0x24
145 int addr_data_f3_1; // 0x24
146 volatile int status; // 0x28
146 volatile int status; // 0x28
147 volatile int delta_snapshot; // 0x2c
147 volatile int delta_snapshot; // 0x2c
148 int delta_f0; // 0x30
148 int delta_f0; // 0x30
149 int delta_f0_2; // 0x34
149 int delta_f0_2; // 0x34
150 int delta_f1; // 0x38
150 int delta_f1; // 0x38
151 int delta_f2; // 0x3c
151 int delta_f2; // 0x3c
152 int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688
152 int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688
153 int snapshot_param; // 0x44
153 int snapshot_param; // 0x44
154 int start_date; // 0x48
154 int start_date; // 0x48
155 //
155 //
156 volatile unsigned int f0_0_coarse_time; // 0x4c
156 volatile unsigned int f0_0_coarse_time; // 0x4c
157 volatile unsigned int f0_0_fine_time; // 0x50
157 volatile unsigned int f0_0_fine_time; // 0x50
158 volatile unsigned int f0_1_coarse_time; // 0x54
158 volatile unsigned int f0_1_coarse_time; // 0x54
159 volatile unsigned int f0_1_fine_time; // 0x58
159 volatile unsigned int f0_1_fine_time; // 0x58
160 //
160 //
161 volatile unsigned int f1_0_coarse_time; // 0x5c
161 volatile unsigned int f1_0_coarse_time; // 0x5c
162 volatile unsigned int f1_0_fine_time; // 0x60
162 volatile unsigned int f1_0_fine_time; // 0x60
163 volatile unsigned int f1_1_coarse_time; // 0x64
163 volatile unsigned int f1_1_coarse_time; // 0x64
164 volatile unsigned int f1_1_fine_time; // 0x68
164 volatile unsigned int f1_1_fine_time; // 0x68
165 //
165 //
166 volatile unsigned int f2_0_coarse_time; // 0x6c
166 volatile unsigned int f2_0_coarse_time; // 0x6c
167 volatile unsigned int f2_0_fine_time; // 0x70
167 volatile unsigned int f2_0_fine_time; // 0x70
168 volatile unsigned int f2_1_coarse_time; // 0x74
168 volatile unsigned int f2_1_coarse_time; // 0x74
169 volatile unsigned int f2_1_fine_time; // 0x78
169 volatile unsigned int f2_1_fine_time; // 0x78
170 //
170 //
171 volatile unsigned int f3_0_coarse_time; // 0x7c => 0x7c + 0xf54 = 0xd0
171 volatile unsigned int f3_0_coarse_time; // 0x7c => 0x7c + 0xf54 = 0xd0
172 volatile unsigned int f3_0_fine_time; // 0x80
172 volatile unsigned int f3_0_fine_time; // 0x80
173 volatile unsigned int f3_1_coarse_time; // 0x84
173 volatile unsigned int f3_1_coarse_time; // 0x84
174 volatile unsigned int f3_1_fine_time; // 0x88
174 volatile unsigned int f3_1_fine_time; // 0x88
175 //
175 //
176 unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168
176 unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168
177 //
177 //
178 volatile int v; // 0x90
178 volatile int16_t v_dummy; // 0x90
179 volatile int e1; // 0x94
179 volatile int16_t v; // 0x90
180 volatile int e2; // 0x98
180 volatile int16_t e1_dummy; // 0x94
181 volatile int16_t e1; // 0x94
182 volatile int16_t e2_dummy; // 0x98
183 volatile int16_t e2; // 0x98
181 } waveform_picker_regs_0_1_18_t;
184 } waveform_picker_regs_0_1_18_t;
182
185
183 //*********************
186 //*********************
184 //*********************
187 //*********************
185 // SPECTRAL_MATRIX_REGS
188 // SPECTRAL_MATRIX_REGS
186
189
187 #define BITS_STATUS_F0 0x03 // [0011]
190 #define BITS_STATUS_F0 0x03 // [0011]
188 #define BITS_STATUS_F1 0x0c // [1100]
191 #define BITS_STATUS_F1 0x0c // [1100]
189 #define BITS_STATUS_F2 0x30 // [0011 0000]
192 #define BITS_STATUS_F2 0x30 // [0011 0000]
190 #define BITS_HK_AA_SM 0x780 // [0111 1000 0000]
193 #define BITS_HK_AA_SM 0x780 // [0111 1000 0000]
191 #define BITS_SM_ERR 0x7c0 // [0111 1100 0000]
194 #define BITS_SM_ERR 0x7c0 // [0111 1100 0000]
192 #define BITS_STATUS_REG 0x7ff // [0111 1111 1111]
195 #define BITS_STATUS_REG 0x7ff // [0111 1111 1111]
193 #define BIT_READY_0 0x1 // [01]
196 #define BIT_READY_0 0x1 // [01]
194 #define BIT_READY_1 0x2 // [10]
197 #define BIT_READY_1 0x2 // [10]
195 #define BIT_READY_0_1 0x3 // [11]
198 #define BIT_READY_0_1 0x3 // [11]
196 #define BIT_STATUS_F1_0 0x04 // [0100]
199 #define BIT_STATUS_F1_0 0x04 // [0100]
197 #define BIT_STATUS_F1_1 0x08 // [1000]
200 #define BIT_STATUS_F1_1 0x08 // [1000]
198 #define BIT_STATUS_F2_0 0x10 // [0001 0000]
201 #define BIT_STATUS_F2_0 0x10 // [0001 0000]
199 #define BIT_STATUS_F2_1 0x20 // [0010 0000]
202 #define BIT_STATUS_F2_1 0x20 // [0010 0000]
200 #define DEFAULT_MATRIX_LENGTH 0xc8 // 25 * 128 / 16 = 200 = 0xc8
203 #define DEFAULT_MATRIX_LENGTH 0xc8 // 25 * 128 / 16 = 200 = 0xc8
201 #define BIT_IRQ_ON_NEW_MATRIX 0x01
204 #define BIT_IRQ_ON_NEW_MATRIX 0x01
202 #define MASK_IRQ_ON_NEW_MATRIX 0xfffffffe
205 #define MASK_IRQ_ON_NEW_MATRIX 0xfffffffe
203 #define BIT_IRQ_ON_ERROR 0x02
206 #define BIT_IRQ_ON_ERROR 0x02
204 #define MASK_IRQ_ON_ERROR 0xfffffffd
207 #define MASK_IRQ_ON_ERROR 0xfffffffd
205
208
206 typedef struct {
209 typedef struct {
207 volatile int config; // 0x00
210 volatile int config; // 0x00
208 volatile int status; // 0x04
211 volatile int status; // 0x04
209 volatile int f0_0_address; // 0x08
212 volatile int f0_0_address; // 0x08
210 volatile int f0_1_address; // 0x0C
213 volatile int f0_1_address; // 0x0C
211 //
214 //
212 volatile int f1_0_address; // 0x10
215 volatile int f1_0_address; // 0x10
213 volatile int f1_1_address; // 0x14
216 volatile int f1_1_address; // 0x14
214 volatile int f2_0_address; // 0x18
217 volatile int f2_0_address; // 0x18
215 volatile int f2_1_address; // 0x1C
218 volatile int f2_1_address; // 0x1C
216 //
219 //
217 volatile unsigned int f0_0_coarse_time; // 0x20
220 volatile unsigned int f0_0_coarse_time; // 0x20
218 volatile unsigned int f0_0_fine_time; // 0x24
221 volatile unsigned int f0_0_fine_time; // 0x24
219 volatile unsigned int f0_1_coarse_time; // 0x28
222 volatile unsigned int f0_1_coarse_time; // 0x28
220 volatile unsigned int f0_1_fine_time; // 0x2C
223 volatile unsigned int f0_1_fine_time; // 0x2C
221 //
224 //
222 volatile unsigned int f1_0_coarse_time; // 0x30
225 volatile unsigned int f1_0_coarse_time; // 0x30
223 volatile unsigned int f1_0_fine_time; // 0x34
226 volatile unsigned int f1_0_fine_time; // 0x34
224 volatile unsigned int f1_1_coarse_time; // 0x38
227 volatile unsigned int f1_1_coarse_time; // 0x38
225 volatile unsigned int f1_1_fine_time; // 0x3C
228 volatile unsigned int f1_1_fine_time; // 0x3C
226 //
229 //
227 volatile unsigned int f2_0_coarse_time; // 0x40
230 volatile unsigned int f2_0_coarse_time; // 0x40
228 volatile unsigned int f2_0_fine_time; // 0x44
231 volatile unsigned int f2_0_fine_time; // 0x44
229 volatile unsigned int f2_1_coarse_time; // 0x48
232 volatile unsigned int f2_1_coarse_time; // 0x48
230 volatile unsigned int f2_1_fine_time; // 0x4C
233 volatile unsigned int f2_1_fine_time; // 0x4C
231 //
234 //
232 unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8
235 unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8
233 } spectral_matrix_regs_t;
236 } spectral_matrix_regs_t;
234
237
235 #endif // GRLIB_REGS_H_INCLUDED
238 #endif // GRLIB_REGS_H_INCLUDED
@@ -1,9 +1,10
1 set(CMAKE_SYSTEM_NAME rtems)
1 set(CMAKE_SYSTEM_NAME rtems)
2
2
3 set(CMAKE_C_COMPILER /opt/rtems-4.10/bin/sparc-rtems-gcc)
3 set(CMAKE_C_COMPILER /opt/rtems-4.10/bin/sparc-rtems-gcc)
4 set(CMAKE_CXX_COMPILER /opt/rtems-4.10/bin/sparc-rtems-g++)
4 set(CMAKE_CXX_COMPILER /opt/rtems-4.10/bin/sparc-rtems-g++)
5 set(CMAKE_LINKER /opt/rtems-4.10/bin/sparc-rtems-g++)
5 set(CMAKE_LINKER /opt/rtems-4.10/bin/sparc-rtems-g++)
6 SET(CMAKE_EXE_LINKER_FLAGS "-static")
6 SET(CMAKE_EXE_LINKER_FLAGS "-static")
7 set(CMAKE_C_FLAGS_RELEASE "-O3 -mfix-b2bst")
7 set(CMAKE_C_FLAGS_RELEASE "-O3 -mfix-b2bst")
8 #set(CMAKE_C_FLAGS_RELEASE "-O3")
8 set(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <FLAGS> <CMAKE_CXX_LINK_FLAGS> <LINK_FLAGS> <OBJECTS> -o <TARGET> <LINK_LIBRARIES>")
9 set(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <FLAGS> <CMAKE_CXX_LINK_FLAGS> <LINK_FLAGS> <OBJECTS> -o <TARGET> <LINK_LIBRARIES>")
9 include_directories("/opt/rtems-4.10/sparc-rtems/leon3/lib/include")
10 include_directories("/opt/rtems-4.10/sparc-rtems/leon3/lib/include")
@@ -1,107 +1,107
1 cmake_minimum_required (VERSION 2.6)
1 cmake_minimum_required (VERSION 2.6)
2 project (fsw)
2 project (fsw)
3
3
4 include(sparc-rtems)
4 include(sparc-rtems)
5 include(cppcheck)
5 include(cppcheck)
6
6
7 include_directories("../header"
7 include_directories("../header"
8 "../header/lfr_common_headers"
8 "../header/lfr_common_headers"
9 "../header/processing"
9 "../header/processing"
10 "../LFR_basic-parameters"
10 "../LFR_basic-parameters"
11 "../src")
11 "../src")
12
12
13 set(SOURCES wf_handler.c
13 set(SOURCES wf_handler.c
14 tc_handler.c
14 tc_handler.c
15 fsw_misc.c
15 fsw_misc.c
16 fsw_init.c
16 fsw_init.c
17 fsw_globals.c
17 fsw_globals.c
18 fsw_spacewire.c
18 fsw_spacewire.c
19 tc_load_dump_parameters.c
19 tc_load_dump_parameters.c
20 tm_lfr_tc_exe.c
20 tm_lfr_tc_exe.c
21 tc_acceptance.c
21 tc_acceptance.c
22 processing/fsw_processing.c
22 processing/fsw_processing.c
23 processing/avf0_prc0.c
23 processing/avf0_prc0.c
24 processing/avf1_prc1.c
24 processing/avf1_prc1.c
25 processing/avf2_prc2.c
25 processing/avf2_prc2.c
26 lfr_cpu_usage_report.c
26 lfr_cpu_usage_report.c
27 ${LFR_BP_SRC}
27 ${LFR_BP_SRC}
28 ../header/wf_handler.h
28 ../header/wf_handler.h
29 ../header/tc_handler.h
29 ../header/tc_handler.h
30 ../header/grlib_regs.h
30 ../header/grlib_regs.h
31 ../header/fsw_misc.h
31 ../header/fsw_misc.h
32 ../header/fsw_init.h
32 ../header/fsw_init.h
33 ../header/fsw_spacewire.h
33 ../header/fsw_spacewire.h
34 ../header/tc_load_dump_parameters.h
34 ../header/tc_load_dump_parameters.h
35 ../header/tm_lfr_tc_exe.h
35 ../header/tm_lfr_tc_exe.h
36 ../header/tc_acceptance.h
36 ../header/tc_acceptance.h
37 ../header/processing/fsw_processing.h
37 ../header/processing/fsw_processing.h
38 ../header/processing/avf0_prc0.h
38 ../header/processing/avf0_prc0.h
39 ../header/processing/avf1_prc1.h
39 ../header/processing/avf1_prc1.h
40 ../header/processing/avf2_prc2.h
40 ../header/processing/avf2_prc2.h
41 ../header/fsw_params_wf_handler.h
41 ../header/fsw_params_wf_handler.h
42 ../header/lfr_cpu_usage_report.h
42 ../header/lfr_cpu_usage_report.h
43 ../header/lfr_common_headers/ccsds_types.h
43 ../header/lfr_common_headers/ccsds_types.h
44 ../header/lfr_common_headers/fsw_params.h
44 ../header/lfr_common_headers/fsw_params.h
45 ../header/lfr_common_headers/fsw_params_nb_bytes.h
45 ../header/lfr_common_headers/fsw_params_nb_bytes.h
46 ../header/lfr_common_headers/fsw_params_processing.h
46 ../header/lfr_common_headers/fsw_params_processing.h
47 ../header/lfr_common_headers/tm_byte_positions.h
47 ../header/lfr_common_headers/tm_byte_positions.h
48 ../LFR_basic-parameters/basic_parameters.h
48 ../LFR_basic-parameters/basic_parameters.h
49 ../LFR_basic-parameters/basic_parameters_params.h
49 ../LFR_basic-parameters/basic_parameters_params.h
50 ../header/GscMemoryLPP.hpp
50 ../header/GscMemoryLPP.hpp
51 )
51 )
52
52
53
53
54 option(FSW_verbose "Enable verbose LFR" OFF)
54 option(FSW_verbose "Enable verbose LFR" OFF)
55 option(FSW_boot_messages "Enable LFR boot messages" OFF)
55 option(FSW_boot_messages "Enable LFR boot messages" OFF)
56 option(FSW_debug_messages "Enable LFR debug messages" OFF)
56 option(FSW_debug_messages "Enable LFR debug messages" OFF)
57 option(FSW_cpu_usage_report "Enable LFR cpu usage report" OFF)
57 option(FSW_cpu_usage_report "Enable LFR cpu usage report" OFF)
58 option(FSW_stack_report "Enable LFR stack report" OFF)
58 option(FSW_stack_report "Enable LFR stack report" OFF)
59 option(FSW_vhdl_dev "?" OFF)
59 option(FSW_vhdl_dev "?" OFF)
60 option(FSW_lpp_dpu_destid "Set to debug at LPP" ON)
60 option(FSW_lpp_dpu_destid "Set to debug at LPP" ON)
61 option(FSW_debug_watchdog "Enable debug watchdog" OFF)
61 option(FSW_debug_watchdog "Enable debug watchdog" OFF)
62 option(FSW_debug_tch "?" OFF)
62 option(FSW_debug_tch "?" OFF)
63
63
64 set(SW_VERSION_N1 "3" CACHE STRING "Choose N1 FSW Version." FORCE)
64 set(SW_VERSION_N1 "3" CACHE STRING "Choose N1 FSW Version." FORCE)
65 set(SW_VERSION_N2 "2" CACHE STRING "Choose N2 FSW Version." FORCE)
65 set(SW_VERSION_N2 "2" CACHE STRING "Choose N2 FSW Version." FORCE)
66 set(SW_VERSION_N3 "0" CACHE STRING "Choose N3 FSW Version." FORCE)
66 set(SW_VERSION_N3 "0" CACHE STRING "Choose N3 FSW Version." FORCE)
67 set(SW_VERSION_N4 "8" CACHE STRING "Choose N4 FSW Version." FORCE)
67 set(SW_VERSION_N4 "9" CACHE STRING "Choose N4 FSW Version." FORCE)
68
68
69 if(FSW_verbose)
69 if(FSW_verbose)
70 add_definitions(-DPRINT_MESSAGES_ON_CONSOLE)
70 add_definitions(-DPRINT_MESSAGES_ON_CONSOLE)
71 endif()
71 endif()
72 if(FSW_boot_messages)
72 if(FSW_boot_messages)
73 add_definitions(-DBOOT_MESSAGES)
73 add_definitions(-DBOOT_MESSAGES)
74 endif()
74 endif()
75 if(FSW_debug_messages)
75 if(FSW_debug_messages)
76 add_definitions(-DDEBUG_MESSAGES)
76 add_definitions(-DDEBUG_MESSAGES)
77 endif()
77 endif()
78 if(FSW_cpu_usage_report)
78 if(FSW_cpu_usage_report)
79 add_definitions(-DPRINT_TASK_STATISTICS)
79 add_definitions(-DPRINT_TASK_STATISTICS)
80 endif()
80 endif()
81 if(FSW_stack_report)
81 if(FSW_stack_report)
82 add_definitions(-DPRINT_STACK_REPORT)
82 add_definitions(-DPRINT_STACK_REPORT)
83 endif()
83 endif()
84 if(FSW_vhdl_dev)
84 if(FSW_vhdl_dev)
85 add_definitions(-DVHDL_DEV)
85 add_definitions(-DVHDL_DEV)
86 endif()
86 endif()
87 if(FSW_lpp_dpu_destid)
87 if(FSW_lpp_dpu_destid)
88 add_definitions(-DLPP_DPU_DESTID)
88 add_definitions(-DLPP_DPU_DESTID)
89 endif()
89 endif()
90 if(FSW_debug_watchdog)
90 if(FSW_debug_watchdog)
91 add_definitions(-DDEBUG_WATCHDOG)
91 add_definitions(-DDEBUG_WATCHDOG)
92 endif()
92 endif()
93 if(FSW_debug_tch)
93 if(FSW_debug_tch)
94 add_definitions(-DDEBUG_TCH)
94 add_definitions(-DDEBUG_TCH)
95 endif()
95 endif()
96
96
97 add_definitions(-DMSB_FIRST_TCH)
97 add_definitions(-DMSB_FIRST_TCH)
98
98
99 add_definitions(-DSWVERSION=-1-0)
99 add_definitions(-DSWVERSION=-1-0)
100 add_definitions(-DSW_VERSION_N1=${SW_VERSION_N1})
100 add_definitions(-DSW_VERSION_N1=${SW_VERSION_N1})
101 add_definitions(-DSW_VERSION_N2=${SW_VERSION_N2})
101 add_definitions(-DSW_VERSION_N2=${SW_VERSION_N2})
102 add_definitions(-DSW_VERSION_N3=${SW_VERSION_N3})
102 add_definitions(-DSW_VERSION_N3=${SW_VERSION_N3})
103 add_definitions(-DSW_VERSION_N4=${SW_VERSION_N4})
103 add_definitions(-DSW_VERSION_N4=${SW_VERSION_N4})
104
104
105 add_executable(fsw ${SOURCES})
105 add_executable(fsw ${SOURCES})
106 add_test_cppcheck(fsw STYLE UNUSED_FUNCTIONS POSSIBLE_ERROR MISSING_INCLUDE)
106 add_test_cppcheck(fsw STYLE UNUSED_FUNCTIONS POSSIBLE_ERROR MISSING_INCLUDE)
107
107
@@ -1,1040 +1,1023
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 int16_t hk_lfr_sc_v_f3_as_int16 = 0;
10 int16_t hk_lfr_sc_v_f3_as_int16 = 0;
11 int16_t hk_lfr_sc_e1_f3_as_int16 = 0;
11 int16_t hk_lfr_sc_e1_f3_as_int16 = 0;
12 int16_t hk_lfr_sc_e2_f3_as_int16 = 0;
12 int16_t hk_lfr_sc_e2_f3_as_int16 = 0;
13
13
14 void timer_configure(unsigned char timer, unsigned int clock_divider,
14 void timer_configure(unsigned char timer, unsigned int clock_divider,
15 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
15 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
16 {
16 {
17 /** This function configures a GPTIMER timer instantiated in the VHDL design.
17 /** This function configures a GPTIMER timer instantiated in the VHDL design.
18 *
18 *
19 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
19 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
20 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
20 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
21 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
21 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
22 * @param interrupt_level is the interrupt level that the timer drives.
22 * @param interrupt_level is the interrupt level that the timer drives.
23 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
23 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
24 *
24 *
25 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
25 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
26 *
26 *
27 */
27 */
28
28
29 rtems_status_code status;
29 rtems_status_code status;
30 rtems_isr_entry old_isr_handler;
30 rtems_isr_entry old_isr_handler;
31
31
32 old_isr_handler = NULL;
32 old_isr_handler = NULL;
33
33
34 gptimer_regs->timer[timer].ctrl = INIT_CHAR; // reset the control register
34 gptimer_regs->timer[timer].ctrl = INIT_CHAR; // reset the control register
35
35
36 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
36 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
37 if (status!=RTEMS_SUCCESSFUL)
37 if (status!=RTEMS_SUCCESSFUL)
38 {
38 {
39 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
39 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
40 }
40 }
41
41
42 timer_set_clock_divider( timer, clock_divider);
42 timer_set_clock_divider( timer, clock_divider);
43 }
43 }
44
44
45 void timer_start(unsigned char timer)
45 void timer_start(unsigned char timer)
46 {
46 {
47 /** This function starts a GPTIMER timer.
47 /** This function starts a GPTIMER timer.
48 *
48 *
49 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
49 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
50 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
50 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
51 *
51 *
52 */
52 */
53
53
54 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ;
54 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ;
55 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_LD;
55 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_LD;
56 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_EN;
56 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_EN;
57 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_RS;
57 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_RS;
58 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_IE;
58 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_IE;
59 }
59 }
60
60
61 void timer_stop(unsigned char timer)
61 void timer_stop(unsigned char timer)
62 {
62 {
63 /** This function stops a GPTIMER timer.
63 /** This function stops a GPTIMER timer.
64 *
64 *
65 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
65 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
66 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
66 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
67 *
67 *
68 */
68 */
69
69
70 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_EN_MASK;
70 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_EN_MASK;
71 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_IE_MASK;
71 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & GPTIMER_IE_MASK;
72 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ;
72 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | GPTIMER_CLEAR_IRQ;
73 }
73 }
74
74
75 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
75 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
76 {
76 {
77 /** This function sets the clock divider of a GPTIMER timer.
77 /** This function sets the clock divider of a GPTIMER timer.
78 *
78 *
79 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
79 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
80 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
80 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
81 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
81 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
82 *
82 *
83 */
83 */
84
84
85 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
85 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
86 }
86 }
87
87
88 // WATCHDOG
88 // WATCHDOG
89
89
90 rtems_isr watchdog_isr( rtems_vector_number vector )
90 rtems_isr watchdog_isr( rtems_vector_number vector )
91 {
91 {
92 rtems_status_code status_code;
92 rtems_status_code status_code;
93
93
94 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
94 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
95
95
96 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
96 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
97
97
98 exit(0);
98 exit(0);
99 }
99 }
100
100
101 void watchdog_configure(void)
101 void watchdog_configure(void)
102 {
102 {
103 /** This function configure the watchdog.
103 /** This function configure the watchdog.
104 *
104 *
105 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
105 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
106 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
106 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
107 *
107 *
108 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
108 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
109 *
109 *
110 */
110 */
111
111
112 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
112 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
113
113
114 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
114 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
115
115
116 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
116 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
117 }
117 }
118
118
119 void watchdog_stop(void)
119 void watchdog_stop(void)
120 {
120 {
121 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
121 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
122 timer_stop( TIMER_WATCHDOG );
122 timer_stop( TIMER_WATCHDOG );
123 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
123 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
124 }
124 }
125
125
126 void watchdog_reload(void)
126 void watchdog_reload(void)
127 {
127 {
128 /** This function reloads the watchdog timer counter with the timer reload value.
128 /** This function reloads the watchdog timer counter with the timer reload value.
129 *
129 *
130 * @param void
130 * @param void
131 *
131 *
132 * @return void
132 * @return void
133 *
133 *
134 */
134 */
135
135
136 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD;
136 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD;
137 }
137 }
138
138
139 void watchdog_start(void)
139 void watchdog_start(void)
140 {
140 {
141 /** This function starts the watchdog timer.
141 /** This function starts the watchdog timer.
142 *
142 *
143 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
143 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
144 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
144 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
145 *
145 *
146 */
146 */
147
147
148 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
148 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
149
149
150 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_CLEAR_IRQ;
150 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_CLEAR_IRQ;
151 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD;
151 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_LD;
152 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_EN;
152 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_EN;
153 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_IE;
153 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | GPTIMER_IE;
154
154
155 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
155 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
156
156
157 }
157 }
158
158
159 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
159 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
160 {
160 {
161 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
161 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
162
162
163 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
163 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
164
164
165 return 0;
165 return 0;
166 }
166 }
167
167
168 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
168 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
169 {
169 {
170 /** This function sets the scaler reload register of the apbuart module
170 /** This function sets the scaler reload register of the apbuart module
171 *
171 *
172 * @param regs is the address of the apbuart registers in memory
172 * @param regs is the address of the apbuart registers in memory
173 * @param value is the value that will be stored in the scaler register
173 * @param value is the value that will be stored in the scaler register
174 *
174 *
175 * The value shall be set by the software to get data on the serial interface.
175 * The value shall be set by the software to get data on the serial interface.
176 *
176 *
177 */
177 */
178
178
179 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
179 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
180
180
181 apbuart_regs->scaler = value;
181 apbuart_regs->scaler = value;
182
182
183 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
183 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
184 }
184 }
185
185
186 //************
186 //************
187 // RTEMS TASKS
187 // RTEMS TASKS
188
188
189 rtems_task load_task(rtems_task_argument argument)
189 rtems_task load_task(rtems_task_argument argument)
190 {
190 {
191 BOOT_PRINTF("in LOAD *** \n")
191 BOOT_PRINTF("in LOAD *** \n")
192
192
193 rtems_status_code status;
193 rtems_status_code status;
194 unsigned int i;
194 unsigned int i;
195 unsigned int j;
195 unsigned int j;
196 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
196 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
197 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
197 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
198
198
199 watchdog_period_id = RTEMS_ID_NONE;
199 watchdog_period_id = RTEMS_ID_NONE;
200
200
201 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
201 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
202
202
203 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
203 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
204 if( status != RTEMS_SUCCESSFUL ) {
204 if( status != RTEMS_SUCCESSFUL ) {
205 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
205 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
206 }
206 }
207
207
208 i = 0;
208 i = 0;
209 j = 0;
209 j = 0;
210
210
211 watchdog_configure();
211 watchdog_configure();
212
212
213 watchdog_start();
213 watchdog_start();
214
214
215 set_sy_lfr_watchdog_enabled( true );
215 set_sy_lfr_watchdog_enabled( true );
216
216
217 while(1){
217 while(1){
218 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
218 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
219 watchdog_reload();
219 watchdog_reload();
220 i = i + 1;
220 i = i + 1;
221 if ( i == WATCHDOG_LOOP_PRINTF )
221 if ( i == WATCHDOG_LOOP_PRINTF )
222 {
222 {
223 i = 0;
223 i = 0;
224 j = j + 1;
224 j = j + 1;
225 PRINTF1("%d\n", j)
225 PRINTF1("%d\n", j)
226 }
226 }
227 #ifdef DEBUG_WATCHDOG
227 #ifdef DEBUG_WATCHDOG
228 if (j == WATCHDOG_LOOP_DEBUG )
228 if (j == WATCHDOG_LOOP_DEBUG )
229 {
229 {
230 status = rtems_task_delete(RTEMS_SELF);
230 status = rtems_task_delete(RTEMS_SELF);
231 }
231 }
232 #endif
232 #endif
233 }
233 }
234 }
234 }
235
235
236 rtems_task hous_task(rtems_task_argument argument)
236 rtems_task hous_task(rtems_task_argument argument)
237 {
237 {
238 rtems_status_code status;
238 rtems_status_code status;
239 rtems_status_code spare_status;
239 rtems_status_code spare_status;
240 rtems_id queue_id;
240 rtems_id queue_id;
241 rtems_rate_monotonic_period_status period_status;
241 rtems_rate_monotonic_period_status period_status;
242 bool isSynchronized;
242 bool isSynchronized;
243
243
244 queue_id = RTEMS_ID_NONE;
244 queue_id = RTEMS_ID_NONE;
245 memset(&period_status, 0, sizeof(rtems_rate_monotonic_period_status));
245 memset(&period_status, 0, sizeof(rtems_rate_monotonic_period_status));
246 isSynchronized = false;
246 isSynchronized = false;
247
247
248 status = get_message_queue_id_send( &queue_id );
248 status = get_message_queue_id_send( &queue_id );
249 if (status != RTEMS_SUCCESSFUL)
249 if (status != RTEMS_SUCCESSFUL)
250 {
250 {
251 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
251 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
252 }
252 }
253
253
254 BOOT_PRINTF("in HOUS ***\n");
254 BOOT_PRINTF("in HOUS ***\n");
255
255
256 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
256 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
257 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
257 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
258 if( status != RTEMS_SUCCESSFUL ) {
258 if( status != RTEMS_SUCCESSFUL ) {
259 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
259 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
260 }
260 }
261 }
261 }
262
262
263 status = rtems_rate_monotonic_cancel(HK_id);
263 status = rtems_rate_monotonic_cancel(HK_id);
264 if( status != RTEMS_SUCCESSFUL ) {
264 if( status != RTEMS_SUCCESSFUL ) {
265 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
265 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
266 }
266 }
267 else {
267 else {
268 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
268 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
269 }
269 }
270
270
271 // startup phase
271 // startup phase
272 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
272 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
273 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
273 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
274 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
274 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
275 while( (period_status.state != RATE_MONOTONIC_EXPIRED)
275 while( (period_status.state != RATE_MONOTONIC_EXPIRED)
276 && (isSynchronized == false) ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
276 && (isSynchronized == false) ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
277 {
277 {
278 if ((time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) == INT32_ALL_0) // check time synchronization
278 if ((time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) == INT32_ALL_0) // check time synchronization
279 {
279 {
280 isSynchronized = true;
280 isSynchronized = true;
281 }
281 }
282 else
282 else
283 {
283 {
284 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
284 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
285
285
286 status = rtems_task_wake_after( HK_SYNC_WAIT ); // wait HK_SYNCH_WAIT 100 ms = 10 * 10 ms
286 status = rtems_task_wake_after( HK_SYNC_WAIT ); // wait HK_SYNCH_WAIT 100 ms = 10 * 10 ms
287 }
287 }
288 }
288 }
289 status = rtems_rate_monotonic_cancel(HK_id);
289 status = rtems_rate_monotonic_cancel(HK_id);
290 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
290 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
291
291
292 set_hk_lfr_reset_cause( POWER_ON );
292 set_hk_lfr_reset_cause( POWER_ON );
293
293
294 while(1){ // launch the rate monotonic task
294 while(1){ // launch the rate monotonic task
295 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
295 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
296 if ( status != RTEMS_SUCCESSFUL ) {
296 if ( status != RTEMS_SUCCESSFUL ) {
297 PRINTF1( "in HOUS *** ERR period: %d\n", status);
297 PRINTF1( "in HOUS *** ERR period: %d\n", status);
298 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
298 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
299 }
299 }
300 else {
300 else {
301 housekeeping_packet.packetSequenceControl[BYTE_0] = (unsigned char) (sequenceCounterHK >> SHIFT_1_BYTE);
301 housekeeping_packet.packetSequenceControl[BYTE_0] = (unsigned char) (sequenceCounterHK >> SHIFT_1_BYTE);
302 housekeeping_packet.packetSequenceControl[BYTE_1] = (unsigned char) (sequenceCounterHK );
302 housekeeping_packet.packetSequenceControl[BYTE_1] = (unsigned char) (sequenceCounterHK );
303 increment_seq_counter( &sequenceCounterHK );
303 increment_seq_counter( &sequenceCounterHK );
304
304
305 housekeeping_packet.time[BYTE_0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES);
305 housekeeping_packet.time[BYTE_0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES);
306 housekeeping_packet.time[BYTE_1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES);
306 housekeeping_packet.time[BYTE_1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES);
307 housekeeping_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE);
307 housekeeping_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE);
308 housekeeping_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time);
308 housekeeping_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time);
309 housekeeping_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE);
309 housekeeping_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE);
310 housekeeping_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time);
310 housekeeping_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time);
311
311
312 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
312 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
313
313
314 spacewire_read_statistics();
314 spacewire_read_statistics();
315
315
316 update_hk_with_grspw_stats();
316 update_hk_with_grspw_stats();
317
317
318 set_hk_lfr_time_not_synchro();
318 set_hk_lfr_time_not_synchro();
319
319
320 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
320 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
321 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
321 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
322 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
322 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
323 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
323 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
324 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
324 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
325
325
326 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
326 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
327 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
327 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
328 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
328 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
329 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
329 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
330 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
330 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
331
331
332 hk_lfr_le_me_he_update();
332 hk_lfr_le_me_he_update();
333
333
334 // SEND PACKET
334 // SEND PACKET
335 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
335 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
336 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
336 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
337 if (status != RTEMS_SUCCESSFUL) {
337 if (status != RTEMS_SUCCESSFUL) {
338 PRINTF1("in HOUS *** ERR send: %d\n", status)
338 PRINTF1("in HOUS *** ERR send: %d\n", status)
339 }
339 }
340 }
340 }
341 }
341 }
342
342
343 PRINTF("in HOUS *** deleting task\n")
343 PRINTF("in HOUS *** deleting task\n")
344
344
345 status = rtems_task_delete( RTEMS_SELF ); // should not return
345 status = rtems_task_delete( RTEMS_SELF ); // should not return
346
346
347 return;
347 return;
348 }
348 }
349
349
350 int32_t getIntFromShort( int reg )
351 {
352 int16_t ret_as_int16;
353 int32_t ret_as_int32;
354 char *regPtr;
355 char *ret_as_int16_ptr;
356
357 regPtr = (char*) &reg;
358 ret_as_int16_ptr = (char*) &ret_as_int16;
359
360 ret_as_int16_ptr[BYTE_0] = regPtr[BYTE_3];
361 ret_as_int16_ptr[BYTE_1] = regPtr[BYTE_4];
362
363 ret_as_int32 = (int32_t) ret_as_int16;
364
365 return ret_as_int32;
366 }
367
368 rtems_task avgv_task(rtems_task_argument argument)
350 rtems_task avgv_task(rtems_task_argument argument)
369 {
351 {
370 #define MOVING_AVERAGE 16
352 #define MOVING_AVERAGE 16
371 rtems_status_code status;
353 rtems_status_code status;
372 static int32_t v[MOVING_AVERAGE] = {0};
354 static int32_t v[MOVING_AVERAGE] = {0};
373 static int32_t e1[MOVING_AVERAGE] = {0};
355 static int32_t e1[MOVING_AVERAGE] = {0};
374 static int32_t e2[MOVING_AVERAGE] = {0};
356 static int32_t e2[MOVING_AVERAGE] = {0};
375 static int old_v = 0;
357 static int old_v = 0;
376 static int old_e1 = 0;
358 static int old_e1 = 0;
377 static int old_e2 = 0;
359 static int old_e2 = 0;
378 int current_v;
360 int32_t current_v;
379 int current_e1;
361 int32_t current_e1;
380 int current_e2;
362 int32_t current_e2;
381 int32_t average_v;
363 int32_t average_v;
382 int32_t average_e1;
364 int32_t average_e1;
383 int32_t average_e2;
365 int32_t average_e2;
384 int32_t newValue_v;
366 int32_t newValue_v;
385 int32_t newValue_e1;
367 int32_t newValue_e1;
386 int32_t newValue_e2;
368 int32_t newValue_e2;
387 unsigned char k;
369 unsigned char k;
388 unsigned char indexOfOldValue;
370 unsigned char indexOfOldValue;
389
371
390 BOOT_PRINTF("in AVGV ***\n");
372 BOOT_PRINTF("in AVGV ***\n");
391
373
392 if (rtems_rate_monotonic_ident( name_avgv_rate_monotonic, &AVGV_id) != RTEMS_SUCCESSFUL) {
374 if (rtems_rate_monotonic_ident( name_avgv_rate_monotonic, &AVGV_id) != RTEMS_SUCCESSFUL) {
393 status = rtems_rate_monotonic_create( name_avgv_rate_monotonic, &AVGV_id );
375 status = rtems_rate_monotonic_create( name_avgv_rate_monotonic, &AVGV_id );
394 if( status != RTEMS_SUCCESSFUL ) {
376 if( status != RTEMS_SUCCESSFUL ) {
395 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
377 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
396 }
378 }
397 }
379 }
398
380
399 status = rtems_rate_monotonic_cancel(AVGV_id);
381 status = rtems_rate_monotonic_cancel(AVGV_id);
400 if( status != RTEMS_SUCCESSFUL ) {
382 if( status != RTEMS_SUCCESSFUL ) {
401 PRINTF1( "ERR *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id) ***code: %d\n", status );
383 PRINTF1( "ERR *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id) ***code: %d\n", status );
402 }
384 }
403 else {
385 else {
404 DEBUG_PRINTF("OK *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id)\n");
386 DEBUG_PRINTF("OK *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id)\n");
405 }
387 }
406
388
407 // initialize values
389 // initialize values
408 indexOfOldValue = MOVING_AVERAGE - 1;
390 indexOfOldValue = MOVING_AVERAGE - 1;
409 current_v = 0;
391 current_v = 0;
410 current_e1 = 0;
392 current_e1 = 0;
411 current_e2 = 0;
393 current_e2 = 0;
412 average_v = 0;
394 average_v = 0;
413 average_e1 = 0;
395 average_e1 = 0;
414 average_e2 = 0;
396 average_e2 = 0;
415 newValue_v = 0;
397 newValue_v = 0;
416 newValue_e1 = 0;
398 newValue_e1 = 0;
417 newValue_e2 = 0;
399 newValue_e2 = 0;
418
400
419 k = INIT_CHAR;
401 k = INIT_CHAR;
420
402
421 while(1)
403 while(1)
422 { // launch the rate monotonic task
404 { // launch the rate monotonic task
423 status = rtems_rate_monotonic_period( AVGV_id, AVGV_PERIOD );
405 status = rtems_rate_monotonic_period( AVGV_id, AVGV_PERIOD );
424 if ( status != RTEMS_SUCCESSFUL )
406 if ( status != RTEMS_SUCCESSFUL )
425 {
407 {
426 PRINTF1( "in AVGV *** ERR period: %d\n", status);
408 PRINTF1( "in AVGV *** ERR period: %d\n", status);
427 }
409 }
428 else
410 else
429 {
411 {
430 current_v = waveform_picker_regs->v;
412 current_v = waveform_picker_regs->v;
431 current_e1 = waveform_picker_regs->e1;
413 current_e1 = waveform_picker_regs->e1;
432 current_e2 = waveform_picker_regs->e2;
414 current_e2 = waveform_picker_regs->e2;
433 // if ( (current_v != old_v)
415 if ( (current_v != old_v)
434 // && (current_e1 != old_e1)
416 || (current_e1 != old_e1)
435 // && (current_e2 != old_e2))
417 || (current_e2 != old_e2))
436 // {
418 {
437 // get new values
419 // get new values
438 newValue_v = getIntFromShort( current_v );
420 newValue_v = current_v;
439 newValue_e1 = getIntFromShort( current_e1 );
421 newValue_e1 = current_e1;
440 newValue_e2 = getIntFromShort( current_e2 );
422 newValue_e2 = current_e2;
441
423
442 // compute the moving average
424 // compute the moving average
443 average_v = average_v + newValue_v - v[k];
425 average_v = average_v + newValue_v - v[k];
444 average_e1 = average_e1 + newValue_e1 - e1[k];
426 average_e1 = average_e1 + newValue_e1 - e1[k];
445 average_e2 = average_e2 + newValue_e2 - e2[k];
427 average_e2 = average_e2 + newValue_e2 - e2[k];
446
428
447 // store new values in buffers
429 // store new values in buffers
448 v[k] = newValue_v;
430 v[k] = newValue_v;
449 e1[k] = newValue_e1;
431 e1[k] = newValue_e1;
450 e2[k] = newValue_e2;
432 e2[k] = newValue_e2;
451
433
452 if (k == (MOVING_AVERAGE-1))
434 if (k == (MOVING_AVERAGE-1))
453 {
435 {
454 k = 0;
436 k = 0;
455 }
437 }
456 else
438 else
457 {
439 {
458 k++;
440 k++;
459 }
441 }
442
460 //update int16 values
443 //update int16 values
461 hk_lfr_sc_v_f3_as_int16 = (int16_t) (average_v / MOVING_AVERAGE );
444 hk_lfr_sc_v_f3_as_int16 = (int16_t) (average_v / MOVING_AVERAGE );
462 hk_lfr_sc_e1_f3_as_int16 = (int16_t) (average_e1 / MOVING_AVERAGE );
445 hk_lfr_sc_e1_f3_as_int16 = (int16_t) (average_e1 / MOVING_AVERAGE );
463 hk_lfr_sc_e2_f3_as_int16 = (int16_t) (average_e2 / MOVING_AVERAGE );
446 hk_lfr_sc_e2_f3_as_int16 = (int16_t) (average_e2 / MOVING_AVERAGE );
464 // }
447 }
465 old_v = current_v;
448 old_v = current_v;
466 old_e1 = current_e1;
449 old_e1 = current_e1;
467 old_e2 = current_e2;
450 old_e2 = current_e2;
468 }
451 }
469 }
452 }
470
453
471 PRINTF("in AVGV *** deleting task\n");
454 PRINTF("in AVGV *** deleting task\n");
472
455
473 status = rtems_task_delete( RTEMS_SELF ); // should not return
456 status = rtems_task_delete( RTEMS_SELF ); // should not return
474
457
475 return;
458 return;
476 }
459 }
477
460
478 rtems_task dumb_task( rtems_task_argument unused )
461 rtems_task dumb_task( rtems_task_argument unused )
479 {
462 {
480 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
463 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
481 *
464 *
482 * @param unused is the starting argument of the RTEMS task
465 * @param unused is the starting argument of the RTEMS task
483 *
466 *
484 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
467 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
485 *
468 *
486 */
469 */
487
470
488 unsigned int i;
471 unsigned int i;
489 unsigned int intEventOut;
472 unsigned int intEventOut;
490 unsigned int coarse_time = 0;
473 unsigned int coarse_time = 0;
491 unsigned int fine_time = 0;
474 unsigned int fine_time = 0;
492 rtems_event_set event_out;
475 rtems_event_set event_out;
493
476
494 event_out = EVENT_SETS_NONE_PENDING;
477 event_out = EVENT_SETS_NONE_PENDING;
495
478
496 BOOT_PRINTF("in DUMB *** \n")
479 BOOT_PRINTF("in DUMB *** \n")
497
480
498 while(1){
481 while(1){
499 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
482 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
500 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
483 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
501 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
484 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
502 | RTEMS_EVENT_14,
485 | RTEMS_EVENT_14,
503 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
486 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
504 intEventOut = (unsigned int) event_out;
487 intEventOut = (unsigned int) event_out;
505 for ( i=0; i<NB_RTEMS_EVENTS; i++)
488 for ( i=0; i<NB_RTEMS_EVENTS; i++)
506 {
489 {
507 if ( ((intEventOut >> i) & 1) != 0)
490 if ( ((intEventOut >> i) & 1) != 0)
508 {
491 {
509 coarse_time = time_management_regs->coarse_time;
492 coarse_time = time_management_regs->coarse_time;
510 fine_time = time_management_regs->fine_time;
493 fine_time = time_management_regs->fine_time;
511 if (i==EVENT_12)
494 if (i==EVENT_12)
512 {
495 {
513 PRINTF1("%s\n", DUMB_MESSAGE_12)
496 PRINTF1("%s\n", DUMB_MESSAGE_12)
514 }
497 }
515 if (i==EVENT_13)
498 if (i==EVENT_13)
516 {
499 {
517 PRINTF1("%s\n", DUMB_MESSAGE_13)
500 PRINTF1("%s\n", DUMB_MESSAGE_13)
518 }
501 }
519 if (i==EVENT_14)
502 if (i==EVENT_14)
520 {
503 {
521 PRINTF1("%s\n", DUMB_MESSAGE_1)
504 PRINTF1("%s\n", DUMB_MESSAGE_1)
522 }
505 }
523 }
506 }
524 }
507 }
525 }
508 }
526 }
509 }
527
510
528 //*****************************
511 //*****************************
529 // init housekeeping parameters
512 // init housekeeping parameters
530
513
531 void init_housekeeping_parameters( void )
514 void init_housekeeping_parameters( void )
532 {
515 {
533 /** This function initialize the housekeeping_packet global variable with default values.
516 /** This function initialize the housekeeping_packet global variable with default values.
534 *
517 *
535 */
518 */
536
519
537 unsigned int i = 0;
520 unsigned int i = 0;
538 unsigned char *parameters;
521 unsigned char *parameters;
539 unsigned char sizeOfHK;
522 unsigned char sizeOfHK;
540
523
541 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
524 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
542
525
543 parameters = (unsigned char*) &housekeeping_packet;
526 parameters = (unsigned char*) &housekeeping_packet;
544
527
545 for(i = 0; i< sizeOfHK; i++)
528 for(i = 0; i< sizeOfHK; i++)
546 {
529 {
547 parameters[i] = INIT_CHAR;
530 parameters[i] = INIT_CHAR;
548 }
531 }
549
532
550 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
533 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
551 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
534 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
552 housekeeping_packet.reserved = DEFAULT_RESERVED;
535 housekeeping_packet.reserved = DEFAULT_RESERVED;
553 housekeeping_packet.userApplication = CCSDS_USER_APP;
536 housekeeping_packet.userApplication = CCSDS_USER_APP;
554 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE);
537 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE);
555 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
538 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
556 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
539 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
557 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
540 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
558 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE);
541 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE);
559 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
542 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
560 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
543 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
561 housekeeping_packet.serviceType = TM_TYPE_HK;
544 housekeeping_packet.serviceType = TM_TYPE_HK;
562 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
545 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
563 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
546 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
564 housekeeping_packet.sid = SID_HK;
547 housekeeping_packet.sid = SID_HK;
565
548
566 // init status word
549 // init status word
567 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
550 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
568 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
551 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
569 // init software version
552 // init software version
570 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
553 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
571 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
554 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
572 housekeeping_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3;
555 housekeeping_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3;
573 housekeeping_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4;
556 housekeeping_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4;
574 // init fpga version
557 // init fpga version
575 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
558 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
576 housekeeping_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1
559 housekeeping_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1
577 housekeeping_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2
560 housekeeping_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2
578 housekeeping_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3
561 housekeeping_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3
579
562
580 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
563 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
581 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
564 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
582 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
565 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
583 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
566 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
584 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
567 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
585 }
568 }
586
569
587 void increment_seq_counter( unsigned short *packetSequenceControl )
570 void increment_seq_counter( unsigned short *packetSequenceControl )
588 {
571 {
589 /** This function increment the sequence counter passes in argument.
572 /** This function increment the sequence counter passes in argument.
590 *
573 *
591 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
574 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
592 *
575 *
593 */
576 */
594
577
595 unsigned short segmentation_grouping_flag;
578 unsigned short segmentation_grouping_flag;
596 unsigned short sequence_cnt;
579 unsigned short sequence_cnt;
597
580
598 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << SHIFT_1_BYTE; // keep bits 7 downto 6
581 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << SHIFT_1_BYTE; // keep bits 7 downto 6
599 sequence_cnt = (*packetSequenceControl) & SEQ_CNT_MASK; // [0011 1111 1111 1111]
582 sequence_cnt = (*packetSequenceControl) & SEQ_CNT_MASK; // [0011 1111 1111 1111]
600
583
601 if ( sequence_cnt < SEQ_CNT_MAX)
584 if ( sequence_cnt < SEQ_CNT_MAX)
602 {
585 {
603 sequence_cnt = sequence_cnt + 1;
586 sequence_cnt = sequence_cnt + 1;
604 }
587 }
605 else
588 else
606 {
589 {
607 sequence_cnt = 0;
590 sequence_cnt = 0;
608 }
591 }
609
592
610 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
593 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
611 }
594 }
612
595
613 void getTime( unsigned char *time)
596 void getTime( unsigned char *time)
614 {
597 {
615 /** This function write the current local time in the time buffer passed in argument.
598 /** This function write the current local time in the time buffer passed in argument.
616 *
599 *
617 */
600 */
618
601
619 time[0] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_3_BYTES);
602 time[0] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_3_BYTES);
620 time[1] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_2_BYTES);
603 time[1] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_2_BYTES);
621 time[2] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_1_BYTE);
604 time[2] = (unsigned char) (time_management_regs->coarse_time>>SHIFT_1_BYTE);
622 time[3] = (unsigned char) (time_management_regs->coarse_time);
605 time[3] = (unsigned char) (time_management_regs->coarse_time);
623 time[4] = (unsigned char) (time_management_regs->fine_time>>SHIFT_1_BYTE);
606 time[4] = (unsigned char) (time_management_regs->fine_time>>SHIFT_1_BYTE);
624 time[5] = (unsigned char) (time_management_regs->fine_time);
607 time[5] = (unsigned char) (time_management_regs->fine_time);
625 }
608 }
626
609
627 unsigned long long int getTimeAsUnsignedLongLongInt( )
610 unsigned long long int getTimeAsUnsignedLongLongInt( )
628 {
611 {
629 /** This function write the current local time in the time buffer passed in argument.
612 /** This function write the current local time in the time buffer passed in argument.
630 *
613 *
631 */
614 */
632 unsigned long long int time;
615 unsigned long long int time;
633
616
634 time = ( (unsigned long long int) (time_management_regs->coarse_time & COARSE_TIME_MASK) << SHIFT_2_BYTES )
617 time = ( (unsigned long long int) (time_management_regs->coarse_time & COARSE_TIME_MASK) << SHIFT_2_BYTES )
635 + time_management_regs->fine_time;
618 + time_management_regs->fine_time;
636
619
637 return time;
620 return time;
638 }
621 }
639
622
640 void send_dumb_hk( void )
623 void send_dumb_hk( void )
641 {
624 {
642 Packet_TM_LFR_HK_t dummy_hk_packet;
625 Packet_TM_LFR_HK_t dummy_hk_packet;
643 unsigned char *parameters;
626 unsigned char *parameters;
644 unsigned int i;
627 unsigned int i;
645 rtems_id queue_id;
628 rtems_id queue_id;
646
629
647 queue_id = RTEMS_ID_NONE;
630 queue_id = RTEMS_ID_NONE;
648
631
649 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
632 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
650 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
633 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
651 dummy_hk_packet.reserved = DEFAULT_RESERVED;
634 dummy_hk_packet.reserved = DEFAULT_RESERVED;
652 dummy_hk_packet.userApplication = CCSDS_USER_APP;
635 dummy_hk_packet.userApplication = CCSDS_USER_APP;
653 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE);
636 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> SHIFT_1_BYTE);
654 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
637 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
655 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
638 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
656 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
639 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
657 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE);
640 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> SHIFT_1_BYTE);
658 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
641 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
659 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
642 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
660 dummy_hk_packet.serviceType = TM_TYPE_HK;
643 dummy_hk_packet.serviceType = TM_TYPE_HK;
661 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
644 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
662 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
645 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
663 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES);
646 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_3_BYTES);
664 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES);
647 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_2_BYTES);
665 dummy_hk_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE);
648 dummy_hk_packet.time[BYTE_2] = (unsigned char) (time_management_regs->coarse_time >> SHIFT_1_BYTE);
666 dummy_hk_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time);
649 dummy_hk_packet.time[BYTE_3] = (unsigned char) (time_management_regs->coarse_time);
667 dummy_hk_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE);
650 dummy_hk_packet.time[BYTE_4] = (unsigned char) (time_management_regs->fine_time >> SHIFT_1_BYTE);
668 dummy_hk_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time);
651 dummy_hk_packet.time[BYTE_5] = (unsigned char) (time_management_regs->fine_time);
669 dummy_hk_packet.sid = SID_HK;
652 dummy_hk_packet.sid = SID_HK;
670
653
671 // init status word
654 // init status word
672 dummy_hk_packet.lfr_status_word[0] = INT8_ALL_F;
655 dummy_hk_packet.lfr_status_word[0] = INT8_ALL_F;
673 dummy_hk_packet.lfr_status_word[1] = INT8_ALL_F;
656 dummy_hk_packet.lfr_status_word[1] = INT8_ALL_F;
674 // init software version
657 // init software version
675 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
658 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
676 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
659 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
677 dummy_hk_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3;
660 dummy_hk_packet.lfr_sw_version[BYTE_2] = SW_VERSION_N3;
678 dummy_hk_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4;
661 dummy_hk_packet.lfr_sw_version[BYTE_3] = SW_VERSION_N4;
679 // init fpga version
662 // init fpga version
680 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + APB_OFFSET_VHDL_REV);
663 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + APB_OFFSET_VHDL_REV);
681 dummy_hk_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1
664 dummy_hk_packet.lfr_fpga_version[BYTE_0] = parameters[BYTE_1]; // n1
682 dummy_hk_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2
665 dummy_hk_packet.lfr_fpga_version[BYTE_1] = parameters[BYTE_2]; // n2
683 dummy_hk_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3
666 dummy_hk_packet.lfr_fpga_version[BYTE_2] = parameters[BYTE_3]; // n3
684
667
685 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
668 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
686
669
687 for (i=0; i<(BYTE_POS_HK_REACTION_WHEELS_FREQUENCY - BYTE_POS_HK_LFR_CPU_LOAD); i++)
670 for (i=0; i<(BYTE_POS_HK_REACTION_WHEELS_FREQUENCY - BYTE_POS_HK_LFR_CPU_LOAD); i++)
688 {
671 {
689 parameters[i] = INT8_ALL_F;
672 parameters[i] = INT8_ALL_F;
690 }
673 }
691
674
692 get_message_queue_id_send( &queue_id );
675 get_message_queue_id_send( &queue_id );
693
676
694 rtems_message_queue_send( queue_id, &dummy_hk_packet,
677 rtems_message_queue_send( queue_id, &dummy_hk_packet,
695 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
678 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
696 }
679 }
697
680
698 void get_temperatures( unsigned char *temperatures )
681 void get_temperatures( unsigned char *temperatures )
699 {
682 {
700 unsigned char* temp_scm_ptr;
683 unsigned char* temp_scm_ptr;
701 unsigned char* temp_pcb_ptr;
684 unsigned char* temp_pcb_ptr;
702 unsigned char* temp_fpga_ptr;
685 unsigned char* temp_fpga_ptr;
703
686
704 // SEL1 SEL0
687 // SEL1 SEL0
705 // 0 0 => PCB
688 // 0 0 => PCB
706 // 0 1 => FPGA
689 // 0 1 => FPGA
707 // 1 0 => SCM
690 // 1 0 => SCM
708
691
709 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
692 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
710 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
693 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
711 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
694 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
712
695
713 temperatures[ BYTE_0 ] = temp_scm_ptr[ BYTE_2 ];
696 temperatures[ BYTE_0 ] = temp_scm_ptr[ BYTE_2 ];
714 temperatures[ BYTE_1 ] = temp_scm_ptr[ BYTE_3 ];
697 temperatures[ BYTE_1 ] = temp_scm_ptr[ BYTE_3 ];
715 temperatures[ BYTE_2 ] = temp_pcb_ptr[ BYTE_2 ];
698 temperatures[ BYTE_2 ] = temp_pcb_ptr[ BYTE_2 ];
716 temperatures[ BYTE_3 ] = temp_pcb_ptr[ BYTE_3 ];
699 temperatures[ BYTE_3 ] = temp_pcb_ptr[ BYTE_3 ];
717 temperatures[ BYTE_4 ] = temp_fpga_ptr[ BYTE_2 ];
700 temperatures[ BYTE_4 ] = temp_fpga_ptr[ BYTE_2 ];
718 temperatures[ BYTE_5 ] = temp_fpga_ptr[ BYTE_3 ];
701 temperatures[ BYTE_5 ] = temp_fpga_ptr[ BYTE_3 ];
719 }
702 }
720
703
721 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
704 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
722 {
705 {
723 unsigned char* v_ptr;
706 unsigned char* v_ptr;
724 unsigned char* e1_ptr;
707 unsigned char* e1_ptr;
725 unsigned char* e2_ptr;
708 unsigned char* e2_ptr;
726
709
727 v_ptr = (unsigned char *) &hk_lfr_sc_v_f3_as_int16;
710 v_ptr = (unsigned char *) &hk_lfr_sc_v_f3_as_int16;
728 e1_ptr = (unsigned char *) &hk_lfr_sc_e1_f3_as_int16;
711 e1_ptr = (unsigned char *) &hk_lfr_sc_e1_f3_as_int16;
729 e2_ptr = (unsigned char *) &hk_lfr_sc_e2_f3_as_int16;
712 e2_ptr = (unsigned char *) &hk_lfr_sc_e2_f3_as_int16;
730
713
731 spacecraft_potential[BYTE_0] = v_ptr[0];
714 spacecraft_potential[BYTE_0] = v_ptr[0];
732 spacecraft_potential[BYTE_1] = v_ptr[1];
715 spacecraft_potential[BYTE_1] = v_ptr[1];
733 spacecraft_potential[BYTE_2] = e1_ptr[0];
716 spacecraft_potential[BYTE_2] = e1_ptr[0];
734 spacecraft_potential[BYTE_3] = e1_ptr[1];
717 spacecraft_potential[BYTE_3] = e1_ptr[1];
735 spacecraft_potential[BYTE_4] = e2_ptr[0];
718 spacecraft_potential[BYTE_4] = e2_ptr[0];
736 spacecraft_potential[BYTE_5] = e2_ptr[1];
719 spacecraft_potential[BYTE_5] = e2_ptr[1];
737 }
720 }
738
721
739 void get_cpu_load( unsigned char *resource_statistics )
722 void get_cpu_load( unsigned char *resource_statistics )
740 {
723 {
741 unsigned char cpu_load;
724 unsigned char cpu_load;
742
725
743 cpu_load = lfr_rtems_cpu_usage_report();
726 cpu_load = lfr_rtems_cpu_usage_report();
744
727
745 // HK_LFR_CPU_LOAD
728 // HK_LFR_CPU_LOAD
746 resource_statistics[0] = cpu_load;
729 resource_statistics[0] = cpu_load;
747
730
748 // HK_LFR_CPU_LOAD_MAX
731 // HK_LFR_CPU_LOAD_MAX
749 if (cpu_load > resource_statistics[1])
732 if (cpu_load > resource_statistics[1])
750 {
733 {
751 resource_statistics[1] = cpu_load;
734 resource_statistics[1] = cpu_load;
752 }
735 }
753
736
754 // CPU_LOAD_AVE
737 // CPU_LOAD_AVE
755 resource_statistics[BYTE_2] = 0;
738 resource_statistics[BYTE_2] = 0;
756
739
757 #ifndef PRINT_TASK_STATISTICS
740 #ifndef PRINT_TASK_STATISTICS
758 rtems_cpu_usage_reset();
741 rtems_cpu_usage_reset();
759 #endif
742 #endif
760
743
761 }
744 }
762
745
763 void set_hk_lfr_sc_potential_flag( bool state )
746 void set_hk_lfr_sc_potential_flag( bool state )
764 {
747 {
765 if (state == true)
748 if (state == true)
766 {
749 {
767 housekeeping_packet.lfr_status_word[1] =
750 housekeeping_packet.lfr_status_word[1] =
768 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_SC_POTENTIAL_FLAG_BIT; // [0100 0000]
751 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_SC_POTENTIAL_FLAG_BIT; // [0100 0000]
769 }
752 }
770 else
753 else
771 {
754 {
772 housekeeping_packet.lfr_status_word[1] =
755 housekeeping_packet.lfr_status_word[1] =
773 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_SC_POTENTIAL_FLAG_MASK; // [1011 1111]
756 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_SC_POTENTIAL_FLAG_MASK; // [1011 1111]
774 }
757 }
775 }
758 }
776
759
777 void set_sy_lfr_pas_filter_enabled( bool state )
760 void set_sy_lfr_pas_filter_enabled( bool state )
778 {
761 {
779 if (state == true)
762 if (state == true)
780 {
763 {
781 housekeeping_packet.lfr_status_word[1] =
764 housekeeping_packet.lfr_status_word[1] =
782 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_PAS_FILTER_ENABLED_BIT; // [0010 0000]
765 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_PAS_FILTER_ENABLED_BIT; // [0010 0000]
783 }
766 }
784 else
767 else
785 {
768 {
786 housekeeping_packet.lfr_status_word[1] =
769 housekeeping_packet.lfr_status_word[1] =
787 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_PAS_FILTER_ENABLED_MASK; // [1101 1111]
770 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_PAS_FILTER_ENABLED_MASK; // [1101 1111]
788 }
771 }
789 }
772 }
790
773
791 void set_sy_lfr_watchdog_enabled( bool state )
774 void set_sy_lfr_watchdog_enabled( bool state )
792 {
775 {
793 if (state == true)
776 if (state == true)
794 {
777 {
795 housekeeping_packet.lfr_status_word[1] =
778 housekeeping_packet.lfr_status_word[1] =
796 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_WATCHDOG_BIT; // [0001 0000]
779 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_WATCHDOG_BIT; // [0001 0000]
797 }
780 }
798 else
781 else
799 {
782 {
800 housekeeping_packet.lfr_status_word[1] =
783 housekeeping_packet.lfr_status_word[1] =
801 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_WATCHDOG_MASK; // [1110 1111]
784 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_WATCHDOG_MASK; // [1110 1111]
802 }
785 }
803 }
786 }
804
787
805 void set_hk_lfr_calib_enable( bool state )
788 void set_hk_lfr_calib_enable( bool state )
806 {
789 {
807 if (state == true)
790 if (state == true)
808 {
791 {
809 housekeeping_packet.lfr_status_word[1] =
792 housekeeping_packet.lfr_status_word[1] =
810 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_CALIB_BIT; // [0000 1000]
793 housekeeping_packet.lfr_status_word[1] | STATUS_WORD_CALIB_BIT; // [0000 1000]
811 }
794 }
812 else
795 else
813 {
796 {
814 housekeeping_packet.lfr_status_word[1] =
797 housekeeping_packet.lfr_status_word[1] =
815 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_CALIB_MASK; // [1111 0111]
798 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_CALIB_MASK; // [1111 0111]
816 }
799 }
817 }
800 }
818
801
819 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
802 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
820 {
803 {
821 housekeeping_packet.lfr_status_word[1] =
804 housekeeping_packet.lfr_status_word[1] =
822 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_RESET_CAUSE_MASK; // [1111 1000]
805 housekeeping_packet.lfr_status_word[1] & STATUS_WORD_RESET_CAUSE_MASK; // [1111 1000]
823
806
824 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
807 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
825 | (lfr_reset_cause & STATUS_WORD_RESET_CAUSE_BITS ); // [0000 0111]
808 | (lfr_reset_cause & STATUS_WORD_RESET_CAUSE_BITS ); // [0000 0111]
826
809
827 }
810 }
828
811
829 void increment_hk_counter( unsigned char newValue, unsigned char oldValue, unsigned int *counter )
812 void increment_hk_counter( unsigned char newValue, unsigned char oldValue, unsigned int *counter )
830 {
813 {
831 int delta;
814 int delta;
832
815
833 delta = 0;
816 delta = 0;
834
817
835 if (newValue >= oldValue)
818 if (newValue >= oldValue)
836 {
819 {
837 delta = newValue - oldValue;
820 delta = newValue - oldValue;
838 }
821 }
839 else
822 else
840 {
823 {
841 delta = (CONST_256 - oldValue) + newValue;
824 delta = (CONST_256 - oldValue) + newValue;
842 }
825 }
843
826
844 *counter = *counter + delta;
827 *counter = *counter + delta;
845 }
828 }
846
829
847 void hk_lfr_le_update( void )
830 void hk_lfr_le_update( void )
848 {
831 {
849 static hk_lfr_le_t old_hk_lfr_le = {0};
832 static hk_lfr_le_t old_hk_lfr_le = {0};
850 hk_lfr_le_t new_hk_lfr_le;
833 hk_lfr_le_t new_hk_lfr_le;
851 unsigned int counter;
834 unsigned int counter;
852
835
853 counter = (((unsigned int) housekeeping_packet.hk_lfr_le_cnt[0]) * CONST_256) + housekeeping_packet.hk_lfr_le_cnt[1];
836 counter = (((unsigned int) housekeeping_packet.hk_lfr_le_cnt[0]) * CONST_256) + housekeeping_packet.hk_lfr_le_cnt[1];
854
837
855 // DPU
838 // DPU
856 new_hk_lfr_le.dpu_spw_parity = housekeeping_packet.hk_lfr_dpu_spw_parity;
839 new_hk_lfr_le.dpu_spw_parity = housekeeping_packet.hk_lfr_dpu_spw_parity;
857 new_hk_lfr_le.dpu_spw_disconnect= housekeeping_packet.hk_lfr_dpu_spw_disconnect;
840 new_hk_lfr_le.dpu_spw_disconnect= housekeeping_packet.hk_lfr_dpu_spw_disconnect;
858 new_hk_lfr_le.dpu_spw_escape = housekeeping_packet.hk_lfr_dpu_spw_escape;
841 new_hk_lfr_le.dpu_spw_escape = housekeeping_packet.hk_lfr_dpu_spw_escape;
859 new_hk_lfr_le.dpu_spw_credit = housekeeping_packet.hk_lfr_dpu_spw_credit;
842 new_hk_lfr_le.dpu_spw_credit = housekeeping_packet.hk_lfr_dpu_spw_credit;
860 new_hk_lfr_le.dpu_spw_write_sync= housekeeping_packet.hk_lfr_dpu_spw_write_sync;
843 new_hk_lfr_le.dpu_spw_write_sync= housekeeping_packet.hk_lfr_dpu_spw_write_sync;
861 // TIMECODE
844 // TIMECODE
862 new_hk_lfr_le.timecode_erroneous= housekeeping_packet.hk_lfr_timecode_erroneous;
845 new_hk_lfr_le.timecode_erroneous= housekeeping_packet.hk_lfr_timecode_erroneous;
863 new_hk_lfr_le.timecode_missing = housekeeping_packet.hk_lfr_timecode_missing;
846 new_hk_lfr_le.timecode_missing = housekeeping_packet.hk_lfr_timecode_missing;
864 new_hk_lfr_le.timecode_invalid = housekeeping_packet.hk_lfr_timecode_invalid;
847 new_hk_lfr_le.timecode_invalid = housekeeping_packet.hk_lfr_timecode_invalid;
865 // TIME
848 // TIME
866 new_hk_lfr_le.time_timecode_it = housekeeping_packet.hk_lfr_time_timecode_it;
849 new_hk_lfr_le.time_timecode_it = housekeeping_packet.hk_lfr_time_timecode_it;
867 new_hk_lfr_le.time_not_synchro = housekeeping_packet.hk_lfr_time_not_synchro;
850 new_hk_lfr_le.time_not_synchro = housekeeping_packet.hk_lfr_time_not_synchro;
868 new_hk_lfr_le.time_timecode_ctr = housekeeping_packet.hk_lfr_time_timecode_ctr;
851 new_hk_lfr_le.time_timecode_ctr = housekeeping_packet.hk_lfr_time_timecode_ctr;
869 //AHB
852 //AHB
870 new_hk_lfr_le.ahb_correctable = housekeeping_packet.hk_lfr_ahb_correctable;
853 new_hk_lfr_le.ahb_correctable = housekeeping_packet.hk_lfr_ahb_correctable;
871 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
854 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
872 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
855 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
873
856
874 // update the le counter
857 // update the le counter
875 // DPU
858 // DPU
876 increment_hk_counter( new_hk_lfr_le.dpu_spw_parity, old_hk_lfr_le.dpu_spw_parity, &counter );
859 increment_hk_counter( new_hk_lfr_le.dpu_spw_parity, old_hk_lfr_le.dpu_spw_parity, &counter );
877 increment_hk_counter( new_hk_lfr_le.dpu_spw_disconnect,old_hk_lfr_le.dpu_spw_disconnect, &counter );
860 increment_hk_counter( new_hk_lfr_le.dpu_spw_disconnect,old_hk_lfr_le.dpu_spw_disconnect, &counter );
878 increment_hk_counter( new_hk_lfr_le.dpu_spw_escape, old_hk_lfr_le.dpu_spw_escape, &counter );
861 increment_hk_counter( new_hk_lfr_le.dpu_spw_escape, old_hk_lfr_le.dpu_spw_escape, &counter );
879 increment_hk_counter( new_hk_lfr_le.dpu_spw_credit, old_hk_lfr_le.dpu_spw_credit, &counter );
862 increment_hk_counter( new_hk_lfr_le.dpu_spw_credit, old_hk_lfr_le.dpu_spw_credit, &counter );
880 increment_hk_counter( new_hk_lfr_le.dpu_spw_write_sync,old_hk_lfr_le.dpu_spw_write_sync, &counter );
863 increment_hk_counter( new_hk_lfr_le.dpu_spw_write_sync,old_hk_lfr_le.dpu_spw_write_sync, &counter );
881 // TIMECODE
864 // TIMECODE
882 increment_hk_counter( new_hk_lfr_le.timecode_erroneous,old_hk_lfr_le.timecode_erroneous, &counter );
865 increment_hk_counter( new_hk_lfr_le.timecode_erroneous,old_hk_lfr_le.timecode_erroneous, &counter );
883 increment_hk_counter( new_hk_lfr_le.timecode_missing, old_hk_lfr_le.timecode_missing, &counter );
866 increment_hk_counter( new_hk_lfr_le.timecode_missing, old_hk_lfr_le.timecode_missing, &counter );
884 increment_hk_counter( new_hk_lfr_le.timecode_invalid, old_hk_lfr_le.timecode_invalid, &counter );
867 increment_hk_counter( new_hk_lfr_le.timecode_invalid, old_hk_lfr_le.timecode_invalid, &counter );
885 // TIME
868 // TIME
886 increment_hk_counter( new_hk_lfr_le.time_timecode_it, old_hk_lfr_le.time_timecode_it, &counter );
869 increment_hk_counter( new_hk_lfr_le.time_timecode_it, old_hk_lfr_le.time_timecode_it, &counter );
887 increment_hk_counter( new_hk_lfr_le.time_not_synchro, old_hk_lfr_le.time_not_synchro, &counter );
870 increment_hk_counter( new_hk_lfr_le.time_not_synchro, old_hk_lfr_le.time_not_synchro, &counter );
888 increment_hk_counter( new_hk_lfr_le.time_timecode_ctr, old_hk_lfr_le.time_timecode_ctr, &counter );
871 increment_hk_counter( new_hk_lfr_le.time_timecode_ctr, old_hk_lfr_le.time_timecode_ctr, &counter );
889 // AHB
872 // AHB
890 increment_hk_counter( new_hk_lfr_le.ahb_correctable, old_hk_lfr_le.ahb_correctable, &counter );
873 increment_hk_counter( new_hk_lfr_le.ahb_correctable, old_hk_lfr_le.ahb_correctable, &counter );
891
874
892 // DPU
875 // DPU
893 old_hk_lfr_le.dpu_spw_parity = new_hk_lfr_le.dpu_spw_parity;
876 old_hk_lfr_le.dpu_spw_parity = new_hk_lfr_le.dpu_spw_parity;
894 old_hk_lfr_le.dpu_spw_disconnect= new_hk_lfr_le.dpu_spw_disconnect;
877 old_hk_lfr_le.dpu_spw_disconnect= new_hk_lfr_le.dpu_spw_disconnect;
895 old_hk_lfr_le.dpu_spw_escape = new_hk_lfr_le.dpu_spw_escape;
878 old_hk_lfr_le.dpu_spw_escape = new_hk_lfr_le.dpu_spw_escape;
896 old_hk_lfr_le.dpu_spw_credit = new_hk_lfr_le.dpu_spw_credit;
879 old_hk_lfr_le.dpu_spw_credit = new_hk_lfr_le.dpu_spw_credit;
897 old_hk_lfr_le.dpu_spw_write_sync= new_hk_lfr_le.dpu_spw_write_sync;
880 old_hk_lfr_le.dpu_spw_write_sync= new_hk_lfr_le.dpu_spw_write_sync;
898 // TIMECODE
881 // TIMECODE
899 old_hk_lfr_le.timecode_erroneous= new_hk_lfr_le.timecode_erroneous;
882 old_hk_lfr_le.timecode_erroneous= new_hk_lfr_le.timecode_erroneous;
900 old_hk_lfr_le.timecode_missing = new_hk_lfr_le.timecode_missing;
883 old_hk_lfr_le.timecode_missing = new_hk_lfr_le.timecode_missing;
901 old_hk_lfr_le.timecode_invalid = new_hk_lfr_le.timecode_invalid;
884 old_hk_lfr_le.timecode_invalid = new_hk_lfr_le.timecode_invalid;
902 // TIME
885 // TIME
903 old_hk_lfr_le.time_timecode_it = new_hk_lfr_le.time_timecode_it;
886 old_hk_lfr_le.time_timecode_it = new_hk_lfr_le.time_timecode_it;
904 old_hk_lfr_le.time_not_synchro = new_hk_lfr_le.time_not_synchro;
887 old_hk_lfr_le.time_not_synchro = new_hk_lfr_le.time_not_synchro;
905 old_hk_lfr_le.time_timecode_ctr = new_hk_lfr_le.time_timecode_ctr;
888 old_hk_lfr_le.time_timecode_ctr = new_hk_lfr_le.time_timecode_ctr;
906 //AHB
889 //AHB
907 old_hk_lfr_le.ahb_correctable = new_hk_lfr_le.ahb_correctable;
890 old_hk_lfr_le.ahb_correctable = new_hk_lfr_le.ahb_correctable;
908 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
891 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
909 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
892 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
910
893
911 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
894 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
912 // LE
895 // LE
913 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((counter & BYTE0_MASK) >> SHIFT_1_BYTE);
896 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((counter & BYTE0_MASK) >> SHIFT_1_BYTE);
914 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (counter & BYTE1_MASK);
897 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (counter & BYTE1_MASK);
915 }
898 }
916
899
917 void hk_lfr_me_update( void )
900 void hk_lfr_me_update( void )
918 {
901 {
919 static hk_lfr_me_t old_hk_lfr_me = {0};
902 static hk_lfr_me_t old_hk_lfr_me = {0};
920 hk_lfr_me_t new_hk_lfr_me;
903 hk_lfr_me_t new_hk_lfr_me;
921 unsigned int counter;
904 unsigned int counter;
922
905
923 counter = (((unsigned int) housekeeping_packet.hk_lfr_me_cnt[0]) * CONST_256) + housekeeping_packet.hk_lfr_me_cnt[1];
906 counter = (((unsigned int) housekeeping_packet.hk_lfr_me_cnt[0]) * CONST_256) + housekeeping_packet.hk_lfr_me_cnt[1];
924
907
925 // get the current values
908 // get the current values
926 new_hk_lfr_me.dpu_spw_early_eop = housekeeping_packet.hk_lfr_dpu_spw_early_eop;
909 new_hk_lfr_me.dpu_spw_early_eop = housekeeping_packet.hk_lfr_dpu_spw_early_eop;
927 new_hk_lfr_me.dpu_spw_invalid_addr = housekeeping_packet.hk_lfr_dpu_spw_invalid_addr;
910 new_hk_lfr_me.dpu_spw_invalid_addr = housekeeping_packet.hk_lfr_dpu_spw_invalid_addr;
928 new_hk_lfr_me.dpu_spw_eep = housekeeping_packet.hk_lfr_dpu_spw_eep;
911 new_hk_lfr_me.dpu_spw_eep = housekeeping_packet.hk_lfr_dpu_spw_eep;
929 new_hk_lfr_me.dpu_spw_rx_too_big = housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
912 new_hk_lfr_me.dpu_spw_rx_too_big = housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
930
913
931 // update the me counter
914 // update the me counter
932 increment_hk_counter( new_hk_lfr_me.dpu_spw_early_eop, old_hk_lfr_me.dpu_spw_early_eop, &counter );
915 increment_hk_counter( new_hk_lfr_me.dpu_spw_early_eop, old_hk_lfr_me.dpu_spw_early_eop, &counter );
933 increment_hk_counter( new_hk_lfr_me.dpu_spw_invalid_addr, old_hk_lfr_me.dpu_spw_invalid_addr, &counter );
916 increment_hk_counter( new_hk_lfr_me.dpu_spw_invalid_addr, old_hk_lfr_me.dpu_spw_invalid_addr, &counter );
934 increment_hk_counter( new_hk_lfr_me.dpu_spw_eep, old_hk_lfr_me.dpu_spw_eep, &counter );
917 increment_hk_counter( new_hk_lfr_me.dpu_spw_eep, old_hk_lfr_me.dpu_spw_eep, &counter );
935 increment_hk_counter( new_hk_lfr_me.dpu_spw_rx_too_big, old_hk_lfr_me.dpu_spw_rx_too_big, &counter );
918 increment_hk_counter( new_hk_lfr_me.dpu_spw_rx_too_big, old_hk_lfr_me.dpu_spw_rx_too_big, &counter );
936
919
937 // store the counters for the next time
920 // store the counters for the next time
938 old_hk_lfr_me.dpu_spw_early_eop = new_hk_lfr_me.dpu_spw_early_eop;
921 old_hk_lfr_me.dpu_spw_early_eop = new_hk_lfr_me.dpu_spw_early_eop;
939 old_hk_lfr_me.dpu_spw_invalid_addr = new_hk_lfr_me.dpu_spw_invalid_addr;
922 old_hk_lfr_me.dpu_spw_invalid_addr = new_hk_lfr_me.dpu_spw_invalid_addr;
940 old_hk_lfr_me.dpu_spw_eep = new_hk_lfr_me.dpu_spw_eep;
923 old_hk_lfr_me.dpu_spw_eep = new_hk_lfr_me.dpu_spw_eep;
941 old_hk_lfr_me.dpu_spw_rx_too_big = new_hk_lfr_me.dpu_spw_rx_too_big;
924 old_hk_lfr_me.dpu_spw_rx_too_big = new_hk_lfr_me.dpu_spw_rx_too_big;
942
925
943 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
926 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
944 // ME
927 // ME
945 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((counter & BYTE0_MASK) >> SHIFT_1_BYTE);
928 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((counter & BYTE0_MASK) >> SHIFT_1_BYTE);
946 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (counter & BYTE1_MASK);
929 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (counter & BYTE1_MASK);
947 }
930 }
948
931
949 void hk_lfr_le_me_he_update()
932 void hk_lfr_le_me_he_update()
950 {
933 {
951
934
952 unsigned int hk_lfr_he_cnt;
935 unsigned int hk_lfr_he_cnt;
953
936
954 hk_lfr_he_cnt = (((unsigned int) housekeeping_packet.hk_lfr_he_cnt[0]) * 256) + housekeeping_packet.hk_lfr_he_cnt[1];
937 hk_lfr_he_cnt = (((unsigned int) housekeeping_packet.hk_lfr_he_cnt[0]) * 256) + housekeeping_packet.hk_lfr_he_cnt[1];
955
938
956 //update the low severity error counter
939 //update the low severity error counter
957 hk_lfr_le_update( );
940 hk_lfr_le_update( );
958
941
959 //update the medium severity error counter
942 //update the medium severity error counter
960 hk_lfr_me_update();
943 hk_lfr_me_update();
961
944
962 //update the high severity error counter
945 //update the high severity error counter
963 hk_lfr_he_cnt = 0;
946 hk_lfr_he_cnt = 0;
964
947
965 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
948 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
966 // HE
949 // HE
967 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & BYTE0_MASK) >> SHIFT_1_BYTE);
950 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & BYTE0_MASK) >> SHIFT_1_BYTE);
968 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & BYTE1_MASK);
951 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & BYTE1_MASK);
969
952
970 }
953 }
971
954
972 void set_hk_lfr_time_not_synchro()
955 void set_hk_lfr_time_not_synchro()
973 {
956 {
974 static unsigned char synchroLost = 1;
957 static unsigned char synchroLost = 1;
975 int synchronizationBit;
958 int synchronizationBit;
976
959
977 // get the synchronization bit
960 // get the synchronization bit
978 synchronizationBit =
961 synchronizationBit =
979 (time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) >> BIT_SYNCHRONIZATION; // 1000 0000 0000 0000
962 (time_management_regs->coarse_time & VAL_LFR_SYNCHRONIZED) >> BIT_SYNCHRONIZATION; // 1000 0000 0000 0000
980
963
981 switch (synchronizationBit)
964 switch (synchronizationBit)
982 {
965 {
983 case 0:
966 case 0:
984 if (synchroLost == 1)
967 if (synchroLost == 1)
985 {
968 {
986 synchroLost = 0;
969 synchroLost = 0;
987 }
970 }
988 break;
971 break;
989 case 1:
972 case 1:
990 if (synchroLost == 0 )
973 if (synchroLost == 0 )
991 {
974 {
992 synchroLost = 1;
975 synchroLost = 1;
993 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
976 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
994 update_hk_lfr_last_er_fields( RID_LE_LFR_TIME, CODE_NOT_SYNCHRO );
977 update_hk_lfr_last_er_fields( RID_LE_LFR_TIME, CODE_NOT_SYNCHRO );
995 }
978 }
996 break;
979 break;
997 default:
980 default:
998 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
981 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
999 break;
982 break;
1000 }
983 }
1001
984
1002 }
985 }
1003
986
1004 void set_hk_lfr_ahb_correctable() // CRITICITY L
987 void set_hk_lfr_ahb_correctable() // CRITICITY L
1005 {
988 {
1006 /** This function builds the error counter hk_lfr_ahb_correctable using the statistics provided
989 /** This function builds the error counter hk_lfr_ahb_correctable using the statistics provided
1007 * by the Cache Control Register (ASI 2, offset 0) and in the Register Protection Control Register (ASR16) on the
990 * by the Cache Control Register (ASI 2, offset 0) and in the Register Protection Control Register (ASR16) on the
1008 * detected errors in the cache, in the integer unit and in the floating point unit.
991 * detected errors in the cache, in the integer unit and in the floating point unit.
1009 *
992 *
1010 * @param void
993 * @param void
1011 *
994 *
1012 * @return void
995 * @return void
1013 *
996 *
1014 * All errors are summed to set the value of the hk_lfr_ahb_correctable counter.
997 * All errors are summed to set the value of the hk_lfr_ahb_correctable counter.
1015 *
998 *
1016 */
999 */
1017
1000
1018 unsigned int ahb_correctable;
1001 unsigned int ahb_correctable;
1019 unsigned int instructionErrorCounter;
1002 unsigned int instructionErrorCounter;
1020 unsigned int dataErrorCounter;
1003 unsigned int dataErrorCounter;
1021 unsigned int fprfErrorCounter;
1004 unsigned int fprfErrorCounter;
1022 unsigned int iurfErrorCounter;
1005 unsigned int iurfErrorCounter;
1023
1006
1024 instructionErrorCounter = 0;
1007 instructionErrorCounter = 0;
1025 dataErrorCounter = 0;
1008 dataErrorCounter = 0;
1026 fprfErrorCounter = 0;
1009 fprfErrorCounter = 0;
1027 iurfErrorCounter = 0;
1010 iurfErrorCounter = 0;
1028
1011
1029 CCR_getInstructionAndDataErrorCounters( &instructionErrorCounter, &dataErrorCounter);
1012 CCR_getInstructionAndDataErrorCounters( &instructionErrorCounter, &dataErrorCounter);
1030 ASR16_get_FPRF_IURF_ErrorCounters( &fprfErrorCounter, &iurfErrorCounter);
1013 ASR16_get_FPRF_IURF_ErrorCounters( &fprfErrorCounter, &iurfErrorCounter);
1031
1014
1032 ahb_correctable = instructionErrorCounter
1015 ahb_correctable = instructionErrorCounter
1033 + dataErrorCounter
1016 + dataErrorCounter
1034 + fprfErrorCounter
1017 + fprfErrorCounter
1035 + iurfErrorCounter
1018 + iurfErrorCounter
1036 + housekeeping_packet.hk_lfr_ahb_correctable;
1019 + housekeeping_packet.hk_lfr_ahb_correctable;
1037
1020
1038 housekeeping_packet.hk_lfr_ahb_correctable = (unsigned char) (ahb_correctable & INT8_ALL_F); // [1111 1111]
1021 housekeeping_packet.hk_lfr_ahb_correctable = (unsigned char) (ahb_correctable & INT8_ALL_F); // [1111 1111]
1039
1022
1040 }
1023 }
General Comments 0
You need to be logged in to leave comments. Login now