HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/LFR_FSW Commit - r295:16a2669a01ce

commit before going back to 3.1.0.2 for LESIA compilation

paul -

r295:16a2669a01ce R3_plus

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r295:16a2669a01ce

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.hgsubstate +1 -1

@@ -1,2 +1,2
1	3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters	1	3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2	~~c378fa14eadd80b3b873ca7c8f9f387893c07692~~ header/lfr_common_headers	2	1ffa3d630b9ced4a87a362dafb10d9838e9cc0d9 header/lfr_common_headers

FSW-qt/fsw-qt.pro +2 0

             TEMPLATE = app
             # CONFIG += console v8 sim
             # CONFIG options =
             #           verbose
             #           boot_messages
             #           debug_messages
             #           cpu_usage_report
             #           stack_report
             #           vhdl_dev
             #           debug_tch
             #           lpp_dpu_destid      /!\ REMOVE BEFORE DELIVERY TO LESIA /!\
             #           debug_watchdog
             CONFIG += console verbose lpp_dpu_destid cpu_usage_report
             CONFIG -= qt
             include(./sparc.pri)
+            INCLUDEPATH += /opt/rtems-4.10/sparc-rtems/leon3/lib/include
             # flight software version
             SWVERSION=-1-0
             DEFINES += SW_VERSION_N1=3 # major
             DEFINES += SW_VERSION_N2=1 # minor
             DEFINES += SW_VERSION_N3=0 # patch
             DEFINES += SW_VERSION_N4=2 # internal
             # <GCOV>
             #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
             #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
             # </GCOV>
             # <CHANGE BEFORE FLIGHT>
             contains( CONFIG, lpp_dpu_destid ) {
                 DEFINES += LPP_DPU_DESTID
             }
             # </CHANGE BEFORE FLIGHT>
             contains( CONFIG, debug_tch ) {
                 DEFINES += DEBUG_TCH
             }
             DEFINES += MSB_FIRST_TCH
             contains( CONFIG, vhdl_dev ) {
                 DEFINES += VHDL_DEV
             }
             contains( CONFIG, verbose ) {
                 DEFINES += PRINT_MESSAGES_ON_CONSOLE
             }
             contains( CONFIG, debug_messages ) {
                 DEFINES += DEBUG_MESSAGES
             }
             contains( CONFIG, cpu_usage_report ) {
                 DEFINES += PRINT_TASK_STATISTICS
             }
             contains( CONFIG, stack_report ) {
                 DEFINES += PRINT_STACK_REPORT
             }
             contains( CONFIG, boot_messages ) {
                 DEFINES += BOOT_MESSAGES
             }
             contains( CONFIG, debug_watchdog ) {
                 DEFINES += DEBUG_WATCHDOG
             }
             #doxygen.target = doxygen
             #doxygen.commands = doxygen ../doc/Doxyfile
             #QMAKE_EXTRA_TARGETS += doxygen
             TARGET = fsw
             INCLUDEPATH += \
                 $${PWD}/../src \
                 $${PWD}/../header \
                 $${PWD}/../header/lfr_common_headers \
                 $${PWD}/../header/processing \
                 $${PWD}/../LFR_basic-parameters
             SOURCES += \
                 ../src/wf_handler.c \
                 ../src/tc_handler.c \
                 ../src/fsw_misc.c \
                 ../src/fsw_init.c \
                 ../src/fsw_globals.c \
                 ../src/fsw_spacewire.c \
                 ../src/tc_load_dump_parameters.c \
                 ../src/tm_lfr_tc_exe.c \
                 ../src/tc_acceptance.c \
                 ../src/processing/fsw_processing.c \
                 ../src/processing/avf0_prc0.c \
                 ../src/processing/avf1_prc1.c \
                 ../src/processing/avf2_prc2.c \
                 ../src/lfr_cpu_usage_report.c \
                 ../LFR_basic-parameters/basic_parameters.c
             HEADERS += \
                 ../header/wf_handler.h \
                 ../header/tc_handler.h \
                 ../header/grlib_regs.h \
                 ../header/fsw_misc.h \
                 ../header/fsw_init.h \
                 ../header/fsw_spacewire.h \
                 ../header/tc_load_dump_parameters.h \
                 ../header/tm_lfr_tc_exe.h \
                 ../header/tc_acceptance.h \
                 ../header/processing/fsw_processing.h \
                 ../header/processing/avf0_prc0.h \
                 ../header/processing/avf1_prc1.h \
                 ../header/processing/avf2_prc2.h \
                 ../header/fsw_params_wf_handler.h \
                 ../header/lfr_cpu_usage_report.h \
                 ../header/lfr_common_headers/ccsds_types.h \
                 ../header/lfr_common_headers/fsw_params.h \
                 ../header/lfr_common_headers/fsw_params_nb_bytes.h \
                 ../header/lfr_common_headers/fsw_params_processing.h \
                 ../header/lfr_common_headers/tm_byte_positions.h \
                 ../LFR_basic-parameters/basic_parameters.h \
                 ../LFR_basic-parameters/basic_parameters_params.h \
                 ../header/GscMemoryLPP.hpp

FSW-qt/sparc.pri +7 -5

             CONFIG += console
             CONFIG -= qt
             QMAKE_CC=sparc-rtems-gcc
             message(C compiler forced to: $$QMAKE_CC)
             QMAKE_CXX=sparc-rtems-g++
             message(C++ compiler forced to: $$QMAKE_CXX)
             QMAKE_AR=sparc-rtems-ar rcs
             message(Archiver forced to: $$QMAKE_AR)
             QMAKE_LINK=sparc-rtems-g++
             message(Linker forced to: $$QMAKE_LINK)
             QMAKE_LINK_SHLIB=sparc-rtems-g++
             QMAKE_OBJCOPY= sparc-rtems-objcopy
             QMAKE_STRIP=sparc-rtems-strip
             QMAKE_GDB=sparc-rtems-gdb
-            INCLUDEPATH += /opt/rtems-4.10
+            #INCLUDEPATH += /opt/rtems-4.10
+            INCLUDEPATH += /opt/rtems-4.10/sparc-rtems/leon3/lib/include
             QMAKE_CFLAGS_DEBUG= -g
             QMAKE_CFLAGS_RELEASE=""
             QMAKE_CXXFLAGS_DEBUG= -g
             QMAKE_CXXFLAGS_RELEASE=""
             QMAKE_LFLAGS_RELEASE=""
             QMAKE_LFLAGS_DEBUG= -g
             QMAKE_CXXFLAGS_DEPS	=
             QMAKE_CXXFLAGS_WARN_ON	= -Wall
             QMAKE_CXXFLAGS_WARN_OFF	= -w
             QMAKE_CXXFLAGS_RELEASE	=
             QMAKE_CXXFLAGS_DEBUG	=
             QMAKE_CXXFLAGS_YACC	=
             QMAKE_CXXFLAGS_THREAD	=
             QMAKE_CXXFLAGS_RTTI_ON	=
             QMAKE_CXXFLAGS_RTTI_OFF	=
             QMAKE_CXXFLAGS_EXCEPTIONS_ON =
             QMAKE_CXXFLAGS_EXCEPTIONS_OFF =
             QMAKE_CFLAGS_WARN_ON	= -Wall
             QMAKE_CFLAGS_WARN_OFF	= -w
             QMAKE_CFLAGS_RELEASE	=
             QMAKE_CFLAGS_YACC	=
             QMAKE_LFLAGS_EXCEPTIONS_ON =
             QMAKE_LFLAGS_EXCEPTIONS_OFF =
             QMAKE_LFLAGS_RELEASE	= -Xlinker -Map=output.map
             QMAKE_LFLAGS_CONSOLE	=
             QMAKE_LFLAGS_WINDOWS	=
             QMAKE_LFLAGS_DLL        =
             QMAKE_INCDIR_QT         =
             QMAKE_INCDIR            =
             QMAKE_CFLAGS_SHLIB	  =
             QMAKE_CFLAGS_STATIC_LIB	  =
             QMAKE_CXXFLAGS_SHLIB	  =
             QMAKE_CXXFLAGS_STATIC_LIB =
             QMAKE_LIBS=""
             INCLUDEPATH=""
             DEFINES=""
             contains( TEMPLATE, app ) {
                 OBJECTS_DIR=obj
                 DESTDIR=bin
             }
             #QMAKE_CFLAGS_RELEASE    += -O0
             #QMAKE_CFLAGS_DEBUG      += -O0
             #QMAKE_CXXFLAGS_RELEASE  += -O0
             #QMAKE_CXXFLAGS_DEBUG    += -O0
             QMAKE_CFLAGS_RELEASE    += -O3
             QMAKE_CFLAGS_DEBUG      += -O3
             QMAKE_CXXFLAGS_RELEASE  += -O3
             QMAKE_CXXFLAGS_DEBUG    += -O3
-            #QMAKE_CFLAGS_RELEASE+= -O3 -std=c99
+            #QMAKE_CFLAGS_RELEASE    += -O3 -std=c99
-            #QMAKE_CFLAGS_DEBUG+= -O3 -std=c99
+            #QMAKE_CFLAGS_DEBUG      += -O3 -std=c99
-            #QMAKE_CXXFLAGS_RELEASE+= -O3 -std=c99
+            #QMAKE_CXXFLAGS_RELEASE  += -O3 -std=c99
-            #QMAKE_CXXFLAGS_DEBUG+= -O3  -std=c99
+            #QMAKE_CXXFLAGS_DEBUG    += -O3 -std=c99
             contains( TEMPLATE, app ) {
                 grmon.target = grmon
                 grmon.commands = cd $$DESTDIR && C:/opt/grmon-eval-2.0.29b/win32/bin/grmon.exe -uart COM4 -u
                 QMAKE_EXTRA_TARGETS += grmon
             }

header/fsw_misc.h +1 0

             #ifndef FSW_MISC_H_INCLUDED
             #define FSW_MISC_H_INCLUDED
             #include <rtems.h>
             #include <stdio.h>
             #include <grspw.h>
             #include <grlib_regs.h>
             #include "fsw_params.h"
             #include "fsw_spacewire.h"
             #include "lfr_cpu_usage_report.h"
             enum lfr_reset_cause_t{
                 UNKNOWN_CAUSE,
                 POWER_ON,
                 TC_RESET,
                 WATCHDOG,
                 ERROR_RESET,
                 UNEXP_RESET
             };
             extern gptimer_regs_t *gptimer_regs;
             extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
             extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
             #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
             rtems_name name_hk_rate_monotonic;  // name of the HK rate monotonic
             rtems_id HK_id;                     // id of the HK rate monotonic period
             void timer_configure( unsigned char timer, unsigned int clock_divider,
                                 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
             void timer_start( unsigned char timer );
             void timer_stop( unsigned char timer );
             void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
             // WATCHDOG
             rtems_isr watchdog_isr( rtems_vector_number vector );
             void watchdog_configure(void);
             void watchdog_stop(void);
             void watchdog_reload(void);
             void watchdog_start(void);
             // SERIAL LINK
             int send_console_outputs_on_apbuart_port( void );
             int enable_apbuart_transmitter( void );
             void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
             // RTEMS TASKS
             rtems_task load_task( rtems_task_argument argument );
             rtems_task hous_task( rtems_task_argument argument );
             rtems_task dumb_task( rtems_task_argument unused );
             void init_housekeeping_parameters( void );
             void increment_seq_counter(unsigned short *packetSequenceControl);
             void getTime( unsigned char *time);
             unsigned long long int getTimeAsUnsignedLongLongInt( );
             void send_dumb_hk( void );
             void get_temperatures( unsigned char *temperatures );
             void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
             void get_cpu_load( unsigned char *resource_statistics );
             void set_hk_lfr_sc_potential_flag( bool state );
+            void set_sy_lfr_pas_filter_enabled( bool state );
             void set_sy_lfr_watchdog_enabled( bool state );
             void set_hk_lfr_calib_enable( bool state );
             void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
             void hk_lfr_le_me_he_update();
             void set_hk_lfr_time_not_synchro();
             extern int sched_yield( void );
             extern void rtems_cpu_usage_reset();
             extern ring_node *current_ring_node_f3;
             extern ring_node *ring_node_to_send_cwf_f3;
             extern ring_node waveform_ring_f3[];
             extern unsigned short sequenceCounterHK;
             extern unsigned char hk_lfr_q_sd_fifo_size_max;
             extern unsigned char hk_lfr_q_rv_fifo_size_max;
             extern unsigned char hk_lfr_q_p0_fifo_size_max;
             extern unsigned char hk_lfr_q_p1_fifo_size_max;
             extern unsigned char hk_lfr_q_p2_fifo_size_max;
             #endif // FSW_MISC_H_INCLUDED

src/fsw_config.c +20 -10

@@ -1,25 +1,35
1	#include <drvmgr/ambapp_bus.h>	1	#include <drvmgr/ambapp_bus.h>
		2	#include <drvmgr/drvmgr.h>
2		3
3	// GRSPW0 resources	4	// GRSPW0 resources
4	struct drvmgr_key grlib_grspw_0n1_res[] = {	5	struct drvmgr_key grlib_grspw_0n1_res[] =
		6	{
5	{"txBdCnt", KEY_TYPE_INT, {(unsigned int)50}}, // 7 SWF_F0, 7 SWF_F1, 7 SWF_F2, 7 CWF_F3, 7 CWF_F1 ou 7 CWF_F2	7	{"txBdCnt", KEY_TYPE_INT, {(unsigned int)50}}, // 7 SWF_F0, 7 SWF_F1, 7 SWF_F2, 7 CWF_F3, 7 CWF_F1 ou 7 CWF_F2
6	{"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},	8	{"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
7	{"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},	9	{"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},
8	{"txHdrSize", KEY_TYPE_INT, {(unsigned int)34}},	10	{"txHdrSize", KEY_TYPE_INT, {(unsigned int)34}},
9	{"rxPktSize", KEY_TYPE_INT, {(unsigned int)228+4}},	11	{"rxPktSize", KEY_TYPE_INT, {(unsigned int)200}},
10	KEY_EMPTY	12	KEY_EMPTY
11	};	13	};
12		14
13	// If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.	15	// If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.
14		16
15	struct drvmgr_bus_res grlib_drv_resources = {	17	//struct drvmgr_bus_res grlib_drv_resources =
16	.next = NULL,	18	//{
17	.resource = {	19	// .next = NULL,
		20	// .resource = {
		21	// {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
		22	// {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 1, &grlib_grspw_0n1_res[0]},
		23	// RES_EMPTY /* Mark end of resource array */
		24	// }
		25	//};
		26
		27	struct drvmgr_bus_res grlib_drv_resources =
		28	{
		29	NULL,
		30	{
18	{DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},	31	{DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
19	// {DRIVER_AMBAPP_GAISLER_~~APBUART_ID, 0, &grlib_drv_res_apbuart0~~[0]},	32	{DRIVER_AMBAPP_GAISLER_GRSPW_ID, 1, &grlib_grspw_0n1_res[0]},
20	// {DRIVER_AMBAPP_GAISLER_APBUART_ID, 1, &grlib_drv_res_apbuart1[0]},	33	RES_EMPTY /* Mark end of resource array */
21	RES_EMPTY /* Mark end of device resource array */
22	}	34	}
23	};	35	};
24
25

src/fsw_init.c +15 -11

             /** This is the RTEMS initialization module.
              *
              * @file
              * @author P. LEROY
              *
              * This module contains two very different information:
              * - specific instructions to configure the compilation of the RTEMS executive
              * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
              *
              */
             //*************************
             // GPL reminder to be added
             //*************************
             #include <rtems.h>
             /* configuration information */
             #define CONFIGURE_INIT
             #include <bsp.h> /* for device driver prototypes */
             /* configuration information */
             #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
             #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
             #define CONFIGURE_MAXIMUM_TASKS 20
             #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
             #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
             #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
             #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
             #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
             #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
             #define CONFIGURE_MAXIMUM_DRIVERS 16
             #define CONFIGURE_MAXIMUM_PERIODS 5
             #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [link] [spacewire_reset_link]
             #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
             #ifdef PRINT_STACK_REPORT
                 #define CONFIGURE_STACK_CHECKER_ENABLED
             #endif
             #include <rtems/confdefs.h>
             /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
             #ifdef RTEMS_DRVMGR_STARTUP
-                #ifdef LEON3
+            #ifdef LEON3
-                /* Add Timer and UART Driver */
+            /* Add Timer and UART Driver */
-                    #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
-                        #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
+            #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
-                    #endif
+            #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
-                    #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+            #endif
-                        #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
-                    #endif
+            #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
-                #endif
+            #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
-                #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW   /* GRSPW Driver */
+            #endif
-                #include <drvmgr/drvmgr_confdefs.h>
+            #endif
+            #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW   /* GRSPW Driver */
+            #include <drvmgr/drvmgr_confdefs.h>
             #endif
             #include "fsw_init.h"
             #include "fsw_config.c"
             #include "GscMemoryLPP.hpp"
             void initCache()
             {
                 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
                 // These should only be read and written using 32-bit LDA/STA instructions.
                 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
                 // The table below shows the register addresses:
                 //      0x00 Cache control register
                 //      0x04 Reserved
                 //      0x08 Instruction cache configuration register
                 //      0x0C Data cache configuration register
                 // Cache Control Register Leon3 / Leon3FT
                 // 31..30  29   28  27..24  23  22  21  20..19  18  17  16
                 //         RFT  PS  TB      DS  FD  FI  FT          ST  IB
                 // 15  14  13..12  11..10  9..8  7..6  5   4   3..2  1..0
                 // IP  DP  ITE     IDE     DTE   DDE   DF  IF  DCS   ICS
                 unsigned int cacheControlRegister;
                 CCR_resetCacheControlRegister();
                 ASR16_resetRegisterProtectionControlRegister();
                 cacheControlRegister = CCR_getValue();
                 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
                 PRINTF1("(0) ASR16                        = %x\n", *asr16Ptr);
                 CCR_enableInstructionCache();       // ICS bits
                 CCR_enableDataCache();              // DCS bits
                 CCR_enableInstructionBurstFetch();  // IB  bit
                 faultTolerantScheme();
                 cacheControlRegister = CCR_getValue();
                 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
                 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
                 PRINTF("\n");
             }
             rtems_task Init( rtems_task_argument ignored )
             {
                 /** This is the RTEMS INIT taks, it is the first task launched by the system.
                  *
                  * @param unused is the starting argument of the RTEMS task
                  *
                  * The INIT task create and run all other RTEMS tasks.
                  *
                  */
                 //***********
                 // INIT CACHE
                 unsigned char *vhdlVersion;
                 reset_lfr();
                 reset_local_time();
                 rtems_cpu_usage_reset();
                 rtems_status_code status;
                 rtems_status_code status_spw;
                 rtems_isr_entry  old_isr_handler;
                 // UART settings
                 enable_apbuart_transmitter();
                 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
                 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
                 PRINTF("\n\n\n\n\n")
                 initCache();
                 PRINTF("*************************\n")
                 PRINTF("** LFR Flight Software **\n")
                 PRINTF1("** %d.", SW_VERSION_N1)
                 PRINTF1("%d."   , SW_VERSION_N2)
                 PRINTF1("%d."   , SW_VERSION_N3)
                 PRINTF1("%d            **\n", SW_VERSION_N4)
                 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
                 PRINTF("** VHDL                **\n")
                 PRINTF1("** %d.", vhdlVersion[1])
                 PRINTF1("%d."   , vhdlVersion[2])
                 PRINTF1("%d              **\n", vhdlVersion[3])
                 PRINTF("*************************\n")
                 PRINTF("\n\n")
                 init_parameter_dump();
                 init_kcoefficients_dump();
                 init_local_mode_parameters();
                 init_housekeeping_parameters();
                 init_k_coefficients_prc0();
                 init_k_coefficients_prc1();
                 init_k_coefficients_prc2();
                 pa_bia_status_info = 0x00;
                 cp_rpw_sc_rw_f_flags = 0x00;
                 cp_rpw_sc_rw1_f1 = 0.0;
                 cp_rpw_sc_rw1_f2 = 0.0;
                 cp_rpw_sc_rw2_f1 = 0.0;
                 cp_rpw_sc_rw2_f2 = 0.0;
                 cp_rpw_sc_rw3_f1 = 0.0;
                 cp_rpw_sc_rw3_f2 = 0.0;
                 cp_rpw_sc_rw4_f1 = 0.0;
                 cp_rpw_sc_rw4_f2 = 0.0;
                 // initialize filtering parameters
                 filterPar.spare_sy_lfr_pas_filter_enabled   = DEFAULT_SY_LFR_PAS_FILTER_ENABLED;
                 filterPar.sy_lfr_pas_filter_modulus         = DEFAULT_SY_LFR_PAS_FILTER_MODULUS;
                 filterPar.sy_lfr_pas_filter_tbad            = DEFAULT_SY_LFR_PAS_FILTER_TBAD;
                 filterPar.sy_lfr_pas_filter_offset          = DEFAULT_SY_LFR_PAS_FILTER_OFFSET;
                 filterPar.sy_lfr_pas_filter_shift           = DEFAULT_SY_LFR_PAS_FILTER_SHIFT;
                 filterPar.sy_lfr_sc_rw_delta_f              = DEFAULT_SY_LFR_SC_RW_DELTA_F;
                 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE  );
                 // waveform picker initialization
                 WFP_init_rings();
                 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG );    // initialize the waveform rings
                 WFP_reset_current_ring_nodes();
                 reset_waveform_picker_regs();
                 // spectral matrices initialization
                 SM_init_rings();            // initialize spectral matrices rings
                 SM_reset_current_ring_nodes();
                 reset_spectral_matrix_regs();
                 // configure calibration
                 configureCalibration( false );   // true means interleaved mode, false is for normal mode
                 updateLFRCurrentMode( LFR_MODE_STANDBY );
                 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
                 create_names();                             // create all names
                 status = create_timecode_timer();           // create the timer used by timecode_irq_handler
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
                 }
                 status = create_message_queues();           // create message queues
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
                 }
                 status = create_all_tasks();                // create all tasks
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
                 }
                 // **************************
                 // <SPACEWIRE INITIALIZATION>
                 status_spw = spacewire_open_link();     // (1) open the link
                 if ( status_spw != RTEMS_SUCCESSFUL )
                 {
                     PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
                 }
                 if ( status_spw == RTEMS_SUCCESSFUL )   // (2) configure the link
                 {
                     status_spw = spacewire_configure_link( fdSPW );
                     if ( status_spw != RTEMS_SUCCESSFUL )
                     {
                         PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
                     }
                 }
                 if ( status_spw == RTEMS_SUCCESSFUL)    // (3) start the link
                 {
                     status_spw = spacewire_start_link( fdSPW );
                     if (  status_spw != RTEMS_SUCCESSFUL )
                     {
                         PRINTF1("in INIT *** ERR spacewire_start_link code %d\n",  status_spw )
                     }
                 }
                 // </SPACEWIRE INITIALIZATION>
                 // ***************************
                 status = start_all_tasks();     // start all tasks
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
                 }
                 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
                 status = start_recv_send_tasks();
                 if ( status != RTEMS_SUCCESSFUL )
                 {
                     PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n",  status )
                 }
                 // suspend science tasks, they will be restarted later depending on the mode
                 status = suspend_science_tasks();   // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
                 if (status != RTEMS_SUCCESSFUL)
                 {
                     PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
                 }
                 // configure IRQ handling for the waveform picker unit