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ahb_correctable counter handling updated...
paul -
r290:135d1e42c4e1 R3_plus draft
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1 #include <drvmgr/ambapp_bus.h>
1 #include <drvmgr/ambapp_bus.h>
2
2
3 // GRSPW0 resources
3 // GRSPW0 resources
4 struct drvmgr_key grlib_grspw_0n1_res[] = {
4 struct drvmgr_key grlib_grspw_0n1_res[] = {
5 {"txBdCnt", KEY_TYPE_INT, {(unsigned int)50}}, // 7 SWF_F0, 7 SWF_F1, 7 SWF_F2, 7 CWF_F3, 7 CWF_F1 ou 7 CWF_F2
5 {"txBdCnt", KEY_TYPE_INT, {(unsigned int)50}}, // 7 SWF_F0, 7 SWF_F1, 7 SWF_F2, 7 CWF_F3, 7 CWF_F1 ou 7 CWF_F2
6 {"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
6 {"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
7 {"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},
7 {"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},
8 {"txHdrSize", KEY_TYPE_INT, {(unsigned int)34}},
8 {"txHdrSize", KEY_TYPE_INT, {(unsigned int)34}},
9 {"rxPktSize", KEY_TYPE_INT, {(unsigned int)248+4}},
9 {"rxPktSize", KEY_TYPE_INT, {(unsigned int)228+4}},
10 KEY_EMPTY
10 KEY_EMPTY
11 };
11 };
12
12
13 // If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.
13 // If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.
14
14
15 struct drvmgr_bus_res grlib_drv_resources = {
15 struct drvmgr_bus_res grlib_drv_resources = {
16 .next = NULL,
16 .next = NULL,
17 .resource = {
17 .resource = {
18 {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
18 {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
19 // {DRIVER_AMBAPP_GAISLER_APBUART_ID, 0, &grlib_drv_res_apbuart0[0]},
19 // {DRIVER_AMBAPP_GAISLER_APBUART_ID, 0, &grlib_drv_res_apbuart0[0]},
20 // {DRIVER_AMBAPP_GAISLER_APBUART_ID, 1, &grlib_drv_res_apbuart1[0]},
20 // {DRIVER_AMBAPP_GAISLER_APBUART_ID, 1, &grlib_drv_res_apbuart1[0]},
21 RES_EMPTY /* Mark end of device resource array */
21 RES_EMPTY /* Mark end of device resource array */
22 }
22 }
23 };
23 };
24
24
25
25
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@@ -1,792 +1,793
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 {
12 {
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 *
14 *
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 * @param interrupt_level is the interrupt level that the timer drives.
18 * @param interrupt_level is the interrupt level that the timer drives.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 *
20 *
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 *
22 *
23 */
23 */
24
24
25 rtems_status_code status;
25 rtems_status_code status;
26 rtems_isr_entry old_isr_handler;
26 rtems_isr_entry old_isr_handler;
27
27
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29
29
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 if (status!=RTEMS_SUCCESSFUL)
31 if (status!=RTEMS_SUCCESSFUL)
32 {
32 {
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 }
34 }
35
35
36 timer_set_clock_divider( timer, clock_divider);
36 timer_set_clock_divider( timer, clock_divider);
37 }
37 }
38
38
39 void timer_start(unsigned char timer)
39 void timer_start(unsigned char timer)
40 {
40 {
41 /** This function starts a GPTIMER timer.
41 /** This function starts a GPTIMER timer.
42 *
42 *
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 *
45 *
46 */
46 */
47
47
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 }
53 }
54
54
55 void timer_stop(unsigned char timer)
55 void timer_stop(unsigned char timer)
56 {
56 {
57 /** This function stops a GPTIMER timer.
57 /** This function stops a GPTIMER timer.
58 *
58 *
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 *
61 *
62 */
62 */
63
63
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 }
67 }
68
68
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
70 {
70 {
71 /** This function sets the clock divider of a GPTIMER timer.
71 /** This function sets the clock divider of a GPTIMER timer.
72 *
72 *
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 *
76 *
77 */
77 */
78
78
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 }
80 }
81
81
82 // WATCHDOG
82 // WATCHDOG
83
83
84 rtems_isr watchdog_isr( rtems_vector_number vector )
84 rtems_isr watchdog_isr( rtems_vector_number vector )
85 {
85 {
86 rtems_status_code status_code;
86 rtems_status_code status_code;
87
87
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
89
89
90 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
90 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
91
91
92 exit(0);
92 exit(0);
93 }
93 }
94
94
95 void watchdog_configure(void)
95 void watchdog_configure(void)
96 {
96 {
97 /** This function configure the watchdog.
97 /** This function configure the watchdog.
98 *
98 *
99 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
99 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
100 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
100 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
101 *
101 *
102 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
102 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
103 *
103 *
104 */
104 */
105
105
106 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
106 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
107
107
108 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
108 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
109
109
110 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
110 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
111 }
111 }
112
112
113 void watchdog_stop(void)
113 void watchdog_stop(void)
114 {
114 {
115 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
115 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
116 timer_stop( TIMER_WATCHDOG );
116 timer_stop( TIMER_WATCHDOG );
117 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
117 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
118 }
118 }
119
119
120 void watchdog_reload(void)
120 void watchdog_reload(void)
121 {
121 {
122 /** This function reloads the watchdog timer counter with the timer reload value.
122 /** This function reloads the watchdog timer counter with the timer reload value.
123 *
123 *
124 * @param void
124 * @param void
125 *
125 *
126 * @return void
126 * @return void
127 *
127 *
128 */
128 */
129
129
130 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
130 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
131 }
131 }
132
132
133 void watchdog_start(void)
133 void watchdog_start(void)
134 {
134 {
135 /** This function starts the watchdog timer.
135 /** This function starts the watchdog timer.
136 *
136 *
137 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
137 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
138 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
138 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
139 *
139 *
140 */
140 */
141
141
142 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
142 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
143
143
144 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
144 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
145 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
145 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
146 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
146 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
147 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
147 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
148
148
149 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
149 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
150
150
151 }
151 }
152
152
153 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
153 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
154 {
154 {
155 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
155 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
156
156
157 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
157 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
158
158
159 return 0;
159 return 0;
160 }
160 }
161
161
162 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
162 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
163 {
163 {
164 /** This function sets the scaler reload register of the apbuart module
164 /** This function sets the scaler reload register of the apbuart module
165 *
165 *
166 * @param regs is the address of the apbuart registers in memory
166 * @param regs is the address of the apbuart registers in memory
167 * @param value is the value that will be stored in the scaler register
167 * @param value is the value that will be stored in the scaler register
168 *
168 *
169 * The value shall be set by the software to get data on the serial interface.
169 * The value shall be set by the software to get data on the serial interface.
170 *
170 *
171 */
171 */
172
172
173 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
173 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
174
174
175 apbuart_regs->scaler = value;
175 apbuart_regs->scaler = value;
176
176
177 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
177 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
178 }
178 }
179
179
180 //************
180 //************
181 // RTEMS TASKS
181 // RTEMS TASKS
182
182
183 rtems_task load_task(rtems_task_argument argument)
183 rtems_task load_task(rtems_task_argument argument)
184 {
184 {
185 BOOT_PRINTF("in LOAD *** \n")
185 BOOT_PRINTF("in LOAD *** \n")
186
186
187 rtems_status_code status;
187 rtems_status_code status;
188 unsigned int i;
188 unsigned int i;
189 unsigned int j;
189 unsigned int j;
190 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
190 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
191 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
191 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
192
192
193 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
193 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
194
194
195 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
195 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
196 if( status != RTEMS_SUCCESSFUL ) {
196 if( status != RTEMS_SUCCESSFUL ) {
197 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
197 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
198 }
198 }
199
199
200 i = 0;
200 i = 0;
201 j = 0;
201 j = 0;
202
202
203 watchdog_configure();
203 watchdog_configure();
204
204
205 watchdog_start();
205 watchdog_start();
206
206
207 set_sy_lfr_watchdog_enabled( true );
207 set_sy_lfr_watchdog_enabled( true );
208
208
209 while(1){
209 while(1){
210 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
210 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
211 watchdog_reload();
211 watchdog_reload();
212 i = i + 1;
212 i = i + 1;
213 if ( i == 10 )
213 if ( i == 10 )
214 {
214 {
215 i = 0;
215 i = 0;
216 j = j + 1;
216 j = j + 1;
217 PRINTF1("%d\n", j)
217 PRINTF1("%d\n", j)
218 }
218 }
219 #ifdef DEBUG_WATCHDOG
219 #ifdef DEBUG_WATCHDOG
220 if (j == 3 )
220 if (j == 3 )
221 {
221 {
222 status = rtems_task_delete(RTEMS_SELF);
222 status = rtems_task_delete(RTEMS_SELF);
223 }
223 }
224 #endif
224 #endif
225 }
225 }
226 }
226 }
227
227
228 rtems_task hous_task(rtems_task_argument argument)
228 rtems_task hous_task(rtems_task_argument argument)
229 {
229 {
230 rtems_status_code status;
230 rtems_status_code status;
231 rtems_status_code spare_status;
231 rtems_status_code spare_status;
232 rtems_id queue_id;
232 rtems_id queue_id;
233 rtems_rate_monotonic_period_status period_status;
233 rtems_rate_monotonic_period_status period_status;
234
234
235 status = get_message_queue_id_send( &queue_id );
235 status = get_message_queue_id_send( &queue_id );
236 if (status != RTEMS_SUCCESSFUL)
236 if (status != RTEMS_SUCCESSFUL)
237 {
237 {
238 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
238 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
239 }
239 }
240
240
241 BOOT_PRINTF("in HOUS ***\n");
241 BOOT_PRINTF("in HOUS ***\n");
242
242
243 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
243 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
244 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
244 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
245 if( status != RTEMS_SUCCESSFUL ) {
245 if( status != RTEMS_SUCCESSFUL ) {
246 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
246 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
247 }
247 }
248 }
248 }
249
249
250 status = rtems_rate_monotonic_cancel(HK_id);
250 status = rtems_rate_monotonic_cancel(HK_id);
251 if( status != RTEMS_SUCCESSFUL ) {
251 if( status != RTEMS_SUCCESSFUL ) {
252 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
252 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
253 }
253 }
254 else {
254 else {
255 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
255 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
256 }
256 }
257
257
258 // startup phase
258 // startup phase
259 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
259 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
260 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
260 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
261 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
261 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
262 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
262 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
263 {
263 {
264 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
264 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
265 {
265 {
266 break; // break if LFR is synchronized
266 break; // break if LFR is synchronized
267 }
267 }
268 else
268 else
269 {
269 {
270 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
270 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
271 // sched_yield();
271 // sched_yield();
272 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
272 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
273 }
273 }
274 }
274 }
275 status = rtems_rate_monotonic_cancel(HK_id);
275 status = rtems_rate_monotonic_cancel(HK_id);
276 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
276 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
277
277
278 set_hk_lfr_reset_cause( POWER_ON );
278 set_hk_lfr_reset_cause( POWER_ON );
279
279
280 while(1){ // launch the rate monotonic task
280 while(1){ // launch the rate monotonic task
281 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
281 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
282 if ( status != RTEMS_SUCCESSFUL ) {
282 if ( status != RTEMS_SUCCESSFUL ) {
283 PRINTF1( "in HOUS *** ERR period: %d\n", status);
283 PRINTF1( "in HOUS *** ERR period: %d\n", status);
284 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
284 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
285 }
285 }
286 else {
286 else {
287 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
287 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
288 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
288 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
289 increment_seq_counter( &sequenceCounterHK );
289 increment_seq_counter( &sequenceCounterHK );
290
290
291 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
291 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
292 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
292 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
293 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
293 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
294 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
294 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
295 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
295 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
296 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
296 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
297
297
298 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
298 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
299
299
300 spacewire_read_statistics();
300 spacewire_read_statistics();
301
301
302 update_hk_with_grspw_stats();
302 update_hk_with_grspw_stats();
303
303
304 set_hk_lfr_time_not_synchro();
304 set_hk_lfr_time_not_synchro();
305
305
306 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
306 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
308 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
308 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
309 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
309 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
310 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
310 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
311
311
312 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
312 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
313 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
313 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
314 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
314 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
315 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
315 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
316 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
316 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
317
317
318 hk_lfr_le_me_he_update();
318 hk_lfr_le_me_he_update();
319
319
320 housekeeping_packet.hk_lfr_sc_rw_f_flags = cp_rpw_sc_rw_f_flags;
320 housekeeping_packet.hk_lfr_sc_rw_f_flags = cp_rpw_sc_rw_f_flags;
321
321
322 // SEND PACKET
322 // SEND PACKET
323 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
323 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
324 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
324 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
325 if (status != RTEMS_SUCCESSFUL) {
325 if (status != RTEMS_SUCCESSFUL) {
326 PRINTF1("in HOUS *** ERR send: %d\n", status)
326 PRINTF1("in HOUS *** ERR send: %d\n", status)
327 }
327 }
328 }
328 }
329 }
329 }
330
330
331 PRINTF("in HOUS *** deleting task\n")
331 PRINTF("in HOUS *** deleting task\n")
332
332
333 status = rtems_task_delete( RTEMS_SELF ); // should not return
333 status = rtems_task_delete( RTEMS_SELF ); // should not return
334
334
335 return;
335 return;
336 }
336 }
337
337
338 rtems_task dumb_task( rtems_task_argument unused )
338 rtems_task dumb_task( rtems_task_argument unused )
339 {
339 {
340 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
340 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
341 *
341 *
342 * @param unused is the starting argument of the RTEMS task
342 * @param unused is the starting argument of the RTEMS task
343 *
343 *
344 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
344 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
345 *
345 *
346 */
346 */
347
347
348 unsigned int i;
348 unsigned int i;
349 unsigned int intEventOut;
349 unsigned int intEventOut;
350 unsigned int coarse_time = 0;
350 unsigned int coarse_time = 0;
351 unsigned int fine_time = 0;
351 unsigned int fine_time = 0;
352 rtems_event_set event_out;
352 rtems_event_set event_out;
353
353
354 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
354 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
355 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
355 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
356 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
356 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
357 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
357 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
358 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
358 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
359 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
359 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
360 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
360 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
361 "ready for dump", // RTEMS_EVENT_7
361 "ready for dump", // RTEMS_EVENT_7
362 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
362 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
363 "tick", // RTEMS_EVENT_9
363 "tick", // RTEMS_EVENT_9
364 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
364 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
365 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
365 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
366 "WATCHDOG timer", // RTEMS_EVENT_12
366 "WATCHDOG timer", // RTEMS_EVENT_12
367 "TIMECODE timer", // RTEMS_EVENT_13
367 "TIMECODE timer", // RTEMS_EVENT_13
368 "TIMECODE ISR" // RTEMS_EVENT_14
368 "TIMECODE ISR" // RTEMS_EVENT_14
369 };
369 };
370
370
371 BOOT_PRINTF("in DUMB *** \n")
371 BOOT_PRINTF("in DUMB *** \n")
372
372
373 while(1){
373 while(1){
374 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
374 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
375 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
375 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
376 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
376 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
377 | RTEMS_EVENT_14,
377 | RTEMS_EVENT_14,
378 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
378 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
379 intEventOut = (unsigned int) event_out;
379 intEventOut = (unsigned int) event_out;
380 for ( i=0; i<32; i++)
380 for ( i=0; i<32; i++)
381 {
381 {
382 if ( ((intEventOut >> i) & 0x0001) != 0)
382 if ( ((intEventOut >> i) & 0x0001) != 0)
383 {
383 {
384 coarse_time = time_management_regs->coarse_time;
384 coarse_time = time_management_regs->coarse_time;
385 fine_time = time_management_regs->fine_time;
385 fine_time = time_management_regs->fine_time;
386 if (i==12)
386 if (i==12)
387 {
387 {
388 PRINTF1("%s\n", DumbMessages[12])
388 PRINTF1("%s\n", DumbMessages[12])
389 }
389 }
390 if (i==13)
390 if (i==13)
391 {
391 {
392 PRINTF1("%s\n", DumbMessages[13])
392 PRINTF1("%s\n", DumbMessages[13])
393 }
393 }
394 if (i==14)
394 if (i==14)
395 {
395 {
396 PRINTF1("%s\n", DumbMessages[1])
396 PRINTF1("%s\n", DumbMessages[1])
397 }
397 }
398 }
398 }
399 }
399 }
400 }
400 }
401 }
401 }
402
402
403 //*****************************
403 //*****************************
404 // init housekeeping parameters
404 // init housekeeping parameters
405
405
406 void init_housekeeping_parameters( void )
406 void init_housekeeping_parameters( void )
407 {
407 {
408 /** This function initialize the housekeeping_packet global variable with default values.
408 /** This function initialize the housekeeping_packet global variable with default values.
409 *
409 *
410 */
410 */
411
411
412 unsigned int i = 0;
412 unsigned int i = 0;
413 unsigned char *parameters;
413 unsigned char *parameters;
414 unsigned char sizeOfHK;
414 unsigned char sizeOfHK;
415
415
416 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
416 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
417
417
418 parameters = (unsigned char*) &housekeeping_packet;
418 parameters = (unsigned char*) &housekeeping_packet;
419
419
420 for(i = 0; i< sizeOfHK; i++)
420 for(i = 0; i< sizeOfHK; i++)
421 {
421 {
422 parameters[i] = 0x00;
422 parameters[i] = 0x00;
423 }
423 }
424
424
425 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
425 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
426 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
426 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
427 housekeeping_packet.reserved = DEFAULT_RESERVED;
427 housekeeping_packet.reserved = DEFAULT_RESERVED;
428 housekeeping_packet.userApplication = CCSDS_USER_APP;
428 housekeeping_packet.userApplication = CCSDS_USER_APP;
429 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
429 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
430 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
430 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
431 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
431 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
432 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
432 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
433 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
433 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
434 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
434 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
435 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
435 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
436 housekeeping_packet.serviceType = TM_TYPE_HK;
436 housekeeping_packet.serviceType = TM_TYPE_HK;
437 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
437 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
438 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
438 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
439 housekeeping_packet.sid = SID_HK;
439 housekeeping_packet.sid = SID_HK;
440
440
441 // init status word
441 // init status word
442 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
442 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
443 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
443 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
444 // init software version
444 // init software version
445 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
445 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
446 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
446 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
447 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
447 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
448 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
448 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
449 // init fpga version
449 // init fpga version
450 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
450 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
451 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
451 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
452 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
452 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
453 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
453 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
454
454
455 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
455 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
456 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
456 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
457 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
457 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
458 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
458 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
459 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
459 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
460 }
460 }
461
461
462 void increment_seq_counter( unsigned short *packetSequenceControl )
462 void increment_seq_counter( unsigned short *packetSequenceControl )
463 {
463 {
464 /** This function increment the sequence counter passes in argument.
464 /** This function increment the sequence counter passes in argument.
465 *
465 *
466 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
466 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
467 *
467 *
468 */
468 */
469
469
470 unsigned short segmentation_grouping_flag;
470 unsigned short segmentation_grouping_flag;
471 unsigned short sequence_cnt;
471 unsigned short sequence_cnt;
472
472
473 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
473 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
474 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
474 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
475
475
476 if ( sequence_cnt < SEQ_CNT_MAX)
476 if ( sequence_cnt < SEQ_CNT_MAX)
477 {
477 {
478 sequence_cnt = sequence_cnt + 1;
478 sequence_cnt = sequence_cnt + 1;
479 }
479 }
480 else
480 else
481 {
481 {
482 sequence_cnt = 0;
482 sequence_cnt = 0;
483 }
483 }
484
484
485 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
485 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
486 }
486 }
487
487
488 void getTime( unsigned char *time)
488 void getTime( unsigned char *time)
489 {
489 {
490 /** This function write the current local time in the time buffer passed in argument.
490 /** This function write the current local time in the time buffer passed in argument.
491 *
491 *
492 */
492 */
493
493
494 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
494 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
495 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
495 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
496 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
496 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
497 time[3] = (unsigned char) (time_management_regs->coarse_time);
497 time[3] = (unsigned char) (time_management_regs->coarse_time);
498 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
498 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
499 time[5] = (unsigned char) (time_management_regs->fine_time);
499 time[5] = (unsigned char) (time_management_regs->fine_time);
500 }
500 }
501
501
502 unsigned long long int getTimeAsUnsignedLongLongInt( )
502 unsigned long long int getTimeAsUnsignedLongLongInt( )
503 {
503 {
504 /** This function write the current local time in the time buffer passed in argument.
504 /** This function write the current local time in the time buffer passed in argument.
505 *
505 *
506 */
506 */
507 unsigned long long int time;
507 unsigned long long int time;
508
508
509 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
509 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
510 + time_management_regs->fine_time;
510 + time_management_regs->fine_time;
511
511
512 return time;
512 return time;
513 }
513 }
514
514
515 void send_dumb_hk( void )
515 void send_dumb_hk( void )
516 {
516 {
517 Packet_TM_LFR_HK_t dummy_hk_packet;
517 Packet_TM_LFR_HK_t dummy_hk_packet;
518 unsigned char *parameters;
518 unsigned char *parameters;
519 unsigned int i;
519 unsigned int i;
520 rtems_id queue_id;
520 rtems_id queue_id;
521
521
522 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
522 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
523 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
523 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
524 dummy_hk_packet.reserved = DEFAULT_RESERVED;
524 dummy_hk_packet.reserved = DEFAULT_RESERVED;
525 dummy_hk_packet.userApplication = CCSDS_USER_APP;
525 dummy_hk_packet.userApplication = CCSDS_USER_APP;
526 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
526 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
527 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
527 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
528 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
528 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
529 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
529 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
530 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
530 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
531 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
531 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
532 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
532 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
533 dummy_hk_packet.serviceType = TM_TYPE_HK;
533 dummy_hk_packet.serviceType = TM_TYPE_HK;
534 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
534 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
535 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
535 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
536 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
536 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
537 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
537 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
538 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
538 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
539 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
539 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
540 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
540 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
541 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
541 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
542 dummy_hk_packet.sid = SID_HK;
542 dummy_hk_packet.sid = SID_HK;
543
543
544 // init status word
544 // init status word
545 dummy_hk_packet.lfr_status_word[0] = 0xff;
545 dummy_hk_packet.lfr_status_word[0] = 0xff;
546 dummy_hk_packet.lfr_status_word[1] = 0xff;
546 dummy_hk_packet.lfr_status_word[1] = 0xff;
547 // init software version
547 // init software version
548 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
548 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
549 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
549 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
550 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
550 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
551 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
551 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
552 // init fpga version
552 // init fpga version
553 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
553 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
554 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
554 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
555 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
555 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
556 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
556 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
557
557
558 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
558 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
559
559
560 for (i=0; i<100; i++)
560 for (i=0; i<100; i++)
561 {
561 {
562 parameters[i] = 0xff;
562 parameters[i] = 0xff;
563 }
563 }
564
564
565 get_message_queue_id_send( &queue_id );
565 get_message_queue_id_send( &queue_id );
566
566
567 rtems_message_queue_send( queue_id, &dummy_hk_packet,
567 rtems_message_queue_send( queue_id, &dummy_hk_packet,
568 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
568 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
569 }
569 }
570
570
571 void get_temperatures( unsigned char *temperatures )
571 void get_temperatures( unsigned char *temperatures )
572 {
572 {
573 unsigned char* temp_scm_ptr;
573 unsigned char* temp_scm_ptr;
574 unsigned char* temp_pcb_ptr;
574 unsigned char* temp_pcb_ptr;
575 unsigned char* temp_fpga_ptr;
575 unsigned char* temp_fpga_ptr;
576
576
577 // SEL1 SEL0
577 // SEL1 SEL0
578 // 0 0 => PCB
578 // 0 0 => PCB
579 // 0 1 => FPGA
579 // 0 1 => FPGA
580 // 1 0 => SCM
580 // 1 0 => SCM
581
581
582 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
582 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
583 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
583 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
584 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
584 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
585
585
586 temperatures[0] = temp_scm_ptr[2];
586 temperatures[0] = temp_scm_ptr[2];
587 temperatures[1] = temp_scm_ptr[3];
587 temperatures[1] = temp_scm_ptr[3];
588 temperatures[2] = temp_pcb_ptr[2];
588 temperatures[2] = temp_pcb_ptr[2];
589 temperatures[3] = temp_pcb_ptr[3];
589 temperatures[3] = temp_pcb_ptr[3];
590 temperatures[4] = temp_fpga_ptr[2];
590 temperatures[4] = temp_fpga_ptr[2];
591 temperatures[5] = temp_fpga_ptr[3];
591 temperatures[5] = temp_fpga_ptr[3];
592 }
592 }
593
593
594 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
594 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
595 {
595 {
596 unsigned char* v_ptr;
596 unsigned char* v_ptr;
597 unsigned char* e1_ptr;
597 unsigned char* e1_ptr;
598 unsigned char* e2_ptr;
598 unsigned char* e2_ptr;
599
599
600 v_ptr = (unsigned char *) &waveform_picker_regs->v;
600 v_ptr = (unsigned char *) &waveform_picker_regs->v;
601 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
601 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
602 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
602 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
603
603
604 spacecraft_potential[0] = v_ptr[2];
604 spacecraft_potential[0] = v_ptr[2];
605 spacecraft_potential[1] = v_ptr[3];
605 spacecraft_potential[1] = v_ptr[3];
606 spacecraft_potential[2] = e1_ptr[2];
606 spacecraft_potential[2] = e1_ptr[2];
607 spacecraft_potential[3] = e1_ptr[3];
607 spacecraft_potential[3] = e1_ptr[3];
608 spacecraft_potential[4] = e2_ptr[2];
608 spacecraft_potential[4] = e2_ptr[2];
609 spacecraft_potential[5] = e2_ptr[3];
609 spacecraft_potential[5] = e2_ptr[3];
610 }
610 }
611
611
612 void get_cpu_load( unsigned char *resource_statistics )
612 void get_cpu_load( unsigned char *resource_statistics )
613 {
613 {
614 unsigned char cpu_load;
614 unsigned char cpu_load;
615
615
616 cpu_load = lfr_rtems_cpu_usage_report();
616 cpu_load = lfr_rtems_cpu_usage_report();
617
617
618 // HK_LFR_CPU_LOAD
618 // HK_LFR_CPU_LOAD
619 resource_statistics[0] = cpu_load;
619 resource_statistics[0] = cpu_load;
620
620
621 // HK_LFR_CPU_LOAD_MAX
621 // HK_LFR_CPU_LOAD_MAX
622 if (cpu_load > resource_statistics[1])
622 if (cpu_load > resource_statistics[1])
623 {
623 {
624 resource_statistics[1] = cpu_load;
624 resource_statistics[1] = cpu_load;
625 }
625 }
626
626
627 // CPU_LOAD_AVE
627 // CPU_LOAD_AVE
628 resource_statistics[2] = 0;
628 resource_statistics[2] = 0;
629
629
630 #ifndef PRINT_TASK_STATISTICS
630 #ifndef PRINT_TASK_STATISTICS
631 rtems_cpu_usage_reset();
631 rtems_cpu_usage_reset();
632 #endif
632 #endif
633
633
634 }
634 }
635
635
636 void set_hk_lfr_sc_potential_flag( bool state )
636 void set_hk_lfr_sc_potential_flag( bool state )
637 {
637 {
638 if (state == true)
638 if (state == true)
639 {
639 {
640 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000]
640 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000]
641 }
641 }
642 else
642 else
643 {
643 {
644 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111]
644 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111]
645 }
645 }
646 }
646 }
647
647
648 void set_sy_lfr_watchdog_enabled( bool state )
648 void set_sy_lfr_watchdog_enabled( bool state )
649 {
649 {
650 if (state == true)
650 if (state == true)
651 {
651 {
652 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x10; // [0001 0000]
652 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x10; // [0001 0000]
653 }
653 }
654 else
654 else
655 {
655 {
656 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xef; // [1110 1111]
656 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xef; // [1110 1111]
657 }
657 }
658 }
658 }
659
659
660 void set_hk_lfr_calib_enable( bool state )
660 void set_hk_lfr_calib_enable( bool state )
661 {
661 {
662 if (state == true)
662 if (state == true)
663 {
663 {
664 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000]
664 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000]
665 }
665 }
666 else
666 else
667 {
667 {
668 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111]
668 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111]
669 }
669 }
670 }
670 }
671
671
672 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
672 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
673 {
673 {
674 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf8; // [1111 1000]
674 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf8; // [1111 1000]
675
675
676 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
676 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
677 | (lfr_reset_cause & 0x07 ); // [0000 0111]
677 | (lfr_reset_cause & 0x07 ); // [0000 0111]
678
678
679 }
679 }
680
680
681 void hk_lfr_le_me_he_update()
681 void hk_lfr_le_me_he_update()
682 {
682 {
683 unsigned int hk_lfr_le_cnt;
683 unsigned int hk_lfr_le_cnt;
684 unsigned int hk_lfr_me_cnt;
684 unsigned int hk_lfr_me_cnt;
685 unsigned int hk_lfr_he_cnt;
685 unsigned int hk_lfr_he_cnt;
686
686
687 hk_lfr_le_cnt = 0;
687 hk_lfr_le_cnt = 0;
688 hk_lfr_me_cnt = 0;
688 hk_lfr_me_cnt = 0;
689 hk_lfr_he_cnt = 0;
689 hk_lfr_he_cnt = 0;
690
690
691 //update the low severity error counter
691 //update the low severity error counter
692 hk_lfr_le_cnt =
692 hk_lfr_le_cnt =
693 housekeeping_packet.hk_lfr_dpu_spw_parity
693 housekeeping_packet.hk_lfr_dpu_spw_parity
694 + housekeeping_packet.hk_lfr_dpu_spw_disconnect
694 + housekeeping_packet.hk_lfr_dpu_spw_disconnect
695 + housekeeping_packet.hk_lfr_dpu_spw_escape
695 + housekeeping_packet.hk_lfr_dpu_spw_escape
696 + housekeeping_packet.hk_lfr_dpu_spw_credit
696 + housekeeping_packet.hk_lfr_dpu_spw_credit
697 + housekeeping_packet.hk_lfr_dpu_spw_write_sync
697 + housekeeping_packet.hk_lfr_dpu_spw_write_sync
698 + housekeeping_packet.hk_lfr_timecode_erroneous
698 + housekeeping_packet.hk_lfr_timecode_erroneous
699 + housekeeping_packet.hk_lfr_timecode_missing
699 + housekeeping_packet.hk_lfr_timecode_missing
700 + housekeeping_packet.hk_lfr_timecode_invalid
700 + housekeeping_packet.hk_lfr_timecode_invalid
701 + housekeeping_packet.hk_lfr_time_timecode_it
701 + housekeeping_packet.hk_lfr_time_timecode_it
702 + housekeeping_packet.hk_lfr_time_not_synchro
702 + housekeeping_packet.hk_lfr_time_not_synchro
703 + housekeeping_packet.hk_lfr_time_timecode_ctr;
703 + housekeeping_packet.hk_lfr_time_timecode_ctr
704 + housekeeping_packet.hk_lfr_ahb_correctable;
704 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
705 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
705 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
706 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
706
707
707 //update the medium severity error counter
708 //update the medium severity error counter
708 hk_lfr_me_cnt =
709 hk_lfr_me_cnt =
709 housekeeping_packet.hk_lfr_dpu_spw_early_eop
710 housekeeping_packet.hk_lfr_dpu_spw_early_eop
710 + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr
711 + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr
711 + housekeeping_packet.hk_lfr_dpu_spw_eep
712 + housekeeping_packet.hk_lfr_dpu_spw_eep
712 + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
713 + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
713
714
714 //update the high severity error counter
715 //update the high severity error counter
715 hk_lfr_he_cnt = 0;
716 hk_lfr_he_cnt = 0;
716
717
717 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
718 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
718 // LE
719 // LE
719 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8);
720 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8);
720 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff);
721 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff);
721 // ME
722 // ME
722 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8);
723 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8);
723 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff);
724 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff);
724 // HE
725 // HE
725 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8);
726 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8);
726 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff);
727 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff);
727
728
728 }
729 }
729
730
730 void set_hk_lfr_time_not_synchro()
731 void set_hk_lfr_time_not_synchro()
731 {
732 {
732 static unsigned char synchroLost = 1;
733 static unsigned char synchroLost = 1;
733 int synchronizationBit;
734 int synchronizationBit;
734
735
735 // get the synchronization bit
736 // get the synchronization bit
736 synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000
737 synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000
737
738
738 switch (synchronizationBit)
739 switch (synchronizationBit)
739 {
740 {
740 case 0:
741 case 0:
741 if (synchroLost == 1)
742 if (synchroLost == 1)
742 {
743 {
743 synchroLost = 0;
744 synchroLost = 0;
744 }
745 }
745 break;
746 break;
746 case 1:
747 case 1:
747 if (synchroLost == 0 )
748 if (synchroLost == 0 )
748 {
749 {
749 synchroLost = 1;
750 synchroLost = 1;
750 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
751 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
751 update_hk_lfr_last_er_fields( RID_LE_LFR_TIME, CODE_NOT_SYNCHRO );
752 update_hk_lfr_last_er_fields( RID_LE_LFR_TIME, CODE_NOT_SYNCHRO );
752 }
753 }
753 break;
754 break;
754 default:
755 default:
755 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
756 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
756 break;
757 break;
757 }
758 }
758
759
759 }
760 }
760
761
761 void set_hk_lfr_ahb_correctable()
762 void set_hk_lfr_ahb_correctable() // CRITICITY L
762 {
763 {
763 /** This function builds the error counter hk_lfr_ahb_correctable using the statistics provided
764 /** This function builds the error counter hk_lfr_ahb_correctable using the statistics provided
764 * by the Cache Control Register (ASI 2, offset 0) and in the Register Protection Control Register (ASR16) on the
765 * by the Cache Control Register (ASI 2, offset 0) and in the Register Protection Control Register (ASR16) on the
765 * detected errors in the cache, in the integer unit and in the floating point unit.
766 * detected errors in the cache, in the integer unit and in the floating point unit.
766 *
767 *
767 * @param void
768 * @param void
768 *
769 *
769 * @return void
770 * @return void
770 *
771 *
771 * All errors are summed to set the value of the hk_lfr_ahb_correctable counter.
772 * All errors are summed to set the value of the hk_lfr_ahb_correctable counter.
772 *
773 *
773 */
774 */
774
775
775 unsigned int ahb_correctable;
776 unsigned int ahb_correctable;
776 unsigned int instructionErrorCounter;
777 unsigned int instructionErrorCounter;
777 unsigned int dataErrorCounter;
778 unsigned int dataErrorCounter;
778 unsigned int fprfErrorCounter;
779 unsigned int fprfErrorCounter;
779 unsigned int iurfErrorCounter;
780 unsigned int iurfErrorCounter;
780
781
781 CCR_getInstructionAndDataErrorCounters( &instructionErrorCounter, &dataErrorCounter);
782 CCR_getInstructionAndDataErrorCounters( &instructionErrorCounter, &dataErrorCounter);
782 ASR16_get_FPRF_IURF_ErrorCounters( &fprfErrorCounter, &iurfErrorCounter);
783 ASR16_get_FPRF_IURF_ErrorCounters( &fprfErrorCounter, &iurfErrorCounter);
783
784
784 ahb_correctable = instructionErrorCounter
785 ahb_correctable = instructionErrorCounter
785 + dataErrorCounter
786 + dataErrorCounter
786 + fprfErrorCounter
787 + fprfErrorCounter
787 + iurfErrorCounter
788 + iurfErrorCounter
788 + housekeeping_packet.hk_lfr_ahb_correctable;
789 + housekeeping_packet.hk_lfr_ahb_correctable;
789
790
790 housekeeping_packet.hk_lfr_ahb_correctable = (unsigned char) (ahb_correctable & 0xff); // [1111 1111]
791 housekeeping_packet.hk_lfr_ahb_correctable = (unsigned char) (ahb_correctable & 0xff); // [1111 1111]
791
792
792 }
793 }
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