| @@ -97,8 +97,8 bool dsu3plugin::configureTarget() | |||
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97 | 97 | } |
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98 | 98 | if(MCTRLBASEADDRESS == (unsigned int)-1) |
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99 | 99 | { |
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100 | SocExplorerEngine::message(this,"Can't any compatible memory controller",1); | |
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101 | return false; | |
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100 | SocExplorerEngine::message(this,"Can't find any compatible memory controller",1); | |
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101 | // return false; | |
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102 | 102 | } |
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103 | 103 | |
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104 | 104 | |
| @@ -137,9 +137,12 bool dsu3plugin::configureTarget() | |||
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137 | 137 | WriteRegs(uIntlist()<<0<<0<<0<<0,(unsigned int)DSUBASEADDRESS+0x400060); |
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138 | 138 | WriteRegs(uIntlist()<<0x0000FFFF,(unsigned int)DSUBASEADDRESS+0x24); |
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139 | 139 | |
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140 | unsigned int ramSize=SocExplorerEngine::self()->memMeasureSize(this->parentPlugin(),0x40000000); | |
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141 | SocExplorerEngine::message(this,QString("Measured memory size=%1").arg(ramSize),0); | |
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142 | ||
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140 | 143 | memSet(DSUBASEADDRESS+0x300000,0,1567); |
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141 | 144 | WriteRegs(uIntlist()<<0<<0xF30000E0<<0x00000002<<0x40000000<<0x40000000<<0x40000004<<0x1000000,(unsigned int)DSUBASEADDRESS+0x400000); |
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142 |
WriteRegs(uIntlist()<<0<<0<<0<<0<<0<<0<<0x40 |
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145 | WriteRegs(uIntlist()<<0<<0<<0<<0<<0<<0<<0x40000000+ramSize-16<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0<<0,(unsigned int)DSUBASEADDRESS+0x300020); | |
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143 | 146 | WriteRegs(uIntlist()<<0x000002EF,(unsigned int)DSUBASEADDRESS); |
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144 | 147 | |
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145 | 148 | //Disable interrupts |
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