##// END OF EJS Templates
Added fsw_params.h
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1 #ifndef FSW_PARAMS_H_INCLUDED
2 #define FSW_PARAMS_H_INCLUDED
3
4 #include "grlib_regs.h"
5 #include "fsw_params_processing.h"
6 #include "fsw_params_nb_bytes.h"
7 #include "tm_byte_positions.h"
8 #include "ccsds_types.h"
9
10 #define GRSPW_DEVICE_NAME "/dev/grspw0"
11 #define UART_DEVICE_NAME "/dev/console"
12
13 typedef struct ring_node
14 {
15 struct ring_node *previous;
16 struct ring_node *next;
17 unsigned int sid;
18 unsigned int coarseTime;
19 unsigned int fineTime;
20 int buffer_address;
21 unsigned int status;
22 } ring_node;
23
24 //************************
25 // flight software version
26 // this parameters is handled by the Qt project options
27
28 #define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk
29 #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
30 #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
31 #define TIME_OFFSET 2
32 #define TIME_OFFSET_IN_BYTES 8
33 //#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
34 #define NB_BYTES_SWF_BLK (2 * 6)
35 #define NB_WORDS_SWF_BLK 3
36 #define NB_BYTES_CWF3_LIGHT_BLK 6
37 //#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
38 #define NB_RING_NODES_F0 3 // AT LEAST 3
39 #define NB_RING_NODES_F1 5 // AT LEAST 3
40 #define NB_RING_NODES_F2 5 // AT LEAST 3
41 #define NB_RING_NODES_F3 3 // AT LEAST 3
42
43 //**********
44 // LFR MODES
45 #define LFR_MODE_STANDBY 0
46 #define LFR_MODE_NORMAL 1
47 #define LFR_MODE_BURST 2
48 #define LFR_MODE_SBM1 3
49 #define LFR_MODE_SBM2 4
50
51 #define TDS_MODE_LFM 5
52 #define TDS_MODE_STANDBY 0
53 #define TDS_MODE_NORMAL 1
54 #define TDS_MODE_BURST 2
55 #define TDS_MODE_SBM1 3
56 #define TDS_MODE_SBM2 4
57
58 #define THR_MODE_STANDBY 0
59 #define THR_MODE_NORMAL 1
60 #define THR_MODE_BURST 2
61
62 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
63 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
64 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
65 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
66 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
67 #define RTEMS_EVENT_MODE_SBM2_WFRM RTEMS_EVENT_5
68 #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
69 #define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7
70 #define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode
71 #define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9
72 #define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10
73 #define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode
74 #define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12
75 #define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13
76 #define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode
77 #define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15
78 #define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16
79 #define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17
80 #define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18
81 #define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19
82 #define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20
83 #define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21
84 #define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22
85
86 //****************************
87 // LFR DEFAULT MODE PARAMETERS
88 // COMMON
89 #define DEFAULT_SY_LFR_COMMON0 0x00
90 #define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
91 // NORM
92 #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
93 #define DFLT_SY_LFR_N_SWF_P 300 // sec
94 #define DFLT_SY_LFR_N_ASM_P 3600 // sec
95 #define DFLT_SY_LFR_N_BP_P0 4 // sec
96 #define DFLT_SY_LFR_N_BP_P1 20 // sec
97 #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
98 #define MIN_DELTA_SNAPSHOT 16 // sec
99 // BURST
100 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
101 #define DEFAULT_SY_LFR_B_BP_P1 5 // sec
102 // SBM1
103 #define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
104 #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
105 // SBM2
106 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
107 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
108 // ADDITIONAL PARAMETERS
109 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
110 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
111 // STATUS WORD
112 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
113 #define DEFAULT_STATUS_WORD_BYTE1 0x00
114 //
115 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
116 #define SY_LFR_DPU_CONNECT_ATTEMPT 3
117 //****************************
118
119 //*****************************
120 // APB REGISTERS BASE ADDRESSES
121 #define REGS_ADDR_APBUART 0x80000100
122 #define REGS_ADDR_GPTIMER 0x80000300
123 #define REGS_ADDR_GRSPW 0x80000500
124 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
125 #define REGS_ADDR_GRGPIO 0x80000b00
126
127 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
128 //#define REGS_ADDR_WAVEFORM_PICKER 0x80000f50
129 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
130 #define REGS_ADDR_VHDL_VERSION 0x80000ff0
131
132 #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
133 #define APBUART_CTRL_REG_MASK_TE 0x00000002
134 // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
135 #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400
136
137 //**********
138 // IRQ LINES
139 #define IRQ_SM_SIMULATOR 9
140 #define IRQ_SPARC_SM_SIMULATOR 0x19 // see sparcv8.pdf p.76 for interrupt levels
141 #define IRQ_WAVEFORM_PICKER 14
142 #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
143 #define IRQ_SPECTRAL_MATRIX 6
144 #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
145
146 //*****
147 // TIME
148 #define CLKDIV_SM_SIMULATOR (10416 - 1) // 10 ms => nominal is 1/96 = 0.010416667, 10417 - 1 = 10416
149 #define TIMER_SM_SIMULATOR 1
150 #define HK_PERIOD 100 // 100 * 10ms => 1s
151 #define SY_LFR_TIME_SYN_TIMEOUT_in_ms 2000
152 #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s
153
154 //**********
155 // LPP CODES
156 #define LFR_SUCCESSFUL 0
157 #define LFR_DEFAULT 1
158 #define LFR_EXE_ERROR 2
159
160 //******
161 // RTEMS
162 #define TASKID_RECV 1
163 #define TASKID_ACTN 2
164 #define TASKID_SPIQ 3
165 #define TASKID_STAT 4
166 #define TASKID_AVF0 5
167 #define TASKID_SWBD 6
168 #define TASKID_WFRM 7
169 #define TASKID_DUMB 8
170 #define TASKID_HOUS 9
171 #define TASKID_PRC0 10
172 #define TASKID_CWF3 11
173 #define TASKID_CWF2 12
174 #define TASKID_CWF1 13
175 #define TASKID_SEND 14
176 #define TASKID_WTDG 15
177 #define TASKID_AVF1 16
178 #define TASKID_PRC1 17
179 #define TASKID_AVF2 18
180 #define TASKID_PRC2 19
181
182 #define TASK_PRIORITY_SPIQ 5
183 #define TASK_PRIORITY_WTDG 20
184 #define TASK_PRIORITY_HOUS 30
185 #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
186 #define TASK_PRIORITY_CWF2 35 //
187 #define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
188 #define TASK_PRIORITY_WFRM 40
189 #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
190 #define TASK_PRIORITY_SEND 45
191 #define TASK_PRIORITY_RECV 50
192 #define TASK_PRIORITY_ACTN 50
193 #define TASK_PRIORITY_AVF0 60
194 #define TASK_PRIORITY_AVF1 70
195 #define TASK_PRIORITY_PRC0 100
196 #define TASK_PRIORITY_PRC1 100
197 #define TASK_PRIORITY_AVF2 110
198 #define TASK_PRIORITY_PRC2 110
199 #define TASK_PRIORITY_STAT 200
200 #define TASK_PRIORITY_DUMB 200
201
202 #define MSG_QUEUE_COUNT_RECV 10
203 #define MSG_QUEUE_COUNT_SEND 50
204 #define MSG_QUEUE_COUNT_PRC0 10
205 #define MSG_QUEUE_COUNT_PRC1 10
206 #define MSG_QUEUE_COUNT_PRC2 5
207 #define MSG_QUEUE_SIZE_SEND 810 // 806 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
208 #define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
209 #define MSG_QUEUE_SIZE_PRC0 20 // two pointers and one rtems_event + 2 integers
210 #define MSG_QUEUE_SIZE_PRC1 20 // two pointers and one rtems_event + 2 integers
211 #define MSG_QUEUE_SIZE_PRC2 20 // two pointers and one rtems_event + 2 integers
212
213 #define QUEUE_RECV 0
214 #define QUEUE_SEND 1
215 #define QUEUE_PRC0 2
216 #define QUEUE_PRC1 3
217 #define QUEUE_PRC2 4
218
219 //*******
220 // MACROS
221 #ifdef PRINT_MESSAGES_ON_CONSOLE
222 #define PRINTF(x) printf(x);
223 #define PRINTF1(x,y) printf(x,y);
224 #define PRINTF2(x,y,z) printf(x,y,z);
225 #else
226 #define PRINTF(x) ;
227 #define PRINTF1(x,y) ;
228 #define PRINTF2(x,y,z) ;
229 #endif
230
231 #ifdef BOOT_MESSAGES
232 #define BOOT_PRINTF(x) printf(x);
233 #define BOOT_PRINTF1(x,y) printf(x,y);
234 #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
235 #else
236 #define BOOT_PRINTF(x) ;
237 #define BOOT_PRINTF1(x,y) ;
238 #define BOOT_PRINTF2(x,y,z) ;
239 #endif
240
241 #ifdef DEBUG_MESSAGES
242 #define DEBUG_PRINTF(x) printf(x);
243 #define DEBUG_PRINTF1(x,y) printf(x,y);
244 #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
245 #else
246 #define DEBUG_PRINTF(x) ;
247 #define DEBUG_PRINTF1(x,y) ;
248 #define DEBUG_PRINTF2(x,y,z) ;
249 #endif
250
251 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
252
253 struct param_local_str{
254 unsigned int local_sbm1_nb_cwf_sent;
255 unsigned int local_sbm1_nb_cwf_max;
256 unsigned int local_sbm2_nb_cwf_sent;
257 unsigned int local_sbm2_nb_cwf_max;
258 };
259
260 #endif // FSW_PARAMS_H_INCLUDED
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