##// END OF EJS Templates
MSG_QUEUE_SIZE_PRCx changed for PAS filtering implementation
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1 #ifndef FSW_PARAMS_H_INCLUDED
1 #ifndef FSW_PARAMS_H_INCLUDED
2 #define FSW_PARAMS_H_INCLUDED
2 #define FSW_PARAMS_H_INCLUDED
3
3
4 #include "fsw_params_processing.h"
4 #include "fsw_params_processing.h"
5 #include "fsw_params_nb_bytes.h"
5 #include "fsw_params_nb_bytes.h"
6 #include "tm_byte_positions.h"
6 #include "tm_byte_positions.h"
7 #include "ccsds_types.h"
7 #include "ccsds_types.h"
8
8
9 #define GRSPW_DEVICE_NAME "/dev/grspw0"
9 #define GRSPW_DEVICE_NAME "/dev/grspw0"
10 #define UART_DEVICE_NAME "/dev/console"
10 #define UART_DEVICE_NAME "/dev/console"
11
11
12 enum lfr_transition_type_t{
12 enum lfr_transition_type_t{
13 TRANSITION_NOT_SPECIFIC,
13 TRANSITION_NOT_SPECIFIC,
14 TRANSITION_NORM_TO_S1,
14 TRANSITION_NORM_TO_S1,
15 TRANSITION_NORM_TO_S2,
15 TRANSITION_NORM_TO_S2,
16 TRANSITION_S1_TO_NORM,
16 TRANSITION_S1_TO_NORM,
17 TRANSITION_S2_TO_NORM,
17 TRANSITION_S2_TO_NORM,
18 TRANSITION_S1_TO_S2,
18 TRANSITION_S1_TO_S2,
19 TRANSITION_S2_TO_S1
19 TRANSITION_S2_TO_S1
20 };
20 };
21
21
22 typedef struct ring_node
22 typedef struct ring_node
23 {
23 {
24 struct ring_node *previous;
24 struct ring_node *previous;
25 struct ring_node *next;
25 struct ring_node *next;
26 unsigned int sid;
26 unsigned int sid;
27 unsigned int coarseTime;
27 unsigned int coarseTime;
28 unsigned int fineTime;
28 unsigned int fineTime;
29 int buffer_address;
29 int buffer_address;
30 unsigned int status;
30 unsigned int status;
31 } ring_node;
31 } ring_node;
32
32
33 //************************
33 //************************
34 // flight software version
34 // flight software version
35 // this parameters is handled by the Qt project options
35 // this parameters is handled by the Qt project options
36
36
37 #define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk
37 #define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk
38 #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
38 #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
39 #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
39 #define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
40 #define TIME_OFFSET 2
40 #define TIME_OFFSET 2
41 #define TIME_OFFSET_IN_BYTES 8
41 #define TIME_OFFSET_IN_BYTES 8
42 //#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
42 //#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
43 #define NB_BYTES_SWF_BLK (2 * 6)
43 #define NB_BYTES_SWF_BLK (2 * 6)
44 #define NB_WORDS_SWF_BLK 3
44 #define NB_WORDS_SWF_BLK 3
45 #define NB_BYTES_CWF3_LIGHT_BLK 6
45 #define NB_BYTES_CWF3_LIGHT_BLK 6
46 //#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
46 //#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
47 #define NB_RING_NODES_F0 3 // AT LEAST 3
47 #define NB_RING_NODES_F0 3 // AT LEAST 3
48 #define NB_RING_NODES_F1 5 // AT LEAST 3
48 #define NB_RING_NODES_F1 5 // AT LEAST 3
49 #define NB_RING_NODES_F2 5 // AT LEAST 3
49 #define NB_RING_NODES_F2 5 // AT LEAST 3
50 #define NB_RING_NODES_F3 3 // AT LEAST 3
50 #define NB_RING_NODES_F3 3 // AT LEAST 3
51
51
52 //**********
52 //**********
53 // LFR MODES
53 // LFR MODES
54 #define LFR_MODE_STANDBY 0
54 #define LFR_MODE_STANDBY 0
55 #define LFR_MODE_NORMAL 1
55 #define LFR_MODE_NORMAL 1
56 #define LFR_MODE_BURST 2
56 #define LFR_MODE_BURST 2
57 #define LFR_MODE_SBM1 3
57 #define LFR_MODE_SBM1 3
58 #define LFR_MODE_SBM2 4
58 #define LFR_MODE_SBM2 4
59
59
60 #define TDS_MODE_LFM 5
60 #define TDS_MODE_LFM 5
61 #define TDS_MODE_STANDBY 0
61 #define TDS_MODE_STANDBY 0
62 #define TDS_MODE_NORMAL 1
62 #define TDS_MODE_NORMAL 1
63 #define TDS_MODE_BURST 2
63 #define TDS_MODE_BURST 2
64 #define TDS_MODE_SBM1 3
64 #define TDS_MODE_SBM1 3
65 #define TDS_MODE_SBM2 4
65 #define TDS_MODE_SBM2 4
66
66
67 #define THR_MODE_STANDBY 0
67 #define THR_MODE_STANDBY 0
68 #define THR_MODE_NORMAL 1
68 #define THR_MODE_NORMAL 1
69 #define THR_MODE_BURST 2
69 #define THR_MODE_BURST 2
70
70
71 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
71 #define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
72 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
72 #define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
73 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
73 #define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
74 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
74 #define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
75 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
75 #define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
76 #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5
76 #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5
77 #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
77 #define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
78 #define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7
78 #define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7
79 #define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode
79 #define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode
80 #define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9
80 #define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9
81 #define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10
81 #define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10
82 #define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode
82 #define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode
83 #define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12
83 #define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12
84 #define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13
84 #define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13
85 #define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode
85 #define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode
86 #define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15
86 #define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15
87 #define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16
87 #define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16
88 #define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17
88 #define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17
89 #define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18
89 #define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18
90 #define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19
90 #define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19
91 #define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20
91 #define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20
92 #define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21
92 #define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21
93 #define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22
93 #define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22
94 #define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23
94 #define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23
95
95
96 //****************************
96 //****************************
97 // LFR DEFAULT MODE PARAMETERS
97 // LFR DEFAULT MODE PARAMETERS
98 #define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff
98 #define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff
99 // COMMON
99 // COMMON
100 #define DEFAULT_SY_LFR_COMMON0 0x00
100 #define DEFAULT_SY_LFR_COMMON0 0x00
101 #define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0
101 #define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0
102 // NORM
102 // NORM
103 #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
103 #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
104 #define DFLT_SY_LFR_N_SWF_P 300 // sec
104 #define DFLT_SY_LFR_N_SWF_P 300 // sec
105 #define DFLT_SY_LFR_N_ASM_P 3600 // sec
105 #define DFLT_SY_LFR_N_ASM_P 3600 // sec
106 #define DFLT_SY_LFR_N_BP_P0 4 // sec
106 #define DFLT_SY_LFR_N_BP_P0 4 // sec
107 #define DFLT_SY_LFR_N_BP_P1 20 // sec
107 #define DFLT_SY_LFR_N_BP_P1 20 // sec
108 #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
108 #define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
109 #define MIN_DELTA_SNAPSHOT 16 // sec
109 #define MIN_DELTA_SNAPSHOT 16 // sec
110 // BURST
110 // BURST
111 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
111 #define DEFAULT_SY_LFR_B_BP_P0 1 // sec
112 #define DEFAULT_SY_LFR_B_BP_P1 5 // sec
112 #define DEFAULT_SY_LFR_B_BP_P1 5 // sec
113 // SBM1
113 // SBM1
114 #define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
114 #define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
115 #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
115 #define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
116 // SBM2
116 // SBM2
117 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
117 #define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
118 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
118 #define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
119 // ADDITIONAL PARAMETERS
119 // ADDITIONAL PARAMETERS
120 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
120 #define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
121 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
121 #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
122 // STATUS WORD
122 // STATUS WORD
123 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
123 #define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
124 #define DEFAULT_STATUS_WORD_BYTE1 0x00
124 #define DEFAULT_STATUS_WORD_BYTE1 0x00
125 //
125 //
126 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
126 #define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
127 #define SY_LFR_DPU_CONNECT_ATTEMPT 3
127 #define SY_LFR_DPU_CONNECT_ATTEMPT 3
128 //****************************
128 //****************************
129
129
130 //*****************************
130 //*****************************
131 // APB REGISTERS BASE ADDRESSES
131 // APB REGISTERS BASE ADDRESSES
132 #define REGS_ADDR_APBUART 0x80000100
132 #define REGS_ADDR_APBUART 0x80000100
133 #define REGS_ADDR_GPTIMER 0x80000300
133 #define REGS_ADDR_GPTIMER 0x80000300
134 #define REGS_ADDR_GRSPW 0x80000500
134 #define REGS_ADDR_GRSPW 0x80000500
135 #define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04
135 #define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04
136 #define APB_OFFSET_GRSPW_TIME_REGISTER 0x14
136 #define APB_OFFSET_GRSPW_TIME_REGISTER 0x14
137 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
137 #define REGS_ADDR_TIME_MANAGEMENT 0x80000600
138 #define REGS_ADDR_GRGPIO 0x80000b00
138 #define REGS_ADDR_GRGPIO 0x80000b00
139
139
140 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
140 #define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
141 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
141 #define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
142 #define REGS_ADDR_VHDL_VERSION 0x80000ff0
142 #define REGS_ADDR_VHDL_VERSION 0x80000ff0
143
143
144 #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
144 #define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
145 #define APBUART_CTRL_REG_MASK_TE 0x00000002
145 #define APBUART_CTRL_REG_MASK_TE 0x00000002
146 // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
146 // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
147 #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400
147 #define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400
148
148
149 //**********
149 //**********
150 // IRQ LINES
150 // IRQ LINES
151 #define IRQ_GPTIMER_WATCHDOG 9
151 #define IRQ_GPTIMER_WATCHDOG 9
152 #define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels
152 #define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels
153 #define IRQ_WAVEFORM_PICKER 14
153 #define IRQ_WAVEFORM_PICKER 14
154 #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
154 #define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
155 #define IRQ_SPECTRAL_MATRIX 6
155 #define IRQ_SPECTRAL_MATRIX 6
156 #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
156 #define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
157
157
158 //*****
158 //*****
159 // TIME
159 // TIME
160 #define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000
160 #define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000
161 #define TIMER_WATCHDOG 1
161 #define TIMER_WATCHDOG 1
162 #define WATCHDOG_PERIOD 100 // 1s
162 #define WATCHDOG_PERIOD 100 // 1s
163 #define HK_PERIOD 100 // 100 * 10ms => 1s
163 #define HK_PERIOD 100 // 100 * 10ms => 1s
164 #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s
164 #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s
165 #define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s
165 #define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s
166 #define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s
166 #define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s
167 #define TIMECODE_MASK 0x3f // 0011 1111
167 #define TIMECODE_MASK 0x3f // 0011 1111
168
168
169 //**********
169 //**********
170 // LPP CODES
170 // LPP CODES
171 #define LFR_SUCCESSFUL 0
171 #define LFR_SUCCESSFUL 0
172 #define LFR_DEFAULT 1
172 #define LFR_DEFAULT 1
173 #define LFR_EXE_ERROR 2
173 #define LFR_EXE_ERROR 2
174
174
175 //******
175 //******
176 // RTEMS
176 // RTEMS
177 #define TASKID_RECV 1
177 #define TASKID_RECV 1
178 #define TASKID_ACTN 2
178 #define TASKID_ACTN 2
179 #define TASKID_SPIQ 3
179 #define TASKID_SPIQ 3
180 #define TASKID_LOAD 4
180 #define TASKID_LOAD 4
181 #define TASKID_AVF0 5
181 #define TASKID_AVF0 5
182 #define TASKID_SWBD 6
182 #define TASKID_SWBD 6
183 #define TASKID_WFRM 7
183 #define TASKID_WFRM 7
184 #define TASKID_DUMB 8
184 #define TASKID_DUMB 8
185 #define TASKID_HOUS 9
185 #define TASKID_HOUS 9
186 #define TASKID_PRC0 10
186 #define TASKID_PRC0 10
187 #define TASKID_CWF3 11
187 #define TASKID_CWF3 11
188 #define TASKID_CWF2 12
188 #define TASKID_CWF2 12
189 #define TASKID_CWF1 13
189 #define TASKID_CWF1 13
190 #define TASKID_SEND 14
190 #define TASKID_SEND 14
191 #define TASKID_LINK 15
191 #define TASKID_LINK 15
192 #define TASKID_AVF1 16
192 #define TASKID_AVF1 16
193 #define TASKID_PRC1 17
193 #define TASKID_PRC1 17
194 #define TASKID_AVF2 18
194 #define TASKID_AVF2 18
195 #define TASKID_PRC2 19
195 #define TASKID_PRC2 19
196
196
197 #define TASK_PRIORITY_SPIQ 5
197 #define TASK_PRIORITY_SPIQ 5
198 #define TASK_PRIORITY_LINK 20
198 #define TASK_PRIORITY_LINK 20
199 #define TASK_PRIORITY_HOUS 30
199 #define TASK_PRIORITY_HOUS 30
200 #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
200 #define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
201 #define TASK_PRIORITY_CWF2 35 //
201 #define TASK_PRIORITY_CWF2 35 //
202 #define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
202 #define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
203 #define TASK_PRIORITY_WFRM 40
203 #define TASK_PRIORITY_WFRM 40
204 #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
204 #define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
205 #define TASK_PRIORITY_SEND 45
205 #define TASK_PRIORITY_SEND 45
206 #define TASK_PRIORITY_RECV 50
206 #define TASK_PRIORITY_RECV 50
207 #define TASK_PRIORITY_ACTN 50
207 #define TASK_PRIORITY_ACTN 50
208 #define TASK_PRIORITY_AVF0 60
208 #define TASK_PRIORITY_AVF0 60
209 #define TASK_PRIORITY_AVF1 70
209 #define TASK_PRIORITY_AVF1 70
210 #define TASK_PRIORITY_PRC0 100
210 #define TASK_PRIORITY_PRC0 100
211 #define TASK_PRIORITY_PRC1 100
211 #define TASK_PRIORITY_PRC1 100
212 #define TASK_PRIORITY_AVF2 110
212 #define TASK_PRIORITY_AVF2 110
213 #define TASK_PRIORITY_PRC2 110
213 #define TASK_PRIORITY_PRC2 110
214 #define TASK_PRIORITY_LOAD 190
214 #define TASK_PRIORITY_LOAD 190
215 #define TASK_PRIORITY_DUMB 200
215 #define TASK_PRIORITY_DUMB 200
216
216
217 #define MSG_QUEUE_COUNT_RECV 10
217 #define MSG_QUEUE_COUNT_RECV 10
218 #define MSG_QUEUE_COUNT_SEND 50
218 #define MSG_QUEUE_COUNT_SEND 50
219 #define MSG_QUEUE_COUNT_PRC0 10
219 #define MSG_QUEUE_COUNT_PRC0 10
220 #define MSG_QUEUE_COUNT_PRC1 10
220 #define MSG_QUEUE_COUNT_PRC1 10
221 #define MSG_QUEUE_COUNT_PRC2 5
221 #define MSG_QUEUE_COUNT_PRC2 5
222 #define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
222 #define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
223 #define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
223 #define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
224 #define MSG_QUEUE_SIZE_PRC0 28 // two pointers, one rtems_event + 4 integers
224 #define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers
225 #define MSG_QUEUE_SIZE_PRC1 28 // two pointers, one rtems_event + 4 integers
225 #define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers
226 #define MSG_QUEUE_SIZE_PRC2 28 // two pointers, one rtems_event + 4 integers
226 #define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers
227
227
228 #define QUEUE_RECV 0
228 #define QUEUE_RECV 0
229 #define QUEUE_SEND 1
229 #define QUEUE_SEND 1
230 #define QUEUE_PRC0 2
230 #define QUEUE_PRC0 2
231 #define QUEUE_PRC1 3
231 #define QUEUE_PRC1 3
232 #define QUEUE_PRC2 4
232 #define QUEUE_PRC2 4
233
233
234 //*******
234 //*******
235 // MACROS
235 // MACROS
236 #ifdef PRINT_MESSAGES_ON_CONSOLE
236 #ifdef PRINT_MESSAGES_ON_CONSOLE
237 #define PRINTF(x) printf(x);
237 #define PRINTF(x) printf(x);
238 #define PRINTF1(x,y) printf(x,y);
238 #define PRINTF1(x,y) printf(x,y);
239 #define PRINTF2(x,y,z) printf(x,y,z);
239 #define PRINTF2(x,y,z) printf(x,y,z);
240 #else
240 #else
241 #define PRINTF(x) ;
241 #define PRINTF(x) ;
242 #define PRINTF1(x,y) ;
242 #define PRINTF1(x,y) ;
243 #define PRINTF2(x,y,z) ;
243 #define PRINTF2(x,y,z) ;
244 #endif
244 #endif
245
245
246 #ifdef BOOT_MESSAGES
246 #ifdef BOOT_MESSAGES
247 #define BOOT_PRINTF(x) printf(x);
247 #define BOOT_PRINTF(x) printf(x);
248 #define BOOT_PRINTF1(x,y) printf(x,y);
248 #define BOOT_PRINTF1(x,y) printf(x,y);
249 #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
249 #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
250 #else
250 #else
251 #define BOOT_PRINTF(x) ;
251 #define BOOT_PRINTF(x) ;
252 #define BOOT_PRINTF1(x,y) ;
252 #define BOOT_PRINTF1(x,y) ;
253 #define BOOT_PRINTF2(x,y,z) ;
253 #define BOOT_PRINTF2(x,y,z) ;
254 #endif
254 #endif
255
255
256 #ifdef DEBUG_MESSAGES
256 #ifdef DEBUG_MESSAGES
257 #define DEBUG_PRINTF(x) printf(x);
257 #define DEBUG_PRINTF(x) printf(x);
258 #define DEBUG_PRINTF1(x,y) printf(x,y);
258 #define DEBUG_PRINTF1(x,y) printf(x,y);
259 #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
259 #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
260 #else
260 #else
261 #define DEBUG_PRINTF(x) ;
261 #define DEBUG_PRINTF(x) ;
262 #define DEBUG_PRINTF1(x,y) ;
262 #define DEBUG_PRINTF1(x,y) ;
263 #define DEBUG_PRINTF2(x,y,z) ;
263 #define DEBUG_PRINTF2(x,y,z) ;
264 #endif
264 #endif
265
265
266 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
266 #define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
267
267
268 struct param_local_str{
268 struct param_local_str{
269 unsigned int local_sbm1_nb_cwf_sent;
269 unsigned int local_sbm1_nb_cwf_sent;
270 unsigned int local_sbm1_nb_cwf_max;
270 unsigned int local_sbm1_nb_cwf_max;
271 unsigned int local_sbm2_nb_cwf_sent;
271 unsigned int local_sbm2_nb_cwf_sent;
272 unsigned int local_sbm2_nb_cwf_max;
272 unsigned int local_sbm2_nb_cwf_max;
273 };
273 };
274
274
275 typedef struct {
275 typedef struct {
276 unsigned char merged_fbins_mask_f0[16];
276 unsigned char merged_fbins_mask_f0[16];
277 unsigned char merged_fbins_mask_f1[16];
277 unsigned char merged_fbins_mask_f1[16];
278 unsigned char merged_fbins_mask_f2[16];
278 unsigned char merged_fbins_mask_f2[16];
279 } fbins_masks_t;
279 } fbins_masks_t;
280
280
281 #define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536
282 #define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536
283 #define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536
284
281 #endif // FSW_PARAMS_H_INCLUDED
285 #endif // FSW_PARAMS_H_INCLUDED
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