# HG changeset patch # User paul # Date 2014-07-04 15:22:51 # Node ID 80993ec2f9f20dcdea5ee35bc20df2ac116d8054 # Parent 565b8186dcb8b94dd05c68ec1bb0aa3192b6444b Sync diff --git a/lfr_emulator.sublime-workspace b/lfr_emulator.sublime-workspace --- a/lfr_emulator.sublime-workspace +++ b/lfr_emulator.sublime-workspace @@ -4,58 +4,94 @@ "selected_items": [ [ - "c", - "c" + "fi", + "fifo_to_wait_for" + ], + [ + "MEM", + "MEM_OUT_SM_Full" + ], + [ + "add", + "address_MEM_OUT_SM" + ], + [ + "addrses", + "address_MEM_OUT_SM_0" + ], + [ + "address_MEM", + "address_MEM_OUT_SM_1" ], [ - "g", - "g" + "address_M", + "address_MEM_OUT_SM_1" + ], + [ + "ad", + "address_MEM_OUT_SM_0" ], [ - "compo", - "components_re" + "address", + "address_MEM_OUT_SM" ], [ - "cur", + "print", + "print_custom" + ], + [ + "is_MEM_OUT_SM_Full_", + "is_MEM_OUT_SM_Full_FIFO_0" + ], + [ + "curre", "currentComp_im" ], [ - "current", - "currentComp_im" + "MEM_OUT_SM_Ful", + "MEM_OUT_SM_Full_s" + ], + [ + "fft0", + "fft0_im" + ], + [ + "fft", + "fft0_im" + ], + [ + "dataB", + "dataBufferConverted" ], [ - "curre", - "currentComp_re" + "convert", + "convertToSigned16Bits" + ], + [ + "data", + "dataInInt16" ], [ - "nb", - "nbComponentsPerMatrix" + "wfrm", + "wfrm2" ], [ - "MEM", - "MEM_IN_SM_Empty" + "column", + "columnB3" + ], + [ + "colum", + "columnV" ], [ "out_re", "out_ren" ], [ - "fft", - "fft_reg" - ], - [ - "address_MEM", - "address_MEM_IN_SM_0" - ], - [ "wfr", "wfrm0" ], [ - "print", - "print_reg_fft" - ], - [ "sin", "sineWave" ], @@ -76,14 +112,6 @@ "address_FIFO_F0_4" ], [ - "add", - "address_CTRL" - ], - [ - "wfrm", - "wfrm1" - ], - [ "index", "indexTransformDecimationInFrequency" ], @@ -128,6 +156,10 @@ "groupbox_tc_lfr_load_common_par" ], [ + "c", + "common" + ], + [ "laben", "label_UNKNOWN_nb" ], @@ -143,15 +175,15 @@ "file": "test_fft/test_sm_mini_lfr.py", "settings": { - "buffer_size": 4053, + "buffer_size": 5847, "line_ending": "Unix" } }, { - "file": "test_fft/fft_test_functions.py", + "file": "test_fft/test_sm_functions.py", "settings": { - "buffer_size": 3885, + "buffer_size": 3914, "line_ending": "Unix" } }, @@ -159,7 +191,7 @@ "file": "test_fft/register_addresses_fft_test.py", "settings": { - "buffer_size": 798, + "buffer_size": 873, "line_ending": "Unix" } } @@ -188,7 +220,9 @@ }, "file_history": [ + "/opt/LFR_EMULATOR/test_fft/fft_test_functions.py", "/opt/LFR_EMULATOR/test_fft/test_fft_mini_lfr.py", + "/opt/LFR_EMULATOR/test_fft/register_addresses_fft_test.py", "/opt/LFR_EMULATOR/test_fft/functions_evaluations.py", "/opt/LFR_EMULATOR/SRC/processing_chain.py", "/opt/LFR_EMULATOR/main.py", @@ -237,6 +271,7 @@ "case_sensitive": false, "find_history": [ + "np", "def displayInfoSendTc", "dump", "tc_lfr_dump_par", @@ -269,15 +304,15 @@ "file": "test_fft/test_sm_mini_lfr.py", "settings": { - "buffer_size": 4053, + "buffer_size": 5847, "regions": { }, "selection": [ [ - 2731, - 2731 + 5847, + 5847 ] ], "settings": @@ -286,25 +321,25 @@ "translate_tabs_to_spaces": false }, "translation.x": 0.0, - "translation.y": 1295.0, + "translation.y": 1640.0, "zoom_level": 1.0 }, "type": "text" }, { "buffer": 1, - "file": "test_fft/fft_test_functions.py", + "file": "test_fft/test_sm_functions.py", "settings": { - "buffer_size": 3885, + "buffer_size": 3914, "regions": { }, "selection": [ [ - 2140, - 2140 + 2764, + 2764 ] ], "settings": @@ -313,7 +348,7 @@ "translate_tabs_to_spaces": false }, "translation.x": 0.0, - "translation.y": 1081.0, + "translation.y": 1404.0, "zoom_level": 1.0 }, "type": "text" @@ -323,15 +358,15 @@ "file": "test_fft/register_addresses_fft_test.py", "settings": { - "buffer_size": 798, + "buffer_size": 873, "regions": { }, "selection": [ [ - 717, - 717 + 703, + 703 ] ], "settings": @@ -339,7 +374,7 @@ "syntax": "Packages/Python/Python.tmLanguage" }, "translation.x": 0.0, - "translation.y": 0.0, + "translation.y": 108.0, "zoom_level": 1.0 }, "type": "text" @@ -411,6 +446,6 @@ "show_open_files": false, "show_tabs": true, "side_bar_visible": true, - "side_bar_width": 255.0, + "side_bar_width": 289.0, "status_bar_visible": true } diff --git a/test_fft/__init__.pyc b/test_fft/__init__.pyc index 8287a957a4929184982e5038fd81add5eebec5a6..bf7bfa406c3ae8657db0af3aec5509e6eeb24847 GIT binary patch literal 125 zc${PY%*)lz7!j1r00oRd>;S~YEI=ZKfgxA}B;uz5l0zek)qsS4enE-8k6Tc@t8b`} uV~Br{eo1O^NqkybiGF;1W?p7Ve7s&kWeEpRsZDNvN@-529mv39kO2Un@fQ;S diff --git a/test_fft/fft_test_functions.py b/test_fft/fft_test_functions.py --- a/test_fft/fft_test_functions.py +++ b/test_fft/fft_test_functions.py @@ -68,49 +68,6 @@ def is_MEM_IN_SM_Emty( ): ret = 1 return ret -def print_reg_sm( ): - sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) - out_ren = (sm_reg[0] & 0x00000003) - MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2 - MEM_OUT_SM_Empty = (sm_reg[0] & 0x00000030) >> 4 - print "sm_reg = " + bin( sm_reg[0] & 0x3f ) \ - + ", out_ren = " + bin( out_ren ) \ - + ", MEM_OUT_SM_Full = " + bin( MEM_OUT_SM_Full ) \ - + ", MEM_OUT_SM_Empty = " + bin( MEM_OUT_SM_Empty ) - RMAPPlugin0.ProcessPendingEvents() - -def is_MEM_OUT_SM_Empty( ): - ret = 0 - sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) - MEM_OUT_SM_Empty = (sm_reg[0] & 0x00000030) >> 4 - if MEM_OUT_SM_Empty == 0x3: - ret = 1 - return ret - -def is_MEM_OUT_SM_Full( ): - ret = 0 - sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) - MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2 - if MEM_OUT_SM_Full != 0x0: - ret = 1 - return ret - -def is_MEM_OUT_SM_Full_FIFO_0( ): - ret = 0 - sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) - MEM_OUT_SM_Full = (sm_reg[0] & 0x00000004) >> 3 - if MEM_OUT_SM_Full == 0x01: - ret = 1 - return ret - -def is_MEM_OUT_SM_Full_FIFO_1( ): - ret = 0 - sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) - MEM_OUT_SM_Full = (sm_reg[0] & 0x00000008) >> 3 - if MEM_OUT_SM_Full == 0x01: - ret = 1 - return ret - def out_locked_AND_out_reuse_AND_out_ren( ): # reuse => 0111 1111 1111 1111 RMAPPlugin0.Write( address_CTRL, [0x00007fff] ) diff --git a/test_fft/fft_test_functions.pyc b/test_fft/fft_test_functions.pyc index 0c852343acd8873c1e77b5e2e5a420adb14dbe28..508a55ef93c95832a934dd1bf5027854ba9bfb1f GIT binary patch literal 4133 zc$}?Q+iu%N5ZxsuS&}buVmWfsv~`0N5YjZZ+agU-C(gyr1&JMla_cleKq%am!I~l! za_Pi@ga&Z?9ewQ=^sWEWPbkobKDslrBt_YMYGiqrvqNe*=ge(o{ykm&=eOTm4om(F z7`I_WzrrNopEHlK=bU7Nc?R1-$z-0%x&`*Uz_=)|pW%@r6GakAOq58NU}A!VG81JI zDoj*Js4`I{VUmeS5~i4#B4L_|X%c3bm?5FYM2&=5CT2-EgLbu=XTV1H82+}J97KiF z6)jG}WNqHr-uB`>*I#xDur9*D>pjGG38p^b>l>`m*Oy-m);C$lVCM$~)-S*-kdG}F znQ795dngko=XFO_;rcS}bY$3a-%3@2WzgwFQjzEcUflK71c-;9I6301E5?3=3!t7Km<(42QgFl(bR7_*%0wbiAOhfC9mb%@`o)Y5 zBO?MOzekszOQ73f+XoZzuIsCn>%>*$`c1rP;X;-1OE0%&=mtVn@H^d}=c-s}28Hxg z`x(*pM$=}MGW!2NcV%sdMDj2=qB2o7&*%6>?idMWMoQZfT1tFrh6V=mf`oBg@{B6H zXCi?u3cRf*Ze!u*M1t)0)S*IM$Mrl5->jc7(NlBfZCWA)V{+Z~}~Bz=qwb;iqE83qwa z6fl~YVoHov$7w#z>HV<~f(ArN_8NGtCR8-|xs(jNZ>D5i{SW^WYJj|&q|S)*bA`f8 zky`kw6Fwh88w)6;Ot@j&`6%z;Dq=Dd=ay1T&#-(jwD`?q1gDX$zqm>6G7&6zTl)~a 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a/test_fft/register_addresses_fft_test.py +++ b/test_fft/register_addresses_fft_test.py @@ -25,6 +25,9 @@ address_CTRL = 0x80000f44 address_MEM_OUT_SM_0= 0x80000f30 address_MEM_OUT_SM_1= 0x80000f34 +mask_REN_FIFO_0 = 0xfffffffe # 1110 +mask_REN_FIFO_1 = 0xfffffffd # 1101 + address_CTRL_SM = 0x80000f38 # diff --git a/test_fft/register_addresses_fft_test.pyc b/test_fft/register_addresses_fft_test.pyc index c8195fb0a098bc7ed166488ee63aa2d3087bd002..0ee4abc27a6302a286a7397ddadffa94376844e7 GIT binary patch literal 1190 zc${^TOK;jh6on7w83F+UNywv87g?~V3N|cKDXP-6AR+OPfV9%xjG|npLJc9plSOv@ zO`#!upD-ai)g%LkR<C;?7_lHe351x|y~;0!1O-T-ZYv!E<^6SN7=fpXwHC=cEOZGj7*0=Nh&f=i&1 z-?Q!al)>Ae3b+i~@%wkd70@1d2UG>`g7(3CpaXCfbO_!D9f1!pt{tjncTvE1y_s&p zK*m7MK+!> 4 + if MEM_OUT_SM_Empty == 0x3: + ret = 1 + return ret + +def is_MEM_OUT_SM_Full( ): + ret = 0 + sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) + MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2 + if MEM_OUT_SM_Full != 0x0: + ret = 1 + return ret + +def is_MEM_OUT_SM_Full_FIFO_0( ): + ret = 0 + sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) + MEM_OUT_SM_Full = (sm_reg[0] & 0x00000004) >> 2 + if MEM_OUT_SM_Full == 0x01: + ret = 1 + return ret + +def is_MEM_OUT_SM_Full_FIFO_1( ): + ret = 0 + sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) + MEM_OUT_SM_Full = (sm_reg[0] & 0x00000008) >> 3 + if MEM_OUT_SM_Full == 0x01: + ret = 1 + return ret + +def wait_for_FIFO_0_Full(): + counter = 0 + while ( is_MEM_OUT_SM_Full_FIFO_0() == 0 ): + print_custom( "FIFO_0 not full " + str(counter) ) + counter = counter + 1 + if counter == 10: + break + +def wait_for_FIFO_1_Full(): + counter = 0 + while ( is_MEM_OUT_SM_Full_FIFO_1() == 0 ): + print_custom( "FIFO_1 not full " + str(counter)) + counter = counter + 1 + if counter == 10: + break + +def wait_for_FIFO_Full( fifo ): + if fifo == 0: + wait_for_FIFO_0_Full() + elif fifo == 1: + wait_for_FIFO_1_Full() + else: + print_custom( "ERR *** wait_for_FIFO_Full *** unexpted value for parameter [fifo]" ) + +def wait_for_FIFO_0_or_1_Full(): + counter = 0 + sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) + MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2 + while ( MEM_OUT_SM_Full == 0 ): + print_custom( "FIFO 0 or 1 not full " + str(counter)) + counter = counter + 1 + if counter == 10: + break + sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) + MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2 + RMAPPlugin0.ProcessPendingEvents() + +def print_reg_sm( ): + sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1) + out_ren = (sm_reg[0] & 0x00000003) + MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2 + MEM_OUT_SM_Empty = (sm_reg[0] & 0x00000030) >> 4 + MEM_OUT_SM_Full_s= (sm_reg[0] & 0x00000040) >> 6 + print "sm_reg = " + bin( sm_reg[0] & 0x7f ) \ + + ", out_ren = " + bin( out_ren ) \ + + ", MEM_OUT_SM_Full = " + bin( MEM_OUT_SM_Full ) \ + + ", MEM_OUT_SM_Empty = " + bin( MEM_OUT_SM_Empty ) \ + + ", MEM_OUT_SM_Full_s = " + bin( MEM_OUT_SM_Full_s ) + RMAPPlugin0.ProcessPendingEvents() \ No newline at end of file diff --git a/test_fft/test_sm_mini_lfr.py b/test_fft/test_sm_mini_lfr.py --- a/test_fft/test_sm_mini_lfr.py +++ b/test_fft/test_sm_mini_lfr.py @@ -6,6 +6,7 @@ import matplotlib.pyplot as plt from test_fft.register_addresses_fft_test import * from test_fft.fft_test_functions import * +from test_fft.test_sm_functions import * print_custom( '*' ) print_custom( '*' ) @@ -28,7 +29,7 @@ cwf_f1 = np.zeros( 1000 ) ################# # BUILD WAVEFORMS nbSamples = 256 -nbComponentsPerMatrix = 25 +nbComponentsPerMatrix = 15 nbFrequencyBins = 128 #wfrm0 = getWaveFromRecord( cwf_f1, nbSamples, 0, columnV ) #wfrm1 = getWaveFromRecord( cwf_f1, nbSamples, 0, columnE1 ) @@ -36,9 +37,9 @@ nbFrequencyBins = 128 #wfrm3 = getWaveFromRecord( cwf_f1, nbSamples, 0, columnB1 ) #wfrm4 = getWaveFromRecord( cwf_f1, nbSamples, 0, columnB2 ) wfrm0 = sineWave( 256, 10, 1000 ) -wfrm1 = sineWave( 256, 20, 1000 ) -wfrm2 = sineWave( 256, 30, 1000 ) -wfrm3 = sineWave( 256, 40, 1000 ) +wfrm1 = sineWave( 256, 10, 1000 ) +wfrm2 = sineWave( 256, 20, 1000 ) +wfrm3 = sineWave( 256, 20, 1000 ) wfrm4 = sineWave( 256, 50, 1000 ) ################ @@ -61,42 +62,69 @@ for k in range(nbSamples): print_custom( "1) data written in FIFOs" ) -print_reg_sm( ) - -# wait for SM_OUT_Full -while ( is_MEM_OUT_SM_Full() ) == 0: - print_custom( "SM not full" ) - -print_reg_sm( ) - ################ # SM FIRST READ print_custom( "======= SM FIRST READ" ) components = [] -if is_MEM_OUT_SM_Full_FIFO_0(): - print_custom( "FIFO_0 is full" ) +wait_for_FIFO_0_or_1_Full() + +if is_MEM_OUT_SM_Full_FIFO_0( ): + address_MEM_OUT_SM = address_MEM_OUT_SM_1 + fifo_to_wait_for = 0 +elif is_MEM_OUT_SM_Full_FIFO_1( ): address_MEM_OUT_SM = address_MEM_OUT_SM_0 -elif is_MEM_OUT_SM_Full_FIFO_1(): - print_custom( "FIFO_1 is full") - address_MEM_OUT_SM = address_MEM_OUT_SM_1 -else: - print_custom( "/!\ no MEM_OUT_SM FIFO full /!\ " ) + fifo_to_wait_for = 1 for component in range(nbComponentsPerMatrix): - print_custom( "component = " + str( component ) ) - currentComp = np.zeros( nbFrequencyBins ) - for frequencyBin in range(nbFrequencyBins): - # read enable => 0000 0000 0000 0000 - if is_MEM_OUT_SM_Empty( ) == 1: - print_custom( "component = " + str( component ) \ - + " bin = " + str( frequencyBin ) ) - val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1) - RMAPPlugin0.Write( address_CTRL_SM, [0x00000000] ) - currentComp[frequencyBin] = val[0] - RMAPPlugin0.ProcessPendingEvents() - components.append( currentComp ) + print_custom( "==== component = " + str( component ) + + ", read @" + hex(address_MEM_OUT_SM & 0xffffffff) ) + print_reg_sm( ) + currentComp_re = np.zeros( nbFrequencyBins ) + currentComp_im = np.zeros( nbFrequencyBins ) + if (component == 0) | (component == 12): + wait_for_FIFO_Full( fifo_to_wait_for ) + currentComp_re = read_SM_Re( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + elif (component == 5) | (component == 9): + wait_for_FIFO_Full( fifo_to_wait_for ) + currentComp_re = read_SM_Re( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + elif (component == 1) | (component == 3) | (component == 7): + currentComp_re, currentComp_im = read_SM_Re_Im( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + components.append( currentComp_im ) + wait_for_FIFO_Full( fifo_to_wait_for ) + elif (component == 2) | (component == 6) | (component == 10): + currentComp_re, currentComp_im = read_SM_Re_Im( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + components.append( currentComp_im ) + wait_for_FIFO_Full( fifo_to_wait_for ) + elif (component == 4) | (component == 8): + currentComp_re, currentComp_im = read_SM_Re_Im( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + components.append( currentComp_im ) + elif (component == 11) | (component == 13): + currentComp_re, currentComp_im = read_SM_Re_Im( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + components.append( currentComp_im ) + elif (component == 14): + currentComp_re = read_SM_Re( nbFrequencyBins, address_MEM_OUT_SM ) + components.append( currentComp_re ) + else: + print_custom( "unexpected value for component" ) + # change FIFO + if address_MEM_OUT_SM == address_MEM_OUT_SM_0: + address_MEM_OUT_SM = address_MEM_OUT_SM_1 + fifo_to_wait_for = 0 + elif address_MEM_OUT_SM == address_MEM_OUT_SM_1: + address_MEM_OUT_SM = address_MEM_OUT_SM_0 + fifo_to_wait_for = 1 + +print_custom( "======= READ COMPLETE" ) + +print_reg_sm( ) # PLOT SM @@ -115,36 +143,48 @@ plt.subplot(235) plt.plot(wfrm4, 'm') plt.figure( 2 ) + plt.subplot(231) -plt.plot(components[0][:]) -plt.plot(components[1][:]) -plt.plot(components[2][:]) -plt.plot(components[3][:]) +plt.plot(components[0], label='0') +plt.plot(components[1], label='1') +plt.plot(components[2], label='2') +plt.plot(components[3], label='3') +plt.legend(loc='upper right') + plt.subplot(232) -plt.plot(components[4][:]) -plt.plot(components[5][:]) -plt.plot(components[6][:]) -plt.plot(components[7][:]) +plt.plot(components[4], label='4') +plt.plot(components[5], label='5') +plt.plot(components[6], label='6') +plt.plot(components[7], label='7') +plt.legend(loc='upper right') + plt.subplot(233) -plt.plot(components[8][:]) -plt.plot(components[9][:]) -plt.plot(components[10][:]) -plt.plot(components[11][:]) +plt.plot(components[8], label='8') +plt.plot(components[9], label='9') +plt.plot(components[10], label='10') +plt.plot(components[11], label='11') +plt.legend(loc='upper right') + plt.subplot(234) -plt.plot(components[12][:]) -plt.plot(components[13][:]) -plt.plot(components[14][:]) -plt.plot(components[15][:]) +plt.plot(components[12], label='12') +plt.plot(components[13], label='13') +plt.plot(components[14], label='14') +plt.plot(components[15], label='15') +plt.legend(loc='upper right') + plt.subplot(235) -plt.plot(components[16][:]) -plt.plot(components[17][:]) -plt.plot(components[18][:]) -plt.plot(components[19][:]) +plt.plot(components[16], label='16') +plt.plot(components[17], label='17') +plt.plot(components[18], label='18') +plt.plot(components[19], label='19') +plt.legend(loc='upper right') + plt.subplot(236) -plt.plot(components[20][:]) -plt.plot(components[21][:]) -plt.plot(components[22][:]) -plt.plot(components[23][:]) -plt.plot(components[24][:]) +plt.plot(components[20], label='20') +plt.plot(components[21], label='21') +plt.plot(components[22], label='22') +plt.plot(components[23], label='23') +plt.plot(components[24], label='24') +plt.legend(loc='upper right') plt.show() \ No newline at end of file