HG_REPOSITORIES/LPP/INSTRUMENTATION/SOLO_LFR/DEV_PLE Files · TimeGenerator-qt/bin/TIMEGEN_RELOAD_SPW.py

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HG_REPOSITORIES » LPP » INSTRUMENTATION » SOLO_LFR » DEV_PLE

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/DEV_PLE

HK packet changed due to misalignment of one int data...

HK packet changed due to misalignment of one int data v e1 and e2 are now valid in the HK packet

paul - - Load All Authors

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r108:f4cfe60821dc VHDLib206


                r132:f919b72104cf

VHDLib206

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             TIMEGEN_RELOAD_SPW.py
        
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             / TimeGenerator-qt / bin / TIMEGEN_RELOAD_SPW.py
          
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      #!/usr/bin/lppmon -e

      RMAPPlugin0.setValueSpaceWireLinkNumber( 2 )

      RMAPPlugin0.setValueTargetLogicalAddress( 253 )

      dsu3plugin0.openFile("/opt/DEV_PLE/TimeGenerator-qt/bin/timegen")

      dsu3plugin0.loadFile()

      dsu3plugin0.run()

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				#!/usr/bin/lppmon -e

				RMAPPlugin0.setValueSpaceWireLinkNumber( 2 )
				RMAPPlugin0.setValueTargetLogicalAddress( 253 )

				dsu3plugin0.openFile("/opt/DEV_PLE/TimeGenerator-qt/bin/timegen")
				dsu3plugin0.loadFile()
				dsu3plugin0.run()