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#ifndef GSCMEMORY_HPP_
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#define GSCMEMORY_HPP_
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#ifndef LEON3
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#define LEON3
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#endif
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static unsigned int getCacheControlRegister(){
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#ifdef LEON3
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unsigned int cacheControlRegister = 0;
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__asm__ __volatile__("lda [%%g0] 2, %0" : "=r"(cacheControlRegister) : );
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return cacheControlRegister;
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#endif
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}
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static void setCacheControlRegister(unsigned int cacheControlRegister)
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{
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#ifdef LEON3
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__asm__ __volatile__("sta %0, [%%g0] 2" : : "r"(cacheControlRegister));
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#endif
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}
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/**
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* Flush the data cache and the instruction cache.
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*
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* @return
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*/
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static inline void flushCache() {
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asm("flush");
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}
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static void resetCacheControlRegister() {
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#ifdef LEON3
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unsigned int cacheControlRegister;
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cacheControlRegister = 0x00;
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setCacheControlRegister(cacheControlRegister);
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#endif
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}
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static void enableInstructionCache() {
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#ifdef LEON3
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unsigned int cacheControlRegister;
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cacheControlRegister = getCacheControlRegister();
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cacheControlRegister = (cacheControlRegister | 0x3);
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setCacheControlRegister(cacheControlRegister);
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#endif
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}
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static void enableDataCache() {
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#ifdef LEON3
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unsigned int cacheControlRegister;
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cacheControlRegister = getCacheControlRegister();
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cacheControlRegister = (cacheControlRegister | 0xc);
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setCacheControlRegister(cacheControlRegister);
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#endif
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}
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static void enableInstructionBurstFetch() {
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#ifdef LEON3
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unsigned int cacheControlRegister;
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cacheControlRegister = getCacheControlRegister();
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// set the bit IB to 1
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cacheControlRegister = (cacheControlRegister | 0x10000);
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setCacheControlRegister(cacheControlRegister);
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#endif
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}
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#endif /* GSCMEMORY_HPP_ */
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