##// END OF EJS Templates
remove unused function...
paul -
r281:c264bc5ef37a R3a
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@@ -1,84 +1,83
1 1 #ifndef FSW_MISC_H_INCLUDED
2 2 #define FSW_MISC_H_INCLUDED
3 3
4 4 #include <rtems.h>
5 5 #include <stdio.h>
6 6 #include <grspw.h>
7 7 #include <grlib_regs.h>
8 8
9 9 #include "fsw_params.h"
10 10 #include "fsw_spacewire.h"
11 11 #include "lfr_cpu_usage_report.h"
12 12
13 13
14 14 enum lfr_reset_cause_t{
15 15 UNKNOWN_CAUSE,
16 16 POWER_ON,
17 17 TC_RESET,
18 18 WATCHDOG,
19 19 ERROR_RESET,
20 20 UNEXP_RESET
21 21 };
22 22
23 23 extern gptimer_regs_t *gptimer_regs;
24 24 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
25 25 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
26 26
27 27 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
28 28
29 29 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
30 30 rtems_id HK_id; // id of the HK rate monotonic period
31 31
32 32 void timer_configure( unsigned char timer, unsigned int clock_divider,
33 33 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
34 34 void timer_start( unsigned char timer );
35 35 void timer_stop( unsigned char timer );
36 36 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
37 37
38 38 // WATCHDOG
39 39 rtems_isr watchdog_isr( rtems_vector_number vector );
40 40 void watchdog_configure(void);
41 41 void watchdog_stop(void);
42 42 void watchdog_reload(void);
43 43 void watchdog_start(void);
44 44
45 45 // SERIAL LINK
46 46 int send_console_outputs_on_apbuart_port( void );
47 47 int enable_apbuart_transmitter( void );
48 48 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
49 49
50 50 // RTEMS TASKS
51 51 rtems_task load_task( rtems_task_argument argument );
52 52 rtems_task hous_task( rtems_task_argument argument );
53 53 rtems_task dumb_task( rtems_task_argument unused );
54 54
55 55 void init_housekeeping_parameters( void );
56 56 void increment_seq_counter(unsigned short *packetSequenceControl);
57 57 void getTime( unsigned char *time);
58 58 unsigned long long int getTimeAsUnsignedLongLongInt( );
59 59 void send_dumb_hk( void );
60 60 void get_temperatures( unsigned char *temperatures );
61 61 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
62 62 void get_cpu_load( unsigned char *resource_statistics );
63 63 void set_hk_lfr_sc_potential_flag( bool state );
64 void set_hk_lfr_mag_fields_flag( bool state );
65 64 void set_sy_lfr_watchdog_enabled( bool state );
66 65 void set_hk_lfr_calib_enable( bool state );
67 66 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
68 67 void hk_lfr_le_me_he_update();
69 68 void set_hk_lfr_time_not_synchro();
70 69
71 70 extern int sched_yield( void );
72 71 extern void rtems_cpu_usage_reset();
73 72 extern ring_node *current_ring_node_f3;
74 73 extern ring_node *ring_node_to_send_cwf_f3;
75 74 extern ring_node waveform_ring_f3[];
76 75 extern unsigned short sequenceCounterHK;
77 76
78 77 extern unsigned char hk_lfr_q_sd_fifo_size_max;
79 78 extern unsigned char hk_lfr_q_rv_fifo_size_max;
80 79 extern unsigned char hk_lfr_q_p0_fifo_size_max;
81 80 extern unsigned char hk_lfr_q_p1_fifo_size_max;
82 81 extern unsigned char hk_lfr_q_p2_fifo_size_max;
83 82
84 83 #endif // FSW_MISC_H_INCLUDED
@@ -1,802 +1,790
1 1 /** General usage functions and RTEMS tasks.
2 2 *
3 3 * @file
4 4 * @author P. LEROY
5 5 *
6 6 */
7 7
8 8 #include "fsw_misc.h"
9 9
10 10 void timer_configure(unsigned char timer, unsigned int clock_divider,
11 11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 12 {
13 13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 14 *
15 15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 18 * @param interrupt_level is the interrupt level that the timer drives.
19 19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 20 *
21 21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 22 *
23 23 */
24 24
25 25 rtems_status_code status;
26 26 rtems_isr_entry old_isr_handler;
27 27
28 28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29 29
30 30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 31 if (status!=RTEMS_SUCCESSFUL)
32 32 {
33 33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 34 }
35 35
36 36 timer_set_clock_divider( timer, clock_divider);
37 37 }
38 38
39 39 void timer_start(unsigned char timer)
40 40 {
41 41 /** This function starts a GPTIMER timer.
42 42 *
43 43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 45 *
46 46 */
47 47
48 48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 53 }
54 54
55 55 void timer_stop(unsigned char timer)
56 56 {
57 57 /** This function stops a GPTIMER timer.
58 58 *
59 59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 61 *
62 62 */
63 63
64 64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 67 }
68 68
69 69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
70 70 {
71 71 /** This function sets the clock divider of a GPTIMER timer.
72 72 *
73 73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 76 *
77 77 */
78 78
79 79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 80 }
81 81
82 82 // WATCHDOG
83 83
84 84 rtems_isr watchdog_isr( rtems_vector_number vector )
85 85 {
86 86 rtems_status_code status_code;
87 87
88 88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
89 89
90 90 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
91 91
92 92 exit(0);
93 93 }
94 94
95 95 void watchdog_configure(void)
96 96 {
97 97 /** This function configure the watchdog.
98 98 *
99 99 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
100 100 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
101 101 *
102 102 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
103 103 *
104 104 */
105 105
106 106 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
107 107
108 108 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
109 109
110 110 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
111 111 }
112 112
113 113 void watchdog_stop(void)
114 114 {
115 115 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
116 116 timer_stop( TIMER_WATCHDOG );
117 117 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
118 118 }
119 119
120 120 void watchdog_reload(void)
121 121 {
122 122 /** This function reloads the watchdog timer counter with the timer reload value.
123 123 *
124 124 * @param void
125 125 *
126 126 * @return void
127 127 *
128 128 */
129 129
130 130 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
131 131 }
132 132
133 133 void watchdog_start(void)
134 134 {
135 135 /** This function starts the watchdog timer.
136 136 *
137 137 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
138 138 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
139 139 *
140 140 */
141 141
142 142 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
143 143
144 144 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
145 145 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
146 146 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
147 147 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
148 148
149 149 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
150 150
151 151 }
152 152
153 153 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
154 154 {
155 155 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
156 156
157 157 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
158 158
159 159 return 0;
160 160 }
161 161
162 162 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
163 163 {
164 164 /** This function sets the scaler reload register of the apbuart module
165 165 *
166 166 * @param regs is the address of the apbuart registers in memory
167 167 * @param value is the value that will be stored in the scaler register
168 168 *
169 169 * The value shall be set by the software to get data on the serial interface.
170 170 *
171 171 */
172 172
173 173 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
174 174
175 175 apbuart_regs->scaler = value;
176 176
177 177 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
178 178 }
179 179
180 180 //************
181 181 // RTEMS TASKS
182 182
183 183 rtems_task load_task(rtems_task_argument argument)
184 184 {
185 185 BOOT_PRINTF("in LOAD *** \n")
186 186
187 187 rtems_status_code status;
188 188 unsigned int i;
189 189 unsigned int j;
190 190 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
191 191 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
192 192
193 193 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
194 194
195 195 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
196 196 if( status != RTEMS_SUCCESSFUL ) {
197 197 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
198 198 }
199 199
200 200 i = 0;
201 201 j = 0;
202 202
203 203 watchdog_configure();
204 204
205 205 watchdog_start();
206 206
207 207 set_sy_lfr_watchdog_enabled( true );
208 208
209 209 while(1){
210 210 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
211 211 watchdog_reload();
212 212 i = i + 1;
213 213 if ( i == 10 )
214 214 {
215 215 i = 0;
216 216 j = j + 1;
217 217 PRINTF1("%d\n", j)
218 218 }
219 219 #ifdef DEBUG_WATCHDOG
220 220 if (j == 3 )
221 221 {
222 222 status = rtems_task_delete(RTEMS_SELF);
223 223 }
224 224 #endif
225 225 }
226 226 }
227 227
228 228 rtems_task hous_task(rtems_task_argument argument)
229 229 {
230 230 rtems_status_code status;
231 231 rtems_status_code spare_status;
232 232 rtems_id queue_id;
233 233 rtems_rate_monotonic_period_status period_status;
234 234
235 235 status = get_message_queue_id_send( &queue_id );
236 236 if (status != RTEMS_SUCCESSFUL)
237 237 {
238 238 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
239 239 }
240 240
241 241 BOOT_PRINTF("in HOUS ***\n");
242 242
243 243 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
244 244 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
245 245 if( status != RTEMS_SUCCESSFUL ) {
246 246 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
247 247 }
248 248 }
249 249
250 250 status = rtems_rate_monotonic_cancel(HK_id);
251 251 if( status != RTEMS_SUCCESSFUL ) {
252 252 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
253 253 }
254 254 else {
255 255 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
256 256 }
257 257
258 258 // startup phase
259 259 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
260 260 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
261 261 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
262 262 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
263 263 {
264 264 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
265 265 {
266 266 break; // break if LFR is synchronized
267 267 }
268 268 else
269 269 {
270 270 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
271 271 // sched_yield();
272 272 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
273 273 }
274 274 }
275 275 status = rtems_rate_monotonic_cancel(HK_id);
276 276 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
277 277
278 278 set_hk_lfr_reset_cause( POWER_ON );
279 279
280 280 while(1){ // launch the rate monotonic task
281 281 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
282 282 if ( status != RTEMS_SUCCESSFUL ) {
283 283 PRINTF1( "in HOUS *** ERR period: %d\n", status);
284 284 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
285 285 }
286 286 else {
287 287 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
288 288 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
289 289 increment_seq_counter( &sequenceCounterHK );
290 290
291 291 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
292 292 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
293 293 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
294 294 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
295 295 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
296 296 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
297 297
298 298 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
299 299
300 300 spacewire_read_statistics();
301 301
302 302 update_hk_with_grspw_stats();
303 303
304 304 set_hk_lfr_time_not_synchro();
305 305
306 306 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
307 307 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
308 308 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
309 309 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
310 310 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
311 311
312 312 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
313 313 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
314 314 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
315 315 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
316 316 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
317 317
318 318 hk_lfr_le_me_he_update();
319 319
320 320 // SEND PACKET
321 321 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
322 322 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
323 323 if (status != RTEMS_SUCCESSFUL) {
324 324 PRINTF1("in HOUS *** ERR send: %d\n", status)
325 325 }
326 326 }
327 327 }
328 328
329 329 PRINTF("in HOUS *** deleting task\n")
330 330
331 331 status = rtems_task_delete( RTEMS_SELF ); // should not return
332 332
333 333 return;
334 334 }
335 335
336 336 rtems_task dumb_task( rtems_task_argument unused )
337 337 {
338 338 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
339 339 *
340 340 * @param unused is the starting argument of the RTEMS task
341 341 *
342 342 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
343 343 *
344 344 */
345 345
346 346 unsigned int i;
347 347 unsigned int intEventOut;
348 348 unsigned int coarse_time = 0;
349 349 unsigned int fine_time = 0;
350 350 rtems_event_set event_out;
351 351
352 352 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
353 353 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
354 354 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
355 355 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
356 356 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
357 357 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
358 358 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
359 359 "ready for dump", // RTEMS_EVENT_7
360 360 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
361 361 "tick", // RTEMS_EVENT_9
362 362 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
363 363 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
364 364 "WATCHDOG timer", // RTEMS_EVENT_12
365 365 "TIMECODE timer", // RTEMS_EVENT_13
366 366 "TIMECODE ISR" // RTEMS_EVENT_14
367 367 };
368 368
369 369 BOOT_PRINTF("in DUMB *** \n")
370 370
371 371 while(1){
372 372 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
373 373 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
374 374 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
375 375 | RTEMS_EVENT_14,
376 376 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
377 377 intEventOut = (unsigned int) event_out;
378 378 for ( i=0; i<32; i++)
379 379 {
380 380 if ( ((intEventOut >> i) & 0x0001) != 0)
381 381 {
382 382 coarse_time = time_management_regs->coarse_time;
383 383 fine_time = time_management_regs->fine_time;
384 384 if (i==12)
385 385 {
386 386 PRINTF1("%s\n", DumbMessages[12])
387 387 }
388 388 if (i==13)
389 389 {
390 390 PRINTF1("%s\n", DumbMessages[13])
391 391 }
392 392 if (i==14)
393 393 {
394 394 PRINTF1("%s\n", DumbMessages[1])
395 395 }
396 396 }
397 397 }
398 398 }
399 399 }
400 400
401 401 //*****************************
402 402 // init housekeeping parameters
403 403
404 404 void init_housekeeping_parameters( void )
405 405 {
406 406 /** This function initialize the housekeeping_packet global variable with default values.
407 407 *
408 408 */
409 409
410 410 unsigned int i = 0;
411 411 unsigned char *parameters;
412 412 unsigned char sizeOfHK;
413 413
414 414 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
415 415
416 416 parameters = (unsigned char*) &housekeeping_packet;
417 417
418 418 for(i = 0; i< sizeOfHK; i++)
419 419 {
420 420 parameters[i] = 0x00;
421 421 }
422 422
423 423 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
424 424 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
425 425 housekeeping_packet.reserved = DEFAULT_RESERVED;
426 426 housekeeping_packet.userApplication = CCSDS_USER_APP;
427 427 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
428 428 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
429 429 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
430 430 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
431 431 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
432 432 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
433 433 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
434 434 housekeeping_packet.serviceType = TM_TYPE_HK;
435 435 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
436 436 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
437 437 housekeeping_packet.sid = SID_HK;
438 438
439 439 // init status word
440 440 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
441 441 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
442 442 // init software version
443 443 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
444 444 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
445 445 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
446 446 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
447 447 // init fpga version
448 448 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
449 449 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
450 450 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
451 451 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
452 452
453 453 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
454 454 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
455 455 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
456 456 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
457 457 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
458 458 }
459 459
460 460 void increment_seq_counter( unsigned short *packetSequenceControl )
461 461 {
462 462 /** This function increment the sequence counter passes in argument.
463 463 *
464 464 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
465 465 *
466 466 */
467 467
468 468 unsigned short segmentation_grouping_flag;
469 469 unsigned short sequence_cnt;
470 470
471 471 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
472 472 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
473 473
474 474 if ( sequence_cnt < SEQ_CNT_MAX)
475 475 {
476 476 sequence_cnt = sequence_cnt + 1;
477 477 }
478 478 else
479 479 {
480 480 sequence_cnt = 0;
481 481 }
482 482
483 483 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
484 484 }
485 485
486 486 void getTime( unsigned char *time)
487 487 {
488 488 /** This function write the current local time in the time buffer passed in argument.
489 489 *
490 490 */
491 491
492 492 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
493 493 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
494 494 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
495 495 time[3] = (unsigned char) (time_management_regs->coarse_time);
496 496 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
497 497 time[5] = (unsigned char) (time_management_regs->fine_time);
498 498 }
499 499
500 500 unsigned long long int getTimeAsUnsignedLongLongInt( )
501 501 {
502 502 /** This function write the current local time in the time buffer passed in argument.
503 503 *
504 504 */
505 505 unsigned long long int time;
506 506
507 507 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
508 508 + time_management_regs->fine_time;
509 509
510 510 return time;
511 511 }
512 512
513 513 void send_dumb_hk( void )
514 514 {
515 515 Packet_TM_LFR_HK_t dummy_hk_packet;
516 516 unsigned char *parameters;
517 517 unsigned int i;
518 518 rtems_id queue_id;
519 519
520 520 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
521 521 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
522 522 dummy_hk_packet.reserved = DEFAULT_RESERVED;
523 523 dummy_hk_packet.userApplication = CCSDS_USER_APP;
524 524 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
525 525 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
526 526 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
527 527 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
528 528 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
529 529 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
530 530 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
531 531 dummy_hk_packet.serviceType = TM_TYPE_HK;
532 532 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
533 533 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
534 534 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
535 535 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
536 536 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
537 537 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
538 538 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
539 539 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
540 540 dummy_hk_packet.sid = SID_HK;
541 541
542 542 // init status word
543 543 dummy_hk_packet.lfr_status_word[0] = 0xff;
544 544 dummy_hk_packet.lfr_status_word[1] = 0xff;
545 545 // init software version
546 546 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
547 547 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
548 548 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
549 549 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
550 550 // init fpga version
551 551 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
552 552 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
553 553 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
554 554 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
555 555
556 556 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
557 557
558 558 for (i=0; i<100; i++)
559 559 {
560 560 parameters[i] = 0xff;
561 561 }
562 562
563 563 get_message_queue_id_send( &queue_id );
564 564
565 565 rtems_message_queue_send( queue_id, &dummy_hk_packet,
566 566 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
567 567 }
568 568
569 569 void get_temperatures( unsigned char *temperatures )
570 570 {
571 571 unsigned char* temp_scm_ptr;
572 572 unsigned char* temp_pcb_ptr;
573 573 unsigned char* temp_fpga_ptr;
574 574
575 575 // SEL1 SEL0
576 576 // 0 0 => PCB
577 577 // 0 1 => FPGA
578 578 // 1 0 => SCM
579 579
580 580 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
581 581 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
582 582 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
583 583
584 584 temperatures[0] = temp_scm_ptr[2];
585 585 temperatures[1] = temp_scm_ptr[3];
586 586 temperatures[2] = temp_pcb_ptr[2];
587 587 temperatures[3] = temp_pcb_ptr[3];
588 588 temperatures[4] = temp_fpga_ptr[2];
589 589 temperatures[5] = temp_fpga_ptr[3];
590 590 }
591 591
592 592 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
593 593 {
594 594 unsigned char* v_ptr;
595 595 unsigned char* e1_ptr;
596 596 unsigned char* e2_ptr;
597 597
598 598 v_ptr = (unsigned char *) &waveform_picker_regs->v;
599 599 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
600 600 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
601 601
602 602 spacecraft_potential[0] = v_ptr[2];
603 603 spacecraft_potential[1] = v_ptr[3];
604 604 spacecraft_potential[2] = e1_ptr[2];
605 605 spacecraft_potential[3] = e1_ptr[3];
606 606 spacecraft_potential[4] = e2_ptr[2];
607 607 spacecraft_potential[5] = e2_ptr[3];
608 608 }
609 609
610 610 void get_cpu_load( unsigned char *resource_statistics )
611 611 {
612 612 unsigned char cpu_load;
613 613
614 614 cpu_load = lfr_rtems_cpu_usage_report();
615 615
616 616 // HK_LFR_CPU_LOAD
617 617 resource_statistics[0] = cpu_load;
618 618
619 619 // HK_LFR_CPU_LOAD_MAX
620 620 if (cpu_load > resource_statistics[1])
621 621 {
622 622 resource_statistics[1] = cpu_load;
623 623 }
624 624
625 625 // CPU_LOAD_AVE
626 626 resource_statistics[2] = 0;
627 627
628 628 #ifndef PRINT_TASK_STATISTICS
629 629 rtems_cpu_usage_reset();
630 630 #endif
631 631
632 632 }
633 633
634 634 void set_hk_lfr_sc_potential_flag( bool state )
635 635 {
636 636 if (state == true)
637 637 {
638 638 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000]
639 639 }
640 640 else
641 641 {
642 642 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111]
643 643 }
644 644 }
645 645
646 void set_hk_lfr_mag_fields_flag( bool state )
647 {
648 if (state == true)
649 {
650 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x20; // [0010 0000]
651 }
652 else
653 {
654 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xd7; // [1101 1111]
655 }
656 }
657
658 646 void set_sy_lfr_watchdog_enabled( bool state )
659 647 {
660 648 if (state == true)
661 649 {
662 650 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x10; // [0001 0000]
663 651 }
664 652 else
665 653 {
666 654 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xef; // [1110 1111]
667 655 }
668 656 }
669 657
670 658 void set_hk_lfr_calib_enable( bool state )
671 659 {
672 660 if (state == true)
673 661 {
674 662 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000]
675 663 }
676 664 else
677 665 {
678 666 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111]
679 667 }
680 668 }
681 669
682 670 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
683 671 {
684 672 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf8; // [1111 1000]
685 673
686 674 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
687 675 | (lfr_reset_cause & 0x07 ); // [0000 0111]
688 676
689 677 }
690 678
691 679 void hk_lfr_le_me_he_update()
692 680 {
693 681 unsigned int hk_lfr_le_cnt;
694 682 unsigned int hk_lfr_me_cnt;
695 683 unsigned int hk_lfr_he_cnt;
696 684
697 685 hk_lfr_le_cnt = 0;
698 686 hk_lfr_me_cnt = 0;
699 687 hk_lfr_he_cnt = 0;
700 688
701 689 //update the low severity error counter
702 690 hk_lfr_le_cnt =
703 691 housekeeping_packet.hk_lfr_dpu_spw_parity
704 692 + housekeeping_packet.hk_lfr_dpu_spw_disconnect
705 693 + housekeeping_packet.hk_lfr_dpu_spw_escape
706 694 + housekeeping_packet.hk_lfr_dpu_spw_credit
707 695 + housekeeping_packet.hk_lfr_dpu_spw_write_sync
708 696 + housekeeping_packet.hk_lfr_timecode_erroneous
709 697 + housekeeping_packet.hk_lfr_timecode_missing
710 698 + housekeeping_packet.hk_lfr_timecode_invalid
711 699 + housekeeping_packet.hk_lfr_time_timecode_it
712 700 + housekeeping_packet.hk_lfr_time_not_synchro
713 701 + housekeeping_packet.hk_lfr_time_timecode_ctr;
714 702 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb => not handled by the grspw driver
715 703 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb => not handled by the grspw driver
716 704
717 705 //update the medium severity error counter
718 706 hk_lfr_me_cnt =
719 707 housekeeping_packet.hk_lfr_dpu_spw_early_eop
720 708 + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr
721 709 + housekeeping_packet.hk_lfr_dpu_spw_eep
722 710 + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
723 711
724 712 //update the high severity error counter
725 713 hk_lfr_he_cnt = 0;
726 714
727 715 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
728 716 // LE
729 717 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8);
730 718 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff);
731 719 // ME
732 720 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8);
733 721 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff);
734 722 // HE
735 723 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8);
736 724 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff);
737 725
738 726 }
739 727
740 728 void set_hk_lfr_time_not_synchro()
741 729 {
742 730 static unsigned char synchroLost = 1;
743 731 int synchronizationBit;
744 732
745 733 // get the synchronization bit
746 734 synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000
747 735
748 736 switch (synchronizationBit)
749 737 {
750 738 case 0:
751 739 if (synchroLost == 1)
752 740 {
753 741 synchroLost = 0;
754 742 }
755 743 break;
756 744 case 1:
757 745 if (synchroLost == 0 )
758 746 {
759 747 synchroLost = 1;
760 748 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
761 749 update_hk_lfr_last_er_fields( RID_LE_LFR_TIME, CODE_NOT_SYNCHRO );
762 750 }
763 751 break;
764 752 default:
765 753 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
766 754 break;
767 755 }
768 756
769 757 }
770 758
771 759 void set_hk_lfr_ahb_correctable()
772 760 {
773 761 /** This function builds the error counter hk_lfr_ahb_correctable using the statistics provided
774 762 * by the Cache Control Register (ASI 2, offset 0) and in the Register Protection Control Register (ASR16) on the
775 763 * detected errors in the cache, in the integer unit and in the floating point unit.
776 764 *
777 765 * @param void
778 766 *
779 767 * @return void
780 768 *
781 769 * All errors are summed to set the value of the hk_lfr_ahb_correctable counter.
782 770 *
783 771 */
784 772
785 773 unsigned int ahb_correctable;
786 774 unsigned int instructionErrorCounter;
787 775 unsigned int dataErrorCounter;
788 776 unsigned int fprfErrorCounter;
789 777 unsigned int iurfErrorCounter;
790 778
791 779 CCR_getInstructionAndDataErrorCounters( &instructionErrorCounter, &dataErrorCounter);
792 780 ASR16_get_FPRF_IURF_ErrorCounters( &fprfErrorCounter, &iurfErrorCounter);
793 781
794 782 ahb_correctable = instructionErrorCounter
795 783 + dataErrorCounter
796 784 + fprfErrorCounter
797 785 + iurfErrorCounter
798 786 + housekeeping_packet.hk_lfr_ahb_correctable;
799 787
800 788 housekeeping_packet.hk_lfr_ahb_correctable = (unsigned char) (ahb_correctable & 0xff); // [1111 1111]
801 789
802 790 }
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