##// END OF EJS Templates
commit before going back to 3.1.0.2 for LESIA compilation
paul -
r295:16a2669a01ce R3_plus draft
parent child
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@@ -1,2 +1,2
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 c378fa14eadd80b3b873ca7c8f9f387893c07692 header/lfr_common_headers
2 1ffa3d630b9ced4a87a362dafb10d9838e9cc0d9 header/lfr_common_headers
@@ -1,123 +1,125
1 TEMPLATE = app
1 TEMPLATE = app
2 # CONFIG += console v8 sim
2 # CONFIG += console v8 sim
3 # CONFIG options =
3 # CONFIG options =
4 # verbose
4 # verbose
5 # boot_messages
5 # boot_messages
6 # debug_messages
6 # debug_messages
7 # cpu_usage_report
7 # cpu_usage_report
8 # stack_report
8 # stack_report
9 # vhdl_dev
9 # vhdl_dev
10 # debug_tch
10 # debug_tch
11 # lpp_dpu_destid /!\ REMOVE BEFORE DELIVERY TO LESIA /!\
11 # lpp_dpu_destid /!\ REMOVE BEFORE DELIVERY TO LESIA /!\
12 # debug_watchdog
12 # debug_watchdog
13 CONFIG += console verbose lpp_dpu_destid cpu_usage_report
13 CONFIG += console verbose lpp_dpu_destid cpu_usage_report
14 CONFIG -= qt
14 CONFIG -= qt
15
15
16 include(./sparc.pri)
16 include(./sparc.pri)
17
17
18 INCLUDEPATH += /opt/rtems-4.10/sparc-rtems/leon3/lib/include
19
18 # flight software version
20 # flight software version
19 SWVERSION=-1-0
21 SWVERSION=-1-0
20 DEFINES += SW_VERSION_N1=3 # major
22 DEFINES += SW_VERSION_N1=3 # major
21 DEFINES += SW_VERSION_N2=1 # minor
23 DEFINES += SW_VERSION_N2=1 # minor
22 DEFINES += SW_VERSION_N3=0 # patch
24 DEFINES += SW_VERSION_N3=0 # patch
23 DEFINES += SW_VERSION_N4=2 # internal
25 DEFINES += SW_VERSION_N4=2 # internal
24
26
25 # <GCOV>
27 # <GCOV>
26 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
28 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
27 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
29 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
28 # </GCOV>
30 # </GCOV>
29
31
30 # <CHANGE BEFORE FLIGHT>
32 # <CHANGE BEFORE FLIGHT>
31 contains( CONFIG, lpp_dpu_destid ) {
33 contains( CONFIG, lpp_dpu_destid ) {
32 DEFINES += LPP_DPU_DESTID
34 DEFINES += LPP_DPU_DESTID
33 }
35 }
34 # </CHANGE BEFORE FLIGHT>
36 # </CHANGE BEFORE FLIGHT>
35
37
36 contains( CONFIG, debug_tch ) {
38 contains( CONFIG, debug_tch ) {
37 DEFINES += DEBUG_TCH
39 DEFINES += DEBUG_TCH
38 }
40 }
39 DEFINES += MSB_FIRST_TCH
41 DEFINES += MSB_FIRST_TCH
40
42
41 contains( CONFIG, vhdl_dev ) {
43 contains( CONFIG, vhdl_dev ) {
42 DEFINES += VHDL_DEV
44 DEFINES += VHDL_DEV
43 }
45 }
44
46
45 contains( CONFIG, verbose ) {
47 contains( CONFIG, verbose ) {
46 DEFINES += PRINT_MESSAGES_ON_CONSOLE
48 DEFINES += PRINT_MESSAGES_ON_CONSOLE
47 }
49 }
48
50
49 contains( CONFIG, debug_messages ) {
51 contains( CONFIG, debug_messages ) {
50 DEFINES += DEBUG_MESSAGES
52 DEFINES += DEBUG_MESSAGES
51 }
53 }
52
54
53 contains( CONFIG, cpu_usage_report ) {
55 contains( CONFIG, cpu_usage_report ) {
54 DEFINES += PRINT_TASK_STATISTICS
56 DEFINES += PRINT_TASK_STATISTICS
55 }
57 }
56
58
57 contains( CONFIG, stack_report ) {
59 contains( CONFIG, stack_report ) {
58 DEFINES += PRINT_STACK_REPORT
60 DEFINES += PRINT_STACK_REPORT
59 }
61 }
60
62
61 contains( CONFIG, boot_messages ) {
63 contains( CONFIG, boot_messages ) {
62 DEFINES += BOOT_MESSAGES
64 DEFINES += BOOT_MESSAGES
63 }
65 }
64
66
65 contains( CONFIG, debug_watchdog ) {
67 contains( CONFIG, debug_watchdog ) {
66 DEFINES += DEBUG_WATCHDOG
68 DEFINES += DEBUG_WATCHDOG
67 }
69 }
68
70
69 #doxygen.target = doxygen
71 #doxygen.target = doxygen
70 #doxygen.commands = doxygen ../doc/Doxyfile
72 #doxygen.commands = doxygen ../doc/Doxyfile
71 #QMAKE_EXTRA_TARGETS += doxygen
73 #QMAKE_EXTRA_TARGETS += doxygen
72
74
73 TARGET = fsw
75 TARGET = fsw
74
76
75 INCLUDEPATH += \
77 INCLUDEPATH += \
76 $${PWD}/../src \
78 $${PWD}/../src \
77 $${PWD}/../header \
79 $${PWD}/../header \
78 $${PWD}/../header/lfr_common_headers \
80 $${PWD}/../header/lfr_common_headers \
79 $${PWD}/../header/processing \
81 $${PWD}/../header/processing \
80 $${PWD}/../LFR_basic-parameters
82 $${PWD}/../LFR_basic-parameters
81
83
82 SOURCES += \
84 SOURCES += \
83 ../src/wf_handler.c \
85 ../src/wf_handler.c \
84 ../src/tc_handler.c \
86 ../src/tc_handler.c \
85 ../src/fsw_misc.c \
87 ../src/fsw_misc.c \
86 ../src/fsw_init.c \
88 ../src/fsw_init.c \
87 ../src/fsw_globals.c \
89 ../src/fsw_globals.c \
88 ../src/fsw_spacewire.c \
90 ../src/fsw_spacewire.c \
89 ../src/tc_load_dump_parameters.c \
91 ../src/tc_load_dump_parameters.c \
90 ../src/tm_lfr_tc_exe.c \
92 ../src/tm_lfr_tc_exe.c \
91 ../src/tc_acceptance.c \
93 ../src/tc_acceptance.c \
92 ../src/processing/fsw_processing.c \
94 ../src/processing/fsw_processing.c \
93 ../src/processing/avf0_prc0.c \
95 ../src/processing/avf0_prc0.c \
94 ../src/processing/avf1_prc1.c \
96 ../src/processing/avf1_prc1.c \
95 ../src/processing/avf2_prc2.c \
97 ../src/processing/avf2_prc2.c \
96 ../src/lfr_cpu_usage_report.c \
98 ../src/lfr_cpu_usage_report.c \
97 ../LFR_basic-parameters/basic_parameters.c
99 ../LFR_basic-parameters/basic_parameters.c
98
100
99 HEADERS += \
101 HEADERS += \
100 ../header/wf_handler.h \
102 ../header/wf_handler.h \
101 ../header/tc_handler.h \
103 ../header/tc_handler.h \
102 ../header/grlib_regs.h \
104 ../header/grlib_regs.h \
103 ../header/fsw_misc.h \
105 ../header/fsw_misc.h \
104 ../header/fsw_init.h \
106 ../header/fsw_init.h \
105 ../header/fsw_spacewire.h \
107 ../header/fsw_spacewire.h \
106 ../header/tc_load_dump_parameters.h \
108 ../header/tc_load_dump_parameters.h \
107 ../header/tm_lfr_tc_exe.h \
109 ../header/tm_lfr_tc_exe.h \
108 ../header/tc_acceptance.h \
110 ../header/tc_acceptance.h \
109 ../header/processing/fsw_processing.h \
111 ../header/processing/fsw_processing.h \
110 ../header/processing/avf0_prc0.h \
112 ../header/processing/avf0_prc0.h \
111 ../header/processing/avf1_prc1.h \
113 ../header/processing/avf1_prc1.h \
112 ../header/processing/avf2_prc2.h \
114 ../header/processing/avf2_prc2.h \
113 ../header/fsw_params_wf_handler.h \
115 ../header/fsw_params_wf_handler.h \
114 ../header/lfr_cpu_usage_report.h \
116 ../header/lfr_cpu_usage_report.h \
115 ../header/lfr_common_headers/ccsds_types.h \
117 ../header/lfr_common_headers/ccsds_types.h \
116 ../header/lfr_common_headers/fsw_params.h \
118 ../header/lfr_common_headers/fsw_params.h \
117 ../header/lfr_common_headers/fsw_params_nb_bytes.h \
119 ../header/lfr_common_headers/fsw_params_nb_bytes.h \
118 ../header/lfr_common_headers/fsw_params_processing.h \
120 ../header/lfr_common_headers/fsw_params_processing.h \
119 ../header/lfr_common_headers/tm_byte_positions.h \
121 ../header/lfr_common_headers/tm_byte_positions.h \
120 ../LFR_basic-parameters/basic_parameters.h \
122 ../LFR_basic-parameters/basic_parameters.h \
121 ../LFR_basic-parameters/basic_parameters_params.h \
123 ../LFR_basic-parameters/basic_parameters_params.h \
122 ../header/GscMemoryLPP.hpp
124 ../header/GscMemoryLPP.hpp
123
125
@@ -1,97 +1,99
1 CONFIG += console
1 CONFIG += console
2 CONFIG -= qt
2 CONFIG -= qt
3 QMAKE_CC=sparc-rtems-gcc
3 QMAKE_CC=sparc-rtems-gcc
4 message(C compiler forced to: $$QMAKE_CC)
4 message(C compiler forced to: $$QMAKE_CC)
5 QMAKE_CXX=sparc-rtems-g++
5 QMAKE_CXX=sparc-rtems-g++
6 message(C++ compiler forced to: $$QMAKE_CXX)
6 message(C++ compiler forced to: $$QMAKE_CXX)
7 QMAKE_AR=sparc-rtems-ar rcs
7 QMAKE_AR=sparc-rtems-ar rcs
8 message(Archiver forced to: $$QMAKE_AR)
8 message(Archiver forced to: $$QMAKE_AR)
9 QMAKE_LINK=sparc-rtems-g++
9 QMAKE_LINK=sparc-rtems-g++
10 message(Linker forced to: $$QMAKE_LINK)
10 message(Linker forced to: $$QMAKE_LINK)
11 QMAKE_LINK_SHLIB=sparc-rtems-g++
11 QMAKE_LINK_SHLIB=sparc-rtems-g++
12 QMAKE_OBJCOPY= sparc-rtems-objcopy
12 QMAKE_OBJCOPY= sparc-rtems-objcopy
13 QMAKE_STRIP=sparc-rtems-strip
13 QMAKE_STRIP=sparc-rtems-strip
14 QMAKE_GDB=sparc-rtems-gdb
14 QMAKE_GDB=sparc-rtems-gdb
15
15
16 INCLUDEPATH += /opt/rtems-4.10
16 #INCLUDEPATH += /opt/rtems-4.10
17 INCLUDEPATH += /opt/rtems-4.10/sparc-rtems/leon3/lib/include
17
18
18 QMAKE_CFLAGS_DEBUG= -g
19 QMAKE_CFLAGS_DEBUG= -g
19 QMAKE_CFLAGS_RELEASE=""
20 QMAKE_CFLAGS_RELEASE=""
20 QMAKE_CXXFLAGS_DEBUG= -g
21 QMAKE_CXXFLAGS_DEBUG= -g
21 QMAKE_CXXFLAGS_RELEASE=""
22 QMAKE_CXXFLAGS_RELEASE=""
22 QMAKE_LFLAGS_RELEASE=""
23 QMAKE_LFLAGS_RELEASE=""
23 QMAKE_LFLAGS_DEBUG= -g
24 QMAKE_LFLAGS_DEBUG= -g
24 QMAKE_CXXFLAGS_DEPS =
25 QMAKE_CXXFLAGS_DEPS =
25 QMAKE_CXXFLAGS_WARN_ON = -Wall
26 QMAKE_CXXFLAGS_WARN_ON = -Wall
26 QMAKE_CXXFLAGS_WARN_OFF = -w
27 QMAKE_CXXFLAGS_WARN_OFF = -w
27 QMAKE_CXXFLAGS_RELEASE =
28 QMAKE_CXXFLAGS_RELEASE =
28 QMAKE_CXXFLAGS_DEBUG =
29 QMAKE_CXXFLAGS_DEBUG =
29 QMAKE_CXXFLAGS_YACC =
30 QMAKE_CXXFLAGS_YACC =
30 QMAKE_CXXFLAGS_THREAD =
31 QMAKE_CXXFLAGS_THREAD =
31 QMAKE_CXXFLAGS_RTTI_ON =
32 QMAKE_CXXFLAGS_RTTI_ON =
32 QMAKE_CXXFLAGS_RTTI_OFF =
33 QMAKE_CXXFLAGS_RTTI_OFF =
33 QMAKE_CXXFLAGS_EXCEPTIONS_ON =
34 QMAKE_CXXFLAGS_EXCEPTIONS_ON =
34 QMAKE_CXXFLAGS_EXCEPTIONS_OFF =
35 QMAKE_CXXFLAGS_EXCEPTIONS_OFF =
35 QMAKE_CFLAGS_WARN_ON = -Wall
36 QMAKE_CFLAGS_WARN_ON = -Wall
36 QMAKE_CFLAGS_WARN_OFF = -w
37 QMAKE_CFLAGS_WARN_OFF = -w
37 QMAKE_CFLAGS_RELEASE =
38 QMAKE_CFLAGS_RELEASE =
38 QMAKE_CFLAGS_YACC =
39 QMAKE_CFLAGS_YACC =
39 QMAKE_LFLAGS_EXCEPTIONS_ON =
40 QMAKE_LFLAGS_EXCEPTIONS_ON =
40 QMAKE_LFLAGS_EXCEPTIONS_OFF =
41 QMAKE_LFLAGS_EXCEPTIONS_OFF =
41 QMAKE_LFLAGS_RELEASE = -Xlinker -Map=output.map
42 QMAKE_LFLAGS_RELEASE = -Xlinker -Map=output.map
42 QMAKE_LFLAGS_CONSOLE =
43 QMAKE_LFLAGS_CONSOLE =
43 QMAKE_LFLAGS_WINDOWS =
44 QMAKE_LFLAGS_WINDOWS =
44 QMAKE_LFLAGS_DLL =
45 QMAKE_LFLAGS_DLL =
45 QMAKE_INCDIR_QT =
46 QMAKE_INCDIR_QT =
46 QMAKE_INCDIR =
47 QMAKE_INCDIR =
47 QMAKE_CFLAGS_SHLIB =
48 QMAKE_CFLAGS_SHLIB =
48 QMAKE_CFLAGS_STATIC_LIB =
49 QMAKE_CFLAGS_STATIC_LIB =
49 QMAKE_CXXFLAGS_SHLIB =
50 QMAKE_CXXFLAGS_SHLIB =
50 QMAKE_CXXFLAGS_STATIC_LIB =
51 QMAKE_CXXFLAGS_STATIC_LIB =
51 QMAKE_LIBS=""
52 QMAKE_LIBS=""
52 INCLUDEPATH=""
53 INCLUDEPATH=""
53 DEFINES=""
54 DEFINES=""
54
55
55 contains( TEMPLATE, app ) {
56 contains( TEMPLATE, app ) {
56 OBJECTS_DIR=obj
57 OBJECTS_DIR=obj
57 DESTDIR=bin
58 DESTDIR=bin
58 }
59 }
59
60
60 #QMAKE_CFLAGS_RELEASE += -O0
61 #QMAKE_CFLAGS_RELEASE += -O0
61 #QMAKE_CFLAGS_DEBUG += -O0
62 #QMAKE_CFLAGS_DEBUG += -O0
62 #QMAKE_CXXFLAGS_RELEASE += -O0
63 #QMAKE_CXXFLAGS_RELEASE += -O0
63 #QMAKE_CXXFLAGS_DEBUG += -O0
64 #QMAKE_CXXFLAGS_DEBUG += -O0
65
64 QMAKE_CFLAGS_RELEASE += -O3
66 QMAKE_CFLAGS_RELEASE += -O3
65 QMAKE_CFLAGS_DEBUG += -O3
67 QMAKE_CFLAGS_DEBUG += -O3
66 QMAKE_CXXFLAGS_RELEASE += -O3
68 QMAKE_CXXFLAGS_RELEASE += -O3
67 QMAKE_CXXFLAGS_DEBUG += -O3
69 QMAKE_CXXFLAGS_DEBUG += -O3
68
70
69 #QMAKE_CFLAGS_RELEASE+= -O3 -std=c99
71 #QMAKE_CFLAGS_RELEASE += -O3 -std=c99
70 #QMAKE_CFLAGS_DEBUG+= -O3 -std=c99
72 #QMAKE_CFLAGS_DEBUG += -O3 -std=c99
71 #QMAKE_CXXFLAGS_RELEASE+= -O3 -std=c99
73 #QMAKE_CXXFLAGS_RELEASE += -O3 -std=c99
72 #QMAKE_CXXFLAGS_DEBUG+= -O3 -std=c99
74 #QMAKE_CXXFLAGS_DEBUG += -O3 -std=c99
73
75
74 contains( TEMPLATE, app ) {
76 contains( TEMPLATE, app ) {
75 grmon.target = grmon
77 grmon.target = grmon
76 grmon.commands = cd $$DESTDIR && C:/opt/grmon-eval-2.0.29b/win32/bin/grmon.exe -uart COM4 -u
78 grmon.commands = cd $$DESTDIR && C:/opt/grmon-eval-2.0.29b/win32/bin/grmon.exe -uart COM4 -u
77 QMAKE_EXTRA_TARGETS += grmon
79 QMAKE_EXTRA_TARGETS += grmon
78 }
80 }
79
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@@ -1,83 +1,84
1 #ifndef FSW_MISC_H_INCLUDED
1 #ifndef FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <stdio.h>
5 #include <stdio.h>
6 #include <grspw.h>
6 #include <grspw.h>
7 #include <grlib_regs.h>
7 #include <grlib_regs.h>
8
8
9 #include "fsw_params.h"
9 #include "fsw_params.h"
10 #include "fsw_spacewire.h"
10 #include "fsw_spacewire.h"
11 #include "lfr_cpu_usage_report.h"
11 #include "lfr_cpu_usage_report.h"
12
12
13
13
14 enum lfr_reset_cause_t{
14 enum lfr_reset_cause_t{
15 UNKNOWN_CAUSE,
15 UNKNOWN_CAUSE,
16 POWER_ON,
16 POWER_ON,
17 TC_RESET,
17 TC_RESET,
18 WATCHDOG,
18 WATCHDOG,
19 ERROR_RESET,
19 ERROR_RESET,
20 UNEXP_RESET
20 UNEXP_RESET
21 };
21 };
22
22
23 extern gptimer_regs_t *gptimer_regs;
23 extern gptimer_regs_t *gptimer_regs;
24 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
24 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
25 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
25 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
26
26
27 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
27 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
28
28
29 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
29 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
30 rtems_id HK_id; // id of the HK rate monotonic period
30 rtems_id HK_id; // id of the HK rate monotonic period
31
31
32 void timer_configure( unsigned char timer, unsigned int clock_divider,
32 void timer_configure( unsigned char timer, unsigned int clock_divider,
33 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
33 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
34 void timer_start( unsigned char timer );
34 void timer_start( unsigned char timer );
35 void timer_stop( unsigned char timer );
35 void timer_stop( unsigned char timer );
36 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
36 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
37
37
38 // WATCHDOG
38 // WATCHDOG
39 rtems_isr watchdog_isr( rtems_vector_number vector );
39 rtems_isr watchdog_isr( rtems_vector_number vector );
40 void watchdog_configure(void);
40 void watchdog_configure(void);
41 void watchdog_stop(void);
41 void watchdog_stop(void);
42 void watchdog_reload(void);
42 void watchdog_reload(void);
43 void watchdog_start(void);
43 void watchdog_start(void);
44
44
45 // SERIAL LINK
45 // SERIAL LINK
46 int send_console_outputs_on_apbuart_port( void );
46 int send_console_outputs_on_apbuart_port( void );
47 int enable_apbuart_transmitter( void );
47 int enable_apbuart_transmitter( void );
48 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
48 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
49
49
50 // RTEMS TASKS
50 // RTEMS TASKS
51 rtems_task load_task( rtems_task_argument argument );
51 rtems_task load_task( rtems_task_argument argument );
52 rtems_task hous_task( rtems_task_argument argument );
52 rtems_task hous_task( rtems_task_argument argument );
53 rtems_task dumb_task( rtems_task_argument unused );
53 rtems_task dumb_task( rtems_task_argument unused );
54
54
55 void init_housekeeping_parameters( void );
55 void init_housekeeping_parameters( void );
56 void increment_seq_counter(unsigned short *packetSequenceControl);
56 void increment_seq_counter(unsigned short *packetSequenceControl);
57 void getTime( unsigned char *time);
57 void getTime( unsigned char *time);
58 unsigned long long int getTimeAsUnsignedLongLongInt( );
58 unsigned long long int getTimeAsUnsignedLongLongInt( );
59 void send_dumb_hk( void );
59 void send_dumb_hk( void );
60 void get_temperatures( unsigned char *temperatures );
60 void get_temperatures( unsigned char *temperatures );
61 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
61 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
62 void get_cpu_load( unsigned char *resource_statistics );
62 void get_cpu_load( unsigned char *resource_statistics );
63 void set_hk_lfr_sc_potential_flag( bool state );
63 void set_hk_lfr_sc_potential_flag( bool state );
64 void set_sy_lfr_pas_filter_enabled( bool state );
64 void set_sy_lfr_watchdog_enabled( bool state );
65 void set_sy_lfr_watchdog_enabled( bool state );
65 void set_hk_lfr_calib_enable( bool state );
66 void set_hk_lfr_calib_enable( bool state );
66 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
67 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
67 void hk_lfr_le_me_he_update();
68 void hk_lfr_le_me_he_update();
68 void set_hk_lfr_time_not_synchro();
69 void set_hk_lfr_time_not_synchro();
69
70
70 extern int sched_yield( void );
71 extern int sched_yield( void );
71 extern void rtems_cpu_usage_reset();
72 extern void rtems_cpu_usage_reset();
72 extern ring_node *current_ring_node_f3;
73 extern ring_node *current_ring_node_f3;
73 extern ring_node *ring_node_to_send_cwf_f3;
74 extern ring_node *ring_node_to_send_cwf_f3;
74 extern ring_node waveform_ring_f3[];
75 extern ring_node waveform_ring_f3[];
75 extern unsigned short sequenceCounterHK;
76 extern unsigned short sequenceCounterHK;
76
77
77 extern unsigned char hk_lfr_q_sd_fifo_size_max;
78 extern unsigned char hk_lfr_q_sd_fifo_size_max;
78 extern unsigned char hk_lfr_q_rv_fifo_size_max;
79 extern unsigned char hk_lfr_q_rv_fifo_size_max;
79 extern unsigned char hk_lfr_q_p0_fifo_size_max;
80 extern unsigned char hk_lfr_q_p0_fifo_size_max;
80 extern unsigned char hk_lfr_q_p1_fifo_size_max;
81 extern unsigned char hk_lfr_q_p1_fifo_size_max;
81 extern unsigned char hk_lfr_q_p2_fifo_size_max;
82 extern unsigned char hk_lfr_q_p2_fifo_size_max;
82
83
83 #endif // FSW_MISC_H_INCLUDED
84 #endif // FSW_MISC_H_INCLUDED
@@ -1,25 +1,35
1 #include <drvmgr/ambapp_bus.h>
1 #include <drvmgr/ambapp_bus.h>
2 #include <drvmgr/drvmgr.h>
2
3
3 // GRSPW0 resources
4 // GRSPW0 resources
4 struct drvmgr_key grlib_grspw_0n1_res[] = {
5 struct drvmgr_key grlib_grspw_0n1_res[] =
6 {
5 {"txBdCnt", KEY_TYPE_INT, {(unsigned int)50}}, // 7 SWF_F0, 7 SWF_F1, 7 SWF_F2, 7 CWF_F3, 7 CWF_F1 ou 7 CWF_F2
7 {"txBdCnt", KEY_TYPE_INT, {(unsigned int)50}}, // 7 SWF_F0, 7 SWF_F1, 7 SWF_F2, 7 CWF_F3, 7 CWF_F1 ou 7 CWF_F2
6 {"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
8 {"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
7 {"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},
9 {"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},
8 {"txHdrSize", KEY_TYPE_INT, {(unsigned int)34}},
10 {"txHdrSize", KEY_TYPE_INT, {(unsigned int)34}},
9 {"rxPktSize", KEY_TYPE_INT, {(unsigned int)228+4}},
11 {"rxPktSize", KEY_TYPE_INT, {(unsigned int)200}},
10 KEY_EMPTY
12 KEY_EMPTY
11 };
13 };
12
14
13 // If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.
15 // If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.
14
16
15 struct drvmgr_bus_res grlib_drv_resources = {
17 //struct drvmgr_bus_res grlib_drv_resources =
16 .next = NULL,
18 //{
17 .resource = {
19 // .next = NULL,
20 // .resource = {
21 // {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
22 // {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 1, &grlib_grspw_0n1_res[0]},
23 // RES_EMPTY /* Mark end of resource array */
24 // }
25 //};
26
27 struct drvmgr_bus_res grlib_drv_resources =
28 {
29 NULL,
30 {
18 {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
31 {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
19 // {DRIVER_AMBAPP_GAISLER_APBUART_ID, 0, &grlib_drv_res_apbuart0[0]},
32 {DRIVER_AMBAPP_GAISLER_GRSPW_ID, 1, &grlib_grspw_0n1_res[0]},
20 // {DRIVER_AMBAPP_GAISLER_APBUART_ID, 1, &grlib_drv_res_apbuart1[0]},
33 RES_EMPTY /* Mark end of resource array */
21 RES_EMPTY /* Mark end of device resource array */
22 }
34 }
23 };
35 };
24
25
@@ -1,934 +1,938
1 /** This is the RTEMS initialization module.
1 /** This is the RTEMS initialization module.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * This module contains two very different information:
6 * This module contains two very different information:
7 * - specific instructions to configure the compilation of the RTEMS executive
7 * - specific instructions to configure the compilation of the RTEMS executive
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
9 *
9 *
10 */
10 */
11
11
12 //*************************
12 //*************************
13 // GPL reminder to be added
13 // GPL reminder to be added
14 //*************************
14 //*************************
15
15
16 #include <rtems.h>
16 #include <rtems.h>
17
17
18 /* configuration information */
18 /* configuration information */
19
19
20 #define CONFIGURE_INIT
20 #define CONFIGURE_INIT
21
21
22 #include <bsp.h> /* for device driver prototypes */
22 #include <bsp.h> /* for device driver prototypes */
23
23
24 /* configuration information */
24 /* configuration information */
25
25
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
28
28
29 #define CONFIGURE_MAXIMUM_TASKS 20
29 #define CONFIGURE_MAXIMUM_TASKS 20
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
37 #define CONFIGURE_MAXIMUM_PERIODS 5
37 #define CONFIGURE_MAXIMUM_PERIODS 5
38 #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [link] [spacewire_reset_link]
38 #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [link] [spacewire_reset_link]
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
40 #ifdef PRINT_STACK_REPORT
40 #ifdef PRINT_STACK_REPORT
41 #define CONFIGURE_STACK_CHECKER_ENABLED
41 #define CONFIGURE_STACK_CHECKER_ENABLED
42 #endif
42 #endif
43
43
44 #include <rtems/confdefs.h>
44 #include <rtems/confdefs.h>
45
45
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
47 #ifdef RTEMS_DRVMGR_STARTUP
47 #ifdef RTEMS_DRVMGR_STARTUP
48 #ifdef LEON3
48 #ifdef LEON3
49 /* Add Timer and UART Driver */
49 /* Add Timer and UART Driver */
50 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
50
51 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
51 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
52 #endif
52 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
53 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
53 #endif
54 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
54
55 #endif
55 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
56 #endif
56 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
57 #endif
58 #include <drvmgr/drvmgr_confdefs.h>
58
59 #endif
60 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
61
62 #include <drvmgr/drvmgr_confdefs.h>
59 #endif
63 #endif
60
64
61 #include "fsw_init.h"
65 #include "fsw_init.h"
62 #include "fsw_config.c"
66 #include "fsw_config.c"
63 #include "GscMemoryLPP.hpp"
67 #include "GscMemoryLPP.hpp"
64
68
65 void initCache()
69 void initCache()
66 {
70 {
67 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
71 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
68 // These should only be read and written using 32-bit LDA/STA instructions.
72 // These should only be read and written using 32-bit LDA/STA instructions.
69 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
73 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
70 // The table below shows the register addresses:
74 // The table below shows the register addresses:
71 // 0x00 Cache control register
75 // 0x00 Cache control register
72 // 0x04 Reserved
76 // 0x04 Reserved
73 // 0x08 Instruction cache configuration register
77 // 0x08 Instruction cache configuration register
74 // 0x0C Data cache configuration register
78 // 0x0C Data cache configuration register
75
79
76 // Cache Control Register Leon3 / Leon3FT
80 // Cache Control Register Leon3 / Leon3FT
77 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
81 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
78 // RFT PS TB DS FD FI FT ST IB
82 // RFT PS TB DS FD FI FT ST IB
79 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
83 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
80 // IP DP ITE IDE DTE DDE DF IF DCS ICS
84 // IP DP ITE IDE DTE DDE DF IF DCS ICS
81
85
82 unsigned int cacheControlRegister;
86 unsigned int cacheControlRegister;
83
87
84 CCR_resetCacheControlRegister();
88 CCR_resetCacheControlRegister();
85 ASR16_resetRegisterProtectionControlRegister();
89 ASR16_resetRegisterProtectionControlRegister();
86
90
87 cacheControlRegister = CCR_getValue();
91 cacheControlRegister = CCR_getValue();
88 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
92 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
89 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
93 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
90
94
91 CCR_enableInstructionCache(); // ICS bits
95 CCR_enableInstructionCache(); // ICS bits
92 CCR_enableDataCache(); // DCS bits
96 CCR_enableDataCache(); // DCS bits
93 CCR_enableInstructionBurstFetch(); // IB bit
97 CCR_enableInstructionBurstFetch(); // IB bit
94
98
95 faultTolerantScheme();
99 faultTolerantScheme();
96
100
97 cacheControlRegister = CCR_getValue();
101 cacheControlRegister = CCR_getValue();
98 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
102 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
99 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
103 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
100
104
101 PRINTF("\n");
105 PRINTF("\n");
102 }
106 }
103
107
104 rtems_task Init( rtems_task_argument ignored )
108 rtems_task Init( rtems_task_argument ignored )
105 {
109 {
106 /** This is the RTEMS INIT taks, it is the first task launched by the system.
110 /** This is the RTEMS INIT taks, it is the first task launched by the system.
107 *
111 *
108 * @param unused is the starting argument of the RTEMS task
112 * @param unused is the starting argument of the RTEMS task
109 *
113 *
110 * The INIT task create and run all other RTEMS tasks.
114 * The INIT task create and run all other RTEMS tasks.
111 *
115 *
112 */
116 */
113
117
114 //***********
118 //***********
115 // INIT CACHE
119 // INIT CACHE
116
120
117 unsigned char *vhdlVersion;
121 unsigned char *vhdlVersion;
118
122
119 reset_lfr();
123 reset_lfr();
120
124
121 reset_local_time();
125 reset_local_time();
122
126
123 rtems_cpu_usage_reset();
127 rtems_cpu_usage_reset();
124
128
125 rtems_status_code status;
129 rtems_status_code status;
126 rtems_status_code status_spw;
130 rtems_status_code status_spw;
127 rtems_isr_entry old_isr_handler;
131 rtems_isr_entry old_isr_handler;
128
132
129 // UART settings
133 // UART settings
130 enable_apbuart_transmitter();
134 enable_apbuart_transmitter();
131 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
135 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
132
136
133 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
137 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
134
138
135
139
136 PRINTF("\n\n\n\n\n")
140 PRINTF("\n\n\n\n\n")
137
141
138 initCache();
142 initCache();
139
143
140 PRINTF("*************************\n")
144 PRINTF("*************************\n")
141 PRINTF("** LFR Flight Software **\n")
145 PRINTF("** LFR Flight Software **\n")
142 PRINTF1("** %d.", SW_VERSION_N1)
146 PRINTF1("** %d.", SW_VERSION_N1)
143 PRINTF1("%d." , SW_VERSION_N2)
147 PRINTF1("%d." , SW_VERSION_N2)
144 PRINTF1("%d." , SW_VERSION_N3)
148 PRINTF1("%d." , SW_VERSION_N3)
145 PRINTF1("%d **\n", SW_VERSION_N4)
149 PRINTF1("%d **\n", SW_VERSION_N4)
146
150
147 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
151 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
148 PRINTF("** VHDL **\n")
152 PRINTF("** VHDL **\n")
149 PRINTF1("** %d.", vhdlVersion[1])
153 PRINTF1("** %d.", vhdlVersion[1])
150 PRINTF1("%d." , vhdlVersion[2])
154 PRINTF1("%d." , vhdlVersion[2])
151 PRINTF1("%d **\n", vhdlVersion[3])
155 PRINTF1("%d **\n", vhdlVersion[3])
152 PRINTF("*************************\n")
156 PRINTF("*************************\n")
153 PRINTF("\n\n")
157 PRINTF("\n\n")
154
158
155 init_parameter_dump();
159 init_parameter_dump();
156 init_kcoefficients_dump();
160 init_kcoefficients_dump();
157 init_local_mode_parameters();
161 init_local_mode_parameters();
158 init_housekeeping_parameters();
162 init_housekeeping_parameters();
159 init_k_coefficients_prc0();
163 init_k_coefficients_prc0();
160 init_k_coefficients_prc1();
164 init_k_coefficients_prc1();
161 init_k_coefficients_prc2();
165 init_k_coefficients_prc2();
162 pa_bia_status_info = 0x00;
166 pa_bia_status_info = 0x00;
163 cp_rpw_sc_rw_f_flags = 0x00;
167 cp_rpw_sc_rw_f_flags = 0x00;
164 cp_rpw_sc_rw1_f1 = 0.0;
168 cp_rpw_sc_rw1_f1 = 0.0;
165 cp_rpw_sc_rw1_f2 = 0.0;
169 cp_rpw_sc_rw1_f2 = 0.0;
166 cp_rpw_sc_rw2_f1 = 0.0;
170 cp_rpw_sc_rw2_f1 = 0.0;
167 cp_rpw_sc_rw2_f2 = 0.0;
171 cp_rpw_sc_rw2_f2 = 0.0;
168 cp_rpw_sc_rw3_f1 = 0.0;
172 cp_rpw_sc_rw3_f1 = 0.0;
169 cp_rpw_sc_rw3_f2 = 0.0;
173 cp_rpw_sc_rw3_f2 = 0.0;
170 cp_rpw_sc_rw4_f1 = 0.0;
174 cp_rpw_sc_rw4_f1 = 0.0;
171 cp_rpw_sc_rw4_f2 = 0.0;
175 cp_rpw_sc_rw4_f2 = 0.0;
172 // initialize filtering parameters
176 // initialize filtering parameters
173 filterPar.spare_sy_lfr_pas_filter_enabled = DEFAULT_SY_LFR_PAS_FILTER_ENABLED;
177 filterPar.spare_sy_lfr_pas_filter_enabled = DEFAULT_SY_LFR_PAS_FILTER_ENABLED;
174 filterPar.sy_lfr_pas_filter_modulus = DEFAULT_SY_LFR_PAS_FILTER_MODULUS;
178 filterPar.sy_lfr_pas_filter_modulus = DEFAULT_SY_LFR_PAS_FILTER_MODULUS;
175 filterPar.sy_lfr_pas_filter_tbad = DEFAULT_SY_LFR_PAS_FILTER_TBAD;
179 filterPar.sy_lfr_pas_filter_tbad = DEFAULT_SY_LFR_PAS_FILTER_TBAD;
176 filterPar.sy_lfr_pas_filter_offset = DEFAULT_SY_LFR_PAS_FILTER_OFFSET;
180 filterPar.sy_lfr_pas_filter_offset = DEFAULT_SY_LFR_PAS_FILTER_OFFSET;
177 filterPar.sy_lfr_pas_filter_shift = DEFAULT_SY_LFR_PAS_FILTER_SHIFT;
181 filterPar.sy_lfr_pas_filter_shift = DEFAULT_SY_LFR_PAS_FILTER_SHIFT;
178 filterPar.sy_lfr_sc_rw_delta_f = DEFAULT_SY_LFR_SC_RW_DELTA_F;
182 filterPar.sy_lfr_sc_rw_delta_f = DEFAULT_SY_LFR_SC_RW_DELTA_F;
179 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
183 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
180
184
181 // waveform picker initialization
185 // waveform picker initialization
182 WFP_init_rings();
186 WFP_init_rings();
183 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
187 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
184 WFP_reset_current_ring_nodes();
188 WFP_reset_current_ring_nodes();
185 reset_waveform_picker_regs();
189 reset_waveform_picker_regs();
186
190
187 // spectral matrices initialization
191 // spectral matrices initialization
188 SM_init_rings(); // initialize spectral matrices rings
192 SM_init_rings(); // initialize spectral matrices rings
189 SM_reset_current_ring_nodes();
193 SM_reset_current_ring_nodes();
190 reset_spectral_matrix_regs();
194 reset_spectral_matrix_regs();
191
195
192 // configure calibration
196 // configure calibration
193 configureCalibration( false ); // true means interleaved mode, false is for normal mode
197 configureCalibration( false ); // true means interleaved mode, false is for normal mode
194
198
195 updateLFRCurrentMode( LFR_MODE_STANDBY );
199 updateLFRCurrentMode( LFR_MODE_STANDBY );
196
200
197 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
201 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
198
202
199 create_names(); // create all names
203 create_names(); // create all names
200
204
201 status = create_timecode_timer(); // create the timer used by timecode_irq_handler
205 status = create_timecode_timer(); // create the timer used by timecode_irq_handler
202 if (status != RTEMS_SUCCESSFUL)
206 if (status != RTEMS_SUCCESSFUL)
203 {
207 {
204 PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
208 PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
205 }
209 }
206
210
207 status = create_message_queues(); // create message queues
211 status = create_message_queues(); // create message queues
208 if (status != RTEMS_SUCCESSFUL)
212 if (status != RTEMS_SUCCESSFUL)
209 {
213 {
210 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
214 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
211 }
215 }
212
216
213 status = create_all_tasks(); // create all tasks
217 status = create_all_tasks(); // create all tasks
214 if (status != RTEMS_SUCCESSFUL)
218 if (status != RTEMS_SUCCESSFUL)
215 {
219 {
216 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
220 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
217 }
221 }
218
222
219 // **************************
223 // **************************
220 // <SPACEWIRE INITIALIZATION>
224 // <SPACEWIRE INITIALIZATION>
221 status_spw = spacewire_open_link(); // (1) open the link
225 status_spw = spacewire_open_link(); // (1) open the link
222 if ( status_spw != RTEMS_SUCCESSFUL )
226 if ( status_spw != RTEMS_SUCCESSFUL )
223 {
227 {
224 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
228 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
225 }
229 }
226
230
227 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
231 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
228 {
232 {
229 status_spw = spacewire_configure_link( fdSPW );
233 status_spw = spacewire_configure_link( fdSPW );
230 if ( status_spw != RTEMS_SUCCESSFUL )
234 if ( status_spw != RTEMS_SUCCESSFUL )
231 {
235 {
232 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
236 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
233 }
237 }
234 }
238 }
235
239
236 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
240 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
237 {
241 {
238 status_spw = spacewire_start_link( fdSPW );
242 status_spw = spacewire_start_link( fdSPW );
239 if ( status_spw != RTEMS_SUCCESSFUL )
243 if ( status_spw != RTEMS_SUCCESSFUL )
240 {
244 {
241 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
245 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
242 }
246 }
243 }
247 }
244 // </SPACEWIRE INITIALIZATION>
248 // </SPACEWIRE INITIALIZATION>
245 // ***************************
249 // ***************************
246
250
247 status = start_all_tasks(); // start all tasks
251 status = start_all_tasks(); // start all tasks
248 if (status != RTEMS_SUCCESSFUL)
252 if (status != RTEMS_SUCCESSFUL)
249 {
253 {
250 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
254 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
251 }
255 }
252
256
253 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
257 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
254 status = start_recv_send_tasks();
258 status = start_recv_send_tasks();
255 if ( status != RTEMS_SUCCESSFUL )
259 if ( status != RTEMS_SUCCESSFUL )
256 {
260 {
257 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
261 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
258 }
262 }
259
263
260 // suspend science tasks, they will be restarted later depending on the mode
264 // suspend science tasks, they will be restarted later depending on the mode
261 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
265 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
262 if (status != RTEMS_SUCCESSFUL)
266 if (status != RTEMS_SUCCESSFUL)
263 {
267 {
264 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
268 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
265 }
269 }
266
270
267 // configure IRQ handling for the waveform picker unit
271 // configure IRQ handling for the waveform picker unit
268 status = rtems_interrupt_catch( waveforms_isr<