# HG changeset patch # User paul # Date 2014-06-24 10:53:02 # Node ID 32d2a1c32a62a8b595804ec211ecc58e54ccfbe1 # Parent e0676cd8b3cd5624be55deaaa47bf08c2cb00492 Sync before going back to 1.0.0.12 for srec generation diff --git a/FSW-qt/Makefile b/FSW-qt/Makefile --- a/FSW-qt/Makefile +++ b/FSW-qt/Makefile @@ -1,6 +1,6 @@ ############################################################################# # Makefile for building: bin/fsw -# Generated by qmake (2.01a) (Qt 4.8.6) on: Mon Jun 23 07:48:42 2014 +# Generated by qmake (2.01a) (Qt 4.8.6) on: Tue Jun 24 09:17:30 2014 # Project: fsw-qt.pro # Template: app # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro @@ -10,7 +10,7 @@ CC = sparc-rtems-gcc CXX = sparc-rtems-g++ -DEFINES = -DSW_VERSION_N1=1 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=12 -DPRINT_MESSAGES_ON_CONSOLE +DEFINES = -DSW_VERSION_N1=1 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=13 -DPRINT_MESSAGES_ON_CONSOLE CFLAGS = -pipe -O3 -Wall $(DEFINES) CXXFLAGS = -pipe -O3 -Wall $(DEFINES) INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header -I../header/processing -I../src/LFR_basic-parameters diff --git a/FSW-qt/fsw-qt.pro b/FSW-qt/fsw-qt.pro --- a/FSW-qt/fsw-qt.pro +++ b/FSW-qt/fsw-qt.pro @@ -11,7 +11,7 @@ SWVERSION=-1-0 DEFINES += SW_VERSION_N1=1 # major DEFINES += SW_VERSION_N2=0 # minor DEFINES += SW_VERSION_N3=0 # patch -DEFINES += SW_VERSION_N4=12 # internal +DEFINES += SW_VERSION_N4=13 # internal contains( CONFIG, debug_tch ) { DEFINES += DEBUG_TCH diff --git a/FSW-qt/fsw-qt.pro.user b/FSW-qt/fsw-qt.pro.user --- a/FSW-qt/fsw-qt.pro.user +++ b/FSW-qt/fsw-qt.pro.user @@ -1,6 +1,6 @@ - + ProjectExplorer.Project.ActiveTarget diff --git a/header/processing/fsw_processing.h b/header/processing/fsw_processing.h --- a/header/processing/fsw_processing.h +++ b/header/processing/fsw_processing.h @@ -160,23 +160,29 @@ void SM_average( float *averaged_spec_ma void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider ) { + // reorganize the data to have a matrix in the VHDL format + // INPUT (VHDL format) + // component_0[0 .. 127] component_1[0 .. 127] .. component_24[0 .. 127] + // OUTPUT (ICD format) + // matrix_0[0 .. 24] matrix_1[0 .. 24] .. matrix_127[0 .. 24] + int frequencyBin; int asmComponent; - unsigned int offsetAveragedSpecMatReorganized; - unsigned int offsetAveragedSpecMat; + unsigned int offsetASMReorganized; + unsigned int offsetASM; for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++) { for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ ) { - offsetAveragedSpecMatReorganized = + offsetASM = + asmComponent * NB_BINS_PER_SM + + frequencyBin; + offsetASMReorganized = frequencyBin * NB_VALUES_PER_SM + asmComponent; - offsetAveragedSpecMat = - asmComponent * NB_BINS_PER_SM - + frequencyBin; - averaged_spec_mat_reorganized[offsetAveragedSpecMatReorganized ] = - averaged_spec_mat[ offsetAveragedSpecMat ] / divider; + averaged_spec_mat_reorganized[ offsetASMReorganized ] = + averaged_spec_mat[ offsetASM ] / divider; } } } @@ -215,6 +221,12 @@ void ASM_compress_reorganize_and_divide( void ASM_convert( volatile float *input_matrix, char *output_matrix) { + // convert the data to have a matrix in compressed float, 16 bits = [sign 1 bit *** exp 8 bits *** fraction 7 bits] + // INTPUT (ICD format) + // matrix_0[0 .. 24] matrix_1[0 .. 24] .. matrix_127[0 .. 24] + // OUTPUT (ICD format) + // matrix_0[0 .. 24] matrix_1[0 .. 24] .. matrix_127[0 .. 24] + unsigned int frequencyBin; unsigned int asmComponent; char * pt_char_input;