IP documentation » History » Revision 10
Revision 9 (Jean-Christophe Pellion, 27/02/2014 04:01 PM) → Revision 10/38 (Jean-Christophe Pellion, 27/02/2014 04:03 PM)
{{>toc}} h1. IP documentation h1. h2. General Purpose ---- h2. h3. Synchronizer {{collapse(SyncFF) Sync_FF permit to synchronize a signal A in the clock domain clk. Normally, the A signal must be the output of a FF cloked in an other domain. You shouldtn't have "logic" between the 2 domain. You can configure the FF number (default 2). This number is depending of the MTBF(Mean Time Between Failure). p=. !{width: 25%}SYNC_FF.png! <pre><code class="vhdl"> COMPONENT SYNC_FF_LPP_JCP GENERIC ( NB_FF_OF_SYNC : INTEGER); PORT ( clk : IN STD_LOGIC; rstn : IN STD_LOGIC; A : IN STD_LOGIC; A_sync : OUT STD_LOGIC); END COMPONENT; </code></pre> |_.Parameter |_.Type |_.Size |_.Description |_.Default | |NB_FF_OF_SYNC |Integer | |Number of FF |2 | |\5.| |_.Signal |_.Direction |_.Size |_.Function |_. Active | |clk |input |1 |clock |rising edge | |rstn |input |1 |reset |low | |A |input |1 |data in | | |A_sync |ouput |1 |data out synchronized | | }}